drivers/gpu/drm/imx/imx-ldb.c

   1 /*
   2  * i.MX drm driver - LVDS display bridge
   3  *
   4  * Copyright (C) 2012 Sascha Hauer, Pengutronix
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  */
  15
  16 #include <linux/module.h>
  17 #include <linux/clk.h>
  18 #include <linux/component.h>
  19 #include <drm/drmP.h>
  20 #include <drm/drm_fb_helper.h>
  21 #include <drm/drm_crtc_helper.h>
  22 #include <drm/drm_of.h>
  23 #include <drm/drm_panel.h>
  24 #include <linux/mfd/syscon.h>
  25 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
  26 #include <linux/of_device.h>
  27 #include <linux/of_graph.h>
  28 #include <video/of_videomode.h>
  29 #include <linux/regmap.h>
  30 #include <linux/videodev2.h>
  31
  32 #include "imx-drm.h"
  33
  34 #define DRIVER_NAME "imx-ldb"
  35
  36 #define LDB_CH0_MODE_EN_TO_DI0          (1 << 0)
  37 #define LDB_CH0_MODE_EN_TO_DI1          (3 << 0)
  38 #define LDB_CH0_MODE_EN_MASK            (3 << 0)
  39 #define LDB_CH1_MODE_EN_TO_DI0          (1 << 2)
  40 #define LDB_CH1_MODE_EN_TO_DI1          (3 << 2)
  41 #define LDB_CH1_MODE_EN_MASK            (3 << 2)
  42 #define LDB_SPLIT_MODE_EN               (1 << 4)
  43 #define LDB_DATA_WIDTH_CH0_24           (1 << 5)
  44 #define LDB_BIT_MAP_CH0_JEIDA           (1 << 6)
  45 #define LDB_DATA_WIDTH_CH1_24           (1 << 7)
  46 #define LDB_BIT_MAP_CH1_JEIDA           (1 << 8)
  47 #define LDB_DI0_VS_POL_ACT_LOW          (1 << 9)
  48 #define LDB_DI1_VS_POL_ACT_LOW          (1 << 10)
  49 #define LDB_BGREF_RMODE_INT             (1 << 15)
  50
  51 #define con_to_imx_ldb_ch(x) container_of(x, struct imx_ldb_channel, connector)
  52 #define enc_to_imx_ldb_ch(x) container_of(x, struct imx_ldb_channel, encoder)
  53
  54 struct imx_ldb;
  55
  56 struct imx_ldb_channel {
  57         struct imx_ldb *ldb;
  58         struct drm_connector connector;
  59         struct drm_encoder encoder;
  60         struct drm_panel *panel;
  61         struct device_node *child;
  62         struct i2c_adapter *ddc;
  63         int chno;
  64         void *edid;
  65         int edid_len;
  66         struct drm_display_mode mode;
  67         int mode_valid;
  68         int bus_format;
  69 };
  70
  71 struct bus_mux {
  72         int reg;
  73         int shift;
  74         int mask;
  75 };
  76
  77 struct imx_ldb {
  78         struct regmap *regmap;
  79         struct device *dev;
  80         struct imx_ldb_channel channel[2];
  81         struct clk *clk[2]; /* our own clock */
  82         struct clk *clk_sel[4]; /* parent of display clock */
  83         struct clk *clk_parent[4]; /* original parent of clk_sel */
  84         struct clk *clk_pll[2]; /* upstream clock we can adjust */
  85         u32 ldb_ctrl;
  86         const struct bus_mux *lvds_mux;
  87 };
  88
  89 static enum drm_connector_status imx_ldb_connector_detect(
  90                 struct drm_connector *connector, bool force)
  91 {
  92         return connector_status_connected;
  93 }
  94
  95 static int imx_ldb_connector_get_modes(struct drm_connector *connector)
  96 {
  97         struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
  98         int num_modes = 0;
  99
 100         if (imx_ldb_ch->panel && imx_ldb_ch->panel->funcs &&
 101             imx_ldb_ch->panel->funcs->get_modes) {
 102                 struct drm_display_info *di = &connector->display_info;
 103
 104                 num_modes = imx_ldb_ch->panel->funcs->get_modes(imx_ldb_ch->panel);
 105                 if (!imx_ldb_ch->bus_format && di->num_bus_formats)
 106                         imx_ldb_ch->bus_format = di->bus_formats[0];
 107                 if (num_modes > 0)
 108                         return num_modes;
 109         }
 110
 111         if (!imx_ldb_ch->edid && imx_ldb_ch->ddc)
 112                 imx_ldb_ch->edid = drm_get_edid(connector, imx_ldb_ch->ddc);
 113
 114         if (imx_ldb_ch->edid) {
 115                 drm_mode_connector_update_edid_property(connector,
 116                                                         imx_ldb_ch->edid);
 117                 num_modes = drm_add_edid_modes(connector, imx_ldb_ch->edid);
 118         }
 119
 120         if (imx_ldb_ch->mode_valid) {
 121                 struct drm_display_mode *mode;
 122
 123                 mode = drm_mode_create(connector->dev);
 124                 if (!mode)
 125                         return -EINVAL;
 126                 drm_mode_copy(mode, &imx_ldb_ch->mode);
 127                 mode->type |= DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
 128                 drm_mode_probed_add(connector, mode);
 129                 num_modes++;
 130         }
 131
 132         return num_modes;
 133 }
 134
 135 static struct drm_encoder *imx_ldb_connector_best_encoder(
 136                 struct drm_connector *connector)
 137 {
 138         struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
 139
 140         return &imx_ldb_ch->encoder;
 141 }
 142
 143 static void imx_ldb_encoder_dpms(struct drm_encoder *encoder, int mode)
 144 {
 145 }
 146
 147 static void imx_ldb_set_clock(struct imx_ldb *ldb, int mux, int chno,
 148                 unsigned long serial_clk, unsigned long di_clk)
 149 {
 150         int ret;
 151
 152         dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
 153                         clk_get_rate(ldb->clk_pll[chno]), serial_clk);
 154         clk_set_rate(ldb->clk_pll[chno], serial_clk);
 155
 156         dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
 157                         clk_get_rate(ldb->clk_pll[chno]));
 158
 159         dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
 160                         clk_get_rate(ldb->clk[chno]),
 161                         (long int)di_clk);
 162         clk_set_rate(ldb->clk[chno], di_clk);
 163
 164         dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
 165                         clk_get_rate(ldb->clk[chno]));
 166
 167         /* set display clock mux to LDB input clock */
 168         ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk[chno]);
 169         if (ret)
 170                 dev_err(ldb->dev,
 171                         "unable to set di%d parent clock to ldb_di%d\n", mux,
 172                         chno);
 173 }
 174
 175 static void imx_ldb_encoder_prepare(struct drm_encoder *encoder)
 176 {
 177         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 178         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 179         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 180         u32 bus_format;
 181
 182         switch (imx_ldb_ch->bus_format) {
 183         default:
 184                 dev_warn(ldb->dev,
 185                          "could not determine data mapping, default to 18-bit \"spwg\"\n");
 186                 /* fallthrough */
 187         case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
 188                 bus_format = MEDIA_BUS_FMT_RGB666_1X18;
 189                 break;
 190         case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
 191                 bus_format = MEDIA_BUS_FMT_RGB888_1X24;
 192                 if (imx_ldb_ch->chno == 0 || dual)
 193                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24;
 194                 if (imx_ldb_ch->chno == 1 || dual)
 195                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24;
 196                 break;
 197         case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
 198                 bus_format = MEDIA_BUS_FMT_RGB888_1X24;
 199                 if (imx_ldb_ch->chno == 0 || dual)
 200                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24 |
 201                                          LDB_BIT_MAP_CH0_JEIDA;
 202                 if (imx_ldb_ch->chno == 1 || dual)
 203                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24 |
 204                                          LDB_BIT_MAP_CH1_JEIDA;
 205                 break;
 206         }
 207
 208         imx_drm_set_bus_format(encoder, bus_format);
 209 }
 210
 211 static void imx_ldb_encoder_commit(struct drm_encoder *encoder)
 212 {
 213         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 214         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 215         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 216         int mux = drm_of_encoder_active_port_id(imx_ldb_ch->child, encoder);
 217
 218         drm_panel_prepare(imx_ldb_ch->panel);
 219
 220         if (dual) {
 221                 clk_prepare_enable(ldb->clk[0]);
 222                 clk_prepare_enable(ldb->clk[1]);
 223         }
 224
 225         if (imx_ldb_ch == &ldb->channel[0] || dual) {
 226                 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
 227                 if (mux == 0 || ldb->lvds_mux)
 228                         ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI0;
 229                 else if (mux == 1)
 230                         ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI1;
 231         }
 232         if (imx_ldb_ch == &ldb->channel[1] || dual) {
 233                 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
 234                 if (mux == 1 || ldb->lvds_mux)
 235                         ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI1;
 236                 else if (mux == 0)
 237                         ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI0;
 238         }
 239
 240         if (ldb->lvds_mux) {
 241                 const struct bus_mux *lvds_mux = NULL;
 242
 243                 if (imx_ldb_ch == &ldb->channel[0])
 244                         lvds_mux = &ldb->lvds_mux[0];
 245                 else if (imx_ldb_ch == &ldb->channel[1])
 246                         lvds_mux = &ldb->lvds_mux[1];
 247
 248                 regmap_update_bits(ldb->regmap, lvds_mux->reg, lvds_mux->mask,
 249                                    mux << lvds_mux->shift);
 250         }
 251
 252         regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
 253
 254         drm_panel_enable(imx_ldb_ch->panel);
 255 }
 256
 257 static void imx_ldb_encoder_mode_set(struct drm_encoder *encoder,
 258                          struct drm_display_mode *orig_mode,
 259                          struct drm_display_mode *mode)
 260 {
 261         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 262         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 263         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 264         unsigned long serial_clk;
 265         unsigned long di_clk = mode->clock * 1000;
 266         int mux = drm_of_encoder_active_port_id(imx_ldb_ch->child, encoder);
 267
 268         if (mode->clock > 170000) {
 269                 dev_warn(ldb->dev,
 270                          "%s: mode exceeds 170 MHz pixel clock\n", __func__);
 271         }
 272         if (mode->clock > 85000 && !dual) {
 273                 dev_warn(ldb->dev,
 274                          "%s: mode exceeds 85 MHz pixel clock\n", __func__);
 275         }
 276
 277         if (dual) {
 278                 serial_clk = 3500UL * mode->clock;
 279                 imx_ldb_set_clock(ldb, mux, 0, serial_clk, di_clk);
 280                 imx_ldb_set_clock(ldb, mux, 1, serial_clk, di_clk);
 281         } else {
 282                 serial_clk = 7000UL * mode->clock;
 283                 imx_ldb_set_clock(ldb, mux, imx_ldb_ch->chno, serial_clk,
 284                                   di_clk);
 285         }
 286
 287         /* FIXME - assumes straight connections DI0 --> CH0, DI1 --> CH1 */
 288         if (imx_ldb_ch == &ldb->channel[0]) {
 289                 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
 290                         ldb->ldb_ctrl |= LDB_DI0_VS_POL_ACT_LOW;
 291                 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 292                         ldb->ldb_ctrl &= ~LDB_DI0_VS_POL_ACT_LOW;
 293         }
 294         if (imx_ldb_ch == &ldb->channel[1]) {
 295                 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
 296                         ldb->ldb_ctrl |= LDB_DI1_VS_POL_ACT_LOW;
 297                 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 298                         ldb->ldb_ctrl &= ~LDB_DI1_VS_POL_ACT_LOW;
 299         }
 300 }
 301
 302 static void imx_ldb_encoder_disable(struct drm_encoder *encoder)
 303 {
 304         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 305         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 306         int mux, ret;
 307
 308         /*
 309          * imx_ldb_encoder_disable is called by
 310          * drm_helper_disable_unused_functions without
 311          * the encoder being enabled before.
 312          */
 313         if (imx_ldb_ch == &ldb->channel[0] &&
 314             (ldb->ldb_ctrl & LDB_CH0_MODE_EN_MASK) == 0)
 315                 return;
 316         else if (imx_ldb_ch == &ldb->channel[1] &&
 317                  (ldb->ldb_ctrl & LDB_CH1_MODE_EN_MASK) == 0)
 318                 return;
 319
 320         drm_panel_disable(imx_ldb_ch->panel);
 321
 322         if (imx_ldb_ch == &ldb->channel[0])
 323                 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
 324         else if (imx_ldb_ch == &ldb->channel[1])
 325                 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
 326
 327         regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
 328
 329         if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
 330                 clk_disable_unprepare(ldb->clk[0]);
 331                 clk_disable_unprepare(ldb->clk[1]);
 332         }
 333
 334         if (ldb->lvds_mux) {
 335                 const struct bus_mux *lvds_mux = NULL;
 336
 337                 if (imx_ldb_ch == &ldb->channel[0])
 338                         lvds_mux = &ldb->lvds_mux[0];
 339                 else if (imx_ldb_ch == &ldb->channel[1])
 340                         lvds_mux = &ldb->lvds_mux[1];
 341
 342                 regmap_read(ldb->regmap, lvds_mux->reg, &mux);
 343                 mux &= lvds_mux->mask;
 344                 mux >>= lvds_mux->shift;
 345         } else {
 346                 mux = (imx_ldb_ch == &ldb->channel[0]) ? 0 : 1;
 347         }
 348
 349         /* set display clock mux back to original input clock */
 350         ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk_parent[mux]);
 351         if (ret)
 352                 dev_err(ldb->dev,
 353                         "unable to set di%d parent clock to original parent\n",
 354                         mux);
 355
 356         drm_panel_unprepare(imx_ldb_ch->panel);
 357 }
 358
 359 static const struct drm_connector_funcs imx_ldb_connector_funcs = {
 360         .dpms = drm_helper_connector_dpms,
 361         .fill_modes = drm_helper_probe_single_connector_modes,
 362         .detect = imx_ldb_connector_detect,
 363         .destroy = imx_drm_connector_destroy,
 364 };
 365
 366 static const struct drm_connector_helper_funcs imx_ldb_connector_helper_funcs = {
 367         .get_modes = imx_ldb_connector_get_modes,
 368         .best_encoder = imx_ldb_connector_best_encoder,
 369 };
 370
 371 static const struct drm_encoder_funcs imx_ldb_encoder_funcs = {
 372         .destroy = imx_drm_encoder_destroy,
 373 };
 374
 375 static const struct drm_encoder_helper_funcs imx_ldb_encoder_helper_funcs = {
 376         .dpms = imx_ldb_encoder_dpms,
 377         .prepare = imx_ldb_encoder_prepare,
 378         .commit = imx_ldb_encoder_commit,
 379         .mode_set = imx_ldb_encoder_mode_set,
 380         .disable = imx_ldb_encoder_disable,
 381 };
 382
 383 static int imx_ldb_get_clk(struct imx_ldb *ldb, int chno)
 384 {
 385         char clkname[16];
 386
 387         snprintf(clkname, sizeof(clkname), "di%d", chno);
 388         ldb->clk[chno] = devm_clk_get(ldb->dev, clkname);
 389         if (IS_ERR(ldb->clk[chno]))
 390                 return PTR_ERR(ldb->clk[chno]);
 391
 392         snprintf(clkname, sizeof(clkname), "di%d_pll", chno);
 393         ldb->clk_pll[chno] = devm_clk_get(ldb->dev, clkname);
 394
 395         return PTR_ERR_OR_ZERO(ldb->clk_pll[chno]);
 396 }
 397
 398 static int imx_ldb_register(struct drm_device *drm,
 399         struct imx_ldb_channel *imx_ldb_ch)
 400 {
 401         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 402         int ret;
 403
 404         ret = imx_drm_encoder_parse_of(drm, &imx_ldb_ch->encoder,
 405                                        imx_ldb_ch->child);
 406         if (ret)
 407                 return ret;
 408
 409         ret = imx_ldb_get_clk(ldb, imx_ldb_ch->chno);
 410         if (ret)
 411                 return ret;
 412
 413         if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
 414                 ret = imx_ldb_get_clk(ldb, 1);
 415                 if (ret)
 416                         return ret;
 417         }
 418
 419         drm_encoder_helper_add(&imx_ldb_ch->encoder,
 420                         &imx_ldb_encoder_helper_funcs);
 421         drm_encoder_init(drm, &imx_ldb_ch->encoder, &imx_ldb_encoder_funcs,
 422                          DRM_MODE_ENCODER_LVDS, NULL);
 423
 424         drm_connector_helper_add(&imx_ldb_ch->connector,
 425                         &imx_ldb_connector_helper_funcs);
 426         drm_connector_init(drm, &imx_ldb_ch->connector,
 427                            &imx_ldb_connector_funcs, DRM_MODE_CONNECTOR_LVDS);
 428
 429         if (imx_ldb_ch->panel)
 430                 drm_panel_attach(imx_ldb_ch->panel, &imx_ldb_ch->connector);
 431
 432         drm_mode_connector_attach_encoder(&imx_ldb_ch->connector,
 433                         &imx_ldb_ch->encoder);
 434
 435         return 0;
 436 }
 437
 438 enum {
 439         LVDS_BIT_MAP_SPWG,
 440         LVDS_BIT_MAP_JEIDA
 441 };
 442
 443 struct imx_ldb_bit_mapping {
 444         u32 bus_format;
 445         u32 datawidth;
 446         const char * const mapping;
 447 };
 448
 449 static const struct imx_ldb_bit_mapping imx_ldb_bit_mappings[] = {
 450         { MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,  18, "spwg" },
 451         { MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,  24, "spwg" },
 452         { MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA, 24, "jeida" },
 453 };
 454
 455 static u32 of_get_bus_format(struct device *dev, struct device_node *np)
 456 {
 457         const char *bm;
 458         u32 datawidth = 0;
 459         int ret, i;
 460
 461         ret = of_property_read_string(np, "fsl,data-mapping", &bm);
 462         if (ret < 0)
 463                 return ret;
 464
 465         of_property_read_u32(np, "fsl,data-width", &datawidth);
 466
 467         for (i = 0; i < ARRAY_SIZE(imx_ldb_bit_mappings); i++) {
 468                 if (!strcasecmp(bm, imx_ldb_bit_mappings[i].mapping) &&
 469                     datawidth == imx_ldb_bit_mappings[i].datawidth)
 470                         return imx_ldb_bit_mappings[i].bus_format;
 471         }
 472
 473         dev_err(dev, "invalid data mapping: %d-bit \"%s\"\n", datawidth, bm);
 474
 475         return -ENOENT;
 476 }
 477
 478 static struct bus_mux imx6q_lvds_mux[2] = {
 479         {
 480                 .reg = IOMUXC_GPR3,
 481                 .shift = 6,
 482                 .mask = IMX6Q_GPR3_LVDS0_MUX_CTL_MASK,
 483         }, {
 484                 .reg = IOMUXC_GPR3,
 485                 .shift = 8,
 486                 .mask = IMX6Q_GPR3_LVDS1_MUX_CTL_MASK,
 487         }
 488 };
 489
 490 /*
 491  * For a device declaring compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb",
 492  * of_match_device will walk through this list and take the first entry
 493  * matching any of its compatible values. Therefore, the more generic
 494  * entries (in this case fsl,imx53-ldb) need to be ordered last.
 495  */
 496 static const struct of_device_id imx_ldb_dt_ids[] = {
 497         { .compatible = "fsl,imx6q-ldb", .data = imx6q_lvds_mux, },
 498         { .compatible = "fsl,imx53-ldb", .data = NULL, },
 499         { }
 500 };
 501 MODULE_DEVICE_TABLE(of, imx_ldb_dt_ids);
 502
 503 static int imx_ldb_bind(struct device *dev, struct device *master, void *data)
 504 {
 505         struct drm_device *drm = data;
 506         struct device_node *np = dev->of_node;
 507         const struct of_device_id *of_id =
 508                         of_match_device(imx_ldb_dt_ids, dev);
 509         struct device_node *child;
 510         const u8 *edidp;
 511         struct imx_ldb *imx_ldb;
 512         int dual;
 513         int ret;
 514         int i;
 515
 516         imx_ldb = devm_kzalloc(dev, sizeof(*imx_ldb), GFP_KERNEL);
 517         if (!imx_ldb)
 518                 return -ENOMEM;
 519
 520         imx_ldb->regmap = syscon_regmap_lookup_by_phandle(np, "gpr");
 521         if (IS_ERR(imx_ldb->regmap)) {
 522                 dev_err(dev, "failed to get parent regmap\n");
 523                 return PTR_ERR(imx_ldb->regmap);
 524         }
 525
 526         imx_ldb->dev = dev;
 527
 528         if (of_id)
 529                 imx_ldb->lvds_mux = of_id->data;
 530
 531         dual = of_property_read_bool(np, "fsl,dual-channel");
 532         if (dual)
 533                 imx_ldb->ldb_ctrl |= LDB_SPLIT_MODE_EN;
 534
 535         /*
 536          * There are three different possible clock mux configurations:
 537          * i.MX53:  ipu1_di0_sel, ipu1_di1_sel
 538          * i.MX6q:  ipu1_di0_sel, ipu1_di1_sel, ipu2_di0_sel, ipu2_di1_sel
 539          * i.MX6dl: ipu1_di0_sel, ipu1_di1_sel, lcdif_sel
 540          * Map them all to di0_sel...di3_sel.
 541          */
 542         for (i = 0; i < 4; i++) {
 543                 char clkname[16];
 544
 545                 sprintf(clkname, "di%d_sel", i);
 546                 imx_ldb->clk_sel[i] = devm_clk_get(imx_ldb->dev, clkname);
 547                 if (IS_ERR(imx_ldb->clk_sel[i])) {
 548                         ret = PTR_ERR(imx_ldb->clk_sel[i]);
 549                         imx_ldb->clk_sel[i] = NULL;
 550                         break;
 551                 }
 552
 553                 imx_ldb->clk_parent[i] = clk_get_parent(imx_ldb->clk_sel[i]);
 554         }
 555         if (i == 0)
 556                 return ret;
 557
 558         for_each_child_of_node(np, child) {
 559                 struct imx_ldb_channel *channel;
 560                 struct device_node *ddc_node;
 561                 struct device_node *ep;
 562
 563                 ret = of_property_read_u32(child, "reg", &i);
 564                 if (ret || i < 0 || i > 1)
 565                         return -EINVAL;
 566
 567                 if (dual && i > 0) {
 568                         dev_warn(dev, "dual-channel mode, ignoring second output\n");
 569                         continue;
 570                 }
 571
 572                 if (!of_device_is_available(child))
 573                         continue;
 574
 575                 channel = &imx_ldb->channel[i];
 576                 channel->ldb = imx_ldb;
 577                 channel->chno = i;
 578                 channel->child = child;
 579
 580                 /*
 581                  * The output port is port@4 with an external 4-port mux or
 582                  * port@2 with the internal 2-port mux.
 583                  */
 584                 ep = of_graph_get_endpoint_by_regs(child,
 585                                                    imx_ldb->lvds_mux ? 4 : 2,
 586                                                    -1);
 587                 if (ep) {
 588                         struct device_node *remote;
 589
 590                         remote = of_graph_get_remote_port_parent(ep);
 591                         of_node_put(ep);
 592                         if (remote)
 593                                 channel->panel = of_drm_find_panel(remote);
 594                         else
 595                                 return -EPROBE_DEFER;
 596                         of_node_put(remote);
 597                         if (!channel->panel) {
 598                                 dev_err(dev, "panel not found: %s\n",
 599                                         remote->full_name);
 600                                 return -EPROBE_DEFER;
 601                         }
 602                 }
 603
 604                 ddc_node = of_parse_phandle(child, "ddc-i2c-bus", 0);
 605                 if (ddc_node) {
 606                         channel->ddc = of_find_i2c_adapter_by_node(ddc_node);
 607                         of_node_put(ddc_node);
 608                         if (!channel->ddc) {
 609                                 dev_warn(dev, "failed to get ddc i2c adapter\n");
 610                                 return -EPROBE_DEFER;
 611                         }
 612                 }
 613
 614                 if (!channel->ddc) {
 615                         /* if no DDC available, fallback to hardcoded EDID */
 616                         dev_dbg(dev, "no ddc available\n");
 617
 618                         edidp = of_get_property(child, "edid",
 619                                                 &channel->edid_len);
 620                         if (edidp) {
 621                                 channel->edid = kmemdup(edidp,
 622                                                         channel->edid_len,
 623                                                         GFP_KERNEL);
 624                         } else if (!channel->panel) {
 625                                 /* fallback to display-timings node */
 626                                 ret = of_get_drm_display_mode(child,
 627                                                               &channel->mode,
 628                                                               0);
 629                                 if (!ret)
 630                                         channel->mode_valid = 1;
 631                         }
 632                 }
 633
 634                 channel->bus_format = of_get_bus_format(dev, child);
 635                 if (channel->bus_format == -EINVAL) {
 636                         /*
 637                          * If no bus format was specified in the device tree,
 638                          * we can still get it from the connected panel later.
 639                          */
 640                         if (channel->panel && channel->panel->funcs &&
 641                             channel->panel->funcs->get_modes)
 642                                 channel->bus_format = 0;
 643                 }
 644                 if (channel->bus_format < 0) {
 645                         dev_err(dev, "could not determine data mapping: %d\n",
 646                                 channel->bus_format);
 647                         return channel->bus_format;
 648                 }
 649
 650                 ret = imx_ldb_register(drm, channel);
 651                 if (ret)
 652                         return ret;
 653         }
 654
 655         dev_set_drvdata(dev, imx_ldb);
 656
 657         return 0;
 658 }
 659
 660 static void imx_ldb_unbind(struct device *dev, struct device *master,
 661         void *data)
 662 {
 663         struct imx_ldb *imx_ldb = dev_get_drvdata(dev);
 664         int i;
 665
 666         for (i = 0; i < 2; i++) {
 667                 struct imx_ldb_channel *channel = &imx_ldb->channel[i];
 668
 669                 if (!channel->connector.funcs)
 670                         continue;
 671
 672                 channel->connector.funcs->destroy(&channel->connector);
 673                 channel->encoder.funcs->destroy(&channel->encoder);
 674
 675                 kfree(channel->edid);
 676                 i2c_put_adapter(channel->ddc);
 677         }
 678 }
 679
 680 static const struct component_ops imx_ldb_ops = {
 681         .bind   = imx_ldb_bind,
 682         .unbind = imx_ldb_unbind,
 683 };
 684
 685 static int imx_ldb_probe(struct platform_device *pdev)
 686 {
 687         return component_add(&pdev->dev, &imx_ldb_ops);
 688 }
 689
 690 static int imx_ldb_remove(struct platform_device *pdev)
 691 {
 692         component_del(&pdev->dev, &imx_ldb_ops);
 693         return 0;
 694 }
 695
 696 static struct platform_driver imx_ldb_driver = {
 697         .probe          = imx_ldb_probe,
 698         .remove         = imx_ldb_remove,
 699         .driver         = {
 700                 .of_match_table = imx_ldb_dt_ids,
 701                 .name   = DRIVER_NAME,
 702         },
 703 };
 704
 705 module_platform_driver(imx_ldb_driver);
 706
 707 MODULE_DESCRIPTION("i.MX LVDS driver");
 708 MODULE_AUTHOR("Sascha Hauer, Pengutronix");
 709 MODULE_LICENSE("GPL");
 710 MODULE_ALIAS("platform:" DRIVER_NAME);