drivers/gpu/drm/imx/imx-ldb.c

   1 /*
   2  * i.MX drm driver - LVDS display bridge
   3  *
   4  * Copyright (C) 2012 Sascha Hauer, Pengutronix
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  */
  15
  16 #include <linux/module.h>
  17 #include <linux/clk.h>
  18 #include <linux/component.h>
  19 #include <drm/drmP.h>
  20 #include <drm/drm_fb_helper.h>
  21 #include <drm/drm_crtc_helper.h>
  22 #include <linux/mfd/syscon.h>
  23 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
  24 #include <linux/of_address.h>
  25 #include <linux/of_device.h>
  26 #include <video/of_videomode.h>
  27 #include <linux/regmap.h>
  28 #include <linux/videodev2.h>
  29
  30 #include "imx-drm.h"
  31
  32 #define DRIVER_NAME "imx-ldb"
  33
  34 #define LDB_CH0_MODE_EN_TO_DI0          (1 << 0)
  35 #define LDB_CH0_MODE_EN_TO_DI1          (3 << 0)
  36 #define LDB_CH0_MODE_EN_MASK            (3 << 0)
  37 #define LDB_CH1_MODE_EN_TO_DI0          (1 << 2)
  38 #define LDB_CH1_MODE_EN_TO_DI1          (3 << 2)
  39 #define LDB_CH1_MODE_EN_MASK            (3 << 2)
  40 #define LDB_SPLIT_MODE_EN               (1 << 4)
  41 #define LDB_DATA_WIDTH_CH0_24           (1 << 5)
  42 #define LDB_BIT_MAP_CH0_JEIDA           (1 << 6)
  43 #define LDB_DATA_WIDTH_CH1_24           (1 << 7)
  44 #define LDB_BIT_MAP_CH1_JEIDA           (1 << 8)
  45 #define LDB_DI0_VS_POL_ACT_LOW          (1 << 9)
  46 #define LDB_DI1_VS_POL_ACT_LOW          (1 << 10)
  47 #define LDB_BGREF_RMODE_INT             (1 << 15)
  48
  49 #define con_to_imx_ldb_ch(x) container_of(x, struct imx_ldb_channel, connector)
  50 #define enc_to_imx_ldb_ch(x) container_of(x, struct imx_ldb_channel, encoder)
  51
  52 struct imx_ldb;
  53
  54 struct imx_ldb_channel {
  55         struct imx_ldb *ldb;
  56         struct drm_connector connector;
  57         struct drm_encoder encoder;
  58         struct device_node *child;
  59         int chno;
  60         void *edid;
  61         int edid_len;
  62         struct drm_display_mode mode;
  63         int mode_valid;
  64 };
  65
  66 struct bus_mux {
  67         int reg;
  68         int shift;
  69         int mask;
  70 };
  71
  72 struct imx_ldb {
  73         struct regmap *regmap;
  74         struct device *dev;
  75         struct imx_ldb_channel channel[2];
  76         struct clk *clk[2]; /* our own clock */
  77         struct clk *clk_sel[4]; /* parent of display clock */
  78         struct clk *clk_pll[2]; /* upstream clock we can adjust */
  79         u32 ldb_ctrl;
  80         const struct bus_mux *lvds_mux;
  81 };
  82
  83 static enum drm_connector_status imx_ldb_connector_detect(
  84                 struct drm_connector *connector, bool force)
  85 {
  86         return connector_status_connected;
  87 }
  88
  89 static int imx_ldb_connector_get_modes(struct drm_connector *connector)
  90 {
  91         struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
  92         int num_modes = 0;
  93
  94         if (imx_ldb_ch->edid) {
  95                 drm_mode_connector_update_edid_property(connector,
  96                                                         imx_ldb_ch->edid);
  97                 num_modes = drm_add_edid_modes(connector, imx_ldb_ch->edid);
  98         }
  99
 100         if (imx_ldb_ch->mode_valid) {
 101                 struct drm_display_mode *mode;
 102
 103                 mode = drm_mode_create(connector->dev);
 104                 if (!mode)
 105                         return -EINVAL;
 106                 drm_mode_copy(mode, &imx_ldb_ch->mode);
 107                 mode->type |= DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
 108                 drm_mode_probed_add(connector, mode);
 109                 num_modes++;
 110         }
 111
 112         return num_modes;
 113 }
 114
 115 static struct drm_encoder *imx_ldb_connector_best_encoder(
 116                 struct drm_connector *connector)
 117 {
 118         struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
 119
 120         return &imx_ldb_ch->encoder;
 121 }
 122
 123 static void imx_ldb_encoder_dpms(struct drm_encoder *encoder, int mode)
 124 {
 125 }
 126
 127 static bool imx_ldb_encoder_mode_fixup(struct drm_encoder *encoder,
 128                            const struct drm_display_mode *mode,
 129                            struct drm_display_mode *adjusted_mode)
 130 {
 131         return true;
 132 }
 133
 134 static void imx_ldb_set_clock(struct imx_ldb *ldb, int mux, int chno,
 135                 unsigned long serial_clk, unsigned long di_clk)
 136 {
 137         int ret;
 138
 139         dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
 140                         clk_get_rate(ldb->clk_pll[chno]), serial_clk);
 141         clk_set_rate(ldb->clk_pll[chno], serial_clk);
 142
 143         dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
 144                         clk_get_rate(ldb->clk_pll[chno]));
 145
 146         dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
 147                         clk_get_rate(ldb->clk[chno]),
 148                         (long int)di_clk);
 149         clk_set_rate(ldb->clk[chno], di_clk);
 150
 151         dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
 152                         clk_get_rate(ldb->clk[chno]));
 153
 154         /* set display clock mux to LDB input clock */
 155         ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk[chno]);
 156         if (ret)
 157                 dev_err(ldb->dev,
 158                         "unable to set di%d parent clock to ldb_di%d\n", mux,
 159                         chno);
 160 }
 161
 162 static void imx_ldb_encoder_prepare(struct drm_encoder *encoder)
 163 {
 164         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 165         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 166         struct drm_display_mode *mode = &encoder->crtc->hwmode;
 167         u32 pixel_fmt;
 168         unsigned long serial_clk;
 169         unsigned long di_clk = mode->clock * 1000;
 170         int mux = imx_drm_encoder_get_mux_id(imx_ldb_ch->child, encoder);
 171
 172         if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
 173                 /* dual channel LVDS mode */
 174                 serial_clk = 3500UL * mode->clock;
 175                 imx_ldb_set_clock(ldb, mux, 0, serial_clk, di_clk);
 176                 imx_ldb_set_clock(ldb, mux, 1, serial_clk, di_clk);
 177         } else {
 178                 serial_clk = 7000UL * mode->clock;
 179                 imx_ldb_set_clock(ldb, mux, imx_ldb_ch->chno, serial_clk,
 180                                 di_clk);
 181         }
 182
 183         switch (imx_ldb_ch->chno) {
 184         case 0:
 185                 pixel_fmt = (ldb->ldb_ctrl & LDB_DATA_WIDTH_CH0_24) ?
 186                         V4L2_PIX_FMT_RGB24 : V4L2_PIX_FMT_BGR666;
 187                 break;
 188         case 1:
 189                 pixel_fmt = (ldb->ldb_ctrl & LDB_DATA_WIDTH_CH1_24) ?
 190                         V4L2_PIX_FMT_RGB24 : V4L2_PIX_FMT_BGR666;
 191                 break;
 192         default:
 193                 dev_err(ldb->dev, "unable to config di%d panel format\n",
 194                         imx_ldb_ch->chno);
 195                 pixel_fmt = V4L2_PIX_FMT_RGB24;
 196         }
 197
 198         imx_drm_panel_format(encoder, pixel_fmt);
 199 }
 200
 201 static void imx_ldb_encoder_commit(struct drm_encoder *encoder)
 202 {
 203         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 204         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 205         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 206         int mux = imx_drm_encoder_get_mux_id(imx_ldb_ch->child, encoder);
 207
 208         if (dual) {
 209                 clk_prepare_enable(ldb->clk[0]);
 210                 clk_prepare_enable(ldb->clk[1]);
 211         }
 212
 213         if (imx_ldb_ch == &ldb->channel[0] || dual) {
 214                 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
 215                 if (mux == 0 || ldb->lvds_mux)
 216                         ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI0;
 217                 else if (mux == 1)
 218                         ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI1;
 219         }
 220         if (imx_ldb_ch == &ldb->channel[1] || dual) {
 221                 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
 222                 if (mux == 1 || ldb->lvds_mux)
 223                         ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI1;
 224                 else if (mux == 0)
 225                         ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI0;
 226         }
 227
 228         if (ldb->lvds_mux) {
 229                 const struct bus_mux *lvds_mux = NULL;
 230
 231                 if (imx_ldb_ch == &ldb->channel[0])
 232                         lvds_mux = &ldb->lvds_mux[0];
 233                 else if (imx_ldb_ch == &ldb->channel[1])
 234                         lvds_mux = &ldb->lvds_mux[1];
 235
 236                 regmap_update_bits(ldb->regmap, lvds_mux->reg, lvds_mux->mask,
 237                                    mux << lvds_mux->shift);
 238         }
 239
 240         regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
 241 }
 242
 243 static void imx_ldb_encoder_mode_set(struct drm_encoder *encoder,
 244                          struct drm_display_mode *orig_mode,
 245                          struct drm_display_mode *mode)
 246 {
 247         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 248         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 249         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 250
 251         if (mode->clock > 170000) {
 252                 dev_warn(ldb->dev,
 253                          "%s: mode exceeds 170 MHz pixel clock\n", __func__);
 254         }
 255         if (mode->clock > 85000 && !dual) {
 256                 dev_warn(ldb->dev,
 257                          "%s: mode exceeds 85 MHz pixel clock\n", __func__);
 258         }
 259
 260         /* FIXME - assumes straight connections DI0 --> CH0, DI1 --> CH1 */
 261         if (imx_ldb_ch == &ldb->channel[0]) {
 262                 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
 263                         ldb->ldb_ctrl |= LDB_DI0_VS_POL_ACT_LOW;
 264                 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 265                         ldb->ldb_ctrl &= ~LDB_DI0_VS_POL_ACT_LOW;
 266         }
 267         if (imx_ldb_ch == &ldb->channel[1]) {
 268                 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
 269                         ldb->ldb_ctrl |= LDB_DI1_VS_POL_ACT_LOW;
 270                 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 271                         ldb->ldb_ctrl &= ~LDB_DI1_VS_POL_ACT_LOW;
 272         }
 273 }
 274
 275 static void imx_ldb_encoder_disable(struct drm_encoder *encoder)
 276 {
 277         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 278         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 279
 280         /*
 281          * imx_ldb_encoder_disable is called by
 282          * drm_helper_disable_unused_functions without
 283          * the encoder being enabled before.
 284          */
 285         if (imx_ldb_ch == &ldb->channel[0] &&
 286             (ldb->ldb_ctrl & LDB_CH0_MODE_EN_MASK) == 0)
 287                 return;
 288         else if (imx_ldb_ch == &ldb->channel[1] &&
 289                  (ldb->ldb_ctrl & LDB_CH1_MODE_EN_MASK) == 0)
 290                 return;
 291
 292         if (imx_ldb_ch == &ldb->channel[0])
 293                 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
 294         else if (imx_ldb_ch == &ldb->channel[1])
 295                 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
 296
 297         regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
 298
 299         if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
 300                 clk_disable_unprepare(ldb->clk[0]);
 301                 clk_disable_unprepare(ldb->clk[1]);
 302         }
 303 }
 304
 305 static struct drm_connector_funcs imx_ldb_connector_funcs = {
 306         .dpms = drm_helper_connector_dpms,
 307         .fill_modes = drm_helper_probe_single_connector_modes,
 308         .detect = imx_ldb_connector_detect,
 309         .destroy = imx_drm_connector_destroy,
 310 };
 311
 312 static struct drm_connector_helper_funcs imx_ldb_connector_helper_funcs = {
 313         .get_modes = imx_ldb_connector_get_modes,
 314         .best_encoder = imx_ldb_connector_best_encoder,
 315 };
 316
 317 static struct drm_encoder_funcs imx_ldb_encoder_funcs = {
 318         .destroy = imx_drm_encoder_destroy,
 319 };
 320
 321 static struct drm_encoder_helper_funcs imx_ldb_encoder_helper_funcs = {
 322         .dpms = imx_ldb_encoder_dpms,
 323         .mode_fixup = imx_ldb_encoder_mode_fixup,
 324         .prepare = imx_ldb_encoder_prepare,
 325         .commit = imx_ldb_encoder_commit,
 326         .mode_set = imx_ldb_encoder_mode_set,
 327         .disable = imx_ldb_encoder_disable,
 328 };
 329
 330 static int imx_ldb_get_clk(struct imx_ldb *ldb, int chno)
 331 {
 332         char clkname[16];
 333
 334         snprintf(clkname, sizeof(clkname), "di%d", chno);
 335         ldb->clk[chno] = devm_clk_get(ldb->dev, clkname);
 336         if (IS_ERR(ldb->clk[chno]))
 337                 return PTR_ERR(ldb->clk[chno]);
 338
 339         snprintf(clkname, sizeof(clkname), "di%d_pll", chno);
 340         ldb->clk_pll[chno] = devm_clk_get(ldb->dev, clkname);
 341
 342         return PTR_ERR_OR_ZERO(ldb->clk_pll[chno]);
 343 }
 344
 345 static int imx_ldb_register(struct drm_device *drm,
 346         struct imx_ldb_channel *imx_ldb_ch)
 347 {
 348         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 349         int ret;
 350
 351         ret = imx_drm_encoder_parse_of(drm, &imx_ldb_ch->encoder,
 352                                        imx_ldb_ch->child);
 353         if (ret)
 354                 return ret;
 355
 356         ret = imx_ldb_get_clk(ldb, imx_ldb_ch->chno);
 357         if (ret)
 358                 return ret;
 359
 360         if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
 361                 ret = imx_ldb_get_clk(ldb, 1);
 362                 if (ret)
 363                         return ret;
 364         }
 365
 366         drm_encoder_helper_add(&imx_ldb_ch->encoder,
 367                         &imx_ldb_encoder_helper_funcs);
 368         drm_encoder_init(drm, &imx_ldb_ch->encoder, &imx_ldb_encoder_funcs,
 369                          DRM_MODE_ENCODER_LVDS);
 370
 371         drm_connector_helper_add(&imx_ldb_ch->connector,
 372                         &imx_ldb_connector_helper_funcs);
 373         drm_connector_init(drm, &imx_ldb_ch->connector,
 374                            &imx_ldb_connector_funcs, DRM_MODE_CONNECTOR_LVDS);
 375
 376         drm_mode_connector_attach_encoder(&imx_ldb_ch->connector,
 377                         &imx_ldb_ch->encoder);
 378
 379         return 0;
 380 }
 381
 382 enum {
 383         LVDS_BIT_MAP_SPWG,
 384         LVDS_BIT_MAP_JEIDA
 385 };
 386
 387 static const char * const imx_ldb_bit_mappings[] = {
 388         [LVDS_BIT_MAP_SPWG]  = "spwg",
 389         [LVDS_BIT_MAP_JEIDA] = "jeida",
 390 };
 391
 392 static const int of_get_data_mapping(struct device_node *np)
 393 {
 394         const char *bm;
 395         int ret, i;
 396
 397         ret = of_property_read_string(np, "fsl,data-mapping", &bm);
 398         if (ret < 0)
 399                 return ret;
 400
 401         for (i = 0; i < ARRAY_SIZE(imx_ldb_bit_mappings); i++)
 402                 if (!strcasecmp(bm, imx_ldb_bit_mappings[i]))
 403                         return i;
 404
 405         return -EINVAL;
 406 }
 407
 408 static struct bus_mux imx6q_lvds_mux[2] = {
 409         {
 410                 .reg = IOMUXC_GPR3,
 411                 .shift = 6,
 412                 .mask = IMX6Q_GPR3_LVDS0_MUX_CTL_MASK,
 413         }, {
 414                 .reg = IOMUXC_GPR3,
 415                 .shift = 8,
 416                 .mask = IMX6Q_GPR3_LVDS1_MUX_CTL_MASK,
 417         }
 418 };
 419
 420 /*
 421  * For a device declaring compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb",
 422  * of_match_device will walk through this list and take the first entry
 423  * matching any of its compatible values. Therefore, the more generic
 424  * entries (in this case fsl,imx53-ldb) need to be ordered last.
 425  */
 426 static const struct of_device_id imx_ldb_dt_ids[] = {
 427         { .compatible = "fsl,imx6q-ldb", .data = imx6q_lvds_mux, },
 428         { .compatible = "fsl,imx53-ldb", .data = NULL, },
 429         { }
 430 };
 431 MODULE_DEVICE_TABLE(of, imx_ldb_dt_ids);
 432
 433 static int imx_ldb_bind(struct device *dev, struct device *master, void *data)
 434 {
 435         struct drm_device *drm = data;
 436         struct device_node *np = dev->of_node;
 437         const struct of_device_id *of_id =
 438                         of_match_device(imx_ldb_dt_ids, dev);
 439         struct device_node *child;
 440         const u8 *edidp;
 441         struct imx_ldb *imx_ldb;
 442         int datawidth;
 443         int mapping;
 444         int dual;
 445         int ret;
 446         int i;
 447
 448         imx_ldb = devm_kzalloc(dev, sizeof(*imx_ldb), GFP_KERNEL);
 449         if (!imx_ldb)
 450                 return -ENOMEM;
 451
 452         imx_ldb->regmap = syscon_regmap_lookup_by_phandle(np, "gpr");
 453         if (IS_ERR(imx_ldb->regmap)) {
 454                 dev_err(dev, "failed to get parent regmap\n");
 455                 return PTR_ERR(imx_ldb->regmap);
 456         }
 457
 458         imx_ldb->dev = dev;
 459
 460         if (of_id)
 461                 imx_ldb->lvds_mux = of_id->data;
 462
 463         dual = of_property_read_bool(np, "fsl,dual-channel");
 464         if (dual)
 465                 imx_ldb->ldb_ctrl |= LDB_SPLIT_MODE_EN;
 466
 467         /*
 468          * There are three different possible clock mux configurations:
 469          * i.MX53:  ipu1_di0_sel, ipu1_di1_sel
 470          * i.MX6q:  ipu1_di0_sel, ipu1_di1_sel, ipu2_di0_sel, ipu2_di1_sel
 471          * i.MX6dl: ipu1_di0_sel, ipu1_di1_sel, lcdif_sel
 472          * Map them all to di0_sel...di3_sel.
 473          */
 474         for (i = 0; i < 4; i++) {
 475                 char clkname[16];
 476
 477                 sprintf(clkname, "di%d_sel", i);
 478                 imx_ldb->clk_sel[i] = devm_clk_get(imx_ldb->dev, clkname);
 479                 if (IS_ERR(imx_ldb->clk_sel[i])) {
 480                         ret = PTR_ERR(imx_ldb->clk_sel[i]);
 481                         imx_ldb->clk_sel[i] = NULL;
 482                         break;
 483                 }
 484         }
 485         if (i == 0)
 486                 return ret;
 487
 488         for_each_child_of_node(np, child) {
 489                 struct imx_ldb_channel *channel;
 490
 491                 ret = of_property_read_u32(child, "reg", &i);
 492                 if (ret || i < 0 || i > 1)
 493                         return -EINVAL;
 494
 495                 if (dual && i > 0) {
 496                         dev_warn(dev, "dual-channel mode, ignoring second output\n");
 497                         continue;
 498                 }
 499
 500                 if (!of_device_is_available(child))
 501                         continue;
 502
 503                 channel = &imx_ldb->channel[i];
 504                 channel->ldb = imx_ldb;
 505                 channel->chno = i;
 506                 channel->child = child;
 507
 508                 edidp = of_get_property(child, "edid", &channel->edid_len);
 509                 if (edidp) {
 510                         channel->edid = kmemdup(edidp, channel->edid_len,
 511                                                 GFP_KERNEL);
 512                 } else {
 513                         ret = of_get_drm_display_mode(child, &channel->mode, 0);
 514                         if (!ret)
 515                                 channel->mode_valid = 1;
 516                 }
 517
 518                 ret = of_property_read_u32(child, "fsl,data-width", &datawidth);
 519                 if (ret)
 520                         datawidth = 0;
 521                 else if (datawidth != 18 && datawidth != 24)
 522                         return -EINVAL;
 523
 524                 mapping = of_get_data_mapping(child);
 525                 switch (mapping) {
 526                 case LVDS_BIT_MAP_SPWG:
 527                         if (datawidth == 24) {
 528                                 if (i == 0 || dual)
 529                                         imx_ldb->ldb_ctrl |=
 530                                                 LDB_DATA_WIDTH_CH0_24;
 531                                 if (i == 1 || dual)
 532                                         imx_ldb->ldb_ctrl |=
 533                                                 LDB_DATA_WIDTH_CH1_24;
 534                         }
 535                         break;
 536                 case LVDS_BIT_MAP_JEIDA:
 537                         if (datawidth == 18) {
 538                                 dev_err(dev, "JEIDA standard only supported in 24 bit\n");
 539                                 return -EINVAL;
 540                         }
 541                         if (i == 0 || dual)
 542                                 imx_ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24 |
 543                                         LDB_BIT_MAP_CH0_JEIDA;
 544                         if (i == 1 || dual)
 545                                 imx_ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24 |
 546                                         LDB_BIT_MAP_CH1_JEIDA;
 547                         break;
 548                 default:
 549                         dev_err(dev, "data mapping not specified or invalid\n");
 550                         return -EINVAL;
 551                 }
 552
 553                 ret = imx_ldb_register(drm, channel);
 554                 if (ret)
 555                         return ret;
 556         }
 557
 558         dev_set_drvdata(dev, imx_ldb);
 559
 560         return 0;
 561 }
 562
 563 static void imx_ldb_unbind(struct device *dev, struct device *master,
 564         void *data)
 565 {
 566         struct imx_ldb *imx_ldb = dev_get_drvdata(dev);
 567         int i;
 568
 569         for (i = 0; i < 2; i++) {
 570                 struct imx_ldb_channel *channel = &imx_ldb->channel[i];
 571
 572                 if (!channel->connector.funcs)
 573                         continue;
 574
 575                 channel->connector.funcs->destroy(&channel->connector);
 576                 channel->encoder.funcs->destroy(&channel->encoder);
 577
 578                 kfree(channel->edid);
 579         }
 580 }
 581
 582 static const struct component_ops imx_ldb_ops = {
 583         .bind   = imx_ldb_bind,
 584         .unbind = imx_ldb_unbind,
 585 };
 586
 587 static int imx_ldb_probe(struct platform_device *pdev)
 588 {
 589         return component_add(&pdev->dev, &imx_ldb_ops);
 590 }
 591
 592 static int imx_ldb_remove(struct platform_device *pdev)
 593 {
 594         component_del(&pdev->dev, &imx_ldb_ops);
 595         return 0;
 596 }
 597
 598 static struct platform_driver imx_ldb_driver = {
 599         .probe          = imx_ldb_probe,
 600         .remove         = imx_ldb_remove,
 601         .driver         = {
 602                 .of_match_table = imx_ldb_dt_ids,
 603                 .name   = DRIVER_NAME,
 604         },
 605 };
 606
 607 module_platform_driver(imx_ldb_driver);
 608
 609 MODULE_DESCRIPTION("i.MX LVDS driver");
 610 MODULE_AUTHOR("Sascha Hauer, Pengutronix");
 611 MODULE_LICENSE("GPL");
 612 MODULE_ALIAS("platform:" DRIVER_NAME);