Merge branch 'x86-mpx-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[deliverable/linux.git] / drivers / gpu / drm / msm / msm_drv.c
1 /*
2 * Copyright (C) 2013 Red Hat
3 * Author: Rob Clark <robdclark@gmail.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18 #include "msm_drv.h"
19 #include "msm_gpu.h"
20 #include "msm_kms.h"
21
22 static void msm_fb_output_poll_changed(struct drm_device *dev)
23 {
24 struct msm_drm_private *priv = dev->dev_private;
25 if (priv->fbdev)
26 drm_fb_helper_hotplug_event(priv->fbdev);
27 }
28
29 static const struct drm_mode_config_funcs mode_config_funcs = {
30 .fb_create = msm_framebuffer_create,
31 .output_poll_changed = msm_fb_output_poll_changed,
32 .atomic_check = drm_atomic_helper_check,
33 .atomic_commit = msm_atomic_commit,
34 };
35
36 int msm_register_mmu(struct drm_device *dev, struct msm_mmu *mmu)
37 {
38 struct msm_drm_private *priv = dev->dev_private;
39 int idx = priv->num_mmus++;
40
41 if (WARN_ON(idx >= ARRAY_SIZE(priv->mmus)))
42 return -EINVAL;
43
44 priv->mmus[idx] = mmu;
45
46 return idx;
47 }
48
49 #ifdef CONFIG_DRM_MSM_REGISTER_LOGGING
50 static bool reglog = false;
51 MODULE_PARM_DESC(reglog, "Enable register read/write logging");
52 module_param(reglog, bool, 0600);
53 #else
54 #define reglog 0
55 #endif
56
57 static char *vram = "16m";
58 MODULE_PARM_DESC(vram, "Configure VRAM size (for devices without IOMMU/GPUMMU");
59 module_param(vram, charp, 0);
60
61 /*
62 * Util/helpers:
63 */
64
65 void __iomem *msm_ioremap(struct platform_device *pdev, const char *name,
66 const char *dbgname)
67 {
68 struct resource *res;
69 unsigned long size;
70 void __iomem *ptr;
71
72 if (name)
73 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name);
74 else
75 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
76
77 if (!res) {
78 dev_err(&pdev->dev, "failed to get memory resource: %s\n", name);
79 return ERR_PTR(-EINVAL);
80 }
81
82 size = resource_size(res);
83
84 ptr = devm_ioremap_nocache(&pdev->dev, res->start, size);
85 if (!ptr) {
86 dev_err(&pdev->dev, "failed to ioremap: %s\n", name);
87 return ERR_PTR(-ENOMEM);
88 }
89
90 if (reglog)
91 printk(KERN_DEBUG "IO:region %s %08x %08lx\n", dbgname, (u32)ptr, size);
92
93 return ptr;
94 }
95
96 void msm_writel(u32 data, void __iomem *addr)
97 {
98 if (reglog)
99 printk(KERN_DEBUG "IO:W %08x %08x\n", (u32)addr, data);
100 writel(data, addr);
101 }
102
103 u32 msm_readl(const void __iomem *addr)
104 {
105 u32 val = readl(addr);
106 if (reglog)
107 printk(KERN_ERR "IO:R %08x %08x\n", (u32)addr, val);
108 return val;
109 }
110
111 /*
112 * DRM operations:
113 */
114
115 static int msm_unload(struct drm_device *dev)
116 {
117 struct msm_drm_private *priv = dev->dev_private;
118 struct msm_kms *kms = priv->kms;
119 struct msm_gpu *gpu = priv->gpu;
120
121 drm_kms_helper_poll_fini(dev);
122 drm_mode_config_cleanup(dev);
123 drm_vblank_cleanup(dev);
124
125 pm_runtime_get_sync(dev->dev);
126 drm_irq_uninstall(dev);
127 pm_runtime_put_sync(dev->dev);
128
129 flush_workqueue(priv->wq);
130 destroy_workqueue(priv->wq);
131
132 if (kms) {
133 pm_runtime_disable(dev->dev);
134 kms->funcs->destroy(kms);
135 }
136
137 if (gpu) {
138 mutex_lock(&dev->struct_mutex);
139 gpu->funcs->pm_suspend(gpu);
140 gpu->funcs->destroy(gpu);
141 mutex_unlock(&dev->struct_mutex);
142 }
143
144 if (priv->vram.paddr) {
145 DEFINE_DMA_ATTRS(attrs);
146 dma_set_attr(DMA_ATTR_NO_KERNEL_MAPPING, &attrs);
147 drm_mm_takedown(&priv->vram.mm);
148 dma_free_attrs(dev->dev, priv->vram.size, NULL,
149 priv->vram.paddr, &attrs);
150 }
151
152 component_unbind_all(dev->dev, dev);
153
154 dev->dev_private = NULL;
155
156 kfree(priv);
157
158 return 0;
159 }
160
161 static int get_mdp_ver(struct platform_device *pdev)
162 {
163 #ifdef CONFIG_OF
164 static const struct of_device_id match_types[] = { {
165 .compatible = "qcom,mdss_mdp",
166 .data = (void *)5,
167 }, {
168 /* end node */
169 } };
170 struct device *dev = &pdev->dev;
171 const struct of_device_id *match;
172 match = of_match_node(match_types, dev->of_node);
173 if (match)
174 return (int)match->data;
175 #endif
176 return 4;
177 }
178
179 static int msm_load(struct drm_device *dev, unsigned long flags)
180 {
181 struct platform_device *pdev = dev->platformdev;
182 struct msm_drm_private *priv;
183 struct msm_kms *kms;
184 int ret;
185
186 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
187 if (!priv) {
188 dev_err(dev->dev, "failed to allocate private data\n");
189 return -ENOMEM;
190 }
191
192 dev->dev_private = priv;
193
194 priv->wq = alloc_ordered_workqueue("msm", 0);
195 init_waitqueue_head(&priv->fence_event);
196
197 INIT_LIST_HEAD(&priv->inactive_list);
198 INIT_LIST_HEAD(&priv->fence_cbs);
199
200 drm_mode_config_init(dev);
201
202 /* if we have no IOMMU, then we need to use carveout allocator.
203 * Grab the entire CMA chunk carved out in early startup in
204 * mach-msm:
205 */
206 if (!iommu_present(&platform_bus_type)) {
207 DEFINE_DMA_ATTRS(attrs);
208 unsigned long size;
209 void *p;
210
211 DBG("using %s VRAM carveout", vram);
212 size = memparse(vram, NULL);
213 priv->vram.size = size;
214
215 drm_mm_init(&priv->vram.mm, 0, (size >> PAGE_SHIFT) - 1);
216
217 dma_set_attr(DMA_ATTR_NO_KERNEL_MAPPING, &attrs);
218 dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs);
219
220 /* note that for no-kernel-mapping, the vaddr returned
221 * is bogus, but non-null if allocation succeeded:
222 */
223 p = dma_alloc_attrs(dev->dev, size,
224 &priv->vram.paddr, GFP_KERNEL, &attrs);
225 if (!p) {
226 dev_err(dev->dev, "failed to allocate VRAM\n");
227 priv->vram.paddr = 0;
228 ret = -ENOMEM;
229 goto fail;
230 }
231
232 dev_info(dev->dev, "VRAM: %08x->%08x\n",
233 (uint32_t)priv->vram.paddr,
234 (uint32_t)(priv->vram.paddr + size));
235 }
236
237 platform_set_drvdata(pdev, dev);
238
239 /* Bind all our sub-components: */
240 ret = component_bind_all(dev->dev, dev);
241 if (ret)
242 return ret;
243
244 switch (get_mdp_ver(pdev)) {
245 case 4:
246 kms = mdp4_kms_init(dev);
247 break;
248 case 5:
249 kms = mdp5_kms_init(dev);
250 break;
251 default:
252 kms = ERR_PTR(-ENODEV);
253 break;
254 }
255
256 if (IS_ERR(kms)) {
257 /*
258 * NOTE: once we have GPU support, having no kms should not
259 * be considered fatal.. ideally we would still support gpu
260 * and (for example) use dmabuf/prime to share buffers with
261 * imx drm driver on iMX5
262 */
263 dev_err(dev->dev, "failed to load kms\n");
264 ret = PTR_ERR(kms);
265 goto fail;
266 }
267
268 priv->kms = kms;
269
270 if (kms) {
271 pm_runtime_enable(dev->dev);
272 ret = kms->funcs->hw_init(kms);
273 if (ret) {
274 dev_err(dev->dev, "kms hw init failed: %d\n", ret);
275 goto fail;
276 }
277 }
278
279 dev->mode_config.min_width = 0;
280 dev->mode_config.min_height = 0;
281 dev->mode_config.max_width = 2048;
282 dev->mode_config.max_height = 2048;
283 dev->mode_config.funcs = &mode_config_funcs;
284
285 ret = drm_vblank_init(dev, priv->num_crtcs);
286 if (ret < 0) {
287 dev_err(dev->dev, "failed to initialize vblank\n");
288 goto fail;
289 }
290
291 pm_runtime_get_sync(dev->dev);
292 ret = drm_irq_install(dev, platform_get_irq(dev->platformdev, 0));
293 pm_runtime_put_sync(dev->dev);
294 if (ret < 0) {
295 dev_err(dev->dev, "failed to install IRQ handler\n");
296 goto fail;
297 }
298
299 drm_mode_config_reset(dev);
300
301 #ifdef CONFIG_DRM_MSM_FBDEV
302 priv->fbdev = msm_fbdev_init(dev);
303 #endif
304
305 ret = msm_debugfs_late_init(dev);
306 if (ret)
307 goto fail;
308
309 drm_kms_helper_poll_init(dev);
310
311 return 0;
312
313 fail:
314 msm_unload(dev);
315 return ret;
316 }
317
318 static void load_gpu(struct drm_device *dev)
319 {
320 static DEFINE_MUTEX(init_lock);
321 struct msm_drm_private *priv = dev->dev_private;
322
323 mutex_lock(&init_lock);
324
325 if (!priv->gpu)
326 priv->gpu = adreno_load_gpu(dev);
327
328 mutex_unlock(&init_lock);
329 }
330
331 static int msm_open(struct drm_device *dev, struct drm_file *file)
332 {
333 struct msm_file_private *ctx;
334
335 /* For now, load gpu on open.. to avoid the requirement of having
336 * firmware in the initrd.
337 */
338 load_gpu(dev);
339
340 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
341 if (!ctx)
342 return -ENOMEM;
343
344 file->driver_priv = ctx;
345
346 return 0;
347 }
348
349 static void msm_preclose(struct drm_device *dev, struct drm_file *file)
350 {
351 struct msm_drm_private *priv = dev->dev_private;
352 struct msm_file_private *ctx = file->driver_priv;
353 struct msm_kms *kms = priv->kms;
354
355 if (kms)
356 kms->funcs->preclose(kms, file);
357
358 mutex_lock(&dev->struct_mutex);
359 if (ctx == priv->lastctx)
360 priv->lastctx = NULL;
361 mutex_unlock(&dev->struct_mutex);
362
363 kfree(ctx);
364 }
365
366 static void msm_lastclose(struct drm_device *dev)
367 {
368 struct msm_drm_private *priv = dev->dev_private;
369 if (priv->fbdev)
370 drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev);
371 }
372
373 static irqreturn_t msm_irq(int irq, void *arg)
374 {
375 struct drm_device *dev = arg;
376 struct msm_drm_private *priv = dev->dev_private;
377 struct msm_kms *kms = priv->kms;
378 BUG_ON(!kms);
379 return kms->funcs->irq(kms);
380 }
381
382 static void msm_irq_preinstall(struct drm_device *dev)
383 {
384 struct msm_drm_private *priv = dev->dev_private;
385 struct msm_kms *kms = priv->kms;
386 BUG_ON(!kms);
387 kms->funcs->irq_preinstall(kms);
388 }
389
390 static int msm_irq_postinstall(struct drm_device *dev)
391 {
392 struct msm_drm_private *priv = dev->dev_private;
393 struct msm_kms *kms = priv->kms;
394 BUG_ON(!kms);
395 return kms->funcs->irq_postinstall(kms);
396 }
397
398 static void msm_irq_uninstall(struct drm_device *dev)
399 {
400 struct msm_drm_private *priv = dev->dev_private;
401 struct msm_kms *kms = priv->kms;
402 BUG_ON(!kms);
403 kms->funcs->irq_uninstall(kms);
404 }
405
406 static int msm_enable_vblank(struct drm_device *dev, int crtc_id)
407 {
408 struct msm_drm_private *priv = dev->dev_private;
409 struct msm_kms *kms = priv->kms;
410 if (!kms)
411 return -ENXIO;
412 DBG("dev=%p, crtc=%d", dev, crtc_id);
413 return kms->funcs->enable_vblank(kms, priv->crtcs[crtc_id]);
414 }
415
416 static void msm_disable_vblank(struct drm_device *dev, int crtc_id)
417 {
418 struct msm_drm_private *priv = dev->dev_private;
419 struct msm_kms *kms = priv->kms;
420 if (!kms)
421 return;
422 DBG("dev=%p, crtc=%d", dev, crtc_id);
423 kms->funcs->disable_vblank(kms, priv->crtcs[crtc_id]);
424 }
425
426 /*
427 * DRM debugfs:
428 */
429
430 #ifdef CONFIG_DEBUG_FS
431 static int msm_gpu_show(struct drm_device *dev, struct seq_file *m)
432 {
433 struct msm_drm_private *priv = dev->dev_private;
434 struct msm_gpu *gpu = priv->gpu;
435
436 if (gpu) {
437 seq_printf(m, "%s Status:\n", gpu->name);
438 gpu->funcs->show(gpu, m);
439 }
440
441 return 0;
442 }
443
444 static int msm_gem_show(struct drm_device *dev, struct seq_file *m)
445 {
446 struct msm_drm_private *priv = dev->dev_private;
447 struct msm_gpu *gpu = priv->gpu;
448
449 if (gpu) {
450 seq_printf(m, "Active Objects (%s):\n", gpu->name);
451 msm_gem_describe_objects(&gpu->active_list, m);
452 }
453
454 seq_printf(m, "Inactive Objects:\n");
455 msm_gem_describe_objects(&priv->inactive_list, m);
456
457 return 0;
458 }
459
460 static int msm_mm_show(struct drm_device *dev, struct seq_file *m)
461 {
462 return drm_mm_dump_table(m, &dev->vma_offset_manager->vm_addr_space_mm);
463 }
464
465 static int msm_fb_show(struct drm_device *dev, struct seq_file *m)
466 {
467 struct msm_drm_private *priv = dev->dev_private;
468 struct drm_framebuffer *fb, *fbdev_fb = NULL;
469
470 if (priv->fbdev) {
471 seq_printf(m, "fbcon ");
472 fbdev_fb = priv->fbdev->fb;
473 msm_framebuffer_describe(fbdev_fb, m);
474 }
475
476 mutex_lock(&dev->mode_config.fb_lock);
477 list_for_each_entry(fb, &dev->mode_config.fb_list, head) {
478 if (fb == fbdev_fb)
479 continue;
480
481 seq_printf(m, "user ");
482 msm_framebuffer_describe(fb, m);
483 }
484 mutex_unlock(&dev->mode_config.fb_lock);
485
486 return 0;
487 }
488
489 static int show_locked(struct seq_file *m, void *arg)
490 {
491 struct drm_info_node *node = (struct drm_info_node *) m->private;
492 struct drm_device *dev = node->minor->dev;
493 int (*show)(struct drm_device *dev, struct seq_file *m) =
494 node->info_ent->data;
495 int ret;
496
497 ret = mutex_lock_interruptible(&dev->struct_mutex);
498 if (ret)
499 return ret;
500
501 ret = show(dev, m);
502
503 mutex_unlock(&dev->struct_mutex);
504
505 return ret;
506 }
507
508 static struct drm_info_list msm_debugfs_list[] = {
509 {"gpu", show_locked, 0, msm_gpu_show},
510 {"gem", show_locked, 0, msm_gem_show},
511 { "mm", show_locked, 0, msm_mm_show },
512 { "fb", show_locked, 0, msm_fb_show },
513 };
514
515 static int late_init_minor(struct drm_minor *minor)
516 {
517 int ret;
518
519 if (!minor)
520 return 0;
521
522 ret = msm_rd_debugfs_init(minor);
523 if (ret) {
524 dev_err(minor->dev->dev, "could not install rd debugfs\n");
525 return ret;
526 }
527
528 ret = msm_perf_debugfs_init(minor);
529 if (ret) {
530 dev_err(minor->dev->dev, "could not install perf debugfs\n");
531 return ret;
532 }
533
534 return 0;
535 }
536
537 int msm_debugfs_late_init(struct drm_device *dev)
538 {
539 int ret;
540 ret = late_init_minor(dev->primary);
541 if (ret)
542 return ret;
543 ret = late_init_minor(dev->render);
544 if (ret)
545 return ret;
546 ret = late_init_minor(dev->control);
547 return ret;
548 }
549
550 static int msm_debugfs_init(struct drm_minor *minor)
551 {
552 struct drm_device *dev = minor->dev;
553 int ret;
554
555 ret = drm_debugfs_create_files(msm_debugfs_list,
556 ARRAY_SIZE(msm_debugfs_list),
557 minor->debugfs_root, minor);
558
559 if (ret) {
560 dev_err(dev->dev, "could not install msm_debugfs_list\n");
561 return ret;
562 }
563
564 return 0;
565 }
566
567 static void msm_debugfs_cleanup(struct drm_minor *minor)
568 {
569 drm_debugfs_remove_files(msm_debugfs_list,
570 ARRAY_SIZE(msm_debugfs_list), minor);
571 if (!minor->dev->dev_private)
572 return;
573 msm_rd_debugfs_cleanup(minor);
574 msm_perf_debugfs_cleanup(minor);
575 }
576 #endif
577
578 /*
579 * Fences:
580 */
581
582 int msm_wait_fence_interruptable(struct drm_device *dev, uint32_t fence,
583 struct timespec *timeout)
584 {
585 struct msm_drm_private *priv = dev->dev_private;
586 int ret;
587
588 if (!priv->gpu)
589 return 0;
590
591 if (fence > priv->gpu->submitted_fence) {
592 DRM_ERROR("waiting on invalid fence: %u (of %u)\n",
593 fence, priv->gpu->submitted_fence);
594 return -EINVAL;
595 }
596
597 if (!timeout) {
598 /* no-wait: */
599 ret = fence_completed(dev, fence) ? 0 : -EBUSY;
600 } else {
601 unsigned long timeout_jiffies = timespec_to_jiffies(timeout);
602 unsigned long start_jiffies = jiffies;
603 unsigned long remaining_jiffies;
604
605 if (time_after(start_jiffies, timeout_jiffies))
606 remaining_jiffies = 0;
607 else
608 remaining_jiffies = timeout_jiffies - start_jiffies;
609
610 ret = wait_event_interruptible_timeout(priv->fence_event,
611 fence_completed(dev, fence),
612 remaining_jiffies);
613
614 if (ret == 0) {
615 DBG("timeout waiting for fence: %u (completed: %u)",
616 fence, priv->completed_fence);
617 ret = -ETIMEDOUT;
618 } else if (ret != -ERESTARTSYS) {
619 ret = 0;
620 }
621 }
622
623 return ret;
624 }
625
626 int msm_queue_fence_cb(struct drm_device *dev,
627 struct msm_fence_cb *cb, uint32_t fence)
628 {
629 struct msm_drm_private *priv = dev->dev_private;
630 int ret = 0;
631
632 mutex_lock(&dev->struct_mutex);
633 if (!list_empty(&cb->work.entry)) {
634 ret = -EINVAL;
635 } else if (fence > priv->completed_fence) {
636 cb->fence = fence;
637 list_add_tail(&cb->work.entry, &priv->fence_cbs);
638 } else {
639 queue_work(priv->wq, &cb->work);
640 }
641 mutex_unlock(&dev->struct_mutex);
642
643 return ret;
644 }
645
646 /* called from workqueue */
647 void msm_update_fence(struct drm_device *dev, uint32_t fence)
648 {
649 struct msm_drm_private *priv = dev->dev_private;
650
651 mutex_lock(&dev->struct_mutex);
652 priv->completed_fence = max(fence, priv->completed_fence);
653
654 while (!list_empty(&priv->fence_cbs)) {
655 struct msm_fence_cb *cb;
656
657 cb = list_first_entry(&priv->fence_cbs,
658 struct msm_fence_cb, work.entry);
659
660 if (cb->fence > priv->completed_fence)
661 break;
662
663 list_del_init(&cb->work.entry);
664 queue_work(priv->wq, &cb->work);
665 }
666
667 mutex_unlock(&dev->struct_mutex);
668
669 wake_up_all(&priv->fence_event);
670 }
671
672 void __msm_fence_worker(struct work_struct *work)
673 {
674 struct msm_fence_cb *cb = container_of(work, struct msm_fence_cb, work);
675 cb->func(cb);
676 }
677
678 /*
679 * DRM ioctls:
680 */
681
682 static int msm_ioctl_get_param(struct drm_device *dev, void *data,
683 struct drm_file *file)
684 {
685 struct msm_drm_private *priv = dev->dev_private;
686 struct drm_msm_param *args = data;
687 struct msm_gpu *gpu;
688
689 /* for now, we just have 3d pipe.. eventually this would need to
690 * be more clever to dispatch to appropriate gpu module:
691 */
692 if (args->pipe != MSM_PIPE_3D0)
693 return -EINVAL;
694
695 gpu = priv->gpu;
696
697 if (!gpu)
698 return -ENXIO;
699
700 return gpu->funcs->get_param(gpu, args->param, &args->value);
701 }
702
703 static int msm_ioctl_gem_new(struct drm_device *dev, void *data,
704 struct drm_file *file)
705 {
706 struct drm_msm_gem_new *args = data;
707
708 if (args->flags & ~MSM_BO_FLAGS) {
709 DRM_ERROR("invalid flags: %08x\n", args->flags);
710 return -EINVAL;
711 }
712
713 return msm_gem_new_handle(dev, file, args->size,
714 args->flags, &args->handle);
715 }
716
717 #define TS(t) ((struct timespec){ .tv_sec = (t).tv_sec, .tv_nsec = (t).tv_nsec })
718
719 static int msm_ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
720 struct drm_file *file)
721 {
722 struct drm_msm_gem_cpu_prep *args = data;
723 struct drm_gem_object *obj;
724 int ret;
725
726 if (args->op & ~MSM_PREP_FLAGS) {
727 DRM_ERROR("invalid op: %08x\n", args->op);
728 return -EINVAL;
729 }
730
731 obj = drm_gem_object_lookup(dev, file, args->handle);
732 if (!obj)
733 return -ENOENT;
734
735 ret = msm_gem_cpu_prep(obj, args->op, &TS(args->timeout));
736
737 drm_gem_object_unreference_unlocked(obj);
738
739 return ret;
740 }
741
742 static int msm_ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
743 struct drm_file *file)
744 {
745 struct drm_msm_gem_cpu_fini *args = data;
746 struct drm_gem_object *obj;
747 int ret;
748
749 obj = drm_gem_object_lookup(dev, file, args->handle);
750 if (!obj)
751 return -ENOENT;
752
753 ret = msm_gem_cpu_fini(obj);
754
755 drm_gem_object_unreference_unlocked(obj);
756
757 return ret;
758 }
759
760 static int msm_ioctl_gem_info(struct drm_device *dev, void *data,
761 struct drm_file *file)
762 {
763 struct drm_msm_gem_info *args = data;
764 struct drm_gem_object *obj;
765 int ret = 0;
766
767 if (args->pad)
768 return -EINVAL;
769
770 obj = drm_gem_object_lookup(dev, file, args->handle);
771 if (!obj)
772 return -ENOENT;
773
774 args->offset = msm_gem_mmap_offset(obj);
775
776 drm_gem_object_unreference_unlocked(obj);
777
778 return ret;
779 }
780
781 static int msm_ioctl_wait_fence(struct drm_device *dev, void *data,
782 struct drm_file *file)
783 {
784 struct drm_msm_wait_fence *args = data;
785
786 if (args->pad) {
787 DRM_ERROR("invalid pad: %08x\n", args->pad);
788 return -EINVAL;
789 }
790
791 return msm_wait_fence_interruptable(dev, args->fence,
792 &TS(args->timeout));
793 }
794
795 static const struct drm_ioctl_desc msm_ioctls[] = {
796 DRM_IOCTL_DEF_DRV(MSM_GET_PARAM, msm_ioctl_get_param, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
797 DRM_IOCTL_DEF_DRV(MSM_GEM_NEW, msm_ioctl_gem_new, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
798 DRM_IOCTL_DEF_DRV(MSM_GEM_INFO, msm_ioctl_gem_info, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
799 DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_PREP, msm_ioctl_gem_cpu_prep, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
800 DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_FINI, msm_ioctl_gem_cpu_fini, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
801 DRM_IOCTL_DEF_DRV(MSM_GEM_SUBMIT, msm_ioctl_gem_submit, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
802 DRM_IOCTL_DEF_DRV(MSM_WAIT_FENCE, msm_ioctl_wait_fence, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
803 };
804
805 static const struct vm_operations_struct vm_ops = {
806 .fault = msm_gem_fault,
807 .open = drm_gem_vm_open,
808 .close = drm_gem_vm_close,
809 };
810
811 static const struct file_operations fops = {
812 .owner = THIS_MODULE,
813 .open = drm_open,
814 .release = drm_release,
815 .unlocked_ioctl = drm_ioctl,
816 #ifdef CONFIG_COMPAT
817 .compat_ioctl = drm_compat_ioctl,
818 #endif
819 .poll = drm_poll,
820 .read = drm_read,
821 .llseek = no_llseek,
822 .mmap = msm_gem_mmap,
823 };
824
825 static struct drm_driver msm_driver = {
826 .driver_features = DRIVER_HAVE_IRQ |
827 DRIVER_GEM |
828 DRIVER_PRIME |
829 DRIVER_RENDER |
830 DRIVER_MODESET,
831 .load = msm_load,
832 .unload = msm_unload,
833 .open = msm_open,
834 .preclose = msm_preclose,
835 .lastclose = msm_lastclose,
836 .set_busid = drm_platform_set_busid,
837 .irq_handler = msm_irq,
838 .irq_preinstall = msm_irq_preinstall,
839 .irq_postinstall = msm_irq_postinstall,
840 .irq_uninstall = msm_irq_uninstall,
841 .get_vblank_counter = drm_vblank_count,
842 .enable_vblank = msm_enable_vblank,
843 .disable_vblank = msm_disable_vblank,
844 .gem_free_object = msm_gem_free_object,
845 .gem_vm_ops = &vm_ops,
846 .dumb_create = msm_gem_dumb_create,
847 .dumb_map_offset = msm_gem_dumb_map_offset,
848 .dumb_destroy = drm_gem_dumb_destroy,
849 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
850 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
851 .gem_prime_export = drm_gem_prime_export,
852 .gem_prime_import = drm_gem_prime_import,
853 .gem_prime_pin = msm_gem_prime_pin,
854 .gem_prime_unpin = msm_gem_prime_unpin,
855 .gem_prime_get_sg_table = msm_gem_prime_get_sg_table,
856 .gem_prime_import_sg_table = msm_gem_prime_import_sg_table,
857 .gem_prime_vmap = msm_gem_prime_vmap,
858 .gem_prime_vunmap = msm_gem_prime_vunmap,
859 .gem_prime_mmap = msm_gem_prime_mmap,
860 #ifdef CONFIG_DEBUG_FS
861 .debugfs_init = msm_debugfs_init,
862 .debugfs_cleanup = msm_debugfs_cleanup,
863 #endif
864 .ioctls = msm_ioctls,
865 .num_ioctls = DRM_MSM_NUM_IOCTLS,
866 .fops = &fops,
867 .name = "msm",
868 .desc = "MSM Snapdragon DRM",
869 .date = "20130625",
870 .major = 1,
871 .minor = 0,
872 };
873
874 #ifdef CONFIG_PM_SLEEP
875 static int msm_pm_suspend(struct device *dev)
876 {
877 struct drm_device *ddev = dev_get_drvdata(dev);
878
879 drm_kms_helper_poll_disable(ddev);
880
881 return 0;
882 }
883
884 static int msm_pm_resume(struct device *dev)
885 {
886 struct drm_device *ddev = dev_get_drvdata(dev);
887
888 drm_kms_helper_poll_enable(ddev);
889
890 return 0;
891 }
892 #endif
893
894 static const struct dev_pm_ops msm_pm_ops = {
895 SET_SYSTEM_SLEEP_PM_OPS(msm_pm_suspend, msm_pm_resume)
896 };
897
898 /*
899 * Componentized driver support:
900 */
901
902 #ifdef CONFIG_OF
903 /* NOTE: the CONFIG_OF case duplicates the same code as exynos or imx
904 * (or probably any other).. so probably some room for some helpers
905 */
906 static int compare_of(struct device *dev, void *data)
907 {
908 return dev->of_node == data;
909 }
910
911 static int add_components(struct device *dev, struct component_match **matchptr,
912 const char *name)
913 {
914 struct device_node *np = dev->of_node;
915 unsigned i;
916
917 for (i = 0; ; i++) {
918 struct device_node *node;
919
920 node = of_parse_phandle(np, name, i);
921 if (!node)
922 break;
923
924 component_match_add(dev, matchptr, compare_of, node);
925 }
926
927 return 0;
928 }
929 #else
930 static int compare_dev(struct device *dev, void *data)
931 {
932 return dev == data;
933 }
934 #endif
935
936 static int msm_drm_bind(struct device *dev)
937 {
938 return drm_platform_init(&msm_driver, to_platform_device(dev));
939 }
940
941 static void msm_drm_unbind(struct device *dev)
942 {
943 drm_put_dev(platform_get_drvdata(to_platform_device(dev)));
944 }
945
946 static const struct component_master_ops msm_drm_ops = {
947 .bind = msm_drm_bind,
948 .unbind = msm_drm_unbind,
949 };
950
951 /*
952 * Platform driver:
953 */
954
955 static int msm_pdev_probe(struct platform_device *pdev)
956 {
957 struct component_match *match = NULL;
958 #ifdef CONFIG_OF
959 add_components(&pdev->dev, &match, "connectors");
960 add_components(&pdev->dev, &match, "gpus");
961 #else
962 /* For non-DT case, it kinda sucks. We don't actually have a way
963 * to know whether or not we are waiting for certain devices (or if
964 * they are simply not present). But for non-DT we only need to
965 * care about apq8064/apq8060/etc (all mdp4/a3xx):
966 */
967 static const char *devnames[] = {
968 "hdmi_msm.0", "kgsl-3d0.0",
969 };
970 int i;
971
972 DBG("Adding components..");
973
974 for (i = 0; i < ARRAY_SIZE(devnames); i++) {
975 struct device *dev;
976
977 dev = bus_find_device_by_name(&platform_bus_type,
978 NULL, devnames[i]);
979 if (!dev) {
980 dev_info(&pdev->dev, "still waiting for %s\n", devnames[i]);
981 return -EPROBE_DEFER;
982 }
983
984 component_match_add(&pdev->dev, &match, compare_dev, dev);
985 }
986 #endif
987
988 pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
989 return component_master_add_with_match(&pdev->dev, &msm_drm_ops, match);
990 }
991
992 static int msm_pdev_remove(struct platform_device *pdev)
993 {
994 component_master_del(&pdev->dev, &msm_drm_ops);
995
996 return 0;
997 }
998
999 static const struct platform_device_id msm_id[] = {
1000 { "mdp", 0 },
1001 { }
1002 };
1003
1004 static const struct of_device_id dt_match[] = {
1005 { .compatible = "qcom,mdp" }, /* mdp4 */
1006 { .compatible = "qcom,mdss_mdp" }, /* mdp5 */
1007 {}
1008 };
1009 MODULE_DEVICE_TABLE(of, dt_match);
1010
1011 static struct platform_driver msm_platform_driver = {
1012 .probe = msm_pdev_probe,
1013 .remove = msm_pdev_remove,
1014 .driver = {
1015 .name = "msm",
1016 .of_match_table = dt_match,
1017 .pm = &msm_pm_ops,
1018 },
1019 .id_table = msm_id,
1020 };
1021
1022 static int __init msm_drm_register(void)
1023 {
1024 DBG("init");
1025 hdmi_register();
1026 adreno_register();
1027 return platform_driver_register(&msm_platform_driver);
1028 }
1029
1030 static void __exit msm_drm_unregister(void)
1031 {
1032 DBG("fini");
1033 platform_driver_unregister(&msm_platform_driver);
1034 hdmi_unregister();
1035 adreno_unregister();
1036 }
1037
1038 module_init(msm_drm_register);
1039 module_exit(msm_drm_unregister);
1040
1041 MODULE_AUTHOR("Rob Clark <robdclark@gmail.com");
1042 MODULE_DESCRIPTION("MSM DRM Driver");
1043 MODULE_LICENSE("GPL");
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