drivers/gpu/drm/nouveau/core/subdev/fb/ramnv50.c

   1 /*
   2  * Copyright 2013 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  */
  24
  25 #include <subdev/bios.h>
  26 #include <core/mm.h>
  27 #include "priv.h"
  28
  29 void
  30 nv50_ram_put(struct nouveau_fb *pfb, struct nouveau_mem **pmem)
  31 {
  32         struct nouveau_mm_node *this;
  33         struct nouveau_mem *mem;
  34
  35         mem = *pmem;
  36         *pmem = NULL;
  37         if (unlikely(mem == NULL))
  38                 return;
  39
  40         mutex_lock(&pfb->base.mutex);
  41         while (!list_empty(&mem->regions)) {
  42                 this = list_first_entry(&mem->regions, typeof(*this), rl_entry);
  43
  44                 list_del(&this->rl_entry);
  45                 nouveau_mm_free(&pfb->vram, &this);
  46         }
  47
  48         nouveau_mm_free(&pfb->tags, &mem->tag);
  49         mutex_unlock(&pfb->base.mutex);
  50
  51         kfree(mem);
  52 }
  53
  54 static int
  55 nv50_ram_get(struct nouveau_fb *pfb, u64 size, u32 align, u32 ncmin,
  56              u32 memtype, struct nouveau_mem **pmem)
  57 {
  58         struct nouveau_mm *heap = &pfb->vram;
  59         struct nouveau_mm *tags = &pfb->tags;
  60         struct nouveau_mm_node *r;
  61         struct nouveau_mem *mem;
  62         int comp = (memtype & 0x300) >> 8;
  63         int type = (memtype & 0x07f);
  64         int back = (memtype & 0x800);
  65         int min, max, ret;
  66
  67         max = (size >> 12);
  68         min = ncmin ? (ncmin >> 12) : max;
  69         align >>= 12;
  70
  71         mem = kzalloc(sizeof(*mem), GFP_KERNEL);
  72         if (!mem)
  73                 return -ENOMEM;
  74
  75         mutex_lock(&pfb->base.mutex);
  76         if (comp) {
  77                 if (align == 16) {
  78                         int n = (max >> 4) * comp;
  79
  80                         ret = nouveau_mm_head(tags, 1, n, n, 1, &mem->tag);
  81                         if (ret)
  82                                 mem->tag = NULL;
  83                 }
  84
  85                 if (unlikely(!mem->tag))
  86                         comp = 0;
  87         }
  88
  89         INIT_LIST_HEAD(&mem->regions);
  90         mem->memtype = (comp << 7) | type;
  91         mem->size = max;
  92
  93         type = nv50_fb_memtype[type];
  94         do {
  95                 if (back)
  96                         ret = nouveau_mm_tail(heap, type, max, min, align, &r);
  97                 else
  98                         ret = nouveau_mm_head(heap, type, max, min, align, &r);
  99                 if (ret) {
 100                         mutex_unlock(&pfb->base.mutex);
 101                         pfb->ram->put(pfb, &mem);
 102                         return ret;
 103                 }
 104
 105                 list_add_tail(&r->rl_entry, &mem->regions);
 106                 max -= r->length;
 107         } while (max);
 108         mutex_unlock(&pfb->base.mutex);
 109
 110         r = list_first_entry(&mem->regions, struct nouveau_mm_node, rl_entry);
 111         mem->offset = (u64)r->offset << 12;
 112         *pmem = mem;
 113         return 0;
 114 }
 115
 116 static u32
 117 nv50_fb_vram_rblock(struct nouveau_fb *pfb, struct nouveau_ram *ram)
 118 {
 119         int i, parts, colbits, rowbitsa, rowbitsb, banks;
 120         u64 rowsize, predicted;
 121         u32 r0, r4, rt, ru, rblock_size;
 122
 123         r0 = nv_rd32(pfb, 0x100200);
 124         r4 = nv_rd32(pfb, 0x100204);
 125         rt = nv_rd32(pfb, 0x100250);
 126         ru = nv_rd32(pfb, 0x001540);
 127         nv_debug(pfb, "memcfg 0x%08x 0x%08x 0x%08x 0x%08x\n", r0, r4, rt, ru);
 128
 129         for (i = 0, parts = 0; i < 8; i++) {
 130                 if (ru & (0x00010000 << i))
 131                         parts++;
 132         }
 133
 134         colbits  =  (r4 & 0x0000f000) >> 12;
 135         rowbitsa = ((r4 & 0x000f0000) >> 16) + 8;
 136         rowbitsb = ((r4 & 0x00f00000) >> 20) + 8;
 137         banks    = 1 << (((r4 & 0x03000000) >> 24) + 2);
 138
 139         rowsize = parts * banks * (1 << colbits) * 8;
 140         predicted = rowsize << rowbitsa;
 141         if (r0 & 0x00000004)
 142                 predicted += rowsize << rowbitsb;
 143
 144         if (predicted != ram->size) {
 145                 nv_warn(pfb, "memory controller reports %d MiB VRAM\n",
 146                         (u32)(ram->size >> 20));
 147         }
 148
 149         rblock_size = rowsize;
 150         if (rt & 1)
 151                 rblock_size *= 3;
 152
 153         nv_debug(pfb, "rblock %d bytes\n", rblock_size);
 154         return rblock_size;
 155 }
 156
 157 static int
 158 nv50_ram_create(struct nouveau_object *parent, struct nouveau_object *engine,
 159                 struct nouveau_oclass *oclass, void *data, u32 datasize,
 160                 struct nouveau_object **pobject)
 161 {
 162         struct nouveau_fb *pfb = nouveau_fb(parent);
 163         struct nouveau_device *device = nv_device(pfb);
 164         struct nouveau_bios *bios = nouveau_bios(device);
 165         struct nouveau_ram *ram;
 166         const u32 rsvd_head = ( 256 * 1024) >> 12; /* vga memory */
 167         const u32 rsvd_tail = (1024 * 1024) >> 12; /* vbios etc */
 168         u32 size;
 169         int ret;
 170
 171         ret = nouveau_ram_create(parent, engine, oclass, &ram);
 172         *pobject = nv_object(ram);
 173         if (ret)
 174                 return ret;
 175
 176         ram->size = nv_rd32(pfb, 0x10020c);
 177         ram->size = (ram->size & 0xffffff00) |
 178                        ((ram->size & 0x000000ff) << 32);
 179
 180         size = (ram->size >> 12) - rsvd_head - rsvd_tail;
 181         switch (device->chipset) {
 182         case 0xaa:
 183         case 0xac:
 184         case 0xaf: /* IGPs, no reordering, no real VRAM */
 185                 ret = nouveau_mm_init(&pfb->vram, rsvd_head, size, 1);
 186                 if (ret)
 187                         return ret;
 188
 189                 ram->type   = NV_MEM_TYPE_STOLEN;
 190                 ram->stolen = (u64)nv_rd32(pfb, 0x100e10) << 12;
 191                 break;
 192         default:
 193                 switch (nv_rd32(pfb, 0x100714) & 0x00000007) {
 194                 case 0: ram->type = NV_MEM_TYPE_DDR1; break;
 195                 case 1:
 196                         if (nouveau_fb_bios_memtype(bios) == NV_MEM_TYPE_DDR3)
 197                                 ram->type = NV_MEM_TYPE_DDR3;
 198                         else
 199                                 ram->type = NV_MEM_TYPE_DDR2;
 200                         break;
 201                 case 2: ram->type = NV_MEM_TYPE_GDDR3; break;
 202                 case 3: ram->type = NV_MEM_TYPE_GDDR4; break;
 203                 case 4: ram->type = NV_MEM_TYPE_GDDR5; break;
 204                 default:
 205                         break;
 206                 }
 207
 208                 ret = nouveau_mm_init(&pfb->vram, rsvd_head, size,
 209                                       nv50_fb_vram_rblock(pfb, ram) >> 12);
 210                 if (ret)
 211                         return ret;
 212
 213                 ram->ranks = (nv_rd32(pfb, 0x100200) & 0x4) ? 2 : 1;
 214                 ram->tags  =  nv_rd32(pfb, 0x100320);
 215                 break;
 216         }
 217
 218         ram->get = nv50_ram_get;
 219         ram->put = nv50_ram_put;
 220         return 0;
 221 }
 222
 223 struct nouveau_oclass
 224 nv50_ram_oclass = {
 225         .handle = 0,
 226         .ofuncs = &(struct nouveau_ofuncs) {
 227                 .ctor = nv50_ram_create,
 228                 .dtor = _nouveau_ram_dtor,
 229                 .init = _nouveau_ram_init,
 230                 .fini = _nouveau_ram_fini,
 231         }
 232 };