drivers/gpu/drm/nouveau/core/subdev/mc/nv50.c

   1 /*
   2  * Copyright 2012 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  */
  24
  25 #include <subdev/mc.h>
  26
  27 struct nv50_mc_priv {
  28         struct nouveau_mc base;
  29 };
  30
  31 static const struct nouveau_mc_intr
  32 nv50_mc_intr[] = {
  33         { 0x00000001, NVDEV_ENGINE_MPEG },
  34         { 0x00000100, NVDEV_ENGINE_FIFO },
  35         { 0x00001000, NVDEV_ENGINE_GR },
  36         { 0x00004000, NVDEV_ENGINE_CRYPT },     /* NV84- */
  37         { 0x00008000, NVDEV_ENGINE_BSP },       /* NV84- */
  38         { 0x00020000, NVDEV_ENGINE_VP },        /* NV84- */
  39         { 0x00100000, NVDEV_SUBDEV_TIMER },
  40         { 0x00200000, NVDEV_SUBDEV_GPIO },
  41         { 0x04000000, NVDEV_ENGINE_DISP },
  42         { 0x10000000, NVDEV_SUBDEV_BUS },
  43         { 0x80000000, NVDEV_ENGINE_SW },
  44         { 0x0002d101, NVDEV_SUBDEV_FB },
  45         {},
  46 };
  47
  48 static int
  49 nv50_mc_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
  50              struct nouveau_oclass *oclass, void *data, u32 size,
  51              struct nouveau_object **pobject)
  52 {
  53         struct nv50_mc_priv *priv;
  54         int ret;
  55
  56         ret = nouveau_mc_create(parent, engine, oclass, nv50_mc_intr, &priv);
  57         *pobject = nv_object(priv);
  58         if (ret)
  59                 return ret;
  60
  61         return 0;
  62 }
  63
  64 int
  65 nv50_mc_init(struct nouveau_object *object)
  66 {
  67         struct nv50_mc_priv *priv = (void *)object;
  68         nv_wr32(priv, 0x000200, 0xffffffff); /* everything on */
  69         return nouveau_mc_init(&priv->base);
  70 }
  71
  72 struct nouveau_oclass
  73 nv50_mc_oclass = {
  74         .handle = NV_SUBDEV(MC, 0x50),
  75         .ofuncs = &(struct nouveau_ofuncs) {
  76                 .ctor = nv50_mc_ctor,
  77                 .dtor = _nouveau_mc_dtor,
  78                 .init = nv50_mc_init,
  79                 .fini = _nouveau_mc_fini,
  80         },
  81 };