drivers/gpu/drm/nouveau/core/subdev/mc/nvc0.c

   1 /*
   2  * Copyright 2012 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  */
  24
  25 #include <subdev/mc.h>
  26
  27 struct nvc0_mc_priv {
  28         struct nouveau_mc base;
  29 };
  30
  31 static const struct nouveau_mc_intr
  32 nvc0_mc_intr[] = {
  33         { 0x00000001, NVDEV_ENGINE_PPP },
  34         { 0x00000020, NVDEV_ENGINE_COPY0 },
  35         { 0x00000040, NVDEV_ENGINE_COPY1 },
  36         { 0x00000100, NVDEV_ENGINE_FIFO },
  37         { 0x00001000, NVDEV_ENGINE_GR },
  38         { 0x00008000, NVDEV_ENGINE_BSP },
  39         { 0x00100000, NVDEV_SUBDEV_TIMER },
  40         { 0x00200000, NVDEV_SUBDEV_GPIO },
  41         { 0x02000000, NVDEV_SUBDEV_LTCG },
  42         { 0x04000000, NVDEV_ENGINE_DISP },
  43         { 0x80000000, NVDEV_ENGINE_SW },
  44         {},
  45 };
  46
  47 static int
  48 nvc0_mc_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
  49              struct nouveau_oclass *oclass, void *data, u32 size,
  50              struct nouveau_object **pobject)
  51 {
  52         struct nvc0_mc_priv *priv;
  53         int ret;
  54
  55         ret = nouveau_mc_create(parent, engine, oclass, &priv);
  56         *pobject = nv_object(priv);
  57         if (ret)
  58                 return ret;
  59
  60         nv_subdev(priv)->intr = nouveau_mc_intr;
  61         priv->base.intr_map = nvc0_mc_intr;
  62         return 0;
  63 }
  64
  65 struct nouveau_oclass
  66 nvc0_mc_oclass = {
  67         .handle = NV_SUBDEV(MC, 0xc0),
  68         .ofuncs = &(struct nouveau_ofuncs) {
  69                 .ctor = nvc0_mc_ctor,
  70                 .dtor = _nouveau_mc_dtor,
  71                 .init = nv50_mc_init,
  72                 .fini = _nouveau_mc_fini,
  73         },
  74 };