drivers/gpu/drm/nouveau/dispnv04/tvnv04.c

   1 /*
   2  * Copyright (C) 2009 Francisco Jerez.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining
   6  * a copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sublicense, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the
  14  * next paragraph) shall be included in all copies or substantial
  15  * portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  20  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  21  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  22  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  23  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24  *
  25  */
  26
  27 #include <drm/drmP.h>
  28 #include "nouveau_drm.h"
  29 #include "nouveau_reg.h"
  30 #include "nouveau_encoder.h"
  31 #include "nouveau_connector.h"
  32 #include "nouveau_crtc.h"
  33 #include "hw.h"
  34 #include <drm/drm_crtc_helper.h>
  35
  36 #include <drm/i2c/ch7006.h>
  37
  38 #include <subdev/i2c.h>
  39
  40 static struct nouveau_i2c_board_info nv04_tv_encoder_info[] = {
  41         {
  42                 {
  43                         I2C_BOARD_INFO("ch7006", 0x75),
  44                         .platform_data = &(struct ch7006_encoder_params) {
  45                                 CH7006_FORMAT_RGB24m12I, CH7006_CLOCK_MASTER,
  46                                 0, 0, 0,
  47                                 CH7006_SYNC_SLAVE, CH7006_SYNC_SEPARATED,
  48                                 CH7006_POUT_3_3V, CH7006_ACTIVE_HSYNC
  49                         }
  50                 },
  51                 0
  52         },
  53         { }
  54 };
  55
  56 int nv04_tv_identify(struct drm_device *dev, int i2c_index)
  57 {
  58         struct nouveau_drm *drm = nouveau_drm(dev);
  59         struct nouveau_i2c *i2c = nouveau_i2c(drm->device);
  60
  61         return i2c->identify(i2c, i2c_index, "TV encoder",
  62                              nv04_tv_encoder_info, NULL);
  63 }
  64
  65
  66 #define PLLSEL_TV_CRTC1_MASK                            \
  67         (NV_PRAMDAC_PLL_COEFF_SELECT_TV_VSCLK1          \
  68          | NV_PRAMDAC_PLL_COEFF_SELECT_TV_PCLK1)
  69 #define PLLSEL_TV_CRTC2_MASK                            \
  70         (NV_PRAMDAC_PLL_COEFF_SELECT_TV_VSCLK2          \
  71          | NV_PRAMDAC_PLL_COEFF_SELECT_TV_PCLK2)
  72
  73 static void nv04_tv_dpms(struct drm_encoder *encoder, int mode)
  74 {
  75         struct drm_device *dev = encoder->dev;
  76         struct nouveau_drm *drm = nouveau_drm(dev);
  77         struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
  78         struct nv04_mode_state *state = &nv04_display(dev)->mode_reg;
  79         uint8_t crtc1A;
  80
  81         NV_DEBUG(drm, "Setting dpms mode %d on TV encoder (output %d)\n",
  82                  mode, nv_encoder->dcb->index);
  83
  84         state->pllsel &= ~(PLLSEL_TV_CRTC1_MASK | PLLSEL_TV_CRTC2_MASK);
  85
  86         if (mode == DRM_MODE_DPMS_ON) {
  87                 int head = nouveau_crtc(encoder->crtc)->index;
  88                 crtc1A = NVReadVgaCrtc(dev, head, NV_CIO_CRE_RPC1_INDEX);
  89
  90                 state->pllsel |= head ? PLLSEL_TV_CRTC2_MASK :
  91                                         PLLSEL_TV_CRTC1_MASK;
  92
  93                 /* Inhibit hsync */
  94                 crtc1A |= 0x80;
  95
  96                 NVWriteVgaCrtc(dev, head, NV_CIO_CRE_RPC1_INDEX, crtc1A);
  97         }
  98
  99         NVWriteRAMDAC(dev, 0, NV_PRAMDAC_PLL_COEFF_SELECT, state->pllsel);
 100
 101         get_slave_funcs(encoder)->dpms(encoder, mode);
 102 }
 103
 104 static void nv04_tv_bind(struct drm_device *dev, int head, bool bind)
 105 {
 106         struct nv04_crtc_reg *state = &nv04_display(dev)->mode_reg.crtc_reg[head];
 107
 108         state->tv_setup = 0;
 109
 110         if (bind)
 111                 state->CRTC[NV_CIO_CRE_49] |= 0x10;
 112         else
 113                 state->CRTC[NV_CIO_CRE_49] &= ~0x10;
 114
 115         NVWriteVgaCrtc(dev, head, NV_CIO_CRE_LCD__INDEX,
 116                        state->CRTC[NV_CIO_CRE_LCD__INDEX]);
 117         NVWriteVgaCrtc(dev, head, NV_CIO_CRE_49,
 118                        state->CRTC[NV_CIO_CRE_49]);
 119         NVWriteRAMDAC(dev, head, NV_PRAMDAC_TV_SETUP,
 120                       state->tv_setup);
 121 }
 122
 123 static void nv04_tv_prepare(struct drm_encoder *encoder)
 124 {
 125         struct drm_device *dev = encoder->dev;
 126         int head = nouveau_crtc(encoder->crtc)->index;
 127         struct drm_encoder_helper_funcs *helper = encoder->helper_private;
 128
 129         helper->dpms(encoder, DRM_MODE_DPMS_OFF);
 130
 131         nv04_dfp_disable(dev, head);
 132
 133         if (nv_two_heads(dev))
 134                 nv04_tv_bind(dev, head ^ 1, false);
 135
 136         nv04_tv_bind(dev, head, true);
 137 }
 138
 139 static void nv04_tv_mode_set(struct drm_encoder *encoder,
 140                              struct drm_display_mode *mode,
 141                              struct drm_display_mode *adjusted_mode)
 142 {
 143         struct drm_device *dev = encoder->dev;
 144         struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);
 145         struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index];
 146
 147         regp->tv_htotal = adjusted_mode->htotal;
 148         regp->tv_vtotal = adjusted_mode->vtotal;
 149
 150         /* These delay the TV signals with respect to the VGA port,
 151          * they might be useful if we ever allow a CRTC to drive
 152          * multiple outputs.
 153          */
 154         regp->tv_hskew = 1;
 155         regp->tv_hsync_delay = 1;
 156         regp->tv_hsync_delay2 = 64;
 157         regp->tv_vskew = 1;
 158         regp->tv_vsync_delay = 1;
 159
 160         get_slave_funcs(encoder)->mode_set(encoder, mode, adjusted_mode);
 161 }
 162
 163 static void nv04_tv_commit(struct drm_encoder *encoder)
 164 {
 165         struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
 166         struct drm_device *dev = encoder->dev;
 167         struct nouveau_drm *drm = nouveau_drm(dev);
 168         struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);
 169         struct drm_encoder_helper_funcs *helper = encoder->helper_private;
 170
 171         helper->dpms(encoder, DRM_MODE_DPMS_ON);
 172
 173         NV_DEBUG(drm, "Output %s is running on CRTC %d using output %c\n",
 174                  drm_get_connector_name(&nouveau_encoder_connector_get(nv_encoder)->base), nv_crtc->index, '@' + ffs(nv_encoder->dcb->or));
 175 }
 176
 177 static void nv04_tv_destroy(struct drm_encoder *encoder)
 178 {
 179         get_slave_funcs(encoder)->destroy(encoder);
 180         drm_encoder_cleanup(encoder);
 181
 182         kfree(encoder->helper_private);
 183         kfree(nouveau_encoder(encoder));
 184 }
 185
 186 static const struct drm_encoder_funcs nv04_tv_funcs = {
 187         .destroy = nv04_tv_destroy,
 188 };
 189
 190 static const struct drm_encoder_helper_funcs nv04_tv_helper_funcs = {
 191         .dpms = nv04_tv_dpms,
 192         .save = drm_i2c_encoder_save,
 193         .restore = drm_i2c_encoder_restore,
 194         .mode_fixup = drm_i2c_encoder_mode_fixup,
 195         .prepare = nv04_tv_prepare,
 196         .commit = nv04_tv_commit,
 197         .mode_set = nv04_tv_mode_set,
 198         .detect = drm_i2c_encoder_detect,
 199 };
 200
 201 int
 202 nv04_tv_create(struct drm_connector *connector, struct dcb_output *entry)
 203 {
 204         struct nouveau_encoder *nv_encoder;
 205         struct drm_encoder *encoder;
 206         struct drm_device *dev = connector->dev;
 207         struct nouveau_drm *drm = nouveau_drm(dev);
 208         struct nouveau_i2c *i2c = nouveau_i2c(drm->device);
 209         struct nouveau_i2c_port *port = i2c->find(i2c, entry->i2c_index);
 210         int type, ret;
 211
 212         /* Ensure that we can talk to this encoder */
 213         type = nv04_tv_identify(dev, entry->i2c_index);
 214         if (type < 0)
 215                 return type;
 216
 217         /* Allocate the necessary memory */
 218         nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL);
 219         if (!nv_encoder)
 220                 return -ENOMEM;
 221
 222         /* Initialize the common members */
 223         encoder = to_drm_encoder(nv_encoder);
 224
 225         drm_encoder_init(dev, encoder, &nv04_tv_funcs, DRM_MODE_ENCODER_TVDAC);
 226         drm_encoder_helper_add(encoder, &nv04_tv_helper_funcs);
 227
 228         encoder->possible_crtcs = entry->heads;
 229         encoder->possible_clones = 0;
 230         nv_encoder->dcb = entry;
 231         nv_encoder->or = ffs(entry->or) - 1;
 232
 233         /* Run the slave-specific initialization */
 234         ret = drm_i2c_encoder_init(dev, to_encoder_slave(encoder),
 235                                    &port->adapter,
 236                                    &nv04_tv_encoder_info[type].dev);
 237         if (ret < 0)
 238                 goto fail_cleanup;
 239
 240         /* Attach it to the specified connector. */
 241         get_slave_funcs(encoder)->create_resources(encoder, connector);
 242         drm_mode_connector_attach_encoder(connector, encoder);
 243
 244         return 0;
 245
 246 fail_cleanup:
 247         drm_encoder_cleanup(encoder);
 248         kfree(nv_encoder);
 249         return ret;
 250 }