drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm206.c

   1 /*
   2  * Copyright 2015 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs <bskeggs@redhat.com>
  23  */
  24 #include "ctxgf100.h"
  25
  26 static const struct gf100_gr_init
  27 gm206_grctx_init_gpc_unk_1[] = {
  28         { 0x418600,   1, 0x04, 0x0000007f },
  29         { 0x418684,   1, 0x04, 0x0000001f },
  30         { 0x418700,   1, 0x04, 0x00000002 },
  31         { 0x418704,   1, 0x04, 0x00000080 },
  32         { 0x418708,   1, 0x04, 0x40000000 },
  33         { 0x41870c,   2, 0x04, 0x00000000 },
  34         { 0x418728,   1, 0x04, 0x00300020 },
  35         {}
  36 };
  37
  38 static const struct gf100_gr_pack
  39 gm206_grctx_pack_gpc[] = {
  40         { gm107_grctx_init_gpc_unk_0 },
  41         { gm204_grctx_init_prop_0 },
  42         { gm206_grctx_init_gpc_unk_1 },
  43         { gm204_grctx_init_setup_0 },
  44         { gf100_grctx_init_zcull_0 },
  45         { gk208_grctx_init_crstr_0 },
  46         { gm204_grctx_init_gpm_0 },
  47         { gm204_grctx_init_gpc_unk_2 },
  48         { gf100_grctx_init_gcc_0 },
  49         {}
  50 };
  51
  52 struct nvkm_oclass *
  53 gm206_grctx_oclass = &(struct gf100_grctx_oclass) {
  54         .base.handle = NV_ENGCTX(GR, 0x26),
  55         .base.ofuncs = &(struct nvkm_ofuncs) {
  56                 .ctor = gf100_gr_context_ctor,
  57                 .dtor = gf100_gr_context_dtor,
  58                 .init = _nvkm_gr_context_init,
  59                 .fini = _nvkm_gr_context_fini,
  60                 .rd32 = _nvkm_gr_context_rd32,
  61                 .wr32 = _nvkm_gr_context_wr32,
  62         },
  63         .main  = gm204_grctx_generate_main,
  64         .unkn  = gk104_grctx_generate_unkn,
  65         .hub   = gm204_grctx_pack_hub,
  66         .gpc   = gm206_grctx_pack_gpc,
  67         .zcull = gf100_grctx_pack_zcull,
  68         .tpc   = gm204_grctx_pack_tpc,
  69         .ppc   = gm204_grctx_pack_ppc,
  70         .icmd  = gm204_grctx_pack_icmd,
  71         .mthd  = gm204_grctx_pack_mthd,
  72         .bundle = gm107_grctx_generate_bundle,
  73         .bundle_size = 0x3000,
  74         .bundle_min_gpm_fifo_depth = 0x180,
  75         .bundle_token_limit = 0x780,
  76         .pagepool = gm107_grctx_generate_pagepool,
  77         .pagepool_size = 0x20000,
  78         .attrib = gm107_grctx_generate_attrib,
  79         .attrib_nr_max = 0x600,
  80         .attrib_nr = 0x400,
  81         .alpha_nr_max = 0x1800,
  82         .alpha_nr = 0x1000,
  83 }.base;