drivers/gpu/drm/nouveau/nvkm/engine/gr/gf104.c

   1 /*
   2  * Copyright 2013 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs <bskeggs@redhat.com>
  23  */
  24 #include "gf100.h"
  25 #include "ctxgf100.h"
  26
  27 /*******************************************************************************
  28  * PGRAPH register lists
  29  ******************************************************************************/
  30
  31 const struct gf100_gr_init
  32 gf104_gr_init_ds_0[] = {
  33         { 0x405844,   1, 0x04, 0x00ffffff },
  34         { 0x405850,   1, 0x04, 0x00000000 },
  35         { 0x405900,   1, 0x04, 0x00002834 },
  36         { 0x405908,   1, 0x04, 0x00000000 },
  37         {}
  38 };
  39
  40 const struct gf100_gr_init
  41 gf104_gr_init_tex_0[] = {
  42         { 0x419ab0,   1, 0x04, 0x00000000 },
  43         { 0x419ac8,   1, 0x04, 0x00000000 },
  44         { 0x419ab8,   1, 0x04, 0x000000e7 },
  45         { 0x419abc,   2, 0x04, 0x00000000 },
  46         {}
  47 };
  48
  49 static const struct gf100_gr_init
  50 gf104_gr_init_pe_0[] = {
  51         { 0x41980c,   3, 0x04, 0x00000000 },
  52         { 0x419844,   1, 0x04, 0x00000000 },
  53         { 0x41984c,   1, 0x04, 0x00005bc5 },
  54         { 0x419850,   4, 0x04, 0x00000000 },
  55         { 0x419880,   1, 0x04, 0x00000002 },
  56         {}
  57 };
  58
  59 const struct gf100_gr_init
  60 gf104_gr_init_sm_0[] = {
  61         { 0x419e00,   1, 0x04, 0x00000000 },
  62         { 0x419ea0,   1, 0x04, 0x00000000 },
  63         { 0x419ea4,   1, 0x04, 0x00000100 },
  64         { 0x419ea8,   1, 0x04, 0x00001100 },
  65         { 0x419eac,   1, 0x04, 0x11100702 },
  66         { 0x419eb0,   1, 0x04, 0x00000003 },
  67         { 0x419eb4,   4, 0x04, 0x00000000 },
  68         { 0x419ec8,   1, 0x04, 0x0e063818 },
  69         { 0x419ecc,   1, 0x04, 0x0e060e06 },
  70         { 0x419ed0,   1, 0x04, 0x00003818 },
  71         { 0x419ed4,   1, 0x04, 0x011104f1 },
  72         { 0x419edc,   1, 0x04, 0x00000000 },
  73         { 0x419f00,   1, 0x04, 0x00000000 },
  74         { 0x419f2c,   1, 0x04, 0x00000000 },
  75         {}
  76 };
  77
  78 static const struct gf100_gr_pack
  79 gf104_gr_pack_mmio[] = {
  80         { gf100_gr_init_main_0 },
  81         { gf100_gr_init_fe_0 },
  82         { gf100_gr_init_pri_0 },
  83         { gf100_gr_init_rstr2d_0 },
  84         { gf100_gr_init_pd_0 },
  85         { gf104_gr_init_ds_0 },
  86         { gf100_gr_init_scc_0 },
  87         { gf100_gr_init_prop_0 },
  88         { gf100_gr_init_gpc_unk_0 },
  89         { gf100_gr_init_setup_0 },
  90         { gf100_gr_init_crstr_0 },
  91         { gf100_gr_init_setup_1 },
  92         { gf100_gr_init_zcull_0 },
  93         { gf100_gr_init_gpm_0 },
  94         { gf100_gr_init_gpc_unk_1 },
  95         { gf100_gr_init_gcc_0 },
  96         { gf100_gr_init_tpccs_0 },
  97         { gf104_gr_init_tex_0 },
  98         { gf104_gr_init_pe_0 },
  99         { gf100_gr_init_l1c_0 },
 100         { gf100_gr_init_wwdx_0 },
 101         { gf100_gr_init_tpccs_1 },
 102         { gf100_gr_init_mpc_0 },
 103         { gf104_gr_init_sm_0 },
 104         { gf100_gr_init_be_0 },
 105         { gf100_gr_init_fe_1 },
 106         {}
 107 };
 108
 109 /*******************************************************************************
 110  * PGRAPH engine/subdev functions
 111  ******************************************************************************/
 112
 113 struct nvkm_oclass *
 114 gf104_gr_oclass = &(struct gf100_gr_oclass) {
 115         .base.handle = NV_ENGINE(GR, 0xc3),
 116         .base.ofuncs = &(struct nvkm_ofuncs) {
 117                 .ctor = gf100_gr_ctor,
 118                 .dtor = gf100_gr_dtor,
 119                 .init = gf100_gr_init,
 120                 .fini = _nvkm_gr_fini,
 121         },
 122         .cclass = &gf104_grctx_oclass,
 123         .sclass = gf100_gr_sclass,
 124         .mmio = gf104_gr_pack_mmio,
 125         .fecs.ucode = &gf100_gr_fecs_ucode,
 126         .gpccs.ucode = &gf100_gr_gpccs_ucode,
 127 }.base;