drivers/gpu/drm/nouveau/nvkm/engine/gr/gk110.c

   1 /*
   2  * Copyright 2013 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs <bskeggs@redhat.com>
  23  */
  24 #include "gf100.h"
  25 #include "ctxgf100.h"
  26
  27 #include <subdev/timer.h>
  28
  29 #include <nvif/class.h>
  30
  31 /*******************************************************************************
  32  * PGRAPH register lists
  33  ******************************************************************************/
  34
  35 const struct gf100_gr_init
  36 gk110_gr_init_fe_0[] = {
  37         { 0x40415c,   1, 0x04, 0x00000000 },
  38         { 0x404170,   1, 0x04, 0x00000000 },
  39         { 0x4041b4,   1, 0x04, 0x00000000 },
  40         {}
  41 };
  42
  43 const struct gf100_gr_init
  44 gk110_gr_init_ds_0[] = {
  45         { 0x405844,   1, 0x04, 0x00ffffff },
  46         { 0x405850,   1, 0x04, 0x00000000 },
  47         { 0x405900,   1, 0x04, 0x0000ff00 },
  48         { 0x405908,   1, 0x04, 0x00000000 },
  49         { 0x405928,   2, 0x04, 0x00000000 },
  50         {}
  51 };
  52
  53 const struct gf100_gr_init
  54 gk110_gr_init_sked_0[] = {
  55         { 0x407010,   1, 0x04, 0x00000000 },
  56         { 0x407040,   1, 0x04, 0x80440424 },
  57         { 0x407048,   1, 0x04, 0x0000000a },
  58         {}
  59 };
  60
  61 const struct gf100_gr_init
  62 gk110_gr_init_cwd_0[] = {
  63         { 0x405b44,   1, 0x04, 0x00000000 },
  64         { 0x405b50,   1, 0x04, 0x00000000 },
  65         {}
  66 };
  67
  68 const struct gf100_gr_init
  69 gk110_gr_init_gpc_unk_1[] = {
  70         { 0x418d00,   1, 0x04, 0x00000000 },
  71         { 0x418d28,   2, 0x04, 0x00000000 },
  72         { 0x418f00,   1, 0x04, 0x00000400 },
  73         { 0x418f08,   1, 0x04, 0x00000000 },
  74         { 0x418f20,   2, 0x04, 0x00000000 },
  75         { 0x418e00,   1, 0x04, 0x00000000 },
  76         { 0x418e08,   1, 0x04, 0x00000000 },
  77         { 0x418e1c,   2, 0x04, 0x00000000 },
  78         {}
  79 };
  80
  81 const struct gf100_gr_init
  82 gk110_gr_init_tex_0[] = {
  83         { 0x419ab0,   1, 0x04, 0x00000000 },
  84         { 0x419ac8,   1, 0x04, 0x00000000 },
  85         { 0x419ab8,   1, 0x04, 0x000000e7 },
  86         { 0x419aec,   1, 0x04, 0x00000000 },
  87         { 0x419abc,   2, 0x04, 0x00000000 },
  88         { 0x419ab4,   1, 0x04, 0x00000000 },
  89         { 0x419aa8,   2, 0x04, 0x00000000 },
  90         {}
  91 };
  92
  93 static const struct gf100_gr_init
  94 gk110_gr_init_l1c_0[] = {
  95         { 0x419c98,   1, 0x04, 0x00000000 },
  96         { 0x419ca8,   1, 0x04, 0x00000000 },
  97         { 0x419cb0,   1, 0x04, 0x01000000 },
  98         { 0x419cb4,   1, 0x04, 0x00000000 },
  99         { 0x419cb8,   1, 0x04, 0x00b08bea },
 100         { 0x419c84,   1, 0x04, 0x00010384 },
 101         { 0x419cbc,   1, 0x04, 0x281b3646 },
 102         { 0x419cc0,   2, 0x04, 0x00000000 },
 103         { 0x419c80,   1, 0x04, 0x00020230 },
 104         { 0x419ccc,   2, 0x04, 0x00000000 },
 105         {}
 106 };
 107
 108 const struct gf100_gr_init
 109 gk110_gr_init_sm_0[] = {
 110         { 0x419e00,   1, 0x04, 0x00000080 },
 111         { 0x419ea0,   1, 0x04, 0x00000000 },
 112         { 0x419ee4,   1, 0x04, 0x00000000 },
 113         { 0x419ea4,   1, 0x04, 0x00000100 },
 114         { 0x419ea8,   1, 0x04, 0x00000000 },
 115         { 0x419eb4,   1, 0x04, 0x00000000 },
 116         { 0x419ebc,   2, 0x04, 0x00000000 },
 117         { 0x419edc,   1, 0x04, 0x00000000 },
 118         { 0x419f00,   1, 0x04, 0x00000000 },
 119         { 0x419ed0,   1, 0x04, 0x00003234 },
 120         { 0x419f74,   1, 0x04, 0x00015555 },
 121         { 0x419f80,   4, 0x04, 0x00000000 },
 122         {}
 123 };
 124
 125 static const struct gf100_gr_pack
 126 gk110_gr_pack_mmio[] = {
 127         { gk104_gr_init_main_0 },
 128         { gk110_gr_init_fe_0 },
 129         { gf100_gr_init_pri_0 },
 130         { gf100_gr_init_rstr2d_0 },
 131         { gf119_gr_init_pd_0 },
 132         { gk110_gr_init_ds_0 },
 133         { gf100_gr_init_scc_0 },
 134         { gk110_gr_init_sked_0 },
 135         { gk110_gr_init_cwd_0 },
 136         { gf119_gr_init_prop_0 },
 137         { gf108_gr_init_gpc_unk_0 },
 138         { gf100_gr_init_setup_0 },
 139         { gf100_gr_init_crstr_0 },
 140         { gf108_gr_init_setup_1 },
 141         { gf100_gr_init_zcull_0 },
 142         { gf119_gr_init_gpm_0 },
 143         { gk110_gr_init_gpc_unk_1 },
 144         { gf100_gr_init_gcc_0 },
 145         { gk104_gr_init_tpccs_0 },
 146         { gk110_gr_init_tex_0 },
 147         { gk104_gr_init_pe_0 },
 148         { gk110_gr_init_l1c_0 },
 149         { gf100_gr_init_mpc_0 },
 150         { gk110_gr_init_sm_0 },
 151         { gf117_gr_init_pes_0 },
 152         { gf117_gr_init_wwdx_0 },
 153         { gf117_gr_init_cbm_0 },
 154         { gk104_gr_init_be_0 },
 155         { gf100_gr_init_fe_1 },
 156         {}
 157 };
 158
 159 /*******************************************************************************
 160  * PGRAPH engine/subdev functions
 161  ******************************************************************************/
 162
 163 #include "fuc/hubgk110.fuc3.h"
 164
 165 struct gf100_gr_ucode
 166 gk110_gr_fecs_ucode = {
 167         .code.data = gk110_grhub_code,
 168         .code.size = sizeof(gk110_grhub_code),
 169         .data.data = gk110_grhub_data,
 170         .data.size = sizeof(gk110_grhub_data),
 171 };
 172
 173 #include "fuc/gpcgk110.fuc3.h"
 174
 175 struct gf100_gr_ucode
 176 gk110_gr_gpccs_ucode = {
 177         .code.data = gk110_grgpc_code,
 178         .code.size = sizeof(gk110_grgpc_code),
 179         .data.data = gk110_grgpc_data,
 180         .data.size = sizeof(gk110_grgpc_data),
 181 };
 182
 183 static const struct gf100_gr_func
 184 gk110_gr = {
 185         .init = gk104_gr_init,
 186         .mmio = gk110_gr_pack_mmio,
 187         .fecs.ucode = &gk110_gr_fecs_ucode,
 188         .gpccs.ucode = &gk110_gr_gpccs_ucode,
 189         .ppc_nr = 2,
 190         .grctx = &gk110_grctx,
 191         .sclass = {
 192                 { -1, -1, FERMI_TWOD_A },
 193                 { -1, -1, KEPLER_INLINE_TO_MEMORY_B },
 194                 { -1, -1, KEPLER_B, &gf100_fermi },
 195                 { -1, -1, KEPLER_COMPUTE_B },
 196                 {}
 197         }
 198 };
 199
 200 int
 201 gk110_gr_new(struct nvkm_device *device, int index, struct nvkm_gr **pgr)
 202 {
 203         return gf100_gr_new_(&gk110_gr, device, index, pgr);
 204 }