drm/nouveau/sw: turn flip completion into an event
[deliverable/linux.git] / drivers / gpu / drm / nouveau / nvkm / engine / sw / nv04.c
1 /*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24 #include "priv.h"
25 #include "chan.h"
26 #include "nvsw.h"
27
28 #include <nvif/class.h>
29 #include <nvif/ioctl.h>
30 #include <nvif/unpack.h>
31
32 struct nv04_sw_chan {
33 struct nvkm_sw_chan base;
34 atomic_t ref;
35 };
36
37 /*******************************************************************************
38 * software object classes
39 ******************************************************************************/
40
41 static int
42 nv04_sw_set_ref(struct nvkm_object *object, u32 mthd, void *data, u32 size)
43 {
44 struct nv04_sw_chan *chan = (void *)nv_engctx(object->parent);
45 atomic_set(&chan->ref, *(u32*)data);
46 return 0;
47 }
48
49 static int
50 nv04_sw_flip(struct nvkm_object *object, u32 mthd, void *args, u32 size)
51 {
52 struct nvkm_sw_chan *chan = (void *)nv_engctx(object->parent);
53 nvkm_event_send(&chan->event, 1, 0, NULL, 0);
54 return 0;
55 }
56
57 static struct nvkm_omthds
58 nv04_sw_omthds[] = {
59 { 0x0150, 0x0150, nv04_sw_set_ref },
60 { 0x0500, 0x0500, nv04_sw_flip },
61 {}
62 };
63
64 static int
65 nv04_sw_mthd_get_ref(struct nvkm_object *object, void *data, u32 size)
66 {
67 struct nv04_sw_chan *chan = (void *)object->parent;
68 union {
69 struct nv04_nvsw_get_ref_v0 v0;
70 } *args = data;
71 int ret;
72
73 if (nvif_unpack(args->v0, 0, 0, false)) {
74 args->v0.ref = atomic_read(&chan->ref);
75 }
76
77 return ret;
78 }
79
80 static int
81 nv04_sw_mthd(struct nvkm_object *object, u32 mthd, void *data, u32 size)
82 {
83 switch (mthd) {
84 case NV04_NVSW_GET_REF:
85 return nv04_sw_mthd_get_ref(object, data, size);
86 default:
87 break;
88 }
89 return -EINVAL;
90 }
91
92 static struct nvkm_ofuncs
93 nv04_sw_ofuncs = {
94 .ctor = nvkm_nvsw_ctor,
95 .dtor = nvkm_object_destroy,
96 .init = _nvkm_object_init,
97 .fini = _nvkm_object_fini,
98 .mthd = nv04_sw_mthd,
99 };
100
101 static struct nvkm_oclass
102 nv04_sw_sclass[] = {
103 { NVIF_IOCTL_NEW_V0_SW_NV04, &nv04_sw_ofuncs, nv04_sw_omthds },
104 {}
105 };
106
107 /*******************************************************************************
108 * software context
109 ******************************************************************************/
110
111 static int
112 nv04_sw_context_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
113 struct nvkm_oclass *oclass, void *data, u32 size,
114 struct nvkm_object **pobject)
115 {
116 struct nv04_sw_chan *chan;
117 int ret;
118
119 ret = nvkm_sw_context_create(parent, engine, oclass, &chan);
120 *pobject = nv_object(chan);
121 if (ret)
122 return ret;
123
124 atomic_set(&chan->ref, 0);
125 return 0;
126 }
127
128 static struct nvkm_oclass
129 nv04_sw_cclass = {
130 .handle = NV_ENGCTX(SW, 0x04),
131 .ofuncs = &(struct nvkm_ofuncs) {
132 .ctor = nv04_sw_context_ctor,
133 .dtor = _nvkm_sw_context_dtor,
134 .init = _nvkm_sw_context_init,
135 .fini = _nvkm_sw_context_fini,
136 },
137 };
138
139 /*******************************************************************************
140 * software engine/subdev functions
141 ******************************************************************************/
142
143 void
144 nv04_sw_intr(struct nvkm_subdev *subdev)
145 {
146 nvkm_mask(subdev->device, 0x000100, 0x80000000, 0x00000000);
147 }
148
149 static int
150 nv04_sw_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
151 struct nvkm_oclass *oclass, void *data, u32 size,
152 struct nvkm_object **pobject)
153 {
154 struct nvkm_sw *sw;
155 int ret;
156
157 ret = nvkm_sw_create(parent, engine, oclass, &sw);
158 *pobject = nv_object(sw);
159 if (ret)
160 return ret;
161
162 nv_engine(sw)->cclass = &nv04_sw_cclass;
163 nv_engine(sw)->sclass = nv04_sw_sclass;
164 nv_subdev(sw)->intr = nv04_sw_intr;
165 return 0;
166 }
167
168 struct nvkm_oclass *
169 nv04_sw_oclass = &(struct nvkm_oclass) {
170 .handle = NV_ENGINE(SW, 0x04),
171 .ofuncs = &(struct nvkm_ofuncs) {
172 .ctor = nv04_sw_ctor,
173 .dtor = _nvkm_sw_dtor,
174 .init = _nvkm_sw_init,
175 .fini = _nvkm_sw_fini,
176 },
177 };
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