drivers/gpu/drm/nouveau/nvkm/subdev/i2c/g94.c

   1 /*
   2  * Copyright 2012 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  */
  24 #include "priv.h"
  25 #include "pad.h"
  26
  27 void
  28 g94_aux_stat(struct nvkm_i2c *i2c, u32 *hi, u32 *lo, u32 *rq, u32 *tx)
  29 {
  30         struct nvkm_device *device = i2c->subdev.device;
  31         u32 intr = nvkm_rd32(device, 0x00e06c);
  32         u32 stat = nvkm_rd32(device, 0x00e068) & intr, i;
  33         for (i = 0, *hi = *lo = *rq = *tx = 0; i < 8; i++) {
  34                 if ((stat & (1 << (i * 4)))) *hi |= 1 << i;
  35                 if ((stat & (2 << (i * 4)))) *lo |= 1 << i;
  36                 if ((stat & (4 << (i * 4)))) *rq |= 1 << i;
  37                 if ((stat & (8 << (i * 4)))) *tx |= 1 << i;
  38         }
  39         nvkm_wr32(device, 0x00e06c, intr);
  40 }
  41
  42 void
  43 g94_aux_mask(struct nvkm_i2c *i2c, u32 type, u32 mask, u32 data)
  44 {
  45         struct nvkm_device *device = i2c->subdev.device;
  46         u32 temp = nvkm_rd32(device, 0x00e068), i;
  47         for (i = 0; i < 8; i++) {
  48                 if (mask & (1 << i)) {
  49                         if (!(data & (1 << i))) {
  50                                 temp &= ~(type << (i * 4));
  51                                 continue;
  52                         }
  53                         temp |= type << (i * 4);
  54                 }
  55         }
  56         nvkm_wr32(device, 0x00e068, temp);
  57 }
  58
  59 struct nvkm_oclass *
  60 g94_i2c_oclass = &(struct nvkm_i2c_impl) {
  61         .base.handle = NV_SUBDEV(I2C, 0x94),
  62         .base.ofuncs = &(struct nvkm_ofuncs) {
  63                 .ctor = _nvkm_i2c_ctor,
  64                 .dtor = _nvkm_i2c_dtor,
  65                 .init = _nvkm_i2c_init,
  66                 .fini = _nvkm_i2c_fini,
  67         },
  68         .pad_x_new = g94_i2c_pad_x_new,
  69         .pad_s_new = g94_i2c_pad_s_new,
  70         .aux = 4,
  71         .aux_stat = g94_aux_stat,
  72         .aux_mask = g94_aux_mask,
  73 }.base;