2 * Copyright 2012 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
26 #include <core/enum.h>
27 #include <subdev/fb.h>
28 #include <subdev/timer.h>
31 gf100_ltc_cbc_clear(struct nvkm_ltc
*ltc
, u32 start
, u32 limit
)
33 struct nvkm_device
*device
= ltc
->subdev
.device
;
34 nvkm_wr32(device
, 0x17e8cc, start
);
35 nvkm_wr32(device
, 0x17e8d0, limit
);
36 nvkm_wr32(device
, 0x17e8c8, 0x00000004);
40 gf100_ltc_cbc_wait(struct nvkm_ltc
*ltc
)
42 struct nvkm_device
*device
= ltc
->subdev
.device
;
44 for (c
= 0; c
< ltc
->ltc_nr
; c
++) {
45 for (s
= 0; s
< ltc
->lts_nr
; s
++) {
46 const u32 addr
= 0x1410c8 + (c
* 0x2000) + (s
* 0x400);
47 nvkm_msec(device
, 2000,
48 if (!nvkm_rd32(device
, addr
))
56 gf100_ltc_zbc_clear_color(struct nvkm_ltc
*ltc
, int i
, const u32 color
[4])
58 struct nvkm_device
*device
= ltc
->subdev
.device
;
59 nvkm_mask(device
, 0x17ea44, 0x0000000f, i
);
60 nvkm_wr32(device
, 0x17ea48, color
[0]);
61 nvkm_wr32(device
, 0x17ea4c, color
[1]);
62 nvkm_wr32(device
, 0x17ea50, color
[2]);
63 nvkm_wr32(device
, 0x17ea54, color
[3]);
67 gf100_ltc_zbc_clear_depth(struct nvkm_ltc
*ltc
, int i
, const u32 depth
)
69 struct nvkm_device
*device
= ltc
->subdev
.device
;
70 nvkm_mask(device
, 0x17ea44, 0x0000000f, i
);
71 nvkm_wr32(device
, 0x17ea58, depth
);
74 static const struct nvkm_bitfield
75 gf100_ltc_lts_intr_name
[] = {
76 { 0x00000001, "IDLE_ERROR_IQ" },
77 { 0x00000002, "IDLE_ERROR_CBC" },
78 { 0x00000004, "IDLE_ERROR_TSTG" },
79 { 0x00000008, "IDLE_ERROR_DSTG" },
80 { 0x00000010, "EVICTED_CB" },
81 { 0x00000020, "ILLEGAL_COMPSTAT" },
82 { 0x00000040, "BLOCKLINEAR_CB" },
83 { 0x00000100, "ECC_SEC_ERROR" },
84 { 0x00000200, "ECC_DED_ERROR" },
85 { 0x00000400, "DEBUG" },
86 { 0x00000800, "ATOMIC_TO_Z" },
87 { 0x00001000, "ILLEGAL_ATOMIC" },
88 { 0x00002000, "BLKACTIVITY_ERR" },
93 gf100_ltc_lts_intr(struct nvkm_ltc
*ltc
, int c
, int s
)
95 struct nvkm_subdev
*subdev
= <c
->subdev
;
96 struct nvkm_device
*device
= subdev
->device
;
97 u32 base
= 0x141000 + (c
* 0x2000) + (s
* 0x400);
98 u32 intr
= nvkm_rd32(device
, base
+ 0x020);
99 u32 stat
= intr
& 0x0000ffff;
103 nvkm_snprintbf(msg
, sizeof(msg
), gf100_ltc_lts_intr_name
, stat
);
104 nvkm_error(subdev
, "LTC%d_LTS%d: %08x [%s]\n", c
, s
, stat
, msg
);
107 nvkm_wr32(device
, base
+ 0x020, intr
);
111 gf100_ltc_intr(struct nvkm_ltc
*ltc
)
113 struct nvkm_device
*device
= ltc
->subdev
.device
;
116 mask
= nvkm_rd32(device
, 0x00017c);
118 u32 s
, c
= __ffs(mask
);
119 for (s
= 0; s
< ltc
->lts_nr
; s
++)
120 gf100_ltc_lts_intr(ltc
, c
, s
);
126 gf100_ltc_invalidate(struct nvkm_ltc
*ltc
)
128 struct nvkm_device
*device
= ltc
->subdev
.device
;
131 nvkm_wr32(device
, 0x70004, 0x00000001);
132 taken
= nvkm_wait_msec(device
, 2000, 0x70004, 0x00000003, 0x00000000);
135 nvkm_debug(<c
->subdev
, "LTC invalidate took %lld ns\n", taken
);
139 gf100_ltc_flush(struct nvkm_ltc
*ltc
)
141 struct nvkm_device
*device
= ltc
->subdev
.device
;
144 nvkm_wr32(device
, 0x70010, 0x00000001);
145 taken
= nvkm_wait_msec(device
, 2000, 0x70010, 0x00000003, 0x00000000);
148 nvkm_debug(<c
->subdev
, "LTC flush took %lld ns\n", taken
);
151 /* TODO: Figure out tag memory details and drop the over-cautious allocation.
154 gf100_ltc_oneinit_tag_ram(struct nvkm_ltc
*ltc
)
156 struct nvkm_ram
*ram
= ltc
->subdev
.device
->fb
->ram
;
157 u32 tag_size
, tag_margin
, tag_align
;
160 /* No VRAM, no tags for now. */
166 /* tags for 1/4 of VRAM should be enough (8192/4 per GiB of VRAM) */
167 ltc
->num_tags
= (ram
->size
>> 17) / 4;
168 if (ltc
->num_tags
> (1 << 17))
169 ltc
->num_tags
= 1 << 17; /* we have 17 bits in PTE */
170 ltc
->num_tags
= (ltc
->num_tags
+ 63) & ~63; /* round up to 64 */
172 tag_align
= ltc
->ltc_nr
* 0x800;
173 tag_margin
= (tag_align
< 0x6000) ? 0x6000 : tag_align
;
175 /* 4 part 4 sub: 0x2000 bytes for 56 tags */
176 /* 3 part 4 sub: 0x6000 bytes for 168 tags */
178 * About 147 bytes per tag. Let's be safe and allocate x2, which makes
179 * 0x4980 bytes for 64 tags, and round up to 0x6000 bytes for 64 tags.
181 * For 4 GiB of memory we'll have 8192 tags which makes 3 MiB, < 0.1 %.
183 tag_size
= (ltc
->num_tags
/ 64) * 0x6000 + tag_margin
;
184 tag_size
+= tag_align
;
185 tag_size
= (tag_size
+ 0xfff) >> 12; /* round up */
187 ret
= nvkm_mm_tail(&ram
->vram
, 1, 1, tag_size
, tag_size
, 1,
192 u64 tag_base
= ((u64
)ltc
->tag_ram
->offset
<< 12) + tag_margin
;
194 tag_base
+= tag_align
- 1;
195 do_div(tag_base
, tag_align
);
197 ltc
->tag_base
= tag_base
;
201 return nvkm_mm_init(<c
->tags
, 0, ltc
->num_tags
, 1);
205 gf100_ltc_oneinit(struct nvkm_ltc
*ltc
)
207 struct nvkm_device
*device
= ltc
->subdev
.device
;
208 const u32 parts
= nvkm_rd32(device
, 0x022438);
209 const u32 mask
= nvkm_rd32(device
, 0x022554);
210 const u32 slice
= nvkm_rd32(device
, 0x17e8dc) >> 28;
213 for (i
= 0; i
< parts
; i
++) {
214 if (!(mask
& (1 << i
)))
219 return gf100_ltc_oneinit_tag_ram(ltc
);
223 gf100_ltc_init(struct nvkm_ltc
*ltc
)
225 struct nvkm_device
*device
= ltc
->subdev
.device
;
226 u32 lpg128
= !(nvkm_rd32(device
, 0x100c80) & 0x00000001);
228 nvkm_mask(device
, 0x17e820, 0x00100000, 0x00000000); /* INTR_EN &= ~0x10 */
229 nvkm_wr32(device
, 0x17e8d8, ltc
->ltc_nr
);
230 nvkm_wr32(device
, 0x17e8d4, ltc
->tag_base
);
231 nvkm_mask(device
, 0x17e8c0, 0x00000002, lpg128
? 0x00000002 : 0x00000000);
234 static const struct nvkm_ltc_func
236 .oneinit
= gf100_ltc_oneinit
,
237 .init
= gf100_ltc_init
,
238 .intr
= gf100_ltc_intr
,
239 .cbc_clear
= gf100_ltc_cbc_clear
,
240 .cbc_wait
= gf100_ltc_cbc_wait
,
242 .zbc_clear_color
= gf100_ltc_zbc_clear_color
,
243 .zbc_clear_depth
= gf100_ltc_zbc_clear_depth
,
244 .invalidate
= gf100_ltc_invalidate
,
245 .flush
= gf100_ltc_flush
,
249 gf100_ltc_new(struct nvkm_device
*device
, int index
, struct nvkm_ltc
**pltc
)
251 return nvkm_ltc_new_(&gf100_ltc
, device
, index
, pltc
);