2 * Copyright 2012 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
26 #include <core/device.h>
28 const struct nvkm_mc_intr
30 { 0x04000000, NVDEV_ENGINE_DISP
}, /* DISP before FIFO, so pageflip-timestamping works! */
31 { 0x00000001, NVDEV_ENGINE_MPEG
},
32 { 0x00000100, NVDEV_ENGINE_FIFO
},
33 { 0x00001000, NVDEV_ENGINE_GR
},
34 { 0x00004000, NVDEV_ENGINE_CIPHER
}, /* NV84- */
35 { 0x00008000, NVDEV_ENGINE_BSP
}, /* NV84- */
36 { 0x00020000, NVDEV_ENGINE_VP
}, /* NV84- */
37 { 0x00100000, NVDEV_SUBDEV_TIMER
},
38 { 0x00200000, NVDEV_SUBDEV_GPIO
}, /* PMGR->GPIO */
39 { 0x00200000, NVDEV_SUBDEV_I2C
}, /* PMGR->I2C/AUX */
40 { 0x10000000, NVDEV_SUBDEV_BUS
},
41 { 0x80000000, NVDEV_ENGINE_SW
},
42 { 0x0002d101, NVDEV_SUBDEV_FB
},
47 nv50_mc_msi_rearm(struct nvkm_mc
*pmc
)
49 struct nvkm_device
*device
= nv_device(pmc
);
50 pci_write_config_byte(device
->pdev
, 0x68, 0xff);
54 nv50_mc_init(struct nvkm_object
*object
)
56 struct nv04_mc_priv
*priv
= (void *)object
;
57 nv_wr32(priv
, 0x000200, 0xffffffff); /* everything on */
58 return nvkm_mc_init(&priv
->base
);
62 nv50_mc_oclass
= &(struct nvkm_mc_oclass
) {
63 .base
.handle
= NV_SUBDEV(MC
, 0x50),
64 .base
.ofuncs
= &(struct nvkm_ofuncs
) {
66 .dtor
= _nvkm_mc_dtor
,
68 .fini
= _nvkm_mc_fini
,
71 .msi_rearm
= nv50_mc_msi_rearm
,
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