drivers/gpu/drm/radeon/radeon_audio.c

   1 /*
   2  * Copyright 2014 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Slava Grigorev <slava.grigorev@amd.com>
  23  */
  24
  25 #include <linux/gcd.h>
  26 #include <drm/drmP.h>
  27 #include <drm/drm_crtc.h>
  28 #include "radeon.h"
  29 #include "atom.h"
  30 #include "radeon_audio.h"
  31
  32 void r600_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin,
  33                 u8 enable_mask);
  34 void dce4_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin,
  35                 u8 enable_mask);
  36 void dce6_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin,
  37                 u8 enable_mask);
  38 u32 dce6_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg);
  39 void dce6_endpoint_wreg(struct radeon_device *rdev,
  40                 u32 offset, u32 reg, u32 v);
  41 void dce3_2_afmt_write_sad_regs(struct drm_encoder *encoder,
  42                 struct cea_sad *sads, int sad_count);
  43 void evergreen_hdmi_write_sad_regs(struct drm_encoder *encoder,
  44                 struct cea_sad *sads, int sad_count);
  45 void dce6_afmt_write_sad_regs(struct drm_encoder *encoder,
  46                 struct cea_sad *sads, int sad_count);
  47 void dce3_2_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder,
  48                 u8 *sadb, int sad_count);
  49 void dce3_2_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder,
  50                 u8 *sadb, int sad_count);
  51 void dce4_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder,
  52                 u8 *sadb, int sad_count);
  53 void dce4_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder,
  54                 u8 *sadb, int sad_count);
  55 void dce6_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder,
  56                 u8 *sadb, int sad_count);
  57 void dce6_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder,
  58                 u8 *sadb, int sad_count);
  59 void dce4_afmt_write_latency_fields(struct drm_encoder *encoder,
  60                 struct drm_connector *connector, struct drm_display_mode *mode);
  61 void dce6_afmt_write_latency_fields(struct drm_encoder *encoder,
  62                 struct drm_connector *connector, struct drm_display_mode *mode);
  63 struct r600_audio_pin* r600_audio_get_pin(struct radeon_device *rdev);
  64 struct r600_audio_pin* dce6_audio_get_pin(struct radeon_device *rdev);
  65 void dce6_afmt_select_pin(struct drm_encoder *encoder);
  66 void r600_hdmi_audio_set_dto(struct radeon_device *rdev,
  67         struct radeon_crtc *crtc, unsigned int clock);
  68 void dce3_2_audio_set_dto(struct radeon_device *rdev,
  69         struct radeon_crtc *crtc, unsigned int clock);
  70 void dce4_hdmi_audio_set_dto(struct radeon_device *rdev,
  71         struct radeon_crtc *crtc, unsigned int clock);
  72 void dce4_dp_audio_set_dto(struct radeon_device *rdev,
  73         struct radeon_crtc *crtc, unsigned int clock);
  74 void dce6_hdmi_audio_set_dto(struct radeon_device *rdev,
  75         struct radeon_crtc *crtc, unsigned int clock);
  76 void dce6_dp_audio_set_dto(struct radeon_device *rdev,
  77         struct radeon_crtc *crtc, unsigned int clock);
  78 void r600_update_avi_infoframe(struct radeon_device *rdev, u32 offset,
  79         unsigned char *buffer, size_t size);
  80 void evergreen_update_avi_infoframe(struct radeon_device *rdev, u32 offset,
  81         unsigned char *buffer, size_t size);
  82 void r600_hdmi_update_acr(struct drm_encoder *encoder, long offset,
  83         const struct radeon_hdmi_acr *acr);
  84 void dce3_2_hdmi_update_acr(struct drm_encoder *encoder, long offset,
  85         const struct radeon_hdmi_acr *acr);
  86 void evergreen_hdmi_update_acr(struct drm_encoder *encoder, long offset,
  87         const struct radeon_hdmi_acr *acr);
  88 void r600_set_vbi_packet(struct drm_encoder *encoder, u32 offset);
  89 void dce4_set_vbi_packet(struct drm_encoder *encoder, u32 offset);
  90 void dce4_hdmi_set_color_depth(struct drm_encoder *encoder,
  91         u32 offset, int bpc);
  92
  93 static const u32 pin_offsets[7] =
  94 {
  95         (0x5e00 - 0x5e00),
  96         (0x5e18 - 0x5e00),
  97         (0x5e30 - 0x5e00),
  98         (0x5e48 - 0x5e00),
  99         (0x5e60 - 0x5e00),
 100         (0x5e78 - 0x5e00),
 101         (0x5e90 - 0x5e00),
 102 };
 103
 104 static u32 radeon_audio_rreg(struct radeon_device *rdev, u32 offset, u32 reg)
 105 {
 106         return RREG32(reg);
 107 }
 108
 109 static void radeon_audio_wreg(struct radeon_device *rdev, u32 offset,
 110                 u32 reg, u32 v)
 111 {
 112         WREG32(reg, v);
 113 }
 114
 115 static struct radeon_audio_basic_funcs r600_funcs = {
 116         .endpoint_rreg = radeon_audio_rreg,
 117         .endpoint_wreg = radeon_audio_wreg,
 118         .enable = r600_audio_enable,
 119         .update_avi_infoframe = r600_update_avi_infoframe,
 120 };
 121
 122 static struct radeon_audio_basic_funcs dce32_funcs = {
 123         .endpoint_rreg = radeon_audio_rreg,
 124         .endpoint_wreg = radeon_audio_wreg,
 125         .enable = r600_audio_enable,
 126         .update_avi_infoframe = r600_update_avi_infoframe,
 127 };
 128
 129 static struct radeon_audio_basic_funcs dce4_funcs = {
 130         .endpoint_rreg = radeon_audio_rreg,
 131         .endpoint_wreg = radeon_audio_wreg,
 132         .enable = dce4_audio_enable,
 133         .update_avi_infoframe = evergreen_update_avi_infoframe,
 134 };
 135
 136 static struct radeon_audio_basic_funcs dce6_funcs = {
 137         .endpoint_rreg = dce6_endpoint_rreg,
 138         .endpoint_wreg = dce6_endpoint_wreg,
 139         .enable = dce6_audio_enable,
 140         .update_avi_infoframe = evergreen_update_avi_infoframe,
 141 };
 142
 143 static struct radeon_audio_funcs r600_hdmi_funcs = {
 144         .get_pin = r600_audio_get_pin,
 145         .set_dto = r600_hdmi_audio_set_dto,
 146         .update_acr = r600_hdmi_update_acr,
 147         .set_vbi_packet = r600_set_vbi_packet,
 148 };
 149
 150 static struct radeon_audio_funcs dce32_hdmi_funcs = {
 151         .get_pin = r600_audio_get_pin,
 152         .write_sad_regs = dce3_2_afmt_write_sad_regs,
 153         .write_speaker_allocation = dce3_2_afmt_hdmi_write_speaker_allocation,
 154         .set_dto = dce3_2_audio_set_dto,
 155         .update_acr = dce3_2_hdmi_update_acr,
 156         .set_vbi_packet = r600_set_vbi_packet,
 157 };
 158
 159 static struct radeon_audio_funcs dce32_dp_funcs = {
 160         .get_pin = r600_audio_get_pin,
 161         .write_sad_regs = dce3_2_afmt_write_sad_regs,
 162         .write_speaker_allocation = dce3_2_afmt_dp_write_speaker_allocation,
 163         .set_dto = dce3_2_audio_set_dto,
 164 };
 165
 166 static struct radeon_audio_funcs dce4_hdmi_funcs = {
 167         .get_pin = r600_audio_get_pin,
 168         .write_sad_regs = evergreen_hdmi_write_sad_regs,
 169         .write_speaker_allocation = dce4_afmt_hdmi_write_speaker_allocation,
 170         .write_latency_fields = dce4_afmt_write_latency_fields,
 171         .set_dto = dce4_hdmi_audio_set_dto,
 172         .update_acr = evergreen_hdmi_update_acr,
 173         .set_vbi_packet = dce4_set_vbi_packet,
 174         .set_color_depth = dce4_hdmi_set_color_depth,
 175 };
 176
 177 static struct radeon_audio_funcs dce4_dp_funcs = {
 178         .get_pin = r600_audio_get_pin,
 179         .write_sad_regs = evergreen_hdmi_write_sad_regs,
 180         .write_speaker_allocation = dce4_afmt_dp_write_speaker_allocation,
 181         .write_latency_fields = dce4_afmt_write_latency_fields,
 182         .set_dto = dce4_dp_audio_set_dto,
 183 };
 184
 185 static struct radeon_audio_funcs dce6_hdmi_funcs = {
 186         .select_pin = dce6_afmt_select_pin,
 187         .get_pin = dce6_audio_get_pin,
 188         .write_sad_regs = dce6_afmt_write_sad_regs,
 189         .write_speaker_allocation = dce6_afmt_hdmi_write_speaker_allocation,
 190         .write_latency_fields = dce6_afmt_write_latency_fields,
 191         .set_dto = dce6_hdmi_audio_set_dto,
 192         .update_acr = evergreen_hdmi_update_acr,
 193         .set_vbi_packet = dce4_set_vbi_packet,
 194         .set_color_depth = dce4_hdmi_set_color_depth,
 195 };
 196
 197 static struct radeon_audio_funcs dce6_dp_funcs = {
 198         .select_pin = dce6_afmt_select_pin,
 199         .get_pin = dce6_audio_get_pin,
 200         .write_sad_regs = dce6_afmt_write_sad_regs,
 201         .write_speaker_allocation = dce6_afmt_dp_write_speaker_allocation,
 202         .write_latency_fields = dce6_afmt_write_latency_fields,
 203         .set_dto = dce6_dp_audio_set_dto,
 204 };
 205
 206 static void radeon_audio_interface_init(struct radeon_device *rdev)
 207 {
 208         if (ASIC_IS_DCE6(rdev)) {
 209                 rdev->audio.funcs = &dce6_funcs;
 210                 rdev->audio.hdmi_funcs = &dce6_hdmi_funcs;
 211                 rdev->audio.dp_funcs = &dce6_dp_funcs;
 212         } else if (ASIC_IS_DCE4(rdev)) {
 213                 rdev->audio.funcs = &dce4_funcs;
 214                 rdev->audio.hdmi_funcs = &dce4_hdmi_funcs;
 215                 rdev->audio.dp_funcs = &dce4_dp_funcs;
 216         } else if (ASIC_IS_DCE32(rdev)) {
 217                 rdev->audio.funcs = &dce32_funcs;
 218                 rdev->audio.hdmi_funcs = &dce32_hdmi_funcs;
 219                 rdev->audio.dp_funcs = &dce32_dp_funcs;
 220         } else {
 221                 rdev->audio.funcs = &r600_funcs;
 222                 rdev->audio.hdmi_funcs = &r600_hdmi_funcs;
 223                 rdev->audio.dp_funcs = 0;
 224         }
 225 }
 226
 227 static int radeon_audio_chipset_supported(struct radeon_device *rdev)
 228 {
 229         return ASIC_IS_DCE2(rdev) && !ASIC_IS_NODCE(rdev);
 230 }
 231
 232 int radeon_audio_init(struct radeon_device *rdev)
 233 {
 234         int i;
 235
 236         if (!radeon_audio || !radeon_audio_chipset_supported(rdev))
 237                 return 0;
 238
 239         rdev->audio.enabled = true;
 240
 241         if (ASIC_IS_DCE83(rdev))                /* KB: 2 streams, 3 endpoints */
 242                 rdev->audio.num_pins = 3;
 243         else if (ASIC_IS_DCE81(rdev))   /* KV: 4 streams, 7 endpoints */
 244                 rdev->audio.num_pins = 7;
 245         else if (ASIC_IS_DCE8(rdev))    /* BN/HW: 6 streams, 7 endpoints */
 246                 rdev->audio.num_pins = 7;
 247         else if (ASIC_IS_DCE64(rdev))   /* OL: 2 streams, 2 endpoints */
 248                 rdev->audio.num_pins = 2;
 249         else if (ASIC_IS_DCE61(rdev))   /* TN: 4 streams, 6 endpoints */
 250                 rdev->audio.num_pins = 6;
 251         else if (ASIC_IS_DCE6(rdev))    /* SI: 6 streams, 6 endpoints */
 252                 rdev->audio.num_pins = 6;
 253         else
 254                 rdev->audio.num_pins = 1;
 255
 256         for (i = 0; i < rdev->audio.num_pins; i++) {
 257                 rdev->audio.pin[i].channels = -1;
 258                 rdev->audio.pin[i].rate = -1;
 259                 rdev->audio.pin[i].bits_per_sample = -1;
 260                 rdev->audio.pin[i].status_bits = 0;
 261                 rdev->audio.pin[i].category_code = 0;
 262                 rdev->audio.pin[i].connected = false;
 263                 rdev->audio.pin[i].offset = pin_offsets[i];
 264                 rdev->audio.pin[i].id = i;
 265         }
 266
 267         radeon_audio_interface_init(rdev);
 268
 269         /* disable audio.  it will be set up later */
 270         for (i = 0; i < rdev->audio.num_pins; i++)
 271                 radeon_audio_enable(rdev, &rdev->audio.pin[i], false);
 272
 273         return 0;
 274 }
 275
 276 void radeon_audio_detect(struct drm_connector *connector,
 277         enum drm_connector_status status)
 278 {
 279         if (!connector || !connector->encoder)
 280                 return;
 281
 282         if (status == connector_status_connected) {
 283                 int sink_type;
 284                 struct radeon_device *rdev = connector->encoder->dev->dev_private;
 285                 struct radeon_connector *radeon_connector;
 286                 struct radeon_encoder *radeon_encoder =
 287                         to_radeon_encoder(connector->encoder);
 288
 289                 if (!drm_detect_monitor_audio(radeon_connector_edid(connector))) {
 290                         radeon_encoder->audio = 0;
 291                         return;
 292                 }
 293
 294                 radeon_connector = to_radeon_connector(connector);
 295                 sink_type = radeon_dp_getsinktype(radeon_connector);
 296
 297                 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort &&
 298                         sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT)
 299                         radeon_encoder->audio = rdev->audio.dp_funcs;
 300                 else
 301                         radeon_encoder->audio = rdev->audio.hdmi_funcs;
 302                 /* TODO: set up the sads, etc. and set the audio enable_mask */
 303         } else {
 304                 /* TODO: reset the audio enable_mask */
 305         }
 306 }
 307
 308 u32 radeon_audio_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg)
 309 {
 310         if (rdev->audio.funcs->endpoint_rreg)
 311                 return rdev->audio.funcs->endpoint_rreg(rdev, offset, reg);
 312
 313         return 0;
 314 }
 315
 316 void radeon_audio_endpoint_wreg(struct radeon_device *rdev, u32 offset,
 317         u32 reg, u32 v)
 318 {
 319         if (rdev->audio.funcs->endpoint_wreg)
 320                 rdev->audio.funcs->endpoint_wreg(rdev, offset, reg, v);
 321 }
 322
 323 void radeon_audio_write_sad_regs(struct drm_encoder *encoder)
 324 {
 325         struct radeon_encoder *radeon_encoder;
 326         struct drm_connector *connector;
 327         struct radeon_connector *radeon_connector = NULL;
 328         struct cea_sad *sads;
 329         int sad_count;
 330
 331         list_for_each_entry(connector,
 332                 &encoder->dev->mode_config.connector_list, head) {
 333                 if (connector->encoder == encoder) {
 334                         radeon_connector = to_radeon_connector(connector);
 335                         break;
 336                 }
 337         }
 338
 339         if (!radeon_connector) {
 340                 DRM_ERROR("Couldn't find encoder's connector\n");
 341                 return;
 342         }
 343
 344         sad_count = drm_edid_to_sad(radeon_connector_edid(connector), &sads);
 345         if (sad_count <= 0) {
 346                 DRM_ERROR("Couldn't read SADs: %d\n", sad_count);
 347                 return;
 348         }
 349         BUG_ON(!sads);
 350
 351         radeon_encoder = to_radeon_encoder(encoder);
 352
 353         if (radeon_encoder->audio && radeon_encoder->audio->write_sad_regs)
 354                 radeon_encoder->audio->write_sad_regs(encoder, sads, sad_count);
 355
 356         kfree(sads);
 357 }
 358
 359 void radeon_audio_write_speaker_allocation(struct drm_encoder *encoder)
 360 {
 361         struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
 362     struct drm_connector *connector;
 363     struct radeon_connector *radeon_connector = NULL;
 364     u8 *sadb = NULL;
 365     int sad_count;
 366
 367     list_for_each_entry(connector,
 368                 &encoder->dev->mode_config.connector_list, head) {
 369         if (connector->encoder == encoder) {
 370             radeon_connector = to_radeon_connector(connector);
 371             break;
 372         }
 373     }
 374
 375     if (!radeon_connector) {
 376         DRM_ERROR("Couldn't find encoder's connector\n");
 377         return;
 378     }
 379
 380     sad_count = drm_edid_to_speaker_allocation(
 381                 radeon_connector_edid(connector), &sadb);
 382     if (sad_count < 0) {
 383         DRM_DEBUG("Couldn't read Speaker Allocation Data Block: %d\n",
 384                         sad_count);
 385         sad_count = 0;
 386     }
 387
 388         if (radeon_encoder->audio && radeon_encoder->audio->write_speaker_allocation)
 389                 radeon_encoder->audio->write_speaker_allocation(encoder, sadb, sad_count);
 390
 391     kfree(sadb);
 392 }
 393
 394 void radeon_audio_write_latency_fields(struct drm_encoder *encoder,
 395         struct drm_display_mode *mode)
 396 {
 397         struct radeon_encoder *radeon_encoder;
 398         struct drm_connector *connector;
 399         struct radeon_connector *radeon_connector = 0;
 400
 401         list_for_each_entry(connector,
 402                 &encoder->dev->mode_config.connector_list, head) {
 403                 if (connector->encoder == encoder) {
 404                         radeon_connector = to_radeon_connector(connector);
 405                         break;
 406                 }
 407         }
 408
 409         if (!radeon_connector) {
 410                 DRM_ERROR("Couldn't find encoder's connector\n");
 411                 return;
 412         }
 413
 414         radeon_encoder = to_radeon_encoder(encoder);
 415
 416         if (radeon_encoder->audio && radeon_encoder->audio->write_latency_fields)
 417                 radeon_encoder->audio->write_latency_fields(encoder, connector, mode);
 418 }
 419
 420 struct r600_audio_pin* radeon_audio_get_pin(struct drm_encoder *encoder)
 421 {
 422         struct radeon_device *rdev = encoder->dev->dev_private;
 423         struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
 424
 425         if (radeon_encoder->audio && radeon_encoder->audio->get_pin)
 426                 return radeon_encoder->audio->get_pin(rdev);
 427
 428         return NULL;
 429 }
 430
 431 void radeon_audio_select_pin(struct drm_encoder *encoder)
 432 {
 433         struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
 434
 435         if (radeon_encoder->audio && radeon_encoder->audio->select_pin)
 436                 radeon_encoder->audio->select_pin(encoder);
 437 }
 438
 439 void radeon_audio_enable(struct radeon_device *rdev,
 440         struct r600_audio_pin *pin, u8 enable_mask)
 441 {
 442         if (rdev->audio.funcs->enable)
 443                 rdev->audio.funcs->enable(rdev, pin, enable_mask);
 444 }
 445
 446 void radeon_audio_fini(struct radeon_device *rdev)
 447 {
 448         int i;
 449
 450         if (!rdev->audio.enabled)
 451                 return;
 452
 453         for (i = 0; i < rdev->audio.num_pins; i++)
 454                 radeon_audio_enable(rdev, &rdev->audio.pin[i], false);
 455
 456         rdev->audio.enabled = false;
 457 }
 458
 459 void radeon_audio_set_dto(struct drm_encoder *encoder, unsigned int clock)
 460 {
 461         struct radeon_device *rdev = encoder->dev->dev_private;
 462         struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
 463         struct radeon_crtc *crtc = to_radeon_crtc(encoder->crtc);
 464
 465         if (radeon_encoder->audio && radeon_encoder->audio->set_dto)
 466                 radeon_encoder->audio->set_dto(rdev, crtc, clock);
 467 }
 468
 469 void radeon_update_avi_infoframe(struct drm_encoder *encoder, void *buffer,
 470         size_t size)
 471 {
 472     struct radeon_device *rdev = encoder->dev->dev_private;
 473         struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
 474         struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
 475
 476         if (dig && dig->afmt && rdev->audio.funcs->update_avi_infoframe)
 477                 rdev->audio.funcs->update_avi_infoframe(rdev, dig->afmt->offset,
 478                         buffer, size);
 479 }
 480
 481 /*
 482  * calculate CTS and N values if they are not found in the table
 483  */
 484 static void radeon_audio_calc_cts(unsigned int clock, int *CTS, int *N, int freq)
 485 {
 486         int n, cts;
 487         unsigned long div, mul;
 488
 489         /* Safe, but overly large values */
 490         n = 128 * freq;
 491         cts = clock * 1000;
 492
 493         /* Smallest valid fraction */
 494         div = gcd(n, cts);
 495
 496         n /= div;
 497         cts /= div;
 498
 499         /*
 500          * The optimal N is 128*freq/1000. Calculate the closest larger
 501          * value that doesn't truncate any bits.
 502          */
 503         mul = ((128*freq/1000) + (n-1))/n;
 504
 505         n *= mul;
 506         cts *= mul;
 507
 508         /* Check that we are in spec (not always possible) */
 509         if (n < (128*freq/1500))
 510                 printk(KERN_WARNING "Calculated ACR N value is too small. You may experience audio problems.\n");
 511         if (n > (128*freq/300))
 512                 printk(KERN_WARNING "Calculated ACR N value is too large. You may experience audio problems.\n");
 513
 514         *N = n;
 515         *CTS = cts;
 516
 517         DRM_DEBUG("Calculated ACR timing N=%d CTS=%d for frequency %d\n",
 518                 *N, *CTS, freq);
 519 }
 520
 521 static const struct radeon_hdmi_acr* radeon_audio_acr(unsigned int clock)
 522 {
 523         static struct radeon_hdmi_acr res;
 524         u8 i;
 525
 526         static const struct radeon_hdmi_acr hdmi_predefined_acr[] = {
 527                 /*       32kHz    44.1kHz   48kHz    */
 528                 /* Clock      N     CTS      N     CTS      N     CTS */
 529                 {  25175,  4096,  25175, 28224, 125875,  6144,  25175 }, /*  25,20/1.001 MHz */
 530                 {  25200,  4096,  25200,  6272,  28000,  6144,  25200 }, /*  25.20       MHz */
 531                 {  27000,  4096,  27000,  6272,  30000,  6144,  27000 }, /*  27.00       MHz */
 532                 {  27027,  4096,  27027,  6272,  30030,  6144,  27027 }, /*  27.00*1.001 MHz */
 533                 {  54000,  4096,  54000,  6272,  60000,  6144,  54000 }, /*  54.00       MHz */
 534                 {  54054,  4096,  54054,  6272,  60060,  6144,  54054 }, /*  54.00*1.001 MHz */
 535                 {  74176,  4096,  74176,  5733,  75335,  6144,  74176 }, /*  74.25/1.001 MHz */
 536                 {  74250,  4096,  74250,  6272,  82500,  6144,  74250 }, /*  74.25       MHz */
 537                 { 148352,  4096, 148352,  5733, 150670,  6144, 148352 }, /* 148.50/1.001 MHz */
 538                 { 148500,  4096, 148500,  6272, 165000,  6144, 148500 }, /* 148.50       MHz */
 539         };
 540
 541         /* Precalculated values for common clocks */
 542         for (i = 0; i < ARRAY_SIZE(hdmi_predefined_acr); i++)
 543                 if (hdmi_predefined_acr[i].clock == clock)
 544                         return &hdmi_predefined_acr[i];
 545
 546         /* And odd clocks get manually calculated */
 547         radeon_audio_calc_cts(clock, &res.cts_32khz, &res.n_32khz, 32000);
 548         radeon_audio_calc_cts(clock, &res.cts_44_1khz, &res.n_44_1khz, 44100);
 549         radeon_audio_calc_cts(clock, &res.cts_48khz, &res.n_48khz, 48000);
 550
 551         return &res;
 552 }
 553
 554 /*
 555  * update the N and CTS parameters for a given pixel clock rate
 556  */
 557 void radeon_audio_update_acr(struct drm_encoder *encoder, unsigned int clock)
 558 {
 559     const struct radeon_hdmi_acr *acr = radeon_audio_acr(clock);
 560     struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
 561     struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
 562
 563         if (!dig || !dig->afmt)
 564                 return;
 565
 566         if (radeon_encoder->audio && radeon_encoder->audio->update_acr)
 567                 radeon_encoder->audio->update_acr(encoder, dig->afmt->offset, acr);
 568 }
 569
 570 void radeon_audio_set_vbi_packet(struct drm_encoder *encoder)
 571 {
 572     struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
 573     struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
 574
 575         if (!dig || !dig->afmt)
 576                 return;
 577
 578         if (radeon_encoder->audio && radeon_encoder->audio->set_vbi_packet)
 579                 radeon_encoder->audio->set_vbi_packet(encoder, dig->afmt->offset);
 580 }
 581
 582 void radeon_hdmi_set_color_depth(struct drm_encoder *encoder)
 583 {
 584         int bpc = 8;
 585         struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
 586         struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
 587
 588         if (!dig || !dig->afmt)
 589                 return;
 590
 591         if (encoder->crtc) {
 592                 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);
 593                 bpc = radeon_crtc->bpc;
 594         }
 595
 596         if (radeon_encoder->audio && radeon_encoder->audio->set_color_depth)
 597                 radeon_encoder->audio->set_color_depth(encoder, dig->afmt->offset, bpc);
 598 }