drivers/gpu/drm/radeon/radeon_mode.h

   1 /*
   2  * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
   3  *                VA Linux Systems Inc., Fremont, California.
   4  * Copyright 2008 Red Hat Inc.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22  * OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Original Authors:
  25  *   Kevin E. Martin, Rickard E. Faith, Alan Hourihane
  26  *
  27  * Kernel port Author: Dave Airlie
  28  */
  29
  30 #ifndef RADEON_MODE_H
  31 #define RADEON_MODE_H
  32
  33 #include <drm_crtc.h>
  34 #include <drm_mode.h>
  35 #include <drm_edid.h>
  36 #include <drm_dp_helper.h>
  37 #include <drm_fixed.h>
  38 #include <drm_crtc_helper.h>
  39 #include <linux/i2c.h>
  40 #include <linux/i2c-algo-bit.h>
  41
  42 struct radeon_bo;
  43 struct radeon_device;
  44
  45 #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base)
  46 #define to_radeon_connector(x) container_of(x, struct radeon_connector, base)
  47 #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base)
  48 #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base)
  49
  50 enum radeon_rmx_type {
  51         RMX_OFF,
  52         RMX_FULL,
  53         RMX_CENTER,
  54         RMX_ASPECT
  55 };
  56
  57 enum radeon_tv_std {
  58         TV_STD_NTSC,
  59         TV_STD_PAL,
  60         TV_STD_PAL_M,
  61         TV_STD_PAL_60,
  62         TV_STD_NTSC_J,
  63         TV_STD_SCART_PAL,
  64         TV_STD_SECAM,
  65         TV_STD_PAL_CN,
  66         TV_STD_PAL_N,
  67 };
  68
  69 enum radeon_underscan_type {
  70         UNDERSCAN_OFF,
  71         UNDERSCAN_ON,
  72         UNDERSCAN_AUTO,
  73 };
  74
  75 enum radeon_hpd_id {
  76         RADEON_HPD_1 = 0,
  77         RADEON_HPD_2,
  78         RADEON_HPD_3,
  79         RADEON_HPD_4,
  80         RADEON_HPD_5,
  81         RADEON_HPD_6,
  82         RADEON_HPD_NONE = 0xff,
  83 };
  84
  85 #define RADEON_MAX_I2C_BUS 16
  86
  87 /* radeon gpio-based i2c
  88  * 1. "mask" reg and bits
  89  *    grabs the gpio pins for software use
  90  *    0=not held  1=held
  91  * 2. "a" reg and bits
  92  *    output pin value
  93  *    0=low 1=high
  94  * 3. "en" reg and bits
  95  *    sets the pin direction
  96  *    0=input 1=output
  97  * 4. "y" reg and bits
  98  *    input pin value
  99  *    0=low 1=high
 100  */
 101 struct radeon_i2c_bus_rec {
 102         bool valid;
 103         /* id used by atom */
 104         uint8_t i2c_id;
 105         /* id used by atom */
 106         enum radeon_hpd_id hpd;
 107         /* can be used with hw i2c engine */
 108         bool hw_capable;
 109         /* uses multi-media i2c engine */
 110         bool mm_i2c;
 111         /* regs and bits */
 112         uint32_t mask_clk_reg;
 113         uint32_t mask_data_reg;
 114         uint32_t a_clk_reg;
 115         uint32_t a_data_reg;
 116         uint32_t en_clk_reg;
 117         uint32_t en_data_reg;
 118         uint32_t y_clk_reg;
 119         uint32_t y_data_reg;
 120         uint32_t mask_clk_mask;
 121         uint32_t mask_data_mask;
 122         uint32_t a_clk_mask;
 123         uint32_t a_data_mask;
 124         uint32_t en_clk_mask;
 125         uint32_t en_data_mask;
 126         uint32_t y_clk_mask;
 127         uint32_t y_data_mask;
 128 };
 129
 130 struct radeon_tmds_pll {
 131     uint32_t freq;
 132     uint32_t value;
 133 };
 134
 135 #define RADEON_MAX_BIOS_CONNECTOR 16
 136
 137 /* pll flags */
 138 #define RADEON_PLL_USE_BIOS_DIVS        (1 << 0)
 139 #define RADEON_PLL_NO_ODD_POST_DIV      (1 << 1)
 140 #define RADEON_PLL_USE_REF_DIV          (1 << 2)
 141 #define RADEON_PLL_LEGACY               (1 << 3)
 142 #define RADEON_PLL_PREFER_LOW_REF_DIV   (1 << 4)
 143 #define RADEON_PLL_PREFER_HIGH_REF_DIV  (1 << 5)
 144 #define RADEON_PLL_PREFER_LOW_FB_DIV    (1 << 6)
 145 #define RADEON_PLL_PREFER_HIGH_FB_DIV   (1 << 7)
 146 #define RADEON_PLL_PREFER_LOW_POST_DIV  (1 << 8)
 147 #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9)
 148 #define RADEON_PLL_USE_FRAC_FB_DIV      (1 << 10)
 149 #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11)
 150 #define RADEON_PLL_USE_POST_DIV         (1 << 12)
 151 #define RADEON_PLL_IS_LCD               (1 << 13)
 152 #define RADEON_PLL_PREFER_MINM_OVER_MAXP (1 << 14)
 153
 154 struct radeon_pll {
 155         /* reference frequency */
 156         uint32_t reference_freq;
 157
 158         /* fixed dividers */
 159         uint32_t reference_div;
 160         uint32_t post_div;
 161
 162         /* pll in/out limits */
 163         uint32_t pll_in_min;
 164         uint32_t pll_in_max;
 165         uint32_t pll_out_min;
 166         uint32_t pll_out_max;
 167         uint32_t lcd_pll_out_min;
 168         uint32_t lcd_pll_out_max;
 169         uint32_t best_vco;
 170
 171         /* divider limits */
 172         uint32_t min_ref_div;
 173         uint32_t max_ref_div;
 174         uint32_t min_post_div;
 175         uint32_t max_post_div;
 176         uint32_t min_feedback_div;
 177         uint32_t max_feedback_div;
 178         uint32_t min_frac_feedback_div;
 179         uint32_t max_frac_feedback_div;
 180
 181         /* flags for the current clock */
 182         uint32_t flags;
 183
 184         /* pll id */
 185         uint32_t id;
 186 };
 187
 188 struct radeon_i2c_chan {
 189         struct i2c_adapter adapter;
 190         struct drm_device *dev;
 191         union {
 192                 struct i2c_algo_bit_data bit;
 193                 struct i2c_algo_dp_aux_data dp;
 194         } algo;
 195         struct radeon_i2c_bus_rec rec;
 196 };
 197
 198 /* mostly for macs, but really any system without connector tables */
 199 enum radeon_connector_table {
 200         CT_NONE = 0,
 201         CT_GENERIC,
 202         CT_IBOOK,
 203         CT_POWERBOOK_EXTERNAL,
 204         CT_POWERBOOK_INTERNAL,
 205         CT_POWERBOOK_VGA,
 206         CT_MINI_EXTERNAL,
 207         CT_MINI_INTERNAL,
 208         CT_IMAC_G5_ISIGHT,
 209         CT_EMAC,
 210         CT_RN50_POWER,
 211         CT_MAC_X800,
 212         CT_MAC_G5_9600,
 213         CT_SAM440EP
 214 };
 215
 216 enum radeon_dvo_chip {
 217         DVO_SIL164,
 218         DVO_SIL1178,
 219 };
 220
 221 struct radeon_fbdev;
 222
 223 struct radeon_afmt {
 224         bool enabled;
 225         int offset;
 226         bool last_buffer_filled_status;
 227         int id;
 228 };
 229
 230 struct radeon_mode_info {
 231         struct atom_context *atom_context;
 232         struct card_info *atom_card_info;
 233         enum radeon_connector_table connector_table;
 234         bool mode_config_initialized;
 235         struct radeon_crtc *crtcs[6];
 236         struct radeon_afmt *afmt[6];
 237         /* DVI-I properties */
 238         struct drm_property *coherent_mode_property;
 239         /* DAC enable load detect */
 240         struct drm_property *load_detect_property;
 241         /* TV standard */
 242         struct drm_property *tv_std_property;
 243         /* legacy TMDS PLL detect */
 244         struct drm_property *tmds_pll_property;
 245         /* underscan */
 246         struct drm_property *underscan_property;
 247         struct drm_property *underscan_hborder_property;
 248         struct drm_property *underscan_vborder_property;
 249         /* hardcoded DFP edid from BIOS */
 250         struct edid *bios_hardcoded_edid;
 251         int bios_hardcoded_edid_size;
 252
 253         /* pointer to fbdev info structure */
 254         struct radeon_fbdev *rfbdev;
 255         /* firmware flags */
 256         u16 firmware_flags;
 257 };
 258
 259 #if defined(CONFIG_BACKLIGHT_CLASS_DEVICE) || defined(CONFIG_BACKLIGHT_CLASS_DEVICE_MODULE)
 260
 261 #define RADEON_MAX_BL_LEVEL 0xFF
 262
 263 struct radeon_backlight_privdata {
 264         struct radeon_encoder *encoder;
 265         uint8_t negative;
 266 };
 267
 268 #endif
 269
 270 #define MAX_H_CODE_TIMING_LEN 32
 271 #define MAX_V_CODE_TIMING_LEN 32
 272
 273 /* need to store these as reading
 274    back code tables is excessive */
 275 struct radeon_tv_regs {
 276         uint32_t tv_uv_adr;
 277         uint32_t timing_cntl;
 278         uint32_t hrestart;
 279         uint32_t vrestart;
 280         uint32_t frestart;
 281         uint16_t h_code_timing[MAX_H_CODE_TIMING_LEN];
 282         uint16_t v_code_timing[MAX_V_CODE_TIMING_LEN];
 283 };
 284
 285 struct radeon_crtc {
 286         struct drm_crtc base;
 287         int crtc_id;
 288         u16 lut_r[256], lut_g[256], lut_b[256];
 289         bool enabled;
 290         bool can_tile;
 291         bool in_mode_set;
 292         uint32_t crtc_offset;
 293         struct drm_gem_object *cursor_bo;
 294         uint64_t cursor_addr;
 295         int cursor_width;
 296         int cursor_height;
 297         uint32_t legacy_display_base_addr;
 298         uint32_t legacy_cursor_offset;
 299         enum radeon_rmx_type rmx_type;
 300         u8 h_border;
 301         u8 v_border;
 302         fixed20_12 vsc;
 303         fixed20_12 hsc;
 304         struct drm_display_mode native_mode;
 305         int pll_id;
 306         /* page flipping */
 307         struct radeon_unpin_work *unpin_work;
 308         int deferred_flip_completion;
 309 };
 310
 311 struct radeon_encoder_primary_dac {
 312         /* legacy primary dac */
 313         uint32_t ps2_pdac_adj;
 314 };
 315
 316 struct radeon_encoder_lvds {
 317         /* legacy lvds */
 318         uint16_t panel_vcc_delay;
 319         uint8_t  panel_pwr_delay;
 320         uint8_t  panel_digon_delay;
 321         uint8_t  panel_blon_delay;
 322         uint16_t panel_ref_divider;
 323         uint8_t  panel_post_divider;
 324         uint16_t panel_fb_divider;
 325         bool     use_bios_dividers;
 326         uint32_t lvds_gen_cntl;
 327         /* panel mode */
 328         struct drm_display_mode native_mode;
 329         struct backlight_device *bl_dev;
 330         int      dpms_mode;
 331         uint8_t  backlight_level;
 332 };
 333
 334 struct radeon_encoder_tv_dac {
 335         /* legacy tv dac */
 336         uint32_t ps2_tvdac_adj;
 337         uint32_t ntsc_tvdac_adj;
 338         uint32_t pal_tvdac_adj;
 339
 340         int               h_pos;
 341         int               v_pos;
 342         int               h_size;
 343         int               supported_tv_stds;
 344         bool              tv_on;
 345         enum radeon_tv_std tv_std;
 346         struct radeon_tv_regs tv;
 347 };
 348
 349 struct radeon_encoder_int_tmds {
 350         /* legacy int tmds */
 351         struct radeon_tmds_pll tmds_pll[4];
 352 };
 353
 354 struct radeon_encoder_ext_tmds {
 355         /* tmds over dvo */
 356         struct radeon_i2c_chan *i2c_bus;
 357         uint8_t slave_addr;
 358         enum radeon_dvo_chip dvo_chip;
 359 };
 360
 361 /* spread spectrum */
 362 struct radeon_atom_ss {
 363         uint16_t percentage;
 364         uint8_t type;
 365         uint16_t step;
 366         uint8_t delay;
 367         uint8_t range;
 368         uint8_t refdiv;
 369         /* asic_ss */
 370         uint16_t rate;
 371         uint16_t amount;
 372 };
 373
 374 struct radeon_encoder_atom_dig {
 375         bool linkb;
 376         /* atom dig */
 377         bool coherent_mode;
 378         int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB, etc. */
 379         /* atom lvds/edp */
 380         uint32_t lcd_misc;
 381         uint16_t panel_pwr_delay;
 382         uint32_t lcd_ss_id;
 383         /* panel mode */
 384         struct drm_display_mode native_mode;
 385         struct backlight_device *bl_dev;
 386         int dpms_mode;
 387         uint8_t backlight_level;
 388         int panel_mode;
 389         struct radeon_afmt *afmt;
 390 };
 391
 392 struct radeon_encoder_atom_dac {
 393         enum radeon_tv_std tv_std;
 394 };
 395
 396 struct radeon_encoder {
 397         struct drm_encoder base;
 398         uint32_t encoder_enum;
 399         uint32_t encoder_id;
 400         uint32_t devices;
 401         uint32_t active_device;
 402         uint32_t flags;
 403         uint32_t pixel_clock;
 404         enum radeon_rmx_type rmx_type;
 405         enum radeon_underscan_type underscan_type;
 406         uint32_t underscan_hborder;
 407         uint32_t underscan_vborder;
 408         struct drm_display_mode native_mode;
 409         void *enc_priv;
 410         int audio_polling_active;
 411         bool is_ext_encoder;
 412         u16 caps;
 413 };
 414
 415 struct radeon_connector_atom_dig {
 416         uint32_t igp_lane_info;
 417         /* displayport */
 418         struct radeon_i2c_chan *dp_i2c_bus;
 419         u8 dpcd[8];
 420         u8 dp_sink_type;
 421         int dp_clock;
 422         int dp_lane_count;
 423         bool edp_on;
 424 };
 425
 426 struct radeon_gpio_rec {
 427         bool valid;
 428         u8 id;
 429         u32 reg;
 430         u32 mask;
 431 };
 432
 433 struct radeon_hpd {
 434         enum radeon_hpd_id hpd;
 435         u8 plugged_state;
 436         struct radeon_gpio_rec gpio;
 437 };
 438
 439 struct radeon_router {
 440         u32 router_id;
 441         struct radeon_i2c_bus_rec i2c_info;
 442         u8 i2c_addr;
 443         /* i2c mux */
 444         bool ddc_valid;
 445         u8 ddc_mux_type;
 446         u8 ddc_mux_control_pin;
 447         u8 ddc_mux_state;
 448         /* clock/data mux */
 449         bool cd_valid;
 450         u8 cd_mux_type;
 451         u8 cd_mux_control_pin;
 452         u8 cd_mux_state;
 453 };
 454
 455 struct radeon_connector {
 456         struct drm_connector base;
 457         uint32_t connector_id;
 458         uint32_t devices;
 459         struct radeon_i2c_chan *ddc_bus;
 460         /* some systems have an hdmi and vga port with a shared ddc line */
 461         bool shared_ddc;
 462         bool use_digital;
 463         /* we need to mind the EDID between detect
 464            and get modes due to analog/digital/tvencoder */
 465         struct edid *edid;
 466         void *con_priv;
 467         bool dac_load_detect;
 468         bool detected_by_load; /* if the connection status was determined by load */
 469         uint16_t connector_object_id;
 470         struct radeon_hpd hpd;
 471         struct radeon_router router;
 472         struct radeon_i2c_chan *router_bus;
 473 };
 474
 475 struct radeon_framebuffer {
 476         struct drm_framebuffer base;
 477         struct drm_gem_object *obj;
 478 };
 479
 480 #define ENCODER_MODE_IS_DP(em) (((em) == ATOM_ENCODER_MODE_DP) || \
 481                                 ((em) == ATOM_ENCODER_MODE_DP_MST))
 482
 483 extern enum radeon_tv_std
 484 radeon_combios_get_tv_info(struct radeon_device *rdev);
 485 extern enum radeon_tv_std
 486 radeon_atombios_get_tv_info(struct radeon_device *rdev);
 487
 488 extern struct drm_connector *
 489 radeon_get_connector_for_encoder(struct drm_encoder *encoder);
 490 extern struct drm_connector *
 491 radeon_get_connector_for_encoder_init(struct drm_encoder *encoder);
 492 extern bool radeon_dig_monitor_is_duallink(struct drm_encoder *encoder,
 493                                     u32 pixel_clock);
 494
 495 extern u16 radeon_encoder_get_dp_bridge_encoder_id(struct drm_encoder *encoder);
 496 extern u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector);
 497 extern bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector);
 498 extern bool radeon_connector_is_dp12_capable(struct drm_connector *connector);
 499 extern int radeon_get_monitor_bpc(struct drm_connector *connector);
 500
 501 extern void radeon_connector_hotplug(struct drm_connector *connector);
 502 extern int radeon_dp_mode_valid_helper(struct drm_connector *connector,
 503                                        struct drm_display_mode *mode);
 504 extern void radeon_dp_set_link_config(struct drm_connector *connector,
 505                                       const struct drm_display_mode *mode);
 506 extern void radeon_dp_link_train(struct drm_encoder *encoder,
 507                                  struct drm_connector *connector);
 508 extern bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector);
 509 extern u8 radeon_dp_getsinktype(struct radeon_connector *radeon_connector);
 510 extern bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector);
 511 extern int radeon_dp_get_panel_mode(struct drm_encoder *encoder,
 512                                     struct drm_connector *connector);
 513 extern void atombios_dig_encoder_setup(struct drm_encoder *encoder, int action, int panel_mode);
 514 extern void radeon_atom_encoder_init(struct radeon_device *rdev);
 515 extern void radeon_atom_disp_eng_pll_init(struct radeon_device *rdev);
 516 extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder,
 517                                            int action, uint8_t lane_num,
 518                                            uint8_t lane_set);
 519 extern void radeon_atom_ext_encoder_setup_ddc(struct drm_encoder *encoder);
 520 extern struct drm_encoder *radeon_get_external_encoder(struct drm_encoder *encoder);
 521 extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode,
 522                                 u8 write_byte, u8 *read_byte);
 523
 524 extern void radeon_i2c_init(struct radeon_device *rdev);
 525 extern void radeon_i2c_fini(struct radeon_device *rdev);
 526 extern void radeon_combios_i2c_init(struct radeon_device *rdev);
 527 extern void radeon_atombios_i2c_init(struct radeon_device *rdev);
 528 extern void radeon_i2c_add(struct radeon_device *rdev,
 529                            struct radeon_i2c_bus_rec *rec,
 530                            const char *name);
 531 extern struct radeon_i2c_chan *radeon_i2c_lookup(struct radeon_device *rdev,
 532                                                  struct radeon_i2c_bus_rec *i2c_bus);
 533 extern struct radeon_i2c_chan *radeon_i2c_create_dp(struct drm_device *dev,
 534                                                     struct radeon_i2c_bus_rec *rec,
 535                                                     const char *name);
 536 extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
 537                                                  struct radeon_i2c_bus_rec *rec,
 538                                                  const char *name);
 539 extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c);
 540 extern void radeon_i2c_get_byte(struct radeon_i2c_chan *i2c_bus,
 541                                 u8 slave_addr,
 542                                 u8 addr,
 543                                 u8 *val);
 544 extern void radeon_i2c_put_byte(struct radeon_i2c_chan *i2c,
 545                                 u8 slave_addr,
 546                                 u8 addr,
 547                                 u8 val);
 548 extern void radeon_router_select_ddc_port(struct radeon_connector *radeon_connector);
 549 extern void radeon_router_select_cd_port(struct radeon_connector *radeon_connector);
 550 extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector);
 551 extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector);
 552
 553 extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector);
 554
 555 extern bool radeon_atombios_get_ppll_ss_info(struct radeon_device *rdev,
 556                                              struct radeon_atom_ss *ss,
 557                                              int id);
 558 extern bool radeon_atombios_get_asic_ss_info(struct radeon_device *rdev,
 559                                              struct radeon_atom_ss *ss,
 560                                              int id, u32 clock);
 561
 562 extern void radeon_compute_pll_legacy(struct radeon_pll *pll,
 563                                       uint64_t freq,
 564                                       uint32_t *dot_clock_p,
 565                                       uint32_t *fb_div_p,
 566                                       uint32_t *frac_fb_div_p,
 567                                       uint32_t *ref_div_p,
 568                                       uint32_t *post_div_p);
 569
 570 extern void radeon_compute_pll_avivo(struct radeon_pll *pll,
 571                                      u32 freq,
 572                                      u32 *dot_clock_p,
 573                                      u32 *fb_div_p,
 574                                      u32 *frac_fb_div_p,
 575                                      u32 *ref_div_p,
 576                                      u32 *post_div_p);
 577
 578 extern void radeon_setup_encoder_clones(struct drm_device *dev);
 579
 580 struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index);
 581 struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv);
 582 struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv);
 583 struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index);
 584 struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index);
 585 extern void atombios_dvo_setup(struct drm_encoder *encoder, int action);
 586 extern void atombios_digital_setup(struct drm_encoder *encoder, int action);
 587 extern int atombios_get_encoder_mode(struct drm_encoder *encoder);
 588 extern bool atombios_set_edp_panel_power(struct drm_connector *connector, int action);
 589 extern void radeon_encoder_set_active_device(struct drm_encoder *encoder);
 590
 591 extern void radeon_crtc_load_lut(struct drm_crtc *crtc);
 592 extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
 593                                    struct drm_framebuffer *old_fb);
 594 extern int atombios_crtc_set_base_atomic(struct drm_crtc *crtc,
 595                                          struct drm_framebuffer *fb,
 596                                          int x, int y,
 597                                          enum mode_set_atomic state);
 598 extern int atombios_crtc_mode_set(struct drm_crtc *crtc,
 599                                    struct drm_display_mode *mode,
 600                                    struct drm_display_mode *adjusted_mode,
 601                                    int x, int y,
 602                                    struct drm_framebuffer *old_fb);
 603 extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode);
 604
 605 extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
 606                                  struct drm_framebuffer *old_fb);
 607 extern int radeon_crtc_set_base_atomic(struct drm_crtc *crtc,
 608                                        struct drm_framebuffer *fb,
 609                                        int x, int y,
 610                                        enum mode_set_atomic state);
 611 extern int radeon_crtc_do_set_base(struct drm_crtc *crtc,
 612                                    struct drm_framebuffer *fb,
 613                                    int x, int y, int atomic);
 614 extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
 615                                   struct drm_file *file_priv,
 616                                   uint32_t handle,
 617                                   uint32_t width,
 618                                   uint32_t height);
 619 extern int radeon_crtc_cursor_move(struct drm_crtc *crtc,
 620                                    int x, int y);
 621
 622 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
 623                                       int *vpos, int *hpos);
 624
 625 extern bool radeon_combios_check_hardcoded_edid(struct radeon_device *rdev);
 626 extern struct edid *
 627 radeon_bios_get_hardcoded_edid(struct radeon_device *rdev);
 628 extern bool radeon_atom_get_clock_info(struct drm_device *dev);
 629 extern bool radeon_combios_get_clock_info(struct drm_device *dev);
 630 extern struct radeon_encoder_atom_dig *
 631 radeon_atombios_get_lvds_info(struct radeon_encoder *encoder);
 632 extern bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
 633                                           struct radeon_encoder_int_tmds *tmds);
 634 extern bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder,
 635                                                      struct radeon_encoder_int_tmds *tmds);
 636 extern bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder,
 637                                                    struct radeon_encoder_int_tmds *tmds);
 638 extern bool radeon_legacy_get_ext_tmds_info_from_combios(struct radeon_encoder *encoder,
 639                                                          struct radeon_encoder_ext_tmds *tmds);
 640 extern bool radeon_legacy_get_ext_tmds_info_from_table(struct radeon_encoder *encoder,
 641                                                        struct radeon_encoder_ext_tmds *tmds);
 642 extern struct radeon_encoder_primary_dac *
 643 radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder);
 644 extern struct radeon_encoder_tv_dac *
 645 radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder);
 646 extern struct radeon_encoder_lvds *
 647 radeon_combios_get_lvds_info(struct radeon_encoder *encoder);
 648 extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder);
 649 extern struct radeon_encoder_tv_dac *
 650 radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder);
 651 extern struct radeon_encoder_primary_dac *
 652 radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder);
 653 extern bool radeon_combios_external_tmds_setup(struct drm_encoder *encoder);
 654 extern void radeon_external_tmds_setup(struct drm_encoder *encoder);
 655 extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock);
 656 extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev);
 657 extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock);
 658 extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev);
 659 extern void radeon_save_bios_scratch_regs(struct radeon_device *rdev);
 660 extern void radeon_restore_bios_scratch_regs(struct radeon_device *rdev);
 661 extern void
 662 radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
 663 extern void
 664 radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
 665 extern void
 666 radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
 667 extern void
 668 radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
 669 extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
 670                                      u16 blue, int regno);
 671 extern void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
 672                                      u16 *blue, int regno);
 673 int radeon_framebuffer_init(struct drm_device *dev,
 674                              struct radeon_framebuffer *rfb,
 675                              struct drm_mode_fb_cmd2 *mode_cmd,
 676                              struct drm_gem_object *obj);
 677
 678 int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb);
 679 bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev);
 680 bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev);
 681 void radeon_atombios_init_crtc(struct drm_device *dev,
 682                                struct radeon_crtc *radeon_crtc);
 683 void radeon_legacy_init_crtc(struct drm_device *dev,
 684                              struct radeon_crtc *radeon_crtc);
 685
 686 void radeon_get_clock_info(struct drm_device *dev);
 687
 688 extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev);
 689 extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev);
 690
 691 void radeon_enc_destroy(struct drm_encoder *encoder);
 692 void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj);
 693 void radeon_combios_asic_init(struct drm_device *dev);
 694 bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
 695                                         const struct drm_display_mode *mode,
 696                                         struct drm_display_mode *adjusted_mode);
 697 void radeon_panel_mode_fixup(struct drm_encoder *encoder,
 698                              struct drm_display_mode *adjusted_mode);
 699 void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc);
 700
 701 void atombios_set_panel_brightness(struct radeon_encoder *radeon_encoder);
 702
 703 /* legacy tv */
 704 void radeon_legacy_tv_adjust_crtc_reg(struct drm_encoder *encoder,
 705                                       uint32_t *h_total_disp, uint32_t *h_sync_strt_wid,
 706                                       uint32_t *v_total_disp, uint32_t *v_sync_strt_wid);
 707 void radeon_legacy_tv_adjust_pll1(struct drm_encoder *encoder,
 708                                   uint32_t *htotal_cntl, uint32_t *ppll_ref_div,
 709                                   uint32_t *ppll_div_3, uint32_t *pixclks_cntl);
 710 void radeon_legacy_tv_adjust_pll2(struct drm_encoder *encoder,
 711                                   uint32_t *htotal2_cntl, uint32_t *p2pll_ref_div,
 712                                   uint32_t *p2pll_div_0, uint32_t *pixclks_cntl);
 713 void radeon_legacy_tv_mode_set(struct drm_encoder *encoder,
 714                                struct drm_display_mode *mode,
 715                                struct drm_display_mode *adjusted_mode);
 716
 717 /* fbdev layer */
 718 int radeon_fbdev_init(struct radeon_device *rdev);
 719 void radeon_fbdev_fini(struct radeon_device *rdev);
 720 void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state);
 721 int radeon_fbdev_total_size(struct radeon_device *rdev);
 722 bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj);
 723
 724 void radeon_fb_output_poll_changed(struct radeon_device *rdev);
 725
 726 void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id);
 727
 728 int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled);
 729 #endif