2 * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
3 * Author:Mark Yao <mark.yao@rock-chips.com>
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
17 #include <linux/kernel.h>
18 #include <linux/component.h>
20 #include "rockchip_drm_vop.h"
21 #include "rockchip_vop_reg.h"
23 #define VOP_REG(off, _mask, s) \
28 static const uint32_t formats_01
[] = {
42 static const uint32_t formats_234
[] = {
53 static const struct vop_scl_regs win_full_scl
= {
54 .cbcr_vsd_mode
= VOP_REG(WIN0_CTRL1
, 0x1, 31),
55 .cbcr_vsu_mode
= VOP_REG(WIN0_CTRL1
, 0x1, 30),
56 .cbcr_hsd_mode
= VOP_REG(WIN0_CTRL1
, 0x3, 28),
57 .cbcr_ver_scl_mode
= VOP_REG(WIN0_CTRL1
, 0x3, 26),
58 .cbcr_hor_scl_mode
= VOP_REG(WIN0_CTRL1
, 0x3, 24),
59 .yrgb_vsd_mode
= VOP_REG(WIN0_CTRL1
, 0x1, 23),
60 .yrgb_vsu_mode
= VOP_REG(WIN0_CTRL1
, 0x1, 22),
61 .yrgb_hsd_mode
= VOP_REG(WIN0_CTRL1
, 0x3, 20),
62 .yrgb_ver_scl_mode
= VOP_REG(WIN0_CTRL1
, 0x3, 18),
63 .yrgb_hor_scl_mode
= VOP_REG(WIN0_CTRL1
, 0x3, 16),
64 .line_load_mode
= VOP_REG(WIN0_CTRL1
, 0x1, 15),
65 .cbcr_axi_gather_num
= VOP_REG(WIN0_CTRL1
, 0x7, 12),
66 .yrgb_axi_gather_num
= VOP_REG(WIN0_CTRL1
, 0xf, 8),
67 .vsd_cbcr_gt2
= VOP_REG(WIN0_CTRL1
, 0x1, 7),
68 .vsd_cbcr_gt4
= VOP_REG(WIN0_CTRL1
, 0x1, 6),
69 .vsd_yrgb_gt2
= VOP_REG(WIN0_CTRL1
, 0x1, 5),
70 .vsd_yrgb_gt4
= VOP_REG(WIN0_CTRL1
, 0x1, 4),
71 .bic_coe_sel
= VOP_REG(WIN0_CTRL1
, 0x3, 2),
72 .cbcr_axi_gather_en
= VOP_REG(WIN0_CTRL1
, 0x1, 1),
73 .yrgb_axi_gather_en
= VOP_REG(WIN0_CTRL1
, 0x1, 0),
74 .lb_mode
= VOP_REG(WIN0_CTRL0
, 0x7, 5),
75 .scale_yrgb_x
= VOP_REG(WIN0_SCL_FACTOR_YRGB
, 0xffff, 0x0),
76 .scale_yrgb_y
= VOP_REG(WIN0_SCL_FACTOR_YRGB
, 0xffff, 16),
77 .scale_cbcr_x
= VOP_REG(WIN0_SCL_FACTOR_CBR
, 0xffff, 0x0),
78 .scale_cbcr_y
= VOP_REG(WIN0_SCL_FACTOR_CBR
, 0xffff, 16),
81 static const struct vop_win_phy win01_data
= {
83 .data_formats
= formats_01
,
84 .nformats
= ARRAY_SIZE(formats_01
),
85 .enable
= VOP_REG(WIN0_CTRL0
, 0x1, 0),
86 .format
= VOP_REG(WIN0_CTRL0
, 0x7, 1),
87 .rb_swap
= VOP_REG(WIN0_CTRL0
, 0x1, 12),
88 .act_info
= VOP_REG(WIN0_ACT_INFO
, 0x1fff1fff, 0),
89 .dsp_info
= VOP_REG(WIN0_DSP_INFO
, 0x0fff0fff, 0),
90 .dsp_st
= VOP_REG(WIN0_DSP_ST
, 0x1fff1fff, 0),
91 .yrgb_mst
= VOP_REG(WIN0_YRGB_MST
, 0xffffffff, 0),
92 .uv_mst
= VOP_REG(WIN0_CBR_MST
, 0xffffffff, 0),
93 .yrgb_vir
= VOP_REG(WIN0_VIR
, 0x3fff, 0),
94 .uv_vir
= VOP_REG(WIN0_VIR
, 0x3fff, 16),
95 .src_alpha_ctl
= VOP_REG(WIN0_SRC_ALPHA_CTRL
, 0xff, 0),
96 .dst_alpha_ctl
= VOP_REG(WIN0_DST_ALPHA_CTRL
, 0xff, 0),
99 static const struct vop_win_phy win23_data
= {
100 .data_formats
= formats_234
,
101 .nformats
= ARRAY_SIZE(formats_234
),
102 .enable
= VOP_REG(WIN2_CTRL0
, 0x1, 0),
103 .format
= VOP_REG(WIN2_CTRL0
, 0x7, 1),
104 .rb_swap
= VOP_REG(WIN2_CTRL0
, 0x1, 12),
105 .dsp_info
= VOP_REG(WIN2_DSP_INFO0
, 0x0fff0fff, 0),
106 .dsp_st
= VOP_REG(WIN2_DSP_ST0
, 0x1fff1fff, 0),
107 .yrgb_mst
= VOP_REG(WIN2_MST0
, 0xffffffff, 0),
108 .yrgb_vir
= VOP_REG(WIN2_VIR0_1
, 0x1fff, 0),
109 .src_alpha_ctl
= VOP_REG(WIN2_SRC_ALPHA_CTRL
, 0xff, 0),
110 .dst_alpha_ctl
= VOP_REG(WIN2_DST_ALPHA_CTRL
, 0xff, 0),
113 static const struct vop_ctrl ctrl_data
= {
114 .standby
= VOP_REG(SYS_CTRL
, 0x1, 22),
115 .gate_en
= VOP_REG(SYS_CTRL
, 0x1, 23),
116 .mmu_en
= VOP_REG(SYS_CTRL
, 0x1, 20),
117 .rgb_en
= VOP_REG(SYS_CTRL
, 0x1, 12),
118 .hdmi_en
= VOP_REG(SYS_CTRL
, 0x1, 13),
119 .edp_en
= VOP_REG(SYS_CTRL
, 0x1, 14),
120 .mipi_en
= VOP_REG(SYS_CTRL
, 0x1, 15),
121 .dither_down
= VOP_REG(DSP_CTRL1
, 0xf, 1),
122 .dither_up
= VOP_REG(DSP_CTRL1
, 0x1, 6),
123 .data_blank
= VOP_REG(DSP_CTRL0
, 0x1, 19),
124 .out_mode
= VOP_REG(DSP_CTRL0
, 0xf, 0),
125 .pin_pol
= VOP_REG(DSP_CTRL0
, 0xf, 4),
126 .htotal_pw
= VOP_REG(DSP_HTOTAL_HS_END
, 0x1fff1fff, 0),
127 .hact_st_end
= VOP_REG(DSP_HACT_ST_END
, 0x1fff1fff, 0),
128 .vtotal_pw
= VOP_REG(DSP_VTOTAL_VS_END
, 0x1fff1fff, 0),
129 .vact_st_end
= VOP_REG(DSP_VACT_ST_END
, 0x1fff1fff, 0),
130 .hpost_st_end
= VOP_REG(POST_DSP_HACT_INFO
, 0x1fff1fff, 0),
131 .vpost_st_end
= VOP_REG(POST_DSP_VACT_INFO
, 0x1fff1fff, 0),
132 .cfg_done
= VOP_REG(REG_CFG_DONE
, 0x1, 0),
135 static const struct vop_reg_data vop_init_reg_table
[] = {
136 {SYS_CTRL
, 0x00c00000},
137 {DSP_CTRL0
, 0x00000000},
138 {WIN0_CTRL0
, 0x00000080},
139 {WIN1_CTRL0
, 0x00000080},
140 /* TODO: Win2/3 support multiple area function, but we haven't found
141 * a suitable way to use it yet, so let's just use them as other windows
142 * with only area 0 enabled.
144 {WIN2_CTRL0
, 0x00000010},
145 {WIN3_CTRL0
, 0x00000010},
149 * Note: rk3288 has a dedicated 'cursor' window, however, that window requires
150 * special support to get alpha blending working. For now, just use overlay
151 * window 3 for the drm cursor.
154 static const struct vop_win_data rk3288_vop_win_data
[] = {
155 { .base
= 0x00, .phy
= &win01_data
, .type
= DRM_PLANE_TYPE_PRIMARY
},
156 { .base
= 0x40, .phy
= &win01_data
, .type
= DRM_PLANE_TYPE_OVERLAY
},
157 { .base
= 0x00, .phy
= &win23_data
, .type
= DRM_PLANE_TYPE_OVERLAY
},
158 { .base
= 0x50, .phy
= &win23_data
, .type
= DRM_PLANE_TYPE_CURSOR
},
161 static const int rk3288_vop_intrs
[] = {
168 static const struct vop_intr rk3288_vop_intr
= {
169 .intrs
= rk3288_vop_intrs
,
170 .nintrs
= ARRAY_SIZE(rk3288_vop_intrs
),
171 .status
= VOP_REG(INTR_CTRL0
, 0xf, 0),
172 .enable
= VOP_REG(INTR_CTRL0
, 0xf, 4),
173 .clear
= VOP_REG(INTR_CTRL0
, 0xf, 8),
176 static const struct vop_data rk3288_vop
= {
177 .init_table
= vop_init_reg_table
,
178 .intr
= &rk3288_vop_intr
,
179 .table_size
= ARRAY_SIZE(vop_init_reg_table
),
181 .win
= rk3288_vop_win_data
,
182 .win_size
= ARRAY_SIZE(rk3288_vop_win_data
),
185 static const struct of_device_id vop_driver_dt_match
[] = {
186 { .compatible
= "rockchip,rk3288-vop",
187 .data
= &rk3288_vop
},
190 MODULE_DEVICE_TABLE(of
, vop_driver_dt_match
);
192 static int vop_probe(struct platform_device
*pdev
)
194 struct device
*dev
= &pdev
->dev
;
197 dev_err(dev
, "can't find vop devices\n");
201 return component_add(dev
, &vop_component_ops
);
204 static int vop_remove(struct platform_device
*pdev
)
206 component_del(&pdev
->dev
, &vop_component_ops
);
211 struct platform_driver vop_platform_driver
= {
213 .remove
= vop_remove
,
215 .name
= "rockchip-vop",
216 .owner
= THIS_MODULE
,
217 .of_match_table
= of_match_ptr(vop_driver_dt_match
),
221 module_platform_driver(vop_platform_driver
);
223 MODULE_AUTHOR("Mark Yao <mark.yao@rock-chips.com>");
224 MODULE_DESCRIPTION("ROCKCHIP VOP Driver");
225 MODULE_LICENSE("GPL v2");