2 * Copyright (C) 2012 Texas Instruments
3 * Author: Rob Clark <robdclark@gmail.com>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
18 /* LCDC DRM driver, based on da8xx-fb */
20 #include <linux/component.h>
21 #include <linux/pinctrl/consumer.h>
22 #include <linux/suspend.h>
23 #include <drm/drm_atomic.h>
24 #include <drm/drm_atomic_helper.h>
26 #include "tilcdc_drv.h"
27 #include "tilcdc_regs.h"
28 #include "tilcdc_tfp410.h"
29 #include "tilcdc_panel.h"
30 #include "tilcdc_external.h"
32 #include "drm_fb_helper.h"
34 static LIST_HEAD(module_list
);
36 static const u32 tilcdc_rev1_formats
[] = { DRM_FORMAT_RGB565
};
38 static const u32 tilcdc_straight_formats
[] = { DRM_FORMAT_RGB565
,
40 DRM_FORMAT_XBGR8888
};
42 static const u32 tilcdc_crossed_formats
[] = { DRM_FORMAT_BGR565
,
44 DRM_FORMAT_XRGB8888
};
46 static const u32 tilcdc_legacy_formats
[] = { DRM_FORMAT_RGB565
,
48 DRM_FORMAT_XRGB8888
};
50 void tilcdc_module_init(struct tilcdc_module
*mod
, const char *name
,
51 const struct tilcdc_module_ops
*funcs
)
55 INIT_LIST_HEAD(&mod
->list
);
56 list_add(&mod
->list
, &module_list
);
59 void tilcdc_module_cleanup(struct tilcdc_module
*mod
)
64 static struct of_device_id tilcdc_of_match
[];
66 static struct drm_framebuffer
*tilcdc_fb_create(struct drm_device
*dev
,
67 struct drm_file
*file_priv
, const struct drm_mode_fb_cmd2
*mode_cmd
)
69 return drm_fb_cma_create(dev
, file_priv
, mode_cmd
);
72 static void tilcdc_fb_output_poll_changed(struct drm_device
*dev
)
74 struct tilcdc_drm_private
*priv
= dev
->dev_private
;
75 drm_fbdev_cma_hotplug_event(priv
->fbdev
);
78 int tilcdc_atomic_check(struct drm_device
*dev
,
79 struct drm_atomic_state
*state
)
83 ret
= drm_atomic_helper_check_modeset(dev
, state
);
87 ret
= drm_atomic_helper_check_planes(dev
, state
);
92 * tilcdc ->atomic_check can update ->mode_changed if pixel format
93 * changes, hence will we check modeset changes again.
95 ret
= drm_atomic_helper_check_modeset(dev
, state
);
102 static int tilcdc_commit(struct drm_device
*dev
,
103 struct drm_atomic_state
*state
,
108 ret
= drm_atomic_helper_prepare_planes(dev
, state
);
112 drm_atomic_helper_swap_state(state
, true);
115 * Everything below can be run asynchronously without the need to grab
116 * any modeset locks at all under one condition: It must be guaranteed
117 * that the asynchronous work has either been cancelled (if the driver
118 * supports it, which at least requires that the framebuffers get
119 * cleaned up with drm_atomic_helper_cleanup_planes()) or completed
120 * before the new state gets committed on the software side with
121 * drm_atomic_helper_swap_state().
123 * This scheme allows new atomic state updates to be prepared and
124 * checked in parallel to the asynchronous completion of the previous
125 * update. Which is important since compositors need to figure out the
126 * composition of the next frame right after having submitted the
130 /* Keep HW on while we commit the state. */
131 pm_runtime_get_sync(dev
->dev
);
133 drm_atomic_helper_commit_modeset_disables(dev
, state
);
135 drm_atomic_helper_commit_planes(dev
, state
, 0);
137 drm_atomic_helper_commit_modeset_enables(dev
, state
);
139 /* Now HW should remain on if need becase the crtc is enabled */
140 pm_runtime_put_sync(dev
->dev
);
142 drm_atomic_helper_wait_for_vblanks(dev
, state
);
144 drm_atomic_helper_cleanup_planes(dev
, state
);
146 drm_atomic_state_free(state
);
151 static const struct drm_mode_config_funcs mode_config_funcs
= {
152 .fb_create
= tilcdc_fb_create
,
153 .output_poll_changed
= tilcdc_fb_output_poll_changed
,
154 .atomic_check
= tilcdc_atomic_check
,
155 .atomic_commit
= tilcdc_commit
,
158 static int modeset_init(struct drm_device
*dev
)
160 struct tilcdc_drm_private
*priv
= dev
->dev_private
;
161 struct tilcdc_module
*mod
;
163 drm_mode_config_init(dev
);
165 priv
->crtc
= tilcdc_crtc_create(dev
);
167 list_for_each_entry(mod
, &module_list
, list
) {
168 DBG("loading module: %s", mod
->name
);
169 mod
->funcs
->modeset_init(mod
, dev
);
172 dev
->mode_config
.min_width
= 0;
173 dev
->mode_config
.min_height
= 0;
174 dev
->mode_config
.max_width
= tilcdc_crtc_max_width(priv
->crtc
);
175 dev
->mode_config
.max_height
= 2048;
176 dev
->mode_config
.funcs
= &mode_config_funcs
;
181 #ifdef CONFIG_CPU_FREQ
182 static int cpufreq_transition(struct notifier_block
*nb
,
183 unsigned long val
, void *data
)
185 struct tilcdc_drm_private
*priv
= container_of(nb
,
186 struct tilcdc_drm_private
, freq_transition
);
187 if (val
== CPUFREQ_POSTCHANGE
) {
188 if (priv
->lcd_fck_rate
!= clk_get_rate(priv
->clk
)) {
189 priv
->lcd_fck_rate
= clk_get_rate(priv
->clk
);
190 tilcdc_crtc_update_clk(priv
->crtc
);
202 static int tilcdc_unload(struct drm_device
*dev
)
204 struct tilcdc_drm_private
*priv
= dev
->dev_private
;
206 tilcdc_crtc_disable(priv
->crtc
);
208 tilcdc_remove_external_encoders(dev
);
210 drm_fbdev_cma_fini(priv
->fbdev
);
211 drm_kms_helper_poll_fini(dev
);
212 drm_mode_config_cleanup(dev
);
213 drm_vblank_cleanup(dev
);
215 drm_irq_uninstall(dev
);
217 #ifdef CONFIG_CPU_FREQ
218 cpufreq_unregister_notifier(&priv
->freq_transition
,
219 CPUFREQ_TRANSITION_NOTIFIER
);
228 flush_workqueue(priv
->wq
);
229 destroy_workqueue(priv
->wq
);
231 dev
->dev_private
= NULL
;
233 pm_runtime_disable(dev
->dev
);
238 static int tilcdc_load(struct drm_device
*dev
, unsigned long flags
)
240 struct platform_device
*pdev
= dev
->platformdev
;
241 struct device_node
*node
= pdev
->dev
.of_node
;
242 struct tilcdc_drm_private
*priv
;
243 struct resource
*res
;
247 priv
= devm_kzalloc(dev
->dev
, sizeof(*priv
), GFP_KERNEL
);
249 dev_err(dev
->dev
, "failed to allocate private data\n");
253 dev
->dev_private
= priv
;
255 priv
->is_componentized
=
256 tilcdc_get_external_components(dev
->dev
, NULL
) > 0;
258 priv
->wq
= alloc_ordered_workqueue("tilcdc", 0);
261 goto fail_unset_priv
;
264 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
266 dev_err(dev
->dev
, "failed to get memory resource\n");
271 priv
->mmio
= ioremap_nocache(res
->start
, resource_size(res
));
273 dev_err(dev
->dev
, "failed to ioremap\n");
278 priv
->clk
= clk_get(dev
->dev
, "fck");
279 if (IS_ERR(priv
->clk
)) {
280 dev_err(dev
->dev
, "failed to get functional clock\n");
285 #ifdef CONFIG_CPU_FREQ
286 priv
->lcd_fck_rate
= clk_get_rate(priv
->clk
);
287 priv
->freq_transition
.notifier_call
= cpufreq_transition
;
288 ret
= cpufreq_register_notifier(&priv
->freq_transition
,
289 CPUFREQ_TRANSITION_NOTIFIER
);
291 dev_err(dev
->dev
, "failed to register cpufreq notifier\n");
296 if (of_property_read_u32(node
, "max-bandwidth", &priv
->max_bandwidth
))
297 priv
->max_bandwidth
= TILCDC_DEFAULT_MAX_BANDWIDTH
;
299 DBG("Maximum Bandwidth Value %d", priv
->max_bandwidth
);
301 if (of_property_read_u32(node
, "ti,max-width", &priv
->max_width
))
302 priv
->max_width
= TILCDC_DEFAULT_MAX_WIDTH
;
304 DBG("Maximum Horizontal Pixel Width Value %dpixels", priv
->max_width
);
306 if (of_property_read_u32(node
, "ti,max-pixelclock",
307 &priv
->max_pixelclock
))
308 priv
->max_pixelclock
= TILCDC_DEFAULT_MAX_PIXELCLOCK
;
310 DBG("Maximum Pixel Clock Value %dKHz", priv
->max_pixelclock
);
312 pm_runtime_enable(dev
->dev
);
314 /* Determine LCD IP Version */
315 pm_runtime_get_sync(dev
->dev
);
316 switch (tilcdc_read(dev
, LCDC_PID_REG
)) {
325 dev_warn(dev
->dev
, "Unknown PID Reg value 0x%08x, "
326 "defaulting to LCD revision 1\n",
327 tilcdc_read(dev
, LCDC_PID_REG
));
332 pm_runtime_put_sync(dev
->dev
);
334 if (priv
->rev
== 1) {
335 DBG("Revision 1 LCDC supports only RGB565 format");
336 priv
->pixelformats
= tilcdc_rev1_formats
;
337 priv
->num_pixelformats
= ARRAY_SIZE(tilcdc_rev1_formats
);
340 const char *str
= "\0";
342 of_property_read_string(node
, "blue-and-red-wiring", &str
);
343 if (0 == strcmp(str
, "crossed")) {
344 DBG("Configured for crossed blue and red wires");
345 priv
->pixelformats
= tilcdc_crossed_formats
;
346 priv
->num_pixelformats
=
347 ARRAY_SIZE(tilcdc_crossed_formats
);
348 bpp
= 32; /* Choose bpp with RGB support for fbdef */
349 } else if (0 == strcmp(str
, "straight")) {
350 DBG("Configured for straight blue and red wires");
351 priv
->pixelformats
= tilcdc_straight_formats
;
352 priv
->num_pixelformats
=
353 ARRAY_SIZE(tilcdc_straight_formats
);
354 bpp
= 16; /* Choose bpp with RGB support for fbdef */
356 DBG("Blue and red wiring '%s' unknown, use legacy mode",
358 priv
->pixelformats
= tilcdc_legacy_formats
;
359 priv
->num_pixelformats
=
360 ARRAY_SIZE(tilcdc_legacy_formats
);
361 bpp
= 16; /* This is just a guess */
365 ret
= modeset_init(dev
);
367 dev_err(dev
->dev
, "failed to initialize mode setting\n");
368 goto fail_cpufreq_unregister
;
371 platform_set_drvdata(pdev
, dev
);
373 if (priv
->is_componentized
) {
374 ret
= component_bind_all(dev
->dev
, dev
);
376 goto fail_mode_config_cleanup
;
378 ret
= tilcdc_add_external_encoders(dev
);
380 goto fail_component_cleanup
;
383 if ((priv
->num_encoders
== 0) || (priv
->num_connectors
== 0)) {
384 dev_err(dev
->dev
, "no encoders/connectors found\n");
386 goto fail_external_cleanup
;
389 ret
= drm_vblank_init(dev
, 1);
391 dev_err(dev
->dev
, "failed to initialize vblank\n");
392 goto fail_external_cleanup
;
395 ret
= drm_irq_install(dev
, platform_get_irq(dev
->platformdev
, 0));
397 dev_err(dev
->dev
, "failed to install IRQ handler\n");
398 goto fail_vblank_cleanup
;
401 drm_mode_config_reset(dev
);
403 priv
->fbdev
= drm_fbdev_cma_init(dev
, bpp
,
404 dev
->mode_config
.num_crtc
,
405 dev
->mode_config
.num_connector
);
406 if (IS_ERR(priv
->fbdev
)) {
407 ret
= PTR_ERR(priv
->fbdev
);
408 goto fail_irq_uninstall
;
411 drm_kms_helper_poll_init(dev
);
416 drm_irq_uninstall(dev
);
419 drm_vblank_cleanup(dev
);
421 fail_mode_config_cleanup
:
422 drm_mode_config_cleanup(dev
);
424 fail_component_cleanup
:
425 if (priv
->is_componentized
)
426 component_unbind_all(dev
->dev
, dev
);
428 fail_external_cleanup
:
429 tilcdc_remove_external_encoders(dev
);
431 fail_cpufreq_unregister
:
432 pm_runtime_disable(dev
->dev
);
433 #ifdef CONFIG_CPU_FREQ
434 cpufreq_unregister_notifier(&priv
->freq_transition
,
435 CPUFREQ_TRANSITION_NOTIFIER
);
445 flush_workqueue(priv
->wq
);
446 destroy_workqueue(priv
->wq
);
449 dev
->dev_private
= NULL
;
454 static void tilcdc_lastclose(struct drm_device
*dev
)
456 struct tilcdc_drm_private
*priv
= dev
->dev_private
;
457 drm_fbdev_cma_restore_mode(priv
->fbdev
);
460 static irqreturn_t
tilcdc_irq(int irq
, void *arg
)
462 struct drm_device
*dev
= arg
;
463 struct tilcdc_drm_private
*priv
= dev
->dev_private
;
464 return tilcdc_crtc_irq(priv
->crtc
);
467 static int tilcdc_enable_vblank(struct drm_device
*dev
, unsigned int pipe
)
472 static void tilcdc_disable_vblank(struct drm_device
*dev
, unsigned int pipe
)
477 #if defined(CONFIG_DEBUG_FS)
478 static const struct {
484 #define REG(rev, save, reg) { #reg, rev, save, reg }
485 /* exists in revision 1: */
486 REG(1, false, LCDC_PID_REG
),
487 REG(1, true, LCDC_CTRL_REG
),
488 REG(1, false, LCDC_STAT_REG
),
489 REG(1, true, LCDC_RASTER_CTRL_REG
),
490 REG(1, true, LCDC_RASTER_TIMING_0_REG
),
491 REG(1, true, LCDC_RASTER_TIMING_1_REG
),
492 REG(1, true, LCDC_RASTER_TIMING_2_REG
),
493 REG(1, true, LCDC_DMA_CTRL_REG
),
494 REG(1, true, LCDC_DMA_FB_BASE_ADDR_0_REG
),
495 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_0_REG
),
496 REG(1, true, LCDC_DMA_FB_BASE_ADDR_1_REG
),
497 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_1_REG
),
498 /* new in revision 2: */
499 REG(2, false, LCDC_RAW_STAT_REG
),
500 REG(2, false, LCDC_MASKED_STAT_REG
),
501 REG(2, true, LCDC_INT_ENABLE_SET_REG
),
502 REG(2, false, LCDC_INT_ENABLE_CLR_REG
),
503 REG(2, false, LCDC_END_OF_INT_IND_REG
),
504 REG(2, true, LCDC_CLK_ENABLE_REG
),
510 #ifdef CONFIG_DEBUG_FS
511 static int tilcdc_regs_show(struct seq_file
*m
, void *arg
)
513 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
514 struct drm_device
*dev
= node
->minor
->dev
;
515 struct tilcdc_drm_private
*priv
= dev
->dev_private
;
518 pm_runtime_get_sync(dev
->dev
);
520 seq_printf(m
, "revision: %d\n", priv
->rev
);
522 for (i
= 0; i
< ARRAY_SIZE(registers
); i
++)
523 if (priv
->rev
>= registers
[i
].rev
)
524 seq_printf(m
, "%s:\t %08x\n", registers
[i
].name
,
525 tilcdc_read(dev
, registers
[i
].reg
));
527 pm_runtime_put_sync(dev
->dev
);
532 static int tilcdc_mm_show(struct seq_file
*m
, void *arg
)
534 struct drm_info_node
*node
= (struct drm_info_node
*) m
->private;
535 struct drm_device
*dev
= node
->minor
->dev
;
536 return drm_mm_dump_table(m
, &dev
->vma_offset_manager
->vm_addr_space_mm
);
539 static struct drm_info_list tilcdc_debugfs_list
[] = {
540 { "regs", tilcdc_regs_show
, 0 },
541 { "mm", tilcdc_mm_show
, 0 },
542 { "fb", drm_fb_cma_debugfs_show
, 0 },
545 static int tilcdc_debugfs_init(struct drm_minor
*minor
)
547 struct drm_device
*dev
= minor
->dev
;
548 struct tilcdc_module
*mod
;
551 ret
= drm_debugfs_create_files(tilcdc_debugfs_list
,
552 ARRAY_SIZE(tilcdc_debugfs_list
),
553 minor
->debugfs_root
, minor
);
555 list_for_each_entry(mod
, &module_list
, list
)
556 if (mod
->funcs
->debugfs_init
)
557 mod
->funcs
->debugfs_init(mod
, minor
);
560 dev_err(dev
->dev
, "could not install tilcdc_debugfs_list\n");
567 static void tilcdc_debugfs_cleanup(struct drm_minor
*minor
)
569 struct tilcdc_module
*mod
;
570 drm_debugfs_remove_files(tilcdc_debugfs_list
,
571 ARRAY_SIZE(tilcdc_debugfs_list
), minor
);
573 list_for_each_entry(mod
, &module_list
, list
)
574 if (mod
->funcs
->debugfs_cleanup
)
575 mod
->funcs
->debugfs_cleanup(mod
, minor
);
579 static const struct file_operations fops
= {
580 .owner
= THIS_MODULE
,
582 .release
= drm_release
,
583 .unlocked_ioctl
= drm_ioctl
,
585 .compat_ioctl
= drm_compat_ioctl
,
590 .mmap
= drm_gem_cma_mmap
,
593 static struct drm_driver tilcdc_driver
= {
594 .driver_features
= (DRIVER_HAVE_IRQ
| DRIVER_GEM
| DRIVER_MODESET
|
595 DRIVER_PRIME
| DRIVER_ATOMIC
),
597 .unload
= tilcdc_unload
,
598 .lastclose
= tilcdc_lastclose
,
599 .irq_handler
= tilcdc_irq
,
600 .get_vblank_counter
= drm_vblank_no_hw_counter
,
601 .enable_vblank
= tilcdc_enable_vblank
,
602 .disable_vblank
= tilcdc_disable_vblank
,
603 .gem_free_object_unlocked
= drm_gem_cma_free_object
,
604 .gem_vm_ops
= &drm_gem_cma_vm_ops
,
605 .dumb_create
= drm_gem_cma_dumb_create
,
606 .dumb_map_offset
= drm_gem_cma_dumb_map_offset
,
607 .dumb_destroy
= drm_gem_dumb_destroy
,
609 .prime_handle_to_fd
= drm_gem_prime_handle_to_fd
,
610 .prime_fd_to_handle
= drm_gem_prime_fd_to_handle
,
611 .gem_prime_import
= drm_gem_prime_import
,
612 .gem_prime_export
= drm_gem_prime_export
,
613 .gem_prime_get_sg_table
= drm_gem_cma_prime_get_sg_table
,
614 .gem_prime_import_sg_table
= drm_gem_cma_prime_import_sg_table
,
615 .gem_prime_vmap
= drm_gem_cma_prime_vmap
,
616 .gem_prime_vunmap
= drm_gem_cma_prime_vunmap
,
617 .gem_prime_mmap
= drm_gem_cma_prime_mmap
,
618 #ifdef CONFIG_DEBUG_FS
619 .debugfs_init
= tilcdc_debugfs_init
,
620 .debugfs_cleanup
= tilcdc_debugfs_cleanup
,
624 .desc
= "TI LCD Controller DRM",
634 #ifdef CONFIG_PM_SLEEP
635 static int tilcdc_pm_suspend(struct device
*dev
)
637 struct drm_device
*ddev
= dev_get_drvdata(dev
);
638 struct tilcdc_drm_private
*priv
= ddev
->dev_private
;
640 priv
->saved_state
= drm_atomic_helper_suspend(ddev
);
642 /* Select sleep pin state */
643 pinctrl_pm_select_sleep_state(dev
);
648 static int tilcdc_pm_resume(struct device
*dev
)
650 struct drm_device
*ddev
= dev_get_drvdata(dev
);
651 struct tilcdc_drm_private
*priv
= ddev
->dev_private
;
654 /* Select default pin state */
655 pinctrl_pm_select_default_state(dev
);
657 if (priv
->saved_state
)
658 ret
= drm_atomic_helper_resume(ddev
, priv
->saved_state
);
664 static const struct dev_pm_ops tilcdc_pm_ops
= {
665 SET_SYSTEM_SLEEP_PM_OPS(tilcdc_pm_suspend
, tilcdc_pm_resume
)
672 static int tilcdc_bind(struct device
*dev
)
674 return drm_platform_init(&tilcdc_driver
, to_platform_device(dev
));
677 static void tilcdc_unbind(struct device
*dev
)
679 struct drm_device
*ddev
= dev_get_drvdata(dev
);
681 /* Check if a subcomponent has already triggered the unloading. */
682 if (!ddev
->dev_private
)
685 drm_put_dev(dev_get_drvdata(dev
));
688 static const struct component_master_ops tilcdc_comp_ops
= {
690 .unbind
= tilcdc_unbind
,
693 static int tilcdc_pdev_probe(struct platform_device
*pdev
)
695 struct component_match
*match
= NULL
;
698 /* bail out early if no DT data: */
699 if (!pdev
->dev
.of_node
) {
700 dev_err(&pdev
->dev
, "device-tree data is missing\n");
704 ret
= tilcdc_get_external_components(&pdev
->dev
, &match
);
708 return drm_platform_init(&tilcdc_driver
, pdev
);
710 return component_master_add_with_match(&pdev
->dev
,
715 static int tilcdc_pdev_remove(struct platform_device
*pdev
)
719 ret
= tilcdc_get_external_components(&pdev
->dev
, NULL
);
723 drm_put_dev(platform_get_drvdata(pdev
));
725 component_master_del(&pdev
->dev
, &tilcdc_comp_ops
);
730 static struct of_device_id tilcdc_of_match
[] = {
731 { .compatible
= "ti,am33xx-tilcdc", },
734 MODULE_DEVICE_TABLE(of
, tilcdc_of_match
);
736 static struct platform_driver tilcdc_platform_driver
= {
737 .probe
= tilcdc_pdev_probe
,
738 .remove
= tilcdc_pdev_remove
,
741 .pm
= &tilcdc_pm_ops
,
742 .of_match_table
= tilcdc_of_match
,
746 static int __init
tilcdc_drm_init(void)
749 tilcdc_tfp410_init();
751 return platform_driver_register(&tilcdc_platform_driver
);
754 static void __exit
tilcdc_drm_fini(void)
757 platform_driver_unregister(&tilcdc_platform_driver
);
759 tilcdc_tfp410_fini();
762 module_init(tilcdc_drm_init
);
763 module_exit(tilcdc_drm_fini
);
765 MODULE_AUTHOR("Rob Clark <robdclark@gmail.com");
766 MODULE_DESCRIPTION("TI LCD Controller DRM Driver");
767 MODULE_LICENSE("GPL");