hwmon: (coretemp) Improve support of recent Atom CPU models
[deliverable/linux.git] / drivers / hwmon / coretemp.c
1 /*
2 * coretemp.c - Linux kernel module for hardware monitoring
3 *
4 * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
5 *
6 * Inspired from many hwmon drivers
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20 * 02110-1301 USA.
21 */
22
23 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
24
25 #include <linux/module.h>
26 #include <linux/init.h>
27 #include <linux/slab.h>
28 #include <linux/jiffies.h>
29 #include <linux/hwmon.h>
30 #include <linux/sysfs.h>
31 #include <linux/hwmon-sysfs.h>
32 #include <linux/err.h>
33 #include <linux/mutex.h>
34 #include <linux/list.h>
35 #include <linux/platform_device.h>
36 #include <linux/cpu.h>
37 #include <linux/pci.h>
38 #include <linux/smp.h>
39 #include <linux/moduleparam.h>
40 #include <asm/msr.h>
41 #include <asm/processor.h>
42 #include <asm/cpu_device_id.h>
43
44 #define DRVNAME "coretemp"
45
46 /*
47 * force_tjmax only matters when TjMax can't be read from the CPU itself.
48 * When set, it replaces the driver's suboptimal heuristic.
49 */
50 static int force_tjmax;
51 module_param_named(tjmax, force_tjmax, int, 0444);
52 MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius");
53
54 #define BASE_SYSFS_ATTR_NO 2 /* Sysfs Base attr no for coretemp */
55 #define NUM_REAL_CORES 32 /* Number of Real cores per cpu */
56 #define CORETEMP_NAME_LENGTH 17 /* String Length of attrs */
57 #define MAX_CORE_ATTRS 4 /* Maximum no of basic attrs */
58 #define TOTAL_ATTRS (MAX_CORE_ATTRS + 1)
59 #define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO)
60
61 #define TO_PHYS_ID(cpu) (cpu_data(cpu).phys_proc_id)
62 #define TO_CORE_ID(cpu) (cpu_data(cpu).cpu_core_id)
63 #define TO_ATTR_NO(cpu) (TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO)
64
65 #ifdef CONFIG_SMP
66 #define for_each_sibling(i, cpu) for_each_cpu(i, cpu_sibling_mask(cpu))
67 #else
68 #define for_each_sibling(i, cpu) for (i = 0; false; )
69 #endif
70
71 /*
72 * Per-Core Temperature Data
73 * @last_updated: The time when the current temperature value was updated
74 * earlier (in jiffies).
75 * @cpu_core_id: The CPU Core from which temperature values should be read
76 * This value is passed as "id" field to rdmsr/wrmsr functions.
77 * @status_reg: One of IA32_THERM_STATUS or IA32_PACKAGE_THERM_STATUS,
78 * from where the temperature values should be read.
79 * @attr_size: Total number of pre-core attrs displayed in the sysfs.
80 * @is_pkg_data: If this is 1, the temp_data holds pkgtemp data.
81 * Otherwise, temp_data holds coretemp data.
82 * @valid: If this is 1, the current temperature is valid.
83 */
84 struct temp_data {
85 int temp;
86 int ttarget;
87 int tjmax;
88 unsigned long last_updated;
89 unsigned int cpu;
90 u32 cpu_core_id;
91 u32 status_reg;
92 int attr_size;
93 bool is_pkg_data;
94 bool valid;
95 struct sensor_device_attribute sd_attrs[TOTAL_ATTRS];
96 char attr_name[TOTAL_ATTRS][CORETEMP_NAME_LENGTH];
97 struct mutex update_lock;
98 };
99
100 /* Platform Data per Physical CPU */
101 struct platform_data {
102 struct device *hwmon_dev;
103 u16 phys_proc_id;
104 struct temp_data *core_data[MAX_CORE_DATA];
105 struct device_attribute name_attr;
106 };
107
108 struct pdev_entry {
109 struct list_head list;
110 struct platform_device *pdev;
111 u16 phys_proc_id;
112 };
113
114 static LIST_HEAD(pdev_list);
115 static DEFINE_MUTEX(pdev_list_mutex);
116
117 static ssize_t show_name(struct device *dev,
118 struct device_attribute *devattr, char *buf)
119 {
120 return sprintf(buf, "%s\n", DRVNAME);
121 }
122
123 static ssize_t show_label(struct device *dev,
124 struct device_attribute *devattr, char *buf)
125 {
126 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
127 struct platform_data *pdata = dev_get_drvdata(dev);
128 struct temp_data *tdata = pdata->core_data[attr->index];
129
130 if (tdata->is_pkg_data)
131 return sprintf(buf, "Physical id %u\n", pdata->phys_proc_id);
132
133 return sprintf(buf, "Core %u\n", tdata->cpu_core_id);
134 }
135
136 static ssize_t show_crit_alarm(struct device *dev,
137 struct device_attribute *devattr, char *buf)
138 {
139 u32 eax, edx;
140 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
141 struct platform_data *pdata = dev_get_drvdata(dev);
142 struct temp_data *tdata = pdata->core_data[attr->index];
143
144 rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
145
146 return sprintf(buf, "%d\n", (eax >> 5) & 1);
147 }
148
149 static ssize_t show_tjmax(struct device *dev,
150 struct device_attribute *devattr, char *buf)
151 {
152 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
153 struct platform_data *pdata = dev_get_drvdata(dev);
154
155 return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tjmax);
156 }
157
158 static ssize_t show_ttarget(struct device *dev,
159 struct device_attribute *devattr, char *buf)
160 {
161 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
162 struct platform_data *pdata = dev_get_drvdata(dev);
163
164 return sprintf(buf, "%d\n", pdata->core_data[attr->index]->ttarget);
165 }
166
167 static ssize_t show_temp(struct device *dev,
168 struct device_attribute *devattr, char *buf)
169 {
170 u32 eax, edx;
171 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
172 struct platform_data *pdata = dev_get_drvdata(dev);
173 struct temp_data *tdata = pdata->core_data[attr->index];
174
175 mutex_lock(&tdata->update_lock);
176
177 /* Check whether the time interval has elapsed */
178 if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) {
179 rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
180 tdata->valid = 0;
181 /* Check whether the data is valid */
182 if (eax & 0x80000000) {
183 tdata->temp = tdata->tjmax -
184 ((eax >> 16) & 0x7f) * 1000;
185 tdata->valid = 1;
186 }
187 tdata->last_updated = jiffies;
188 }
189
190 mutex_unlock(&tdata->update_lock);
191 return tdata->valid ? sprintf(buf, "%d\n", tdata->temp) : -EAGAIN;
192 }
193
194 static int __cpuinit adjust_tjmax(struct cpuinfo_x86 *c, u32 id,
195 struct device *dev)
196 {
197 /* The 100C is default for both mobile and non mobile CPUs */
198
199 int tjmax = 100000;
200 int tjmax_ee = 85000;
201 int usemsr_ee = 1;
202 int err;
203 u32 eax, edx;
204 struct pci_dev *host_bridge;
205
206 /* Early chips have no MSR for TjMax */
207
208 if (c->x86_model == 0xf && c->x86_mask < 4)
209 usemsr_ee = 0;
210
211 /* Atom CPUs */
212
213 if (c->x86_model == 0x1c || c->x86_model == 0x26
214 || c->x86_model == 0x27) {
215 usemsr_ee = 0;
216
217 host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
218
219 if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL
220 && (host_bridge->device == 0xa000 /* NM10 based nettop */
221 || host_bridge->device == 0xa010)) /* NM10 based netbook */
222 tjmax = 100000;
223 else
224 tjmax = 90000;
225
226 pci_dev_put(host_bridge);
227 }
228
229 if (c->x86_model > 0xe && usemsr_ee) {
230 u8 platform_id;
231
232 /*
233 * Now we can detect the mobile CPU using Intel provided table
234 * http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
235 * For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU
236 */
237 err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx);
238 if (err) {
239 dev_warn(dev,
240 "Unable to access MSR 0x17, assuming desktop"
241 " CPU\n");
242 usemsr_ee = 0;
243 } else if (c->x86_model < 0x17 && !(eax & 0x10000000)) {
244 /*
245 * Trust bit 28 up to Penryn, I could not find any
246 * documentation on that; if you happen to know
247 * someone at Intel please ask
248 */
249 usemsr_ee = 0;
250 } else {
251 /* Platform ID bits 52:50 (EDX starts at bit 32) */
252 platform_id = (edx >> 18) & 0x7;
253
254 /*
255 * Mobile Penryn CPU seems to be platform ID 7 or 5
256 * (guesswork)
257 */
258 if (c->x86_model == 0x17 &&
259 (platform_id == 5 || platform_id == 7)) {
260 /*
261 * If MSR EE bit is set, set it to 90 degrees C,
262 * otherwise 105 degrees C
263 */
264 tjmax_ee = 90000;
265 tjmax = 105000;
266 }
267 }
268 }
269
270 if (usemsr_ee) {
271 err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx);
272 if (err) {
273 dev_warn(dev,
274 "Unable to access MSR 0xEE, for Tjmax, left"
275 " at default\n");
276 } else if (eax & 0x40000000) {
277 tjmax = tjmax_ee;
278 }
279 } else if (tjmax == 100000) {
280 /*
281 * If we don't use msr EE it means we are desktop CPU
282 * (with exeception of Atom)
283 */
284 dev_warn(dev, "Using relative temperature scale!\n");
285 }
286
287 return tjmax;
288 }
289
290 static int __cpuinit get_tjmax(struct cpuinfo_x86 *c, u32 id,
291 struct device *dev)
292 {
293 int err;
294 u32 eax, edx;
295 u32 val;
296
297 /*
298 * A new feature of current Intel(R) processors, the
299 * IA32_TEMPERATURE_TARGET contains the TjMax value
300 */
301 err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
302 if (err) {
303 if (c->x86_model > 0xe && c->x86_model != 0x1c)
304 dev_warn(dev, "Unable to read TjMax from CPU %u\n", id);
305 } else {
306 val = (eax >> 16) & 0xff;
307 /*
308 * If the TjMax is not plausible, an assumption
309 * will be used
310 */
311 if (val) {
312 dev_dbg(dev, "TjMax is %d degrees C\n", val);
313 return val * 1000;
314 }
315 }
316
317 if (force_tjmax) {
318 dev_notice(dev, "TjMax forced to %d degrees C by user\n",
319 force_tjmax);
320 return force_tjmax * 1000;
321 }
322
323 /*
324 * An assumption is made for early CPUs and unreadable MSR.
325 * NOTE: the calculated value may not be correct.
326 */
327 return adjust_tjmax(c, id, dev);
328 }
329
330 static int __devinit create_name_attr(struct platform_data *pdata,
331 struct device *dev)
332 {
333 sysfs_attr_init(&pdata->name_attr.attr);
334 pdata->name_attr.attr.name = "name";
335 pdata->name_attr.attr.mode = S_IRUGO;
336 pdata->name_attr.show = show_name;
337 return device_create_file(dev, &pdata->name_attr);
338 }
339
340 static int __cpuinit create_core_attrs(struct temp_data *tdata,
341 struct device *dev, int attr_no)
342 {
343 int err, i;
344 static ssize_t (*const rd_ptr[TOTAL_ATTRS]) (struct device *dev,
345 struct device_attribute *devattr, char *buf) = {
346 show_label, show_crit_alarm, show_temp, show_tjmax,
347 show_ttarget };
348 static const char *const names[TOTAL_ATTRS] = {
349 "temp%d_label", "temp%d_crit_alarm",
350 "temp%d_input", "temp%d_crit",
351 "temp%d_max" };
352
353 for (i = 0; i < tdata->attr_size; i++) {
354 snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH, names[i],
355 attr_no);
356 sysfs_attr_init(&tdata->sd_attrs[i].dev_attr.attr);
357 tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i];
358 tdata->sd_attrs[i].dev_attr.attr.mode = S_IRUGO;
359 tdata->sd_attrs[i].dev_attr.show = rd_ptr[i];
360 tdata->sd_attrs[i].index = attr_no;
361 err = device_create_file(dev, &tdata->sd_attrs[i].dev_attr);
362 if (err)
363 goto exit_free;
364 }
365 return 0;
366
367 exit_free:
368 while (--i >= 0)
369 device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
370 return err;
371 }
372
373
374 static int __cpuinit chk_ucode_version(unsigned int cpu)
375 {
376 struct cpuinfo_x86 *c = &cpu_data(cpu);
377
378 /*
379 * Check if we have problem with errata AE18 of Core processors:
380 * Readings might stop update when processor visited too deep sleep,
381 * fixed for stepping D0 (6EC).
382 */
383 if (c->x86_model == 0xe && c->x86_mask < 0xc && c->microcode < 0x39) {
384 pr_err("Errata AE18 not fixed, update BIOS or "
385 "microcode of the CPU!\n");
386 return -ENODEV;
387 }
388 return 0;
389 }
390
391 static struct platform_device __cpuinit *coretemp_get_pdev(unsigned int cpu)
392 {
393 u16 phys_proc_id = TO_PHYS_ID(cpu);
394 struct pdev_entry *p;
395
396 mutex_lock(&pdev_list_mutex);
397
398 list_for_each_entry(p, &pdev_list, list)
399 if (p->phys_proc_id == phys_proc_id) {
400 mutex_unlock(&pdev_list_mutex);
401 return p->pdev;
402 }
403
404 mutex_unlock(&pdev_list_mutex);
405 return NULL;
406 }
407
408 static struct temp_data __cpuinit *init_temp_data(unsigned int cpu,
409 int pkg_flag)
410 {
411 struct temp_data *tdata;
412
413 tdata = kzalloc(sizeof(struct temp_data), GFP_KERNEL);
414 if (!tdata)
415 return NULL;
416
417 tdata->status_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_STATUS :
418 MSR_IA32_THERM_STATUS;
419 tdata->is_pkg_data = pkg_flag;
420 tdata->cpu = cpu;
421 tdata->cpu_core_id = TO_CORE_ID(cpu);
422 tdata->attr_size = MAX_CORE_ATTRS;
423 mutex_init(&tdata->update_lock);
424 return tdata;
425 }
426
427 static int __cpuinit create_core_data(struct platform_device *pdev,
428 unsigned int cpu, int pkg_flag)
429 {
430 struct temp_data *tdata;
431 struct platform_data *pdata = platform_get_drvdata(pdev);
432 struct cpuinfo_x86 *c = &cpu_data(cpu);
433 u32 eax, edx;
434 int err, attr_no;
435
436 /*
437 * Find attr number for sysfs:
438 * We map the attr number to core id of the CPU
439 * The attr number is always core id + 2
440 * The Pkgtemp will always show up as temp1_*, if available
441 */
442 attr_no = pkg_flag ? 1 : TO_ATTR_NO(cpu);
443
444 if (attr_no > MAX_CORE_DATA - 1)
445 return -ERANGE;
446
447 /*
448 * Provide a single set of attributes for all HT siblings of a core
449 * to avoid duplicate sensors (the processor ID and core ID of all
450 * HT siblings of a core are the same).
451 * Skip if a HT sibling of this core is already registered.
452 * This is not an error.
453 */
454 if (pdata->core_data[attr_no] != NULL)
455 return 0;
456
457 tdata = init_temp_data(cpu, pkg_flag);
458 if (!tdata)
459 return -ENOMEM;
460
461 /* Test if we can access the status register */
462 err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx);
463 if (err)
464 goto exit_free;
465
466 /* We can access status register. Get Critical Temperature */
467 tdata->tjmax = get_tjmax(c, cpu, &pdev->dev);
468
469 /*
470 * Read the still undocumented bits 8:15 of IA32_TEMPERATURE_TARGET.
471 * The target temperature is available on older CPUs but not in this
472 * register. Atoms don't have the register at all.
473 */
474 if (c->x86_model > 0xe && c->x86_model != 0x1c) {
475 err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET,
476 &eax, &edx);
477 if (!err) {
478 tdata->ttarget
479 = tdata->tjmax - ((eax >> 8) & 0xff) * 1000;
480 tdata->attr_size++;
481 }
482 }
483
484 pdata->core_data[attr_no] = tdata;
485
486 /* Create sysfs interfaces */
487 err = create_core_attrs(tdata, &pdev->dev, attr_no);
488 if (err)
489 goto exit_free;
490
491 return 0;
492 exit_free:
493 pdata->core_data[attr_no] = NULL;
494 kfree(tdata);
495 return err;
496 }
497
498 static void __cpuinit coretemp_add_core(unsigned int cpu, int pkg_flag)
499 {
500 struct platform_device *pdev = coretemp_get_pdev(cpu);
501 int err;
502
503 if (!pdev)
504 return;
505
506 err = create_core_data(pdev, cpu, pkg_flag);
507 if (err)
508 dev_err(&pdev->dev, "Adding Core %u failed\n", cpu);
509 }
510
511 static void coretemp_remove_core(struct platform_data *pdata,
512 struct device *dev, int indx)
513 {
514 int i;
515 struct temp_data *tdata = pdata->core_data[indx];
516
517 /* Remove the sysfs attributes */
518 for (i = 0; i < tdata->attr_size; i++)
519 device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
520
521 kfree(pdata->core_data[indx]);
522 pdata->core_data[indx] = NULL;
523 }
524
525 static int __devinit coretemp_probe(struct platform_device *pdev)
526 {
527 struct platform_data *pdata;
528 int err;
529
530 /* Initialize the per-package data structures */
531 pdata = kzalloc(sizeof(struct platform_data), GFP_KERNEL);
532 if (!pdata)
533 return -ENOMEM;
534
535 err = create_name_attr(pdata, &pdev->dev);
536 if (err)
537 goto exit_free;
538
539 pdata->phys_proc_id = pdev->id;
540 platform_set_drvdata(pdev, pdata);
541
542 pdata->hwmon_dev = hwmon_device_register(&pdev->dev);
543 if (IS_ERR(pdata->hwmon_dev)) {
544 err = PTR_ERR(pdata->hwmon_dev);
545 dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
546 goto exit_name;
547 }
548 return 0;
549
550 exit_name:
551 device_remove_file(&pdev->dev, &pdata->name_attr);
552 platform_set_drvdata(pdev, NULL);
553 exit_free:
554 kfree(pdata);
555 return err;
556 }
557
558 static int __devexit coretemp_remove(struct platform_device *pdev)
559 {
560 struct platform_data *pdata = platform_get_drvdata(pdev);
561 int i;
562
563 for (i = MAX_CORE_DATA - 1; i >= 0; --i)
564 if (pdata->core_data[i])
565 coretemp_remove_core(pdata, &pdev->dev, i);
566
567 device_remove_file(&pdev->dev, &pdata->name_attr);
568 hwmon_device_unregister(pdata->hwmon_dev);
569 platform_set_drvdata(pdev, NULL);
570 kfree(pdata);
571 return 0;
572 }
573
574 static struct platform_driver coretemp_driver = {
575 .driver = {
576 .owner = THIS_MODULE,
577 .name = DRVNAME,
578 },
579 .probe = coretemp_probe,
580 .remove = __devexit_p(coretemp_remove),
581 };
582
583 static int __cpuinit coretemp_device_add(unsigned int cpu)
584 {
585 int err;
586 struct platform_device *pdev;
587 struct pdev_entry *pdev_entry;
588
589 mutex_lock(&pdev_list_mutex);
590
591 pdev = platform_device_alloc(DRVNAME, TO_PHYS_ID(cpu));
592 if (!pdev) {
593 err = -ENOMEM;
594 pr_err("Device allocation failed\n");
595 goto exit;
596 }
597
598 pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL);
599 if (!pdev_entry) {
600 err = -ENOMEM;
601 goto exit_device_put;
602 }
603
604 err = platform_device_add(pdev);
605 if (err) {
606 pr_err("Device addition failed (%d)\n", err);
607 goto exit_device_free;
608 }
609
610 pdev_entry->pdev = pdev;
611 pdev_entry->phys_proc_id = pdev->id;
612
613 list_add_tail(&pdev_entry->list, &pdev_list);
614 mutex_unlock(&pdev_list_mutex);
615
616 return 0;
617
618 exit_device_free:
619 kfree(pdev_entry);
620 exit_device_put:
621 platform_device_put(pdev);
622 exit:
623 mutex_unlock(&pdev_list_mutex);
624 return err;
625 }
626
627 static void __cpuinit coretemp_device_remove(unsigned int cpu)
628 {
629 struct pdev_entry *p, *n;
630 u16 phys_proc_id = TO_PHYS_ID(cpu);
631
632 mutex_lock(&pdev_list_mutex);
633 list_for_each_entry_safe(p, n, &pdev_list, list) {
634 if (p->phys_proc_id != phys_proc_id)
635 continue;
636 platform_device_unregister(p->pdev);
637 list_del(&p->list);
638 kfree(p);
639 }
640 mutex_unlock(&pdev_list_mutex);
641 }
642
643 static bool __cpuinit is_any_core_online(struct platform_data *pdata)
644 {
645 int i;
646
647 /* Find online cores, except pkgtemp data */
648 for (i = MAX_CORE_DATA - 1; i >= 0; --i) {
649 if (pdata->core_data[i] &&
650 !pdata->core_data[i]->is_pkg_data) {
651 return true;
652 }
653 }
654 return false;
655 }
656
657 static void __cpuinit get_core_online(unsigned int cpu)
658 {
659 struct cpuinfo_x86 *c = &cpu_data(cpu);
660 struct platform_device *pdev = coretemp_get_pdev(cpu);
661 int err;
662
663 /*
664 * CPUID.06H.EAX[0] indicates whether the CPU has thermal
665 * sensors. We check this bit only, all the early CPUs
666 * without thermal sensors will be filtered out.
667 */
668 if (!cpu_has(c, X86_FEATURE_DTS))
669 return;
670
671 if (!pdev) {
672 /* Check the microcode version of the CPU */
673 if (chk_ucode_version(cpu))
674 return;
675
676 /*
677 * Alright, we have DTS support.
678 * We are bringing the _first_ core in this pkg
679 * online. So, initialize per-pkg data structures and
680 * then bring this core online.
681 */
682 err = coretemp_device_add(cpu);
683 if (err)
684 return;
685 /*
686 * Check whether pkgtemp support is available.
687 * If so, add interfaces for pkgtemp.
688 */
689 if (cpu_has(c, X86_FEATURE_PTS))
690 coretemp_add_core(cpu, 1);
691 }
692 /*
693 * Physical CPU device already exists.
694 * So, just add interfaces for this core.
695 */
696 coretemp_add_core(cpu, 0);
697 }
698
699 static void __cpuinit put_core_offline(unsigned int cpu)
700 {
701 int i, indx;
702 struct platform_data *pdata;
703 struct platform_device *pdev = coretemp_get_pdev(cpu);
704
705 /* If the physical CPU device does not exist, just return */
706 if (!pdev)
707 return;
708
709 pdata = platform_get_drvdata(pdev);
710
711 indx = TO_ATTR_NO(cpu);
712
713 /* The core id is too big, just return */
714 if (indx > MAX_CORE_DATA - 1)
715 return;
716
717 if (pdata->core_data[indx] && pdata->core_data[indx]->cpu == cpu)
718 coretemp_remove_core(pdata, &pdev->dev, indx);
719
720 /*
721 * If a HT sibling of a core is taken offline, but another HT sibling
722 * of the same core is still online, register the alternate sibling.
723 * This ensures that exactly one set of attributes is provided as long
724 * as at least one HT sibling of a core is online.
725 */
726 for_each_sibling(i, cpu) {
727 if (i != cpu) {
728 get_core_online(i);
729 /*
730 * Display temperature sensor data for one HT sibling
731 * per core only, so abort the loop after one such
732 * sibling has been found.
733 */
734 break;
735 }
736 }
737 /*
738 * If all cores in this pkg are offline, remove the device.
739 * coretemp_device_remove calls unregister_platform_device,
740 * which in turn calls coretemp_remove. This removes the
741 * pkgtemp entry and does other clean ups.
742 */
743 if (!is_any_core_online(pdata))
744 coretemp_device_remove(cpu);
745 }
746
747 static int __cpuinit coretemp_cpu_callback(struct notifier_block *nfb,
748 unsigned long action, void *hcpu)
749 {
750 unsigned int cpu = (unsigned long) hcpu;
751
752 switch (action) {
753 case CPU_ONLINE:
754 case CPU_DOWN_FAILED:
755 get_core_online(cpu);
756 break;
757 case CPU_DOWN_PREPARE:
758 put_core_offline(cpu);
759 break;
760 }
761 return NOTIFY_OK;
762 }
763
764 static struct notifier_block coretemp_cpu_notifier __refdata = {
765 .notifier_call = coretemp_cpu_callback,
766 };
767
768 static const struct x86_cpu_id coretemp_ids[] = {
769 { X86_VENDOR_INTEL, X86_FAMILY_ANY, X86_MODEL_ANY, X86_FEATURE_DTS },
770 {}
771 };
772 MODULE_DEVICE_TABLE(x86cpu, coretemp_ids);
773
774 static int __init coretemp_init(void)
775 {
776 int i, err = -ENODEV;
777
778 /*
779 * CPUID.06H.EAX[0] indicates whether the CPU has thermal
780 * sensors. We check this bit only, all the early CPUs
781 * without thermal sensors will be filtered out.
782 */
783 if (!x86_match_cpu(coretemp_ids))
784 return -ENODEV;
785
786 err = platform_driver_register(&coretemp_driver);
787 if (err)
788 goto exit;
789
790 for_each_online_cpu(i)
791 get_core_online(i);
792
793 #ifndef CONFIG_HOTPLUG_CPU
794 if (list_empty(&pdev_list)) {
795 err = -ENODEV;
796 goto exit_driver_unreg;
797 }
798 #endif
799
800 register_hotcpu_notifier(&coretemp_cpu_notifier);
801 return 0;
802
803 #ifndef CONFIG_HOTPLUG_CPU
804 exit_driver_unreg:
805 platform_driver_unregister(&coretemp_driver);
806 #endif
807 exit:
808 return err;
809 }
810
811 static void __exit coretemp_exit(void)
812 {
813 struct pdev_entry *p, *n;
814
815 unregister_hotcpu_notifier(&coretemp_cpu_notifier);
816 mutex_lock(&pdev_list_mutex);
817 list_for_each_entry_safe(p, n, &pdev_list, list) {
818 platform_device_unregister(p->pdev);
819 list_del(&p->list);
820 kfree(p);
821 }
822 mutex_unlock(&pdev_list_mutex);
823 platform_driver_unregister(&coretemp_driver);
824 }
825
826 MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>");
827 MODULE_DESCRIPTION("Intel Core temperature monitor");
828 MODULE_LICENSE("GPL");
829
830 module_init(coretemp_init)
831 module_exit(coretemp_exit)
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