hwmon: (jc42) Rearrange code to avoid forward declarations
[deliverable/linux.git] / drivers / hwmon / jc42.c
1 /*
2 * jc42.c - driver for Jedec JC42.4 compliant temperature sensors
3 *
4 * Copyright (c) 2010 Ericsson AB.
5 *
6 * Derived from lm77.c by Andras BALI <drewie@freemail.hu>.
7 *
8 * JC42.4 compliant temperature sensors are typically used on memory modules.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
25 #include <linux/module.h>
26 #include <linux/init.h>
27 #include <linux/slab.h>
28 #include <linux/jiffies.h>
29 #include <linux/i2c.h>
30 #include <linux/hwmon.h>
31 #include <linux/hwmon-sysfs.h>
32 #include <linux/err.h>
33 #include <linux/mutex.h>
34
35 /* Addresses to scan */
36 static const unsigned short normal_i2c[] = {
37 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, I2C_CLIENT_END };
38
39 /* JC42 registers. All registers are 16 bit. */
40 #define JC42_REG_CAP 0x00
41 #define JC42_REG_CONFIG 0x01
42 #define JC42_REG_TEMP_UPPER 0x02
43 #define JC42_REG_TEMP_LOWER 0x03
44 #define JC42_REG_TEMP_CRITICAL 0x04
45 #define JC42_REG_TEMP 0x05
46 #define JC42_REG_MANID 0x06
47 #define JC42_REG_DEVICEID 0x07
48
49 /* Status bits in temperature register */
50 #define JC42_ALARM_CRIT_BIT 15
51 #define JC42_ALARM_MAX_BIT 14
52 #define JC42_ALARM_MIN_BIT 13
53
54 /* Configuration register defines */
55 #define JC42_CFG_CRIT_ONLY (1 << 2)
56 #define JC42_CFG_TCRIT_LOCK (1 << 6)
57 #define JC42_CFG_EVENT_LOCK (1 << 7)
58 #define JC42_CFG_SHUTDOWN (1 << 8)
59 #define JC42_CFG_HYST_SHIFT 9
60 #define JC42_CFG_HYST_MASK (0x03 << 9)
61
62 /* Capabilities */
63 #define JC42_CAP_RANGE (1 << 2)
64
65 /* Manufacturer IDs */
66 #define ADT_MANID 0x11d4 /* Analog Devices */
67 #define ATMEL_MANID 0x001f /* Atmel */
68 #define MAX_MANID 0x004d /* Maxim */
69 #define IDT_MANID 0x00b3 /* IDT */
70 #define MCP_MANID 0x0054 /* Microchip */
71 #define NXP_MANID 0x1131 /* NXP Semiconductors */
72 #define ONS_MANID 0x1b09 /* ON Semiconductor */
73 #define STM_MANID 0x104a /* ST Microelectronics */
74
75 /* Supported chips */
76
77 /* Analog Devices */
78 #define ADT7408_DEVID 0x0801
79 #define ADT7408_DEVID_MASK 0xffff
80
81 /* Atmel */
82 #define AT30TS00_DEVID 0x8201
83 #define AT30TS00_DEVID_MASK 0xffff
84
85 /* IDT */
86 #define TS3000B3_DEVID 0x2903 /* Also matches TSE2002B3 */
87 #define TS3000B3_DEVID_MASK 0xffff
88
89 #define TS3000GB2_DEVID 0x2912 /* Also matches TSE2002GB2 */
90 #define TS3000GB2_DEVID_MASK 0xffff
91
92 /* Maxim */
93 #define MAX6604_DEVID 0x3e00
94 #define MAX6604_DEVID_MASK 0xffff
95
96 /* Microchip */
97 #define MCP9804_DEVID 0x0200
98 #define MCP9804_DEVID_MASK 0xfffc
99
100 #define MCP98242_DEVID 0x2000
101 #define MCP98242_DEVID_MASK 0xfffc
102
103 #define MCP98243_DEVID 0x2100
104 #define MCP98243_DEVID_MASK 0xfffc
105
106 #define MCP98244_DEVID 0x2200
107 #define MCP98244_DEVID_MASK 0xfffc
108
109 #define MCP9843_DEVID 0x0000 /* Also matches mcp9805 */
110 #define MCP9843_DEVID_MASK 0xfffe
111
112 /* NXP */
113 #define SE97_DEVID 0xa200
114 #define SE97_DEVID_MASK 0xfffc
115
116 #define SE98_DEVID 0xa100
117 #define SE98_DEVID_MASK 0xfffc
118
119 /* ON Semiconductor */
120 #define CAT6095_DEVID 0x0800 /* Also matches CAT34TS02 */
121 #define CAT6095_DEVID_MASK 0xffe0
122
123 /* ST Microelectronics */
124 #define STTS424_DEVID 0x0101
125 #define STTS424_DEVID_MASK 0xffff
126
127 #define STTS424E_DEVID 0x0000
128 #define STTS424E_DEVID_MASK 0xfffe
129
130 #define STTS2002_DEVID 0x0300
131 #define STTS2002_DEVID_MASK 0xffff
132
133 #define STTS3000_DEVID 0x0200
134 #define STTS3000_DEVID_MASK 0xffff
135
136 static u16 jc42_hysteresis[] = { 0, 1500, 3000, 6000 };
137
138 struct jc42_chips {
139 u16 manid;
140 u16 devid;
141 u16 devid_mask;
142 };
143
144 static struct jc42_chips jc42_chips[] = {
145 { ADT_MANID, ADT7408_DEVID, ADT7408_DEVID_MASK },
146 { ATMEL_MANID, AT30TS00_DEVID, AT30TS00_DEVID_MASK },
147 { IDT_MANID, TS3000B3_DEVID, TS3000B3_DEVID_MASK },
148 { IDT_MANID, TS3000GB2_DEVID, TS3000GB2_DEVID_MASK },
149 { MAX_MANID, MAX6604_DEVID, MAX6604_DEVID_MASK },
150 { MCP_MANID, MCP9804_DEVID, MCP9804_DEVID_MASK },
151 { MCP_MANID, MCP98242_DEVID, MCP98242_DEVID_MASK },
152 { MCP_MANID, MCP98243_DEVID, MCP98243_DEVID_MASK },
153 { MCP_MANID, MCP98244_DEVID, MCP98244_DEVID_MASK },
154 { MCP_MANID, MCP9843_DEVID, MCP9843_DEVID_MASK },
155 { NXP_MANID, SE97_DEVID, SE97_DEVID_MASK },
156 { ONS_MANID, CAT6095_DEVID, CAT6095_DEVID_MASK },
157 { NXP_MANID, SE98_DEVID, SE98_DEVID_MASK },
158 { STM_MANID, STTS424_DEVID, STTS424_DEVID_MASK },
159 { STM_MANID, STTS424E_DEVID, STTS424E_DEVID_MASK },
160 { STM_MANID, STTS2002_DEVID, STTS2002_DEVID_MASK },
161 { STM_MANID, STTS3000_DEVID, STTS3000_DEVID_MASK },
162 };
163
164 /* Each client has this additional data */
165 struct jc42_data {
166 struct i2c_client *client;
167 struct mutex update_lock; /* protect register access */
168 bool extended; /* true if extended range supported */
169 bool valid;
170 unsigned long last_updated; /* In jiffies */
171 u16 orig_config; /* original configuration */
172 u16 config; /* current configuration */
173 u16 temp_input; /* Temperatures */
174 u16 temp_crit;
175 u16 temp_min;
176 u16 temp_max;
177 };
178
179 #define JC42_TEMP_MIN_EXTENDED (-40000)
180 #define JC42_TEMP_MIN 0
181 #define JC42_TEMP_MAX 125000
182
183 static u16 jc42_temp_to_reg(int temp, bool extended)
184 {
185 int ntemp = clamp_val(temp,
186 extended ? JC42_TEMP_MIN_EXTENDED :
187 JC42_TEMP_MIN, JC42_TEMP_MAX);
188
189 /* convert from 0.001 to 0.0625 resolution */
190 return (ntemp * 2 / 125) & 0x1fff;
191 }
192
193 static int jc42_temp_from_reg(s16 reg)
194 {
195 reg &= 0x1fff;
196
197 /* sign extend register */
198 if (reg & 0x1000)
199 reg |= 0xf000;
200
201 /* convert from 0.0625 to 0.001 resolution */
202 return reg * 125 / 2;
203 }
204
205 static struct jc42_data *jc42_update_device(struct device *dev)
206 {
207 struct jc42_data *data = dev_get_drvdata(dev);
208 struct i2c_client *client = data->client;
209 struct jc42_data *ret = data;
210 int val;
211
212 mutex_lock(&data->update_lock);
213
214 if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
215 val = i2c_smbus_read_word_swapped(client, JC42_REG_TEMP);
216 if (val < 0) {
217 ret = ERR_PTR(val);
218 goto abort;
219 }
220 data->temp_input = val;
221
222 val = i2c_smbus_read_word_swapped(client,
223 JC42_REG_TEMP_CRITICAL);
224 if (val < 0) {
225 ret = ERR_PTR(val);
226 goto abort;
227 }
228 data->temp_crit = val;
229
230 val = i2c_smbus_read_word_swapped(client, JC42_REG_TEMP_LOWER);
231 if (val < 0) {
232 ret = ERR_PTR(val);
233 goto abort;
234 }
235 data->temp_min = val;
236
237 val = i2c_smbus_read_word_swapped(client, JC42_REG_TEMP_UPPER);
238 if (val < 0) {
239 ret = ERR_PTR(val);
240 goto abort;
241 }
242 data->temp_max = val;
243
244 data->last_updated = jiffies;
245 data->valid = true;
246 }
247 abort:
248 mutex_unlock(&data->update_lock);
249 return ret;
250 }
251
252 /* sysfs stuff */
253
254 /* read routines for temperature limits */
255 #define show(value) \
256 static ssize_t show_##value(struct device *dev, \
257 struct device_attribute *attr, \
258 char *buf) \
259 { \
260 struct jc42_data *data = jc42_update_device(dev); \
261 if (IS_ERR(data)) \
262 return PTR_ERR(data); \
263 return sprintf(buf, "%d\n", jc42_temp_from_reg(data->value)); \
264 }
265
266 show(temp_input);
267 show(temp_crit);
268 show(temp_min);
269 show(temp_max);
270
271 /* read routines for hysteresis values */
272 static ssize_t show_temp_crit_hyst(struct device *dev,
273 struct device_attribute *attr, char *buf)
274 {
275 struct jc42_data *data = jc42_update_device(dev);
276 int temp, hyst;
277
278 if (IS_ERR(data))
279 return PTR_ERR(data);
280
281 temp = jc42_temp_from_reg(data->temp_crit);
282 hyst = jc42_hysteresis[(data->config & JC42_CFG_HYST_MASK)
283 >> JC42_CFG_HYST_SHIFT];
284 return sprintf(buf, "%d\n", temp - hyst);
285 }
286
287 static ssize_t show_temp_max_hyst(struct device *dev,
288 struct device_attribute *attr, char *buf)
289 {
290 struct jc42_data *data = jc42_update_device(dev);
291 int temp, hyst;
292
293 if (IS_ERR(data))
294 return PTR_ERR(data);
295
296 temp = jc42_temp_from_reg(data->temp_max);
297 hyst = jc42_hysteresis[(data->config & JC42_CFG_HYST_MASK)
298 >> JC42_CFG_HYST_SHIFT];
299 return sprintf(buf, "%d\n", temp - hyst);
300 }
301
302 /* write routines */
303 #define set(value, reg) \
304 static ssize_t set_##value(struct device *dev, \
305 struct device_attribute *attr, \
306 const char *buf, size_t count) \
307 { \
308 struct jc42_data *data = dev_get_drvdata(dev); \
309 int err, ret = count; \
310 long val; \
311 if (kstrtol(buf, 10, &val) < 0) \
312 return -EINVAL; \
313 mutex_lock(&data->update_lock); \
314 data->value = jc42_temp_to_reg(val, data->extended); \
315 err = i2c_smbus_write_word_swapped(data->client, reg, data->value); \
316 if (err < 0) \
317 ret = err; \
318 mutex_unlock(&data->update_lock); \
319 return ret; \
320 }
321
322 set(temp_min, JC42_REG_TEMP_LOWER);
323 set(temp_max, JC42_REG_TEMP_UPPER);
324 set(temp_crit, JC42_REG_TEMP_CRITICAL);
325
326 /*
327 * JC42.4 compliant chips only support four hysteresis values.
328 * Pick best choice and go from there.
329 */
330 static ssize_t set_temp_crit_hyst(struct device *dev,
331 struct device_attribute *attr,
332 const char *buf, size_t count)
333 {
334 struct jc42_data *data = dev_get_drvdata(dev);
335 unsigned long val;
336 int diff, hyst;
337 int err;
338 int ret = count;
339
340 if (kstrtoul(buf, 10, &val) < 0)
341 return -EINVAL;
342
343 diff = jc42_temp_from_reg(data->temp_crit) - val;
344 hyst = 0;
345 if (diff > 0) {
346 if (diff < 2250)
347 hyst = 1; /* 1.5 degrees C */
348 else if (diff < 4500)
349 hyst = 2; /* 3.0 degrees C */
350 else
351 hyst = 3; /* 6.0 degrees C */
352 }
353
354 mutex_lock(&data->update_lock);
355 data->config = (data->config & ~JC42_CFG_HYST_MASK)
356 | (hyst << JC42_CFG_HYST_SHIFT);
357 err = i2c_smbus_write_word_swapped(data->client, JC42_REG_CONFIG,
358 data->config);
359 if (err < 0)
360 ret = err;
361 mutex_unlock(&data->update_lock);
362 return ret;
363 }
364
365 static ssize_t show_alarm(struct device *dev,
366 struct device_attribute *attr, char *buf)
367 {
368 u16 bit = to_sensor_dev_attr(attr)->index;
369 struct jc42_data *data = jc42_update_device(dev);
370 u16 val;
371
372 if (IS_ERR(data))
373 return PTR_ERR(data);
374
375 val = data->temp_input;
376 if (bit != JC42_ALARM_CRIT_BIT && (data->config & JC42_CFG_CRIT_ONLY))
377 val = 0;
378 return sprintf(buf, "%u\n", (val >> bit) & 1);
379 }
380
381 static DEVICE_ATTR(temp1_input, S_IRUGO,
382 show_temp_input, NULL);
383 static DEVICE_ATTR(temp1_crit, S_IRUGO,
384 show_temp_crit, set_temp_crit);
385 static DEVICE_ATTR(temp1_min, S_IRUGO,
386 show_temp_min, set_temp_min);
387 static DEVICE_ATTR(temp1_max, S_IRUGO,
388 show_temp_max, set_temp_max);
389
390 static DEVICE_ATTR(temp1_crit_hyst, S_IRUGO,
391 show_temp_crit_hyst, set_temp_crit_hyst);
392 static DEVICE_ATTR(temp1_max_hyst, S_IRUGO,
393 show_temp_max_hyst, NULL);
394
395 static SENSOR_DEVICE_ATTR(temp1_crit_alarm, S_IRUGO, show_alarm, NULL,
396 JC42_ALARM_CRIT_BIT);
397 static SENSOR_DEVICE_ATTR(temp1_min_alarm, S_IRUGO, show_alarm, NULL,
398 JC42_ALARM_MIN_BIT);
399 static SENSOR_DEVICE_ATTR(temp1_max_alarm, S_IRUGO, show_alarm, NULL,
400 JC42_ALARM_MAX_BIT);
401
402 static struct attribute *jc42_attributes[] = {
403 &dev_attr_temp1_input.attr,
404 &dev_attr_temp1_crit.attr,
405 &dev_attr_temp1_min.attr,
406 &dev_attr_temp1_max.attr,
407 &dev_attr_temp1_crit_hyst.attr,
408 &dev_attr_temp1_max_hyst.attr,
409 &sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
410 &sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
411 &sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
412 NULL
413 };
414
415 static umode_t jc42_attribute_mode(struct kobject *kobj,
416 struct attribute *attr, int index)
417 {
418 struct device *dev = container_of(kobj, struct device, kobj);
419 struct jc42_data *data = dev_get_drvdata(dev);
420 unsigned int config = data->config;
421 bool readonly;
422
423 if (attr == &dev_attr_temp1_crit.attr)
424 readonly = config & JC42_CFG_TCRIT_LOCK;
425 else if (attr == &dev_attr_temp1_min.attr ||
426 attr == &dev_attr_temp1_max.attr)
427 readonly = config & JC42_CFG_EVENT_LOCK;
428 else if (attr == &dev_attr_temp1_crit_hyst.attr)
429 readonly = config & (JC42_CFG_EVENT_LOCK | JC42_CFG_TCRIT_LOCK);
430 else
431 readonly = true;
432
433 return S_IRUGO | (readonly ? 0 : S_IWUSR);
434 }
435
436 static const struct attribute_group jc42_group = {
437 .attrs = jc42_attributes,
438 .is_visible = jc42_attribute_mode,
439 };
440 __ATTRIBUTE_GROUPS(jc42);
441
442 /* Return 0 if detection is successful, -ENODEV otherwise */
443 static int jc42_detect(struct i2c_client *client, struct i2c_board_info *info)
444 {
445 struct i2c_adapter *adapter = client->adapter;
446 int i, config, cap, manid, devid;
447
448 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA |
449 I2C_FUNC_SMBUS_WORD_DATA))
450 return -ENODEV;
451
452 cap = i2c_smbus_read_word_swapped(client, JC42_REG_CAP);
453 config = i2c_smbus_read_word_swapped(client, JC42_REG_CONFIG);
454 manid = i2c_smbus_read_word_swapped(client, JC42_REG_MANID);
455 devid = i2c_smbus_read_word_swapped(client, JC42_REG_DEVICEID);
456
457 if (cap < 0 || config < 0 || manid < 0 || devid < 0)
458 return -ENODEV;
459
460 if ((cap & 0xff00) || (config & 0xf800))
461 return -ENODEV;
462
463 for (i = 0; i < ARRAY_SIZE(jc42_chips); i++) {
464 struct jc42_chips *chip = &jc42_chips[i];
465 if (manid == chip->manid &&
466 (devid & chip->devid_mask) == chip->devid) {
467 strlcpy(info->type, "jc42", I2C_NAME_SIZE);
468 return 0;
469 }
470 }
471 return -ENODEV;
472 }
473
474 static int jc42_probe(struct i2c_client *client, const struct i2c_device_id *id)
475 {
476 struct device *dev = &client->dev;
477 struct device *hwmon_dev;
478 struct jc42_data *data;
479 int config, cap;
480
481 data = devm_kzalloc(dev, sizeof(struct jc42_data), GFP_KERNEL);
482 if (!data)
483 return -ENOMEM;
484
485 data->client = client;
486 i2c_set_clientdata(client, data);
487 mutex_init(&data->update_lock);
488
489 cap = i2c_smbus_read_word_swapped(client, JC42_REG_CAP);
490 if (cap < 0)
491 return cap;
492
493 data->extended = !!(cap & JC42_CAP_RANGE);
494
495 config = i2c_smbus_read_word_swapped(client, JC42_REG_CONFIG);
496 if (config < 0)
497 return config;
498
499 data->orig_config = config;
500 if (config & JC42_CFG_SHUTDOWN) {
501 config &= ~JC42_CFG_SHUTDOWN;
502 i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, config);
503 }
504 data->config = config;
505
506 hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
507 data,
508 jc42_groups);
509 return PTR_ERR_OR_ZERO(hwmon_dev);
510 }
511
512 static int jc42_remove(struct i2c_client *client)
513 {
514 struct jc42_data *data = i2c_get_clientdata(client);
515
516 /* Restore original configuration except hysteresis */
517 if ((data->config & ~JC42_CFG_HYST_MASK) !=
518 (data->orig_config & ~JC42_CFG_HYST_MASK)) {
519 int config;
520
521 config = (data->orig_config & ~JC42_CFG_HYST_MASK)
522 | (data->config & JC42_CFG_HYST_MASK);
523 i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, config);
524 }
525 return 0;
526 }
527
528 #ifdef CONFIG_PM
529
530 static int jc42_suspend(struct device *dev)
531 {
532 struct jc42_data *data = dev_get_drvdata(dev);
533
534 data->config |= JC42_CFG_SHUTDOWN;
535 i2c_smbus_write_word_swapped(data->client, JC42_REG_CONFIG,
536 data->config);
537 return 0;
538 }
539
540 static int jc42_resume(struct device *dev)
541 {
542 struct jc42_data *data = dev_get_drvdata(dev);
543
544 data->config &= ~JC42_CFG_SHUTDOWN;
545 i2c_smbus_write_word_swapped(data->client, JC42_REG_CONFIG,
546 data->config);
547 return 0;
548 }
549
550 static const struct dev_pm_ops jc42_dev_pm_ops = {
551 .suspend = jc42_suspend,
552 .resume = jc42_resume,
553 };
554
555 #define JC42_DEV_PM_OPS (&jc42_dev_pm_ops)
556 #else
557 #define JC42_DEV_PM_OPS NULL
558 #endif /* CONFIG_PM */
559
560 static const struct i2c_device_id jc42_id[] = {
561 { "jc42", 0 },
562 { }
563 };
564 MODULE_DEVICE_TABLE(i2c, jc42_id);
565
566 static struct i2c_driver jc42_driver = {
567 .class = I2C_CLASS_SPD,
568 .driver = {
569 .name = "jc42",
570 .pm = JC42_DEV_PM_OPS,
571 },
572 .probe = jc42_probe,
573 .remove = jc42_remove,
574 .id_table = jc42_id,
575 .detect = jc42_detect,
576 .address_list = normal_i2c,
577 };
578
579 module_i2c_driver(jc42_driver);
580
581 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
582 MODULE_DESCRIPTION("JC42 driver");
583 MODULE_LICENSE("GPL");
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