2 * linux/drivers/ide/ide-dma.c Version 4.10 June 9, 2000
4 * Copyright (c) 1999-2000 Andre Hedrick <andre@linux-ide.org>
5 * May be copied or modified under the terms of the GNU General Public License
9 * Special Thanks to Mark for his Six years of work.
11 * Copyright (c) 1995-1998 Mark Lord
12 * May be copied or modified under the terms of the GNU General Public License
16 * This module provides support for the bus-master IDE DMA functions
17 * of various PCI chipsets, including the Intel PIIX (i82371FB for
18 * the 430 FX chipset), the PIIX3 (i82371SB for the 430 HX/VX and
19 * 440 chipsets), and the PIIX4 (i82371AB for the 430 TX chipset)
20 * ("PIIX" stands for "PCI ISA IDE Xcellerator").
22 * Pretty much the same code works for other IDE PCI bus-mastering chipsets.
24 * DMA is supported for all IDE devices (disk drives, cdroms, tapes, floppies).
26 * By default, DMA support is prepared for use, but is currently enabled only
27 * for drives which already have DMA enabled (UltraDMA or mode 2 multi/single),
28 * or which are recognized as "good" (see table below). Drives with only mode0
29 * or mode1 (multi/single) DMA should also work with this chipset/driver
30 * (eg. MC2112A) but are not enabled by default.
32 * Use "hdparm -i" to view modes supported by a given drive.
34 * The hdparm-3.5 (or later) utility can be used for manually enabling/disabling
35 * DMA support, but must be (re-)compiled against this kernel version or later.
37 * To enable DMA, use "hdparm -d1 /dev/hd?" on a per-drive basis after booting.
38 * If problems arise, ide.c will disable DMA operation after a few retries.
39 * This error recovery mechanism works and has been extremely well exercised.
41 * IDE drives, depending on their vintage, may support several different modes
42 * of DMA operation. The boot-time modes are indicated with a "*" in
43 * the "hdparm -i" listing, and can be changed with *knowledgeable* use of
44 * the "hdparm -X" feature. There is seldom a need to do this, as drives
45 * normally power-up with their "best" PIO/DMA modes enabled.
47 * Testing has been done with a rather extensive number of drives,
48 * with Quantum & Western Digital models generally outperforming the pack,
49 * and Fujitsu & Conner (and some Seagate which are really Conner) drives
50 * showing more lackluster throughput.
52 * Keep an eye on /var/adm/messages for "DMA disabled" messages.
54 * Some people have reported trouble with Intel Zappa motherboards.
55 * This can be fixed by upgrading the AMI BIOS to version 1.00.04.BS0,
56 * available from ftp://ftp.intel.com/pub/bios/10004bs0.exe
57 * (thanks to Glen Morrell <glen@spin.Stanford.edu> for researching this).
59 * Thanks to "Christopher J. Reimer" <reimer@doe.carleton.ca> for
60 * fixing the problem with the BIOS on some Acer motherboards.
62 * Thanks to "Benoit Poulot-Cazajous" <poulot@chorus.fr> for testing
63 * "TX" chipset compatibility and for providing patches for the "TX" chipset.
65 * Thanks to Christian Brunner <chb@muc.de> for taking a good first crack
66 * at generic DMA -- his patches were referred to when preparing this code.
68 * Most importantly, thanks to Robert Bringman <rob@mars.trion.com>
69 * for supplying a Promise UDMA board & WD UDMA drive for this work!
71 * And, yes, Intel Zappa boards really *do* use both PIIX IDE ports.
73 * ATA-66/100 and recovery functions, I forgot the rest......
77 #include <linux/module.h>
78 #include <linux/types.h>
79 #include <linux/kernel.h>
80 #include <linux/timer.h>
82 #include <linux/interrupt.h>
83 #include <linux/pci.h>
84 #include <linux/init.h>
85 #include <linux/ide.h>
86 #include <linux/delay.h>
87 #include <linux/scatterlist.h>
92 static const struct drive_list_entry drive_whitelist
[] = {
94 { "Micropolis 2112A" , NULL
},
95 { "CONNER CTMA 4000" , NULL
},
96 { "CONNER CTT8000-A" , NULL
},
97 { "ST34342A" , NULL
},
101 static const struct drive_list_entry drive_blacklist
[] = {
103 { "WDC AC11000H" , NULL
},
104 { "WDC AC22100H" , NULL
},
105 { "WDC AC32500H" , NULL
},
106 { "WDC AC33100H" , NULL
},
107 { "WDC AC31600H" , NULL
},
108 { "WDC AC32100H" , "24.09P07" },
109 { "WDC AC23200L" , "21.10N21" },
110 { "Compaq CRD-8241B" , NULL
},
111 { "CRD-8400B" , NULL
},
112 { "CRD-8480B", NULL
},
113 { "CRD-8482B", NULL
},
115 { "SanDisk SDP3B" , NULL
},
116 { "SanDisk SDP3B-64" , NULL
},
117 { "SANYO CD-ROM CRD" , NULL
},
118 { "HITACHI CDR-8" , NULL
},
119 { "HITACHI CDR-8335" , NULL
},
120 { "HITACHI CDR-8435" , NULL
},
121 { "Toshiba CD-ROM XM-6202B" , NULL
},
122 { "TOSHIBA CD-ROM XM-1702BC", NULL
},
123 { "CD-532E-A" , NULL
},
124 { "E-IDE CD-ROM CR-840", NULL
},
125 { "CD-ROM Drive/F5A", NULL
},
126 { "WPI CDD-820", NULL
},
127 { "SAMSUNG CD-ROM SC-148C", NULL
},
128 { "SAMSUNG CD-ROM SC", NULL
},
129 { "ATAPI CD-ROM DRIVE 40X MAXIMUM", NULL
},
130 { "_NEC DV5800A", NULL
},
131 { "SAMSUNG CD-ROM SN-124", "N001" },
132 { "Seagate STT20000A", NULL
},
133 { "CD-ROM CDR_U200", "1.09" },
139 * ide_dma_intr - IDE DMA interrupt handler
140 * @drive: the drive the interrupt is for
142 * Handle an interrupt completing a read/write DMA transfer on an
146 ide_startstop_t
ide_dma_intr (ide_drive_t
*drive
)
148 u8 stat
= 0, dma_stat
= 0;
150 dma_stat
= HWIF(drive
)->ide_dma_end(drive
);
151 stat
= HWIF(drive
)->INB(IDE_STATUS_REG
); /* get drive status */
152 if (OK_STAT(stat
,DRIVE_READY
,drive
->bad_wstat
|DRQ_STAT
)) {
154 struct request
*rq
= HWGROUP(drive
)->rq
;
156 task_end_request(drive
, rq
, stat
);
159 printk(KERN_ERR
"%s: dma_intr: bad DMA status (dma_stat=%x)\n",
160 drive
->name
, dma_stat
);
162 return ide_error(drive
, "dma_intr", stat
);
165 EXPORT_SYMBOL_GPL(ide_dma_intr
);
167 static int ide_dma_good_drive(ide_drive_t
*drive
)
169 return ide_in_drive_list(drive
->id
, drive_whitelist
);
172 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
174 * ide_build_sglist - map IDE scatter gather for DMA I/O
175 * @drive: the drive to build the DMA table for
176 * @rq: the request holding the sg list
178 * Perform the PCI mapping magic necessary to access the source or
179 * target buffers of a request via PCI DMA. The lower layers of the
180 * kernel provide the necessary cache management so that we can
181 * operate in a portable fashion
184 int ide_build_sglist(ide_drive_t
*drive
, struct request
*rq
)
186 ide_hwif_t
*hwif
= HWIF(drive
);
187 struct scatterlist
*sg
= hwif
->sg_table
;
189 ide_map_sg(drive
, rq
);
191 if (rq_data_dir(rq
) == READ
)
192 hwif
->sg_dma_direction
= PCI_DMA_FROMDEVICE
;
194 hwif
->sg_dma_direction
= PCI_DMA_TODEVICE
;
196 return pci_map_sg(hwif
->pci_dev
, sg
, hwif
->sg_nents
, hwif
->sg_dma_direction
);
199 EXPORT_SYMBOL_GPL(ide_build_sglist
);
202 * ide_build_dmatable - build IDE DMA table
204 * ide_build_dmatable() prepares a dma request. We map the command
205 * to get the pci bus addresses of the buffers and then build up
206 * the PRD table that the IDE layer wants to be fed. The code
207 * knows about the 64K wrap bug in the CS5530.
209 * Returns the number of built PRD entries if all went okay,
210 * returns 0 otherwise.
212 * May also be invoked from trm290.c
215 int ide_build_dmatable (ide_drive_t
*drive
, struct request
*rq
)
217 ide_hwif_t
*hwif
= HWIF(drive
);
218 unsigned int *table
= hwif
->dmatable_cpu
;
219 unsigned int is_trm290
= (hwif
->chipset
== ide_trm290
) ? 1 : 0;
220 unsigned int count
= 0;
222 struct scatterlist
*sg
;
224 hwif
->sg_nents
= i
= ide_build_sglist(drive
, rq
);
234 cur_addr
= sg_dma_address(sg
);
235 cur_len
= sg_dma_len(sg
);
238 * Fill in the dma table, without crossing any 64kB boundaries.
239 * Most hardware requires 16-bit alignment of all blocks,
240 * but the trm290 requires 32-bit alignment.
244 if (count
++ >= PRD_ENTRIES
) {
245 printk(KERN_ERR
"%s: DMA table too small\n", drive
->name
);
246 goto use_pio_instead
;
248 u32 xcount
, bcount
= 0x10000 - (cur_addr
& 0xffff);
250 if (bcount
> cur_len
)
252 *table
++ = cpu_to_le32(cur_addr
);
253 xcount
= bcount
& 0xffff;
255 xcount
= ((xcount
>> 2) - 1) << 16;
256 if (xcount
== 0x0000) {
258 * Most chipsets correctly interpret a length of 0x0000 as 64KB,
259 * but at least one (e.g. CS5530) misinterprets it as zero (!).
260 * So here we break the 64KB entry into two 32KB entries instead.
262 if (count
++ >= PRD_ENTRIES
) {
263 printk(KERN_ERR
"%s: DMA table too small\n", drive
->name
);
264 goto use_pio_instead
;
266 *table
++ = cpu_to_le32(0x8000);
267 *table
++ = cpu_to_le32(cur_addr
+ 0x8000);
270 *table
++ = cpu_to_le32(xcount
);
282 *--table
|= cpu_to_le32(0x80000000);
286 printk(KERN_ERR
"%s: empty DMA table?\n", drive
->name
);
289 ide_destroy_dmatable(drive
);
291 return 0; /* revert to PIO for this request */
294 EXPORT_SYMBOL_GPL(ide_build_dmatable
);
297 * ide_destroy_dmatable - clean up DMA mapping
298 * @drive: The drive to unmap
300 * Teardown mappings after DMA has completed. This must be called
301 * after the completion of each use of ide_build_dmatable and before
302 * the next use of ide_build_dmatable. Failure to do so will cause
303 * an oops as only one mapping can be live for each target at a given
307 void ide_destroy_dmatable (ide_drive_t
*drive
)
309 struct pci_dev
*dev
= HWIF(drive
)->pci_dev
;
310 struct scatterlist
*sg
= HWIF(drive
)->sg_table
;
311 int nents
= HWIF(drive
)->sg_nents
;
313 pci_unmap_sg(dev
, sg
, nents
, HWIF(drive
)->sg_dma_direction
);
316 EXPORT_SYMBOL_GPL(ide_destroy_dmatable
);
319 * config_drive_for_dma - attempt to activate IDE DMA
320 * @drive: the drive to place in DMA mode
322 * If the drive supports at least mode 2 DMA or UDMA of any kind
323 * then attempt to place it into DMA mode. Drives that are known to
324 * support DMA but predate the DMA properties or that are known
325 * to have DMA handling bugs are also set up appropriately based
326 * on the good/bad drive lists.
329 static int config_drive_for_dma (ide_drive_t
*drive
)
331 ide_hwif_t
*hwif
= drive
->hwif
;
332 struct hd_driveid
*id
= drive
->id
;
334 if (drive
->media
!= ide_disk
) {
335 if (hwif
->host_flags
& IDE_HFLAG_NO_ATAPI_DMA
)
340 * Enable DMA on any drive that has
341 * UltraDMA (mode 0/1/2/3/4/5/6) enabled
343 if ((id
->field_valid
& 4) && ((id
->dma_ultra
>> 8) & 0x7f))
347 * Enable DMA on any drive that has mode2 DMA
348 * (multi or single) enabled
350 if (id
->field_valid
& 2) /* regular DMA */
351 if ((id
->dma_mword
& 0x404) == 0x404 ||
352 (id
->dma_1word
& 0x404) == 0x404)
355 /* Consult the list of known "good" drives */
356 if (ide_dma_good_drive(drive
))
363 * dma_timer_expiry - handle a DMA timeout
364 * @drive: Drive that timed out
366 * An IDE DMA transfer timed out. In the event of an error we ask
367 * the driver to resolve the problem, if a DMA transfer is still
368 * in progress we continue to wait (arguably we need to add a
369 * secondary 'I don't care what the drive thinks' timeout here)
370 * Finally if we have an interrupt we let it complete the I/O.
371 * But only one time - we clear expiry and if it's still not
372 * completed after WAIT_CMD, we error and retry in PIO.
373 * This can occur if an interrupt is lost or due to hang or bugs.
376 static int dma_timer_expiry (ide_drive_t
*drive
)
378 ide_hwif_t
*hwif
= HWIF(drive
);
379 u8 dma_stat
= hwif
->INB(hwif
->dma_status
);
381 printk(KERN_WARNING
"%s: dma_timer_expiry: dma status == 0x%02x\n",
382 drive
->name
, dma_stat
);
384 if ((dma_stat
& 0x18) == 0x18) /* BUSY Stupid Early Timer !! */
387 HWGROUP(drive
)->expiry
= NULL
; /* one free ride for now */
389 /* 1 dmaing, 2 error, 4 intr */
390 if (dma_stat
& 2) /* ERROR */
393 if (dma_stat
& 1) /* DMAing */
396 if (dma_stat
& 4) /* Got an Interrupt */
399 return 0; /* Status is unknown -- reset the bus */
403 * ide_dma_host_set - Enable/disable DMA on a host
404 * @drive: drive to control
406 * Enable/disable DMA on an IDE controller following generic
407 * bus-mastering IDE controller behaviour.
410 void ide_dma_host_set(ide_drive_t
*drive
, int on
)
412 ide_hwif_t
*hwif
= HWIF(drive
);
413 u8 unit
= (drive
->select
.b
.unit
& 0x01);
414 u8 dma_stat
= hwif
->INB(hwif
->dma_status
);
417 dma_stat
|= (1 << (5 + unit
));
419 dma_stat
&= ~(1 << (5 + unit
));
421 hwif
->OUTB(dma_stat
, hwif
->dma_status
);
424 EXPORT_SYMBOL_GPL(ide_dma_host_set
);
425 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
428 * ide_dma_off_quietly - Generic DMA kill
429 * @drive: drive to control
431 * Turn off the current DMA on this IDE controller.
434 void ide_dma_off_quietly(ide_drive_t
*drive
)
436 drive
->using_dma
= 0;
437 ide_toggle_bounce(drive
, 0);
439 drive
->hwif
->dma_host_set(drive
, 0);
442 EXPORT_SYMBOL(ide_dma_off_quietly
);
445 * ide_dma_off - disable DMA on a device
446 * @drive: drive to disable DMA on
448 * Disable IDE DMA for a device on this IDE controller.
449 * Inform the user that DMA has been disabled.
452 void ide_dma_off(ide_drive_t
*drive
)
454 printk(KERN_INFO
"%s: DMA disabled\n", drive
->name
);
455 ide_dma_off_quietly(drive
);
458 EXPORT_SYMBOL(ide_dma_off
);
461 * ide_dma_on - Enable DMA on a device
462 * @drive: drive to enable DMA on
464 * Enable IDE DMA for a device on this IDE controller.
467 void ide_dma_on(ide_drive_t
*drive
)
469 drive
->using_dma
= 1;
470 ide_toggle_bounce(drive
, 1);
472 drive
->hwif
->dma_host_set(drive
, 1);
475 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
477 * ide_dma_setup - begin a DMA phase
478 * @drive: target device
480 * Build an IDE DMA PRD (IDE speak for scatter gather table)
481 * and then set up the DMA transfer registers for a device
482 * that follows generic IDE PCI DMA behaviour. Controllers can
483 * override this function if they need to
485 * Returns 0 on success. If a PIO fallback is required then 1
489 int ide_dma_setup(ide_drive_t
*drive
)
491 ide_hwif_t
*hwif
= drive
->hwif
;
492 struct request
*rq
= HWGROUP(drive
)->rq
;
493 unsigned int reading
;
501 /* fall back to pio! */
502 if (!ide_build_dmatable(drive
, rq
)) {
503 ide_map_sg(drive
, rq
);
509 writel(hwif
->dmatable_dma
, (void __iomem
*)hwif
->dma_prdtable
);
511 outl(hwif
->dmatable_dma
, hwif
->dma_prdtable
);
514 hwif
->OUTB(reading
, hwif
->dma_command
);
516 /* read dma_status for INTR & ERROR flags */
517 dma_stat
= hwif
->INB(hwif
->dma_status
);
519 /* clear INTR & ERROR flags */
520 hwif
->OUTB(dma_stat
|6, hwif
->dma_status
);
521 drive
->waiting_for_dma
= 1;
525 EXPORT_SYMBOL_GPL(ide_dma_setup
);
527 static void ide_dma_exec_cmd(ide_drive_t
*drive
, u8 command
)
529 /* issue cmd to drive */
530 ide_execute_command(drive
, command
, &ide_dma_intr
, 2*WAIT_CMD
, dma_timer_expiry
);
533 void ide_dma_start(ide_drive_t
*drive
)
535 ide_hwif_t
*hwif
= HWIF(drive
);
536 u8 dma_cmd
= hwif
->INB(hwif
->dma_command
);
538 /* Note that this is done *after* the cmd has
539 * been issued to the drive, as per the BM-IDE spec.
540 * The Promise Ultra33 doesn't work correctly when
541 * we do this part before issuing the drive cmd.
544 hwif
->OUTB(dma_cmd
|1, hwif
->dma_command
);
549 EXPORT_SYMBOL_GPL(ide_dma_start
);
551 /* returns 1 on error, 0 otherwise */
552 int __ide_dma_end (ide_drive_t
*drive
)
554 ide_hwif_t
*hwif
= HWIF(drive
);
555 u8 dma_stat
= 0, dma_cmd
= 0;
557 drive
->waiting_for_dma
= 0;
558 /* get dma_command mode */
559 dma_cmd
= hwif
->INB(hwif
->dma_command
);
561 hwif
->OUTB(dma_cmd
&~1, hwif
->dma_command
);
563 dma_stat
= hwif
->INB(hwif
->dma_status
);
564 /* clear the INTR & ERROR bits */
565 hwif
->OUTB(dma_stat
|6, hwif
->dma_status
);
566 /* purge DMA mappings */
567 ide_destroy_dmatable(drive
);
568 /* verify good DMA status */
571 return (dma_stat
& 7) != 4 ? (0x10 | dma_stat
) : 0;
574 EXPORT_SYMBOL(__ide_dma_end
);
576 /* returns 1 if dma irq issued, 0 otherwise */
577 static int __ide_dma_test_irq(ide_drive_t
*drive
)
579 ide_hwif_t
*hwif
= HWIF(drive
);
580 u8 dma_stat
= hwif
->INB(hwif
->dma_status
);
582 /* return 1 if INTR asserted */
583 if ((dma_stat
& 4) == 4)
585 if (!drive
->waiting_for_dma
)
586 printk(KERN_WARNING
"%s: (%s) called while not waiting\n",
587 drive
->name
, __FUNCTION__
);
591 static inline int config_drive_for_dma(ide_drive_t
*drive
) { return 0; }
592 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
594 int __ide_dma_bad_drive (ide_drive_t
*drive
)
596 struct hd_driveid
*id
= drive
->id
;
598 int blacklist
= ide_in_drive_list(id
, drive_blacklist
);
600 printk(KERN_WARNING
"%s: Disabling (U)DMA for %s (blacklisted)\n",
601 drive
->name
, id
->model
);
607 EXPORT_SYMBOL(__ide_dma_bad_drive
);
609 static const u8 xfer_mode_bases
[] = {
615 static unsigned int ide_get_mode_mask(ide_drive_t
*drive
, u8 base
, u8 req_mode
)
617 struct hd_driveid
*id
= drive
->id
;
618 ide_hwif_t
*hwif
= drive
->hwif
;
619 unsigned int mask
= 0;
623 if ((id
->field_valid
& 4) == 0)
626 if (hwif
->udma_filter
)
627 mask
= hwif
->udma_filter(drive
);
629 mask
= hwif
->ultra_mask
;
630 mask
&= id
->dma_ultra
;
633 * avoid false cable warning from eighty_ninty_three()
635 if (req_mode
> XFER_UDMA_2
) {
636 if ((mask
& 0x78) && (eighty_ninty_three(drive
) == 0))
641 if ((id
->field_valid
& 2) == 0)
643 if (hwif
->mdma_filter
)
644 mask
= hwif
->mdma_filter(drive
);
646 mask
= hwif
->mwdma_mask
;
647 mask
&= id
->dma_mword
;
650 if (id
->field_valid
& 2) {
651 mask
= id
->dma_1word
& hwif
->swdma_mask
;
652 } else if (id
->tDMA
) {
654 * ide_fix_driveid() doesn't convert ->tDMA to the
655 * CPU endianness so we need to do it here
657 u8 mode
= le16_to_cpu(id
->tDMA
);
660 * if the mode is valid convert it to the mask
661 * (the maximum allowed mode is XFER_SW_DMA_2)
664 mask
= ((2 << mode
) - 1) & hwif
->swdma_mask
;
676 * ide_find_dma_mode - compute DMA speed
678 * @req_mode: requested mode
680 * Checks the drive/host capabilities and finds the speed to use for
681 * the DMA transfer. The speed is then limited by the requested mode.
683 * Returns 0 if the drive/host combination is incapable of DMA transfers
684 * or if the requested mode is not a DMA mode.
687 u8
ide_find_dma_mode(ide_drive_t
*drive
, u8 req_mode
)
689 ide_hwif_t
*hwif
= drive
->hwif
;
694 if (drive
->media
!= ide_disk
) {
695 if (hwif
->host_flags
& IDE_HFLAG_NO_ATAPI_DMA
)
699 for (i
= 0; i
< ARRAY_SIZE(xfer_mode_bases
); i
++) {
700 if (req_mode
< xfer_mode_bases
[i
])
702 mask
= ide_get_mode_mask(drive
, xfer_mode_bases
[i
], req_mode
);
705 mode
= xfer_mode_bases
[i
] + x
;
710 if (hwif
->chipset
== ide_acorn
&& mode
== 0) {
714 if (ide_dma_good_drive(drive
) && drive
->id
->eide_dma_time
< 150)
715 mode
= XFER_MW_DMA_1
;
718 mode
= min(mode
, req_mode
);
720 printk(KERN_INFO
"%s: %s mode selected\n", drive
->name
,
721 mode
? ide_xfer_verbose(mode
) : "no DMA");
726 EXPORT_SYMBOL_GPL(ide_find_dma_mode
);
728 static int ide_tune_dma(ide_drive_t
*drive
)
730 ide_hwif_t
*hwif
= drive
->hwif
;
733 if (noautodma
|| drive
->nodma
|| (drive
->id
->capability
& 1) == 0)
736 /* consult the list of known "bad" drives */
737 if (__ide_dma_bad_drive(drive
))
740 if (ide_id_dma_bug(drive
))
743 if (hwif
->host_flags
& IDE_HFLAG_TRUST_BIOS_FOR_DMA
)
744 return config_drive_for_dma(drive
);
746 speed
= ide_max_dma_mode(drive
);
749 /* is this really correct/needed? */
750 if ((hwif
->host_flags
& IDE_HFLAG_CY82C693
) &&
751 ide_dma_good_drive(drive
))
757 if (hwif
->host_flags
& IDE_HFLAG_NO_SET_MODE
)
760 if (ide_set_dma_mode(drive
, speed
))
766 static int ide_dma_check(ide_drive_t
*drive
)
768 ide_hwif_t
*hwif
= drive
->hwif
;
769 int vdma
= (hwif
->host_flags
& IDE_HFLAG_VDMA
)? 1 : 0;
771 if (!vdma
&& ide_tune_dma(drive
))
774 /* TODO: always do PIO fallback */
775 if (hwif
->host_flags
& IDE_HFLAG_TRUST_BIOS_FOR_DMA
)
778 ide_set_max_pio(drive
);
780 return vdma
? 0 : -1;
783 int ide_id_dma_bug(ide_drive_t
*drive
)
785 struct hd_driveid
*id
= drive
->id
;
787 if (id
->field_valid
& 4) {
788 if ((id
->dma_ultra
>> 8) && (id
->dma_mword
>> 8))
790 } else if (id
->field_valid
& 2) {
791 if ((id
->dma_mword
>> 8) && (id
->dma_1word
>> 8))
796 printk(KERN_ERR
"%s: bad DMA info in identify block\n", drive
->name
);
800 int ide_set_dma(ide_drive_t
*drive
)
805 * Force DMAing for the beginning of the check.
806 * Some chipsets appear to do interesting
807 * things, if not checked and cleared.
810 ide_dma_off_quietly(drive
);
812 rc
= ide_dma_check(drive
);
821 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
822 void ide_dma_lost_irq (ide_drive_t
*drive
)
824 printk("%s: DMA interrupt recovery\n", drive
->name
);
827 EXPORT_SYMBOL(ide_dma_lost_irq
);
829 void ide_dma_timeout (ide_drive_t
*drive
)
831 ide_hwif_t
*hwif
= HWIF(drive
);
833 printk(KERN_ERR
"%s: timeout waiting for DMA\n", drive
->name
);
835 if (hwif
->ide_dma_test_irq(drive
))
838 hwif
->ide_dma_end(drive
);
841 EXPORT_SYMBOL(ide_dma_timeout
);
843 static void ide_release_dma_engine(ide_hwif_t
*hwif
)
845 if (hwif
->dmatable_cpu
) {
846 pci_free_consistent(hwif
->pci_dev
,
847 PRD_ENTRIES
* PRD_BYTES
,
850 hwif
->dmatable_cpu
= NULL
;
854 static int ide_release_iomio_dma(ide_hwif_t
*hwif
)
856 release_region(hwif
->dma_base
, 8);
857 if (hwif
->extra_ports
)
858 release_region(hwif
->extra_base
, hwif
->extra_ports
);
863 * Needed for allowing full modular support of ide-driver
865 int ide_release_dma(ide_hwif_t
*hwif
)
867 ide_release_dma_engine(hwif
);
872 return ide_release_iomio_dma(hwif
);
875 static int ide_allocate_dma_engine(ide_hwif_t
*hwif
)
877 hwif
->dmatable_cpu
= pci_alloc_consistent(hwif
->pci_dev
,
878 PRD_ENTRIES
* PRD_BYTES
,
879 &hwif
->dmatable_dma
);
881 if (hwif
->dmatable_cpu
)
884 printk(KERN_ERR
"%s: -- Error, unable to allocate DMA table.\n",
890 static int ide_mapped_mmio_dma(ide_hwif_t
*hwif
, unsigned long base
)
892 printk(KERN_INFO
" %s: MMIO-DMA ", hwif
->name
);
897 static int ide_iomio_dma(ide_hwif_t
*hwif
, unsigned long base
)
899 printk(KERN_INFO
" %s: BM-DMA at 0x%04lx-0x%04lx",
900 hwif
->name
, base
, base
+ 7);
902 if (!request_region(base
, 8, hwif
->name
)) {
903 printk(" -- Error, ports in use.\n");
907 if (hwif
->cds
->extra
) {
908 hwif
->extra_base
= base
+ (hwif
->channel
? 8 : 16);
910 if (!hwif
->mate
|| !hwif
->mate
->extra_ports
) {
911 if (!request_region(hwif
->extra_base
,
912 hwif
->cds
->extra
, hwif
->cds
->name
)) {
913 printk(" -- Error, extra ports in use.\n");
914 release_region(base
, 8);
917 hwif
->extra_ports
= hwif
->cds
->extra
;
924 static int ide_dma_iobase(ide_hwif_t
*hwif
, unsigned long base
)
927 return ide_mapped_mmio_dma(hwif
, base
);
929 return ide_iomio_dma(hwif
, base
);
932 void ide_setup_dma(ide_hwif_t
*hwif
, unsigned long base
)
936 if (ide_dma_iobase(hwif
, base
))
939 if (ide_allocate_dma_engine(hwif
)) {
940 ide_release_dma(hwif
);
944 hwif
->dma_base
= base
;
946 if (!hwif
->dma_command
)
947 hwif
->dma_command
= hwif
->dma_base
+ 0;
948 if (!hwif
->dma_vendor1
)
949 hwif
->dma_vendor1
= hwif
->dma_base
+ 1;
950 if (!hwif
->dma_status
)
951 hwif
->dma_status
= hwif
->dma_base
+ 2;
952 if (!hwif
->dma_vendor3
)
953 hwif
->dma_vendor3
= hwif
->dma_base
+ 3;
954 if (!hwif
->dma_prdtable
)
955 hwif
->dma_prdtable
= hwif
->dma_base
+ 4;
957 if (!hwif
->dma_host_set
)
958 hwif
->dma_host_set
= &ide_dma_host_set
;
959 if (!hwif
->dma_setup
)
960 hwif
->dma_setup
= &ide_dma_setup
;
961 if (!hwif
->dma_exec_cmd
)
962 hwif
->dma_exec_cmd
= &ide_dma_exec_cmd
;
963 if (!hwif
->dma_start
)
964 hwif
->dma_start
= &ide_dma_start
;
965 if (!hwif
->ide_dma_end
)
966 hwif
->ide_dma_end
= &__ide_dma_end
;
967 if (!hwif
->ide_dma_test_irq
)
968 hwif
->ide_dma_test_irq
= &__ide_dma_test_irq
;
969 if (!hwif
->dma_timeout
)
970 hwif
->dma_timeout
= &ide_dma_timeout
;
971 if (!hwif
->dma_lost_irq
)
972 hwif
->dma_lost_irq
= &ide_dma_lost_irq
;
974 dma_stat
= hwif
->INB(hwif
->dma_status
);
975 printk(KERN_CONT
", BIOS settings: %s:%s, %s:%s\n",
976 hwif
->drives
[0].name
, (dma_stat
& 0x20) ? "DMA" : "PIO",
977 hwif
->drives
[1].name
, (dma_stat
& 0x40) ? "DMA" : "PIO");
980 EXPORT_SYMBOL_GPL(ide_setup_dma
);
981 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */