2 * linux/drivers/ide/legacy/qd65xx.c Version 0.07 Sep 30, 2001
4 * Copyright (C) 1996-2001 Linus Torvalds & author (see below)
8 * Version 0.03 Cleaned auto-tune, added probe
9 * Version 0.04 Added second channel tuning
10 * Version 0.05 Enhanced tuning ; added qd6500 support
11 * Version 0.06 Added dos driver's list
12 * Version 0.07 Second channel bug fix
14 * QDI QD6500/QD6580 EIDE controller fast support
16 * Please set local bus speed using kernel parameter idebus
17 * for example, "idebus=33" stands for 33Mhz VLbus
18 * To activate controller support, use "ide0=qd65xx"
19 * To enable tuning, use "hda=autotune hdb=autotune"
20 * To enable 2nd channel tuning (qd6580 only), use "hdc=autotune hdd=autotune"
24 * Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
25 * Samuel Thibault <samuel.thibault@fnac.net>
28 #include <linux/module.h>
29 #include <linux/types.h>
30 #include <linux/kernel.h>
31 #include <linux/delay.h>
32 #include <linux/timer.h>
34 #include <linux/ioport.h>
35 #include <linux/blkdev.h>
36 #include <linux/hdreg.h>
37 #include <linux/ide.h>
38 #include <linux/init.h>
39 #include <asm/system.h>
45 * I/O ports are 0x30-0x31 (and 0x32-0x33 for qd6580)
46 * or 0xb0-0xb1 (and 0xb2-0xb3 for qd6580)
47 * -- qd6500 is a single IDE interface
48 * -- qd6580 is a dual IDE interface
50 * More research on qd6580 being done by willmore@cig.mot.com (David)
51 * More Information given by Petr Soucek (petr@ryston.cz)
52 * http://www.ryston.cz/petr/vlb
59 * base+0x01: Config (R/O)
61 * bit 0: ide baseport: 1 = 0x1f0 ; 0 = 0x170 (only useful for qd6500)
62 * bit 1: qd65xx baseport: 1 = 0xb0 ; 0 = 0x30
63 * bit 2: ID3: bus speed: 1 = <=33MHz ; 0 = >33MHz
64 * bit 3: qd6500: 1 = disabled, 0 = enabled
68 * qd6580: either 1010 or 0101
71 * base+0x02: Timer2 (qd6580 only)
74 * base+0x03: Control (qd6580 only)
76 * bits 0-3 must always be set 1
77 * bit 4 must be set 1, but is set 0 by dos driver while measuring vlb clock
78 * bit 0 : 1 = Only primary port enabled : channel 0 for hda, channel 1 for hdb
79 * 0 = Primary and Secondary ports enabled : channel 0 for hda & hdb
80 * channel 1 for hdc & hdd
81 * bit 1 : 1 = only disks on primary port
82 * 0 = disks & ATAPI devices on primary port
84 * bit 5 : status, but of what ?
85 * bit 6 : always set 1 by dos driver
86 * bit 7 : set 1 for non-ATAPI devices on primary port
87 * (maybe read-ahead and post-write buffer ?)
90 static int timings
[4]={-1,-1,-1,-1}; /* stores current timing for each timer */
92 static void qd_write_reg (u8 content
, unsigned long reg
)
96 spin_lock_irqsave(&ide_lock
, flags
);
98 spin_unlock_irqrestore(&ide_lock
, flags
);
101 static u8 __init
qd_read_reg (unsigned long reg
)
106 spin_lock_irqsave(&ide_lock
, flags
);
108 spin_unlock_irqrestore(&ide_lock
, flags
);
115 * This routine is invoked from ide.c to prepare for access to a given drive.
118 static void qd_select (ide_drive_t
*drive
)
120 u8 index
= (( (QD_TIMREG(drive
)) & 0x80 ) >> 7) |
121 (QD_TIMREG(drive
) & 0x02);
123 if (timings
[index
] != QD_TIMING(drive
))
124 qd_write_reg(timings
[index
] = QD_TIMING(drive
), QD_TIMREG(drive
));
128 * qd6500_compute_timing
130 * computes the timing value where
131 * lower nibble represents active time, in count of VLB clocks
132 * upper nibble represents recovery time, in count of VLB clocks
135 static u8
qd6500_compute_timing (ide_hwif_t
*hwif
, int active_time
, int recovery_time
)
137 u8 active_cycle
,recovery_cycle
;
139 if (system_bus_clock()<=33) {
140 active_cycle
= 9 - IDE_IN(active_time
* system_bus_clock() / 1000 + 1, 2, 9);
141 recovery_cycle
= 15 - IDE_IN(recovery_time
* system_bus_clock() / 1000 + 1, 0, 15);
143 active_cycle
= 8 - IDE_IN(active_time
* system_bus_clock() / 1000 + 1, 1, 8);
144 recovery_cycle
= 18 - IDE_IN(recovery_time
* system_bus_clock() / 1000 + 1, 3, 18);
147 return((recovery_cycle
<<4) | 0x08 | active_cycle
);
151 * qd6580_compute_timing
156 static u8
qd6580_compute_timing (int active_time
, int recovery_time
)
158 u8 active_cycle
= 17 - IDE_IN(active_time
* system_bus_clock() / 1000 + 1, 2, 17);
159 u8 recovery_cycle
= 15 - IDE_IN(recovery_time
* system_bus_clock() / 1000 + 1, 2, 15);
161 return((recovery_cycle
<<4) | active_cycle
);
167 * tries to find timing from dos driver's table
170 static int qd_find_disk_type (ide_drive_t
*drive
,
171 int *active_time
, int *recovery_time
)
173 struct qd65xx_timing_s
*p
;
176 if (!*drive
->id
->model
) return 0;
178 strncpy(model
,drive
->id
->model
,40);
179 ide_fixstring(model
,40,1); /* byte-swap */
181 for (p
= qd65xx_timing
; p
->offset
!= -1 ; p
++) {
182 if (!strncmp(p
->model
, model
+p
->offset
, 4)) {
183 printk(KERN_DEBUG
"%s: listed !\n", drive
->name
);
184 *active_time
= p
->active
;
185 *recovery_time
= p
->recovery
;
195 * check whether timings don't conflict
198 static int qd_timing_ok (ide_drive_t drives
[])
200 return (IDE_IMPLY(drives
[0].present
&& drives
[1].present
,
201 IDE_IMPLY(QD_TIMREG(drives
) == QD_TIMREG(drives
+1),
202 QD_TIMING(drives
) == QD_TIMING(drives
+1))));
203 /* if same timing register, must be same timing */
209 * records the timing, and enables selectproc as needed
212 static void qd_set_timing (ide_drive_t
*drive
, u8 timing
)
214 ide_hwif_t
*hwif
= HWIF(drive
);
216 drive
->drive_data
&= 0xff00;
217 drive
->drive_data
|= timing
;
218 if (qd_timing_ok(hwif
->drives
)) {
219 qd_select(drive
); /* selects once */
220 hwif
->selectproc
= NULL
;
222 hwif
->selectproc
= &qd_select
;
224 printk(KERN_DEBUG
"%s: %#x\n", drive
->name
, timing
);
231 static void qd6500_tune_drive (ide_drive_t
*drive
, u8 pio
)
233 int active_time
= 175;
234 int recovery_time
= 415; /* worst case values from the dos driver */
236 if (drive
->id
&& !qd_find_disk_type(drive
, &active_time
, &recovery_time
)
237 && drive
->id
->tPIO
&& (drive
->id
->field_valid
& 0x02)
238 && drive
->id
->eide_pio
>= 240) {
240 printk(KERN_INFO
"%s: PIO mode%d\n", drive
->name
,
243 recovery_time
= drive
->id
->eide_pio
- 120;
246 qd_set_timing(drive
, qd6500_compute_timing(HWIF(drive
), active_time
, recovery_time
));
253 static void qd6580_tune_drive (ide_drive_t
*drive
, u8 pio
)
256 int base
= HWIF(drive
)->select_data
;
257 int active_time
= 175;
258 int recovery_time
= 415; /* worst case values from the dos driver */
260 if (drive
->id
&& !qd_find_disk_type(drive
, &active_time
, &recovery_time
)) {
261 pio
= ide_get_best_pio_mode(drive
, pio
, 4, &d
);
266 if (d
.cycle_time
>= 110) {
268 recovery_time
= d
.cycle_time
- 102;
270 printk(KERN_WARNING
"%s: Strange recovery time !\n",drive
->name
);
273 if (d
.cycle_time
>= 69) {
275 recovery_time
= d
.cycle_time
- 61;
277 printk(KERN_WARNING
"%s: Strange recovery time !\n",drive
->name
);
280 if (d
.cycle_time
>= 180) {
282 recovery_time
= d
.cycle_time
- 120;
284 active_time
= ide_pio_timings
[pio
].active_time
;
285 recovery_time
= d
.cycle_time
289 printk(KERN_INFO
"%s: PIO mode%d\n", drive
->name
,pio
);
292 if (!HWIF(drive
)->channel
&& drive
->media
!= ide_disk
) {
293 qd_write_reg(0x5f, QD_CONTROL_PORT
);
294 printk(KERN_WARNING
"%s: ATAPI: disabled read-ahead FIFO "
295 "and post-write buffer on %s.\n",
296 drive
->name
, HWIF(drive
)->name
);
299 qd_set_timing(drive
, qd6580_compute_timing(active_time
, recovery_time
));
305 * tests if the given port is a register
308 static int __init
qd_testreg(int port
)
314 spin_lock_irqsave(&ide_lock
, flags
);
315 savereg
= inb_p(port
);
316 outb_p(QD_TESTVAL
, port
); /* safe value */
317 readreg
= inb_p(port
);
319 spin_unlock_irqrestore(&ide_lock
, flags
);
321 if (savereg
== QD_TESTVAL
) {
322 printk(KERN_ERR
"Outch ! the probe for qd65xx isn't reliable !\n");
323 printk(KERN_ERR
"Please contact maintainers to tell about your hardware\n");
324 printk(KERN_ERR
"Assuming qd65xx is not present.\n");
328 return (readreg
!= QD_TESTVAL
);
334 * called to setup an ata channel : adjusts attributes & links for tuning
337 static void __init
qd_setup(ide_hwif_t
*hwif
, int base
, int config
,
338 unsigned int data0
, unsigned int data1
,
339 void (*tuneproc
) (ide_drive_t
*, u8 pio
))
341 hwif
->chipset
= ide_qd65xx
;
342 hwif
->channel
= hwif
->index
;
343 hwif
->select_data
= base
;
344 hwif
->config_data
= config
;
345 hwif
->drives
[0].drive_data
= data0
;
346 hwif
->drives
[1].drive_data
= data1
;
347 hwif
->drives
[0].io_32bit
=
348 hwif
->drives
[1].io_32bit
= 1;
349 hwif
->tuneproc
= tuneproc
;
350 probe_hwif_init(hwif
);
356 * called to unsetup an ata channel : back to default values, unlinks tuning
359 static void __exit qd_unsetup(ide_hwif_t *hwif)
361 u8 config = hwif->config_data;
362 int base = hwif->select_data;
363 void *tuneproc = (void *) hwif->tuneproc;
365 if (hwif->chipset != ide_qd65xx)
368 printk(KERN_NOTICE "%s: back to defaults\n", hwif->name);
370 hwif->selectproc = NULL;
371 hwif->tuneproc = NULL;
373 if (tuneproc == (void *) qd6500_tune_drive) {
374 // will do it for both
375 qd_write_reg(QD6500_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
376 } else if (tuneproc == (void *) qd6580_tune_drive) {
377 if (QD_CONTROL(hwif) & QD_CONTR_SEC_DISABLED) {
378 qd_write_reg(QD6580_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
379 qd_write_reg(QD6580_DEF_DATA2, QD_TIMREG(&hwif->drives[1]));
381 qd_write_reg(hwif->channel ? QD6580_DEF_DATA2 : QD6580_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
384 printk(KERN_WARNING "Unknown qd65xx tuning fonction !\n");
385 printk(KERN_WARNING "keeping settings !\n");
393 * looks at the specified baseport, and if qd found, registers & initialises it
394 * return 1 if another qd may be probed
397 static int __init
qd_probe(int base
)
403 config
= qd_read_reg(QD_CONFIG_PORT
);
405 if (! ((config
& QD_CONFIG_BASEPORT
) >> 1 == (base
== 0xb0)) )
408 unit
= ! (config
& QD_CONFIG_IDE_BASEPORT
);
410 if ((config
& 0xf0) == QD_CONFIG_QD6500
) {
412 if (qd_testreg(base
)) return 1; /* bad register */
416 hwif
= &ide_hwifs
[unit
];
417 printk(KERN_NOTICE
"%s: qd6500 at %#x\n", hwif
->name
, base
);
418 printk(KERN_DEBUG
"qd6500: config=%#x, ID3=%u\n",
421 if (config
& QD_CONFIG_DISABLED
) {
422 printk(KERN_WARNING
"qd6500 is disabled !\n");
426 qd_setup(hwif
, base
, config
, QD6500_DEF_DATA
, QD6500_DEF_DATA
,
429 ide_proc_register_port(hwif
);
434 if (((config
& 0xf0) == QD_CONFIG_QD6580_A
) ||
435 ((config
& 0xf0) == QD_CONFIG_QD6580_B
)) {
439 if (qd_testreg(base
) || qd_testreg(base
+0x02)) return 1;
444 control
= qd_read_reg(QD_CONTROL_PORT
);
446 printk(KERN_NOTICE
"qd6580 at %#x\n", base
);
447 printk(KERN_DEBUG
"qd6580: config=%#x, control=%#x, ID3=%u\n",
448 config
, control
, QD_ID3
);
450 if (control
& QD_CONTR_SEC_DISABLED
) {
451 /* secondary disabled */
453 hwif
= &ide_hwifs
[unit
];
454 printk(KERN_INFO
"%s: qd6580: single IDE board\n",
456 qd_setup(hwif
, base
, config
| (control
<< 8),
457 QD6580_DEF_DATA
, QD6580_DEF_DATA2
,
459 qd_write_reg(QD_DEF_CONTR
,QD_CONTROL_PORT
);
461 ide_proc_register_port(hwif
);
467 hwif
= &ide_hwifs
[0];
468 mate
= &ide_hwifs
[1];
469 /* secondary enabled */
470 printk(KERN_INFO
"%s&%s: qd6580: dual IDE board\n",
471 hwif
->name
, mate
->name
);
473 qd_setup(hwif
, base
, config
| (control
<< 8),
474 QD6580_DEF_DATA
, QD6580_DEF_DATA
,
476 qd_setup(mate
, base
, config
| (control
<< 8),
477 QD6580_DEF_DATA2
, QD6580_DEF_DATA2
,
479 qd_write_reg(QD_DEF_CONTR
,QD_CONTROL_PORT
);
481 ide_proc_register_port(hwif
);
482 ide_proc_register_port(mate
);
484 return 0; /* no other qd65xx possible */
487 /* no qd65xx found */
491 int probe_qd65xx
= 0;
493 module_param_named(probe
, probe_qd65xx
, bool, 0);
494 MODULE_PARM_DESC(probe
, "probe for QD65xx chipsets");
496 /* Can be called directly from ide.c. */
497 int __init
qd65xx_init(void)
499 if (probe_qd65xx
== 0)
504 if (ide_hwifs
[0].chipset
!= ide_qd65xx
&&
505 ide_hwifs
[1].chipset
!= ide_qd65xx
)
511 module_init(qd65xx_init
);
514 MODULE_AUTHOR("Samuel Thibault");
515 MODULE_DESCRIPTION("support of qd65xx vlb ide chipset");
516 MODULE_LICENSE("GPL");
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