alim15x3: disable init_hwif_ali15x3 for PowerPC
[deliverable/linux.git] / drivers / ide / pci / alim15x3.c
1 /*
2 * Copyright (C) 1998-2000 Michel Aubry, Maintainer
3 * Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer
4 * Copyright (C) 1999-2000 CJ, cjtsai@ali.com.tw, Maintainer
5 *
6 * Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org)
7 * May be copied or modified under the terms of the GNU General Public License
8 * Copyright (C) 2002 Alan Cox <alan@redhat.com>
9 * ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw>
10 * Copyright (C) 2007 MontaVista Software, Inc. <source@mvista.com>
11 * Copyright (C) 2007 Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
12 *
13 * (U)DMA capable version of ali 1533/1543(C), 1535(D)
14 *
15 **********************************************************************
16 * 9/7/99 --Parts from the above author are included and need to be
17 * converted into standard interface, once I finish the thought.
18 *
19 * Recent changes
20 * Don't use LBA48 mode on ALi <= 0xC4
21 * Don't poke 0x79 with a non ALi northbridge
22 * Don't flip undefined bits on newer chipsets (fix Fujitsu laptop hang)
23 * Allow UDMA6 on revisions > 0xC4
24 *
25 * Documentation
26 * Chipset documentation available under NDA only
27 *
28 */
29
30 #include <linux/module.h>
31 #include <linux/types.h>
32 #include <linux/kernel.h>
33 #include <linux/pci.h>
34 #include <linux/hdreg.h>
35 #include <linux/ide.h>
36 #include <linux/init.h>
37 #include <linux/dmi.h>
38
39 #include <asm/io.h>
40
41 /*
42 * ALi devices are not plug in. Otherwise these static values would
43 * need to go. They ought to go away anyway
44 */
45
46 static u8 m5229_revision;
47 static u8 chip_is_1543c_e;
48 static struct pci_dev *isa_dev;
49
50 /**
51 * ali_set_pio_mode - set host controller for PIO mode
52 * @drive: drive
53 * @pio: PIO mode number
54 *
55 * Program the controller for the given PIO mode.
56 */
57
58 static void ali_set_pio_mode(ide_drive_t *drive, const u8 pio)
59 {
60 ide_hwif_t *hwif = HWIF(drive);
61 struct pci_dev *dev = to_pci_dev(hwif->dev);
62 int s_time, a_time, c_time;
63 u8 s_clc, a_clc, r_clc;
64 unsigned long flags;
65 int bus_speed = ide_pci_clk ? ide_pci_clk : system_bus_clock();
66 int port = hwif->channel ? 0x5c : 0x58;
67 int portFIFO = hwif->channel ? 0x55 : 0x54;
68 u8 cd_dma_fifo = 0;
69 int unit = drive->select.b.unit & 1;
70
71 s_time = ide_pio_timings[pio].setup_time;
72 a_time = ide_pio_timings[pio].active_time;
73 if ((s_clc = (s_time * bus_speed + 999) / 1000) >= 8)
74 s_clc = 0;
75 if ((a_clc = (a_time * bus_speed + 999) / 1000) >= 8)
76 a_clc = 0;
77 c_time = ide_pio_timings[pio].cycle_time;
78
79 #if 0
80 if ((r_clc = ((c_time - s_time - a_time) * bus_speed + 999) / 1000) >= 16)
81 r_clc = 0;
82 #endif
83
84 if (!(r_clc = (c_time * bus_speed + 999) / 1000 - a_clc - s_clc)) {
85 r_clc = 1;
86 } else {
87 if (r_clc >= 16)
88 r_clc = 0;
89 }
90 local_irq_save(flags);
91
92 /*
93 * PIO mode => ATA FIFO on, ATAPI FIFO off
94 */
95 pci_read_config_byte(dev, portFIFO, &cd_dma_fifo);
96 if (drive->media==ide_disk) {
97 if (unit) {
98 pci_write_config_byte(dev, portFIFO, (cd_dma_fifo & 0x0F) | 0x50);
99 } else {
100 pci_write_config_byte(dev, portFIFO, (cd_dma_fifo & 0xF0) | 0x05);
101 }
102 } else {
103 if (unit) {
104 pci_write_config_byte(dev, portFIFO, cd_dma_fifo & 0x0F);
105 } else {
106 pci_write_config_byte(dev, portFIFO, cd_dma_fifo & 0xF0);
107 }
108 }
109
110 pci_write_config_byte(dev, port, s_clc);
111 pci_write_config_byte(dev, port+drive->select.b.unit+2, (a_clc << 4) | r_clc);
112 local_irq_restore(flags);
113
114 /*
115 * setup active rec
116 * { 70, 165, 365 }, PIO Mode 0
117 * { 50, 125, 208 }, PIO Mode 1
118 * { 30, 100, 110 }, PIO Mode 2
119 * { 30, 80, 70 }, PIO Mode 3 with IORDY
120 * { 25, 70, 25 }, PIO Mode 4 with IORDY ns
121 * { 20, 50, 30 } PIO Mode 5 with IORDY (nonstandard)
122 */
123 }
124
125 /**
126 * ali_udma_filter - compute UDMA mask
127 * @drive: IDE device
128 *
129 * Return available UDMA modes.
130 *
131 * The actual rules for the ALi are:
132 * No UDMA on revisions <= 0x20
133 * Disk only for revisions < 0xC2
134 * Not WDC drives for revisions < 0xC2
135 *
136 * FIXME: WDC ifdef needs to die
137 */
138
139 static u8 ali_udma_filter(ide_drive_t *drive)
140 {
141 if (m5229_revision > 0x20 && m5229_revision < 0xC2) {
142 if (drive->media != ide_disk)
143 return 0;
144 #ifndef CONFIG_WDC_ALI15X3
145 if (chip_is_1543c_e && strstr(drive->id->model, "WDC "))
146 return 0;
147 #endif
148 }
149
150 return drive->hwif->ultra_mask;
151 }
152
153 /**
154 * ali_set_dma_mode - set host controller for DMA mode
155 * @drive: drive
156 * @speed: DMA mode
157 *
158 * Configure the hardware for the desired IDE transfer mode.
159 */
160
161 static void ali_set_dma_mode(ide_drive_t *drive, const u8 speed)
162 {
163 ide_hwif_t *hwif = HWIF(drive);
164 struct pci_dev *dev = to_pci_dev(hwif->dev);
165 u8 speed1 = speed;
166 u8 unit = (drive->select.b.unit & 0x01);
167 u8 tmpbyte = 0x00;
168 int m5229_udma = (hwif->channel) ? 0x57 : 0x56;
169
170 if (speed == XFER_UDMA_6)
171 speed1 = 0x47;
172
173 if (speed < XFER_UDMA_0) {
174 u8 ultra_enable = (unit) ? 0x7f : 0xf7;
175 /*
176 * clear "ultra enable" bit
177 */
178 pci_read_config_byte(dev, m5229_udma, &tmpbyte);
179 tmpbyte &= ultra_enable;
180 pci_write_config_byte(dev, m5229_udma, tmpbyte);
181
182 /*
183 * FIXME: Oh, my... DMA timings are never set.
184 */
185 } else {
186 pci_read_config_byte(dev, m5229_udma, &tmpbyte);
187 tmpbyte &= (0x0f << ((1-unit) << 2));
188 /*
189 * enable ultra dma and set timing
190 */
191 tmpbyte |= ((0x08 | ((4-speed1)&0x07)) << (unit << 2));
192 pci_write_config_byte(dev, m5229_udma, tmpbyte);
193 if (speed >= XFER_UDMA_3) {
194 pci_read_config_byte(dev, 0x4b, &tmpbyte);
195 tmpbyte |= 1;
196 pci_write_config_byte(dev, 0x4b, tmpbyte);
197 }
198 }
199 }
200
201 /**
202 * ali15x3_dma_setup - begin a DMA phase
203 * @drive: target device
204 *
205 * Returns 1 if the DMA cannot be performed, zero on success.
206 */
207
208 static int ali15x3_dma_setup(ide_drive_t *drive)
209 {
210 if (m5229_revision < 0xC2 && drive->media != ide_disk) {
211 if (rq_data_dir(drive->hwif->hwgroup->rq))
212 return 1; /* try PIO instead of DMA */
213 }
214 return ide_dma_setup(drive);
215 }
216
217 /**
218 * init_chipset_ali15x3 - Initialise an ALi IDE controller
219 * @dev: PCI device
220 * @name: Name of the controller
221 *
222 * This function initializes the ALI IDE controller and where
223 * appropriate also sets up the 1533 southbridge.
224 */
225
226 static unsigned int __devinit init_chipset_ali15x3 (struct pci_dev *dev, const char *name)
227 {
228 unsigned long flags;
229 u8 tmpbyte;
230 struct pci_dev *north = pci_get_slot(dev->bus, PCI_DEVFN(0,0));
231
232 m5229_revision = dev->revision;
233
234 isa_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);
235
236 local_irq_save(flags);
237
238 if (m5229_revision < 0xC2) {
239 /*
240 * revision 0x20 (1543-E, 1543-F)
241 * revision 0xC0, 0xC1 (1543C-C, 1543C-D, 1543C-E)
242 * clear CD-ROM DMA write bit, m5229, 0x4b, bit 7
243 */
244 pci_read_config_byte(dev, 0x4b, &tmpbyte);
245 /*
246 * clear bit 7
247 */
248 pci_write_config_byte(dev, 0x4b, tmpbyte & 0x7F);
249 /*
250 * check m1533, 0x5e, bit 1~4 == 1001 => & 00011110 = 00010010
251 */
252 if (m5229_revision >= 0x20 && isa_dev) {
253 pci_read_config_byte(isa_dev, 0x5e, &tmpbyte);
254 chip_is_1543c_e = ((tmpbyte & 0x1e) == 0x12) ? 1: 0;
255 }
256 goto out;
257 }
258
259 /*
260 * 1543C-B?, 1535, 1535D, 1553
261 * Note 1: not all "motherboard" support this detection
262 * Note 2: if no udma 66 device, the detection may "error".
263 * but in this case, we will not set the device to
264 * ultra 66, the detection result is not important
265 */
266
267 /*
268 * enable "Cable Detection", m5229, 0x4b, bit3
269 */
270 pci_read_config_byte(dev, 0x4b, &tmpbyte);
271 pci_write_config_byte(dev, 0x4b, tmpbyte | 0x08);
272
273 /*
274 * We should only tune the 1533 enable if we are using an ALi
275 * North bridge. We might have no north found on some zany
276 * box without a device at 0:0.0. The ALi bridge will be at
277 * 0:0.0 so if we didn't find one we know what is cooking.
278 */
279 if (north && north->vendor != PCI_VENDOR_ID_AL)
280 goto out;
281
282 if (m5229_revision < 0xC5 && isa_dev)
283 {
284 /*
285 * set south-bridge's enable bit, m1533, 0x79
286 */
287
288 pci_read_config_byte(isa_dev, 0x79, &tmpbyte);
289 if (m5229_revision == 0xC2) {
290 /*
291 * 1543C-B0 (m1533, 0x79, bit 2)
292 */
293 pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x04);
294 } else if (m5229_revision >= 0xC3) {
295 /*
296 * 1553/1535 (m1533, 0x79, bit 1)
297 */
298 pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x02);
299 }
300 }
301
302 out:
303 /*
304 * CD_ROM DMA on (m5229, 0x53, bit0)
305 * Enable this bit even if we want to use PIO.
306 * PIO FIFO off (m5229, 0x53, bit1)
307 * The hardware will use 0x54h and 0x55h to control PIO FIFO.
308 * (Not on later devices it seems)
309 *
310 * 0x53 changes meaning on later revs - we must no touch
311 * bit 1 on them. Need to check if 0x20 is the right break.
312 */
313 if (m5229_revision >= 0x20) {
314 pci_read_config_byte(dev, 0x53, &tmpbyte);
315
316 if (m5229_revision <= 0x20)
317 tmpbyte = (tmpbyte & (~0x02)) | 0x01;
318 else if (m5229_revision == 0xc7 || m5229_revision == 0xc8)
319 tmpbyte |= 0x03;
320 else
321 tmpbyte |= 0x01;
322
323 pci_write_config_byte(dev, 0x53, tmpbyte);
324 }
325 pci_dev_put(north);
326 pci_dev_put(isa_dev);
327 local_irq_restore(flags);
328 return 0;
329 }
330
331 /*
332 * Cable special cases
333 */
334
335 static const struct dmi_system_id cable_dmi_table[] = {
336 {
337 .ident = "HP Pavilion N5430",
338 .matches = {
339 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
340 DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"),
341 },
342 },
343 {
344 .ident = "Toshiba Satellite S1800-814",
345 .matches = {
346 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
347 DMI_MATCH(DMI_PRODUCT_NAME, "S1800-814"),
348 },
349 },
350 { }
351 };
352
353 static int ali_cable_override(struct pci_dev *pdev)
354 {
355 /* Fujitsu P2000 */
356 if (pdev->subsystem_vendor == 0x10CF &&
357 pdev->subsystem_device == 0x10AF)
358 return 1;
359
360 /* Mitac 8317 (Winbook-A) and relatives */
361 if (pdev->subsystem_vendor == 0x1071 &&
362 pdev->subsystem_device == 0x8317)
363 return 1;
364
365 /* Systems by DMI */
366 if (dmi_check_system(cable_dmi_table))
367 return 1;
368
369 return 0;
370 }
371
372 /**
373 * ali_cable_detect - cable detection
374 * @hwif: IDE interface
375 *
376 * This checks if the controller and the cable are capable
377 * of UDMA66 transfers. It doesn't check the drives.
378 * But see note 2 below!
379 *
380 * FIXME: frobs bits that are not defined on newer ALi devicea
381 */
382
383 static u8 __devinit ali_cable_detect(ide_hwif_t *hwif)
384 {
385 struct pci_dev *dev = to_pci_dev(hwif->dev);
386 unsigned long flags;
387 u8 cbl = ATA_CBL_PATA40, tmpbyte;
388
389 local_irq_save(flags);
390
391 if (m5229_revision >= 0xC2) {
392 /*
393 * m5229 80-pin cable detection (from Host View)
394 *
395 * 0x4a bit0 is 0 => primary channel has 80-pin
396 * 0x4a bit1 is 0 => secondary channel has 80-pin
397 *
398 * Certain laptops use short but suitable cables
399 * and don't implement the detect logic.
400 */
401 if (ali_cable_override(dev))
402 cbl = ATA_CBL_PATA40_SHORT;
403 else {
404 pci_read_config_byte(dev, 0x4a, &tmpbyte);
405 if ((tmpbyte & (1 << hwif->channel)) == 0)
406 cbl = ATA_CBL_PATA80;
407 }
408 }
409
410 local_irq_restore(flags);
411
412 return cbl;
413 }
414
415 #if !defined(CONFIG_SPARC64) && !defined(CONFIG_PPC)
416 /**
417 * init_hwif_ali15x3 - Initialize the ALI IDE x86 stuff
418 * @hwif: interface to configure
419 *
420 * Obtain the IRQ tables for an ALi based IDE solution on the PC
421 * class platforms. This part of the code isn't applicable to the
422 * Sparc and PowerPC systems.
423 */
424
425 static void __devinit init_hwif_ali15x3 (ide_hwif_t *hwif)
426 {
427 struct pci_dev *dev = to_pci_dev(hwif->dev);
428 u8 ideic, inmir;
429 s8 irq_routing_table[] = { -1, 9, 3, 10, 4, 5, 7, 6,
430 1, 11, 0, 12, 0, 14, 0, 15 };
431 int irq = -1;
432
433 if (dev->device == PCI_DEVICE_ID_AL_M5229)
434 hwif->irq = hwif->channel ? 15 : 14;
435
436 if (isa_dev) {
437 /*
438 * read IDE interface control
439 */
440 pci_read_config_byte(isa_dev, 0x58, &ideic);
441
442 /* bit0, bit1 */
443 ideic = ideic & 0x03;
444
445 /* get IRQ for IDE Controller */
446 if ((hwif->channel && ideic == 0x03) ||
447 (!hwif->channel && !ideic)) {
448 /*
449 * get SIRQ1 routing table
450 */
451 pci_read_config_byte(isa_dev, 0x44, &inmir);
452 inmir = inmir & 0x0f;
453 irq = irq_routing_table[inmir];
454 } else if (hwif->channel && !(ideic & 0x01)) {
455 /*
456 * get SIRQ2 routing table
457 */
458 pci_read_config_byte(isa_dev, 0x75, &inmir);
459 inmir = inmir & 0x0f;
460 irq = irq_routing_table[inmir];
461 }
462 if(irq >= 0)
463 hwif->irq = irq;
464 }
465 }
466 #else
467 #define init_hwif_ali15x3 NULL
468 #endif /* !defined(CONFIG_SPARC64) && !defined(CONFIG_PPC) */
469
470 /**
471 * init_dma_ali15x3 - set up DMA on ALi15x3
472 * @hwif: IDE interface
473 * @d: IDE port info
474 *
475 * Set up the DMA functionality on the ALi 15x3.
476 */
477
478 static int __devinit init_dma_ali15x3(ide_hwif_t *hwif,
479 const struct ide_port_info *d)
480 {
481 struct pci_dev *dev = to_pci_dev(hwif->dev);
482 unsigned long base = ide_pci_dma_base(hwif, d);
483
484 if (base == 0 || ide_pci_set_master(dev, d->name) < 0)
485 return -1;
486
487 if (!hwif->channel)
488 outb(inb(base + 2) & 0x60, base + 2);
489
490 printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx\n",
491 hwif->name, base, base + 7);
492
493 if (ide_allocate_dma_engine(hwif))
494 return -1;
495
496 ide_setup_dma(hwif, base);
497
498 return 0;
499 }
500
501 static const struct ide_port_ops ali_port_ops = {
502 .set_pio_mode = ali_set_pio_mode,
503 .set_dma_mode = ali_set_dma_mode,
504 .udma_filter = ali_udma_filter,
505 .cable_detect = ali_cable_detect,
506 };
507
508 static const struct ide_dma_ops ali_dma_ops = {
509 .dma_host_set = ide_dma_host_set,
510 .dma_setup = ali15x3_dma_setup,
511 .dma_exec_cmd = ide_dma_exec_cmd,
512 .dma_start = ide_dma_start,
513 .dma_end = __ide_dma_end,
514 .dma_test_irq = ide_dma_test_irq,
515 .dma_lost_irq = ide_dma_lost_irq,
516 .dma_timeout = ide_dma_timeout,
517 };
518
519 static const struct ide_port_info ali15x3_chipset __devinitdata = {
520 .name = "ALI15X3",
521 .init_chipset = init_chipset_ali15x3,
522 .init_hwif = init_hwif_ali15x3,
523 .init_dma = init_dma_ali15x3,
524 .port_ops = &ali_port_ops,
525 .pio_mask = ATA_PIO5,
526 .swdma_mask = ATA_SWDMA2,
527 .mwdma_mask = ATA_MWDMA2,
528 };
529
530 /**
531 * alim15x3_init_one - set up an ALi15x3 IDE controller
532 * @dev: PCI device to set up
533 *
534 * Perform the actual set up for an ALi15x3 that has been found by the
535 * hot plug layer.
536 */
537
538 static int __devinit alim15x3_init_one(struct pci_dev *dev, const struct pci_device_id *id)
539 {
540 static struct pci_device_id ati_rs100[] = {
541 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RS100) },
542 { },
543 };
544
545 struct ide_port_info d = ali15x3_chipset;
546 u8 rev = dev->revision, idx = id->driver_data;
547
548 if (pci_dev_present(ati_rs100))
549 printk(KERN_WARNING "alim15x3: ATI Radeon IGP Northbridge is not yet fully tested.\n");
550
551 /* don't use LBA48 DMA on ALi devices before rev 0xC5 */
552 if (rev <= 0xC4)
553 d.host_flags |= IDE_HFLAG_NO_LBA48_DMA;
554
555 if (rev >= 0x20) {
556 if (rev == 0x20)
557 d.host_flags |= IDE_HFLAG_NO_ATAPI_DMA;
558
559 if (rev < 0xC2)
560 d.udma_mask = ATA_UDMA2;
561 else if (rev == 0xC2 || rev == 0xC3)
562 d.udma_mask = ATA_UDMA4;
563 else if (rev == 0xC4)
564 d.udma_mask = ATA_UDMA5;
565 else
566 d.udma_mask = ATA_UDMA6;
567
568 d.dma_ops = &ali_dma_ops;
569 } else {
570 d.host_flags |= IDE_HFLAG_NO_DMA;
571
572 d.mwdma_mask = d.swdma_mask = 0;
573 }
574
575 if (idx == 0)
576 d.host_flags |= IDE_HFLAG_CLEAR_SIMPLEX;
577
578 return ide_setup_pci_device(dev, &d);
579 }
580
581
582 static const struct pci_device_id alim15x3_pci_tbl[] = {
583 { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), 0 },
584 { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), 1 },
585 { 0, },
586 };
587 MODULE_DEVICE_TABLE(pci, alim15x3_pci_tbl);
588
589 static struct pci_driver driver = {
590 .name = "ALI15x3_IDE",
591 .id_table = alim15x3_pci_tbl,
592 .probe = alim15x3_init_one,
593 };
594
595 static int __init ali15x3_ide_init(void)
596 {
597 return ide_pci_register_driver(&driver);
598 }
599
600 module_init(ali15x3_ide_init);
601
602 MODULE_AUTHOR("Michael Aubry, Andrzej Krzysztofowicz, CJ, Andre Hedrick, Alan Cox");
603 MODULE_DESCRIPTION("PCI driver module for ALi 15x3 IDE");
604 MODULE_LICENSE("GPL");
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