2 * AMD 755/756/766/8111 and nVidia nForce/2/2s/3/3s/CK804/MCP04
3 * IDE driver for Linux.
5 * Copyright (c) 2000-2002 Vojtech Pavlik
6 * Copyright (c) 2007 Bartlomiej Zolnierkiewicz
8 * Based on the work of:
13 * This program is free software; you can redistribute it and/or modify it
14 * under the terms of the GNU General Public License version 2 as published by
15 * the Free Software Foundation.
18 #include <linux/module.h>
19 #include <linux/kernel.h>
20 #include <linux/pci.h>
21 #include <linux/init.h>
22 #include <linux/ide.h>
25 AMD_IDE_CONFIG
= 0x41,
26 AMD_CABLE_DETECT
= 0x42,
27 AMD_DRIVE_TIMING
= 0x48,
28 AMD_8BIT_TIMING
= 0x4e,
29 AMD_ADDRESS_SETUP
= 0x4c,
30 AMD_UDMA_TIMING
= 0x50,
33 static unsigned int amd_80w
;
34 static unsigned int amd_clock
;
36 static char *amd_dma
[] = { "16", "25", "33", "44", "66", "100", "133" };
37 static unsigned char amd_cyc2udma
[] = { 6, 6, 5, 4, 0, 1, 1, 2, 2, 3, 3, 3, 3, 3, 3, 7 };
39 static inline u8
amd_offset(struct pci_dev
*dev
)
41 return (dev
->vendor
== PCI_VENDOR_ID_NVIDIA
) ? 0x10 : 0;
45 * amd_set_speed() writes timing values to the chipset registers
48 static void amd_set_speed(struct pci_dev
*dev
, u8 dn
, u8 udma_mask
,
49 struct ide_timing
*timing
)
51 u8 t
= 0, offset
= amd_offset(dev
);
53 pci_read_config_byte(dev
, AMD_ADDRESS_SETUP
+ offset
, &t
);
54 t
= (t
& ~(3 << ((3 - dn
) << 1))) | ((clamp_val(timing
->setup
, 1, 4) - 1) << ((3 - dn
) << 1));
55 pci_write_config_byte(dev
, AMD_ADDRESS_SETUP
+ offset
, t
);
57 pci_write_config_byte(dev
, AMD_8BIT_TIMING
+ offset
+ (1 - (dn
>> 1)),
58 ((clamp_val(timing
->act8b
, 1, 16) - 1) << 4) | (clamp_val(timing
->rec8b
, 1, 16) - 1));
60 pci_write_config_byte(dev
, AMD_DRIVE_TIMING
+ offset
+ (3 - dn
),
61 ((clamp_val(timing
->active
, 1, 16) - 1) << 4) | (clamp_val(timing
->recover
, 1, 16) - 1));
64 case ATA_UDMA2
: t
= timing
->udma
? (0xc0 | (clamp_val(timing
->udma
, 2, 5) - 2)) : 0x03; break;
65 case ATA_UDMA4
: t
= timing
->udma
? (0xc0 | amd_cyc2udma
[clamp_val(timing
->udma
, 2, 10)]) : 0x03; break;
66 case ATA_UDMA5
: t
= timing
->udma
? (0xc0 | amd_cyc2udma
[clamp_val(timing
->udma
, 1, 10)]) : 0x03; break;
67 case ATA_UDMA6
: t
= timing
->udma
? (0xc0 | amd_cyc2udma
[clamp_val(timing
->udma
, 1, 15)]) : 0x03; break;
71 pci_write_config_byte(dev
, AMD_UDMA_TIMING
+ offset
+ (3 - dn
), t
);
75 * amd_set_drive() computes timing values and configures the chipset
76 * to a desired transfer mode. It also can be called by upper layers.
79 static void amd_set_drive(ide_drive_t
*drive
, const u8 speed
)
81 ide_hwif_t
*hwif
= drive
->hwif
;
82 struct pci_dev
*dev
= to_pci_dev(hwif
->dev
);
83 ide_drive_t
*peer
= hwif
->drives
+ (~drive
->dn
& 1);
84 struct ide_timing t
, p
;
86 u8 udma_mask
= hwif
->ultra_mask
;
88 T
= 1000000000 / amd_clock
;
89 UT
= (udma_mask
== ATA_UDMA2
) ? T
: (T
/ 2);
91 ide_timing_compute(drive
, speed
, &t
, T
, UT
);
94 ide_timing_compute(peer
, peer
->current_speed
, &p
, T
, UT
);
95 ide_timing_merge(&p
, &t
, &t
, IDE_TIMING_8BIT
);
98 if (speed
== XFER_UDMA_5
&& amd_clock
<= 33333) t
.udma
= 1;
99 if (speed
== XFER_UDMA_6
&& amd_clock
<= 33333) t
.udma
= 15;
101 amd_set_speed(dev
, drive
->dn
, udma_mask
, &t
);
105 * amd_set_pio_mode() is a callback from upper layers for PIO-only tuning.
108 static void amd_set_pio_mode(ide_drive_t
*drive
, const u8 pio
)
110 amd_set_drive(drive
, XFER_PIO_0
+ pio
);
113 static void __devinit
amd7409_cable_detect(struct pci_dev
*dev
,
116 /* no host side cable detection */
120 static void __devinit
amd7411_cable_detect(struct pci_dev
*dev
,
125 u8 t
= 0, offset
= amd_offset(dev
);
127 pci_read_config_byte(dev
, AMD_CABLE_DETECT
+ offset
, &t
);
128 pci_read_config_dword(dev
, AMD_UDMA_TIMING
+ offset
, &u
);
129 amd_80w
= ((t
& 0x3) ? 1 : 0) | ((t
& 0xc) ? 2 : 0);
130 for (i
= 24; i
>= 0; i
-= 8)
131 if (((u
>> i
) & 4) && !(amd_80w
& (1 << (1 - (i
>> 4))))) {
132 printk(KERN_WARNING
"%s %s: BIOS didn't set cable bits "
133 "correctly. Enabling workaround.\n",
134 name
, pci_name(dev
));
135 amd_80w
|= (1 << (1 - (i
>> 4)));
140 * The initialization callback. Initialize drive independent registers.
143 static unsigned int __devinit
init_chipset_amd74xx(struct pci_dev
*dev
,
146 u8 t
= 0, offset
= amd_offset(dev
);
149 * Check 80-wire cable presence.
152 if (dev
->vendor
== PCI_VENDOR_ID_AMD
&&
153 dev
->device
== PCI_DEVICE_ID_AMD_COBRA_7401
)
155 else if (dev
->vendor
== PCI_VENDOR_ID_AMD
&&
156 dev
->device
== PCI_DEVICE_ID_AMD_VIPER_7409
)
157 amd7409_cable_detect(dev
, name
);
159 amd7411_cable_detect(dev
, name
);
162 * Take care of prefetch & postwrite.
165 pci_read_config_byte(dev
, AMD_IDE_CONFIG
+ offset
, &t
);
167 * Check for broken FIFO support.
169 if (dev
->vendor
== PCI_VENDOR_ID_AMD
&&
170 dev
->vendor
== PCI_DEVICE_ID_AMD_VIPER_7411
)
174 pci_write_config_byte(dev
, AMD_IDE_CONFIG
+ offset
, t
);
179 static u8 __devinit
amd_cable_detect(ide_hwif_t
*hwif
)
181 if ((amd_80w
>> hwif
->channel
) & 1)
182 return ATA_CBL_PATA80
;
184 return ATA_CBL_PATA40
;
187 static void __devinit
init_hwif_amd74xx(ide_hwif_t
*hwif
)
189 struct pci_dev
*dev
= to_pci_dev(hwif
->dev
);
191 if (hwif
->irq
== 0) /* 0 is bogus but will do for now */
192 hwif
->irq
= pci_get_legacy_ide_irq(dev
, hwif
->channel
);
195 static const struct ide_port_ops amd_port_ops
= {
196 .set_pio_mode
= amd_set_pio_mode
,
197 .set_dma_mode
= amd_set_drive
,
198 .cable_detect
= amd_cable_detect
,
201 #define IDE_HFLAGS_AMD \
202 (IDE_HFLAG_PIO_NO_BLACKLIST | \
203 IDE_HFLAG_POST_SET_MODE | \
204 IDE_HFLAG_IO_32BIT | \
205 IDE_HFLAG_UNMASK_IRQS)
207 #define DECLARE_AMD_DEV(name_str, swdma, udma) \
210 .init_chipset = init_chipset_amd74xx, \
211 .init_hwif = init_hwif_amd74xx, \
212 .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}}, \
213 .port_ops = &amd_port_ops, \
214 .host_flags = IDE_HFLAGS_AMD, \
215 .pio_mask = ATA_PIO5, \
216 .swdma_mask = swdma, \
217 .mwdma_mask = ATA_MWDMA2, \
221 #define DECLARE_NV_DEV(name_str, udma) \
224 .init_chipset = init_chipset_amd74xx, \
225 .init_hwif = init_hwif_amd74xx, \
226 .enablebits = {{0x50,0x02,0x02}, {0x50,0x01,0x01}}, \
227 .port_ops = &amd_port_ops, \
228 .host_flags = IDE_HFLAGS_AMD, \
229 .pio_mask = ATA_PIO5, \
230 .swdma_mask = ATA_SWDMA2, \
231 .mwdma_mask = ATA_MWDMA2, \
235 static const struct ide_port_info amd74xx_chipsets
[] __devinitdata
= {
236 /* 0 */ DECLARE_AMD_DEV("AMD7401", 0x00, ATA_UDMA2
),
237 /* 1 */ DECLARE_AMD_DEV("AMD7409", ATA_SWDMA2
, ATA_UDMA4
),
238 /* 2 */ DECLARE_AMD_DEV("AMD7411", ATA_SWDMA2
, ATA_UDMA5
),
239 /* 3 */ DECLARE_AMD_DEV("AMD7441", ATA_SWDMA2
, ATA_UDMA5
),
240 /* 4 */ DECLARE_AMD_DEV("AMD8111", ATA_SWDMA2
, ATA_UDMA6
),
242 /* 5 */ DECLARE_NV_DEV("NFORCE", ATA_UDMA5
),
243 /* 6 */ DECLARE_NV_DEV("NFORCE2", ATA_UDMA6
),
244 /* 7 */ DECLARE_NV_DEV("NFORCE2-U400R", ATA_UDMA6
),
245 /* 8 */ DECLARE_NV_DEV("NFORCE2-U400R-SATA", ATA_UDMA6
),
246 /* 9 */ DECLARE_NV_DEV("NFORCE3-150", ATA_UDMA6
),
247 /* 10 */ DECLARE_NV_DEV("NFORCE3-250", ATA_UDMA6
),
248 /* 11 */ DECLARE_NV_DEV("NFORCE3-250-SATA", ATA_UDMA6
),
249 /* 12 */ DECLARE_NV_DEV("NFORCE3-250-SATA2", ATA_UDMA6
),
250 /* 13 */ DECLARE_NV_DEV("NFORCE-CK804", ATA_UDMA6
),
251 /* 14 */ DECLARE_NV_DEV("NFORCE-MCP04", ATA_UDMA6
),
252 /* 15 */ DECLARE_NV_DEV("NFORCE-MCP51", ATA_UDMA6
),
253 /* 16 */ DECLARE_NV_DEV("NFORCE-MCP55", ATA_UDMA6
),
254 /* 17 */ DECLARE_NV_DEV("NFORCE-MCP61", ATA_UDMA6
),
255 /* 18 */ DECLARE_NV_DEV("NFORCE-MCP65", ATA_UDMA6
),
256 /* 19 */ DECLARE_NV_DEV("NFORCE-MCP67", ATA_UDMA6
),
257 /* 20 */ DECLARE_NV_DEV("NFORCE-MCP73", ATA_UDMA6
),
258 /* 21 */ DECLARE_NV_DEV("NFORCE-MCP77", ATA_UDMA6
),
260 /* 22 */ DECLARE_AMD_DEV("AMD5536", ATA_SWDMA2
, ATA_UDMA5
),
263 static int __devinit
amd74xx_probe(struct pci_dev
*dev
, const struct pci_device_id
*id
)
265 struct ide_port_info d
;
266 u8 idx
= id
->driver_data
;
268 d
= amd74xx_chipsets
[idx
];
271 * Check for bad SWDMA and incorrectly wired Serenade mainboards.
274 if (dev
->revision
<= 7)
276 d
.host_flags
|= IDE_HFLAG_CLEAR_SIMPLEX
;
277 } else if (idx
== 4) {
278 if (dev
->subsystem_vendor
== PCI_VENDOR_ID_AMD
&&
279 dev
->subsystem_device
== PCI_DEVICE_ID_AMD_SERENADE
)
280 d
.udma_mask
= ATA_UDMA5
;
283 printk(KERN_INFO
"%s %s: UDMA%s controller\n",
284 d
.name
, pci_name(dev
), amd_dma
[fls(d
.udma_mask
) - 1]);
287 * Determine the system bus clock.
289 amd_clock
= (ide_pci_clk
? ide_pci_clk
: 33) * 1000;
292 case 33000: amd_clock
= 33333; break;
293 case 37000: amd_clock
= 37500; break;
294 case 41000: amd_clock
= 41666; break;
297 if (amd_clock
< 20000 || amd_clock
> 50000) {
298 printk(KERN_WARNING
"%s: User given PCI clock speed impossible"
299 " (%d), using 33 MHz instead.\n",
304 return ide_pci_init_one(dev
, &d
, NULL
);
307 static const struct pci_device_id amd74xx_pci_tbl
[] = {
308 { PCI_VDEVICE(AMD
, PCI_DEVICE_ID_AMD_COBRA_7401
), 0 },
309 { PCI_VDEVICE(AMD
, PCI_DEVICE_ID_AMD_VIPER_7409
), 1 },
310 { PCI_VDEVICE(AMD
, PCI_DEVICE_ID_AMD_VIPER_7411
), 2 },
311 { PCI_VDEVICE(AMD
, PCI_DEVICE_ID_AMD_OPUS_7441
), 3 },
312 { PCI_VDEVICE(AMD
, PCI_DEVICE_ID_AMD_8111_IDE
), 4 },
313 { PCI_VDEVICE(NVIDIA
, PCI_DEVICE_ID_NVIDIA_NFORCE_IDE
), 5 },
314 { PCI_VDEVICE(NVIDIA
, PCI_DEVICE_ID_NVIDIA_NFORCE2_IDE
), 6 },
315 { PCI_VDEVICE(NVIDIA
, PCI_DEVICE_ID_NVIDIA_NFORCE2S_IDE
), 7 },
316 #ifdef CONFIG_BLK_DEV_IDE_SATA
317 { PCI_VDEVICE(NVIDIA
, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SATA
), 8 },
319 { PCI_VDEVICE(NVIDIA
, PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE
), 9 },
320 { PCI_VDEVICE(NVIDIA
, PCI_DEVICE_ID_NVIDIA_NFORCE3S_IDE
), 10 },
321 #ifdef CONFIG_BLK_DEV_IDE_SATA
322 { PCI_VDEVICE(NVIDIA
, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA
), 11 },
323 { PCI_VDEVICE(NVIDIA
, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SATA2
), 12 },
325 { PCI_VDEVICE(NVIDIA
, PCI_DEVICE_ID_NVIDIA_NFORCE_CK804_IDE
), 13 },
326 { PCI_VDEVICE(NVIDIA
, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_IDE
), 14 },
327 { PCI_VDEVICE(NVIDIA
, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_IDE
), 15 },
328 { PCI_VDEVICE(NVIDIA
, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_IDE
), 16 },
329 { PCI_VDEVICE(NVIDIA
, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_IDE
), 17 },
330 { PCI_VDEVICE(NVIDIA
, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_IDE
), 18 },
331 { PCI_VDEVICE(NVIDIA
, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_IDE
), 19 },
332 { PCI_VDEVICE(NVIDIA
, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_IDE
), 20 },
333 { PCI_VDEVICE(NVIDIA
, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP77_IDE
), 21 },
334 { PCI_VDEVICE(AMD
, PCI_DEVICE_ID_AMD_CS5536_IDE
), 22 },
337 MODULE_DEVICE_TABLE(pci
, amd74xx_pci_tbl
);
339 static struct pci_driver driver
= {
341 .id_table
= amd74xx_pci_tbl
,
342 .probe
= amd74xx_probe
,
343 .remove
= ide_pci_remove
,
346 static int __init
amd74xx_ide_init(void)
348 return ide_pci_register_driver(&driver
);
351 static void __exit
amd74xx_ide_exit(void)
353 pci_unregister_driver(&driver
);
356 module_init(amd74xx_ide_init
);
357 module_exit(amd74xx_ide_exit
);
359 MODULE_AUTHOR("Vojtech Pavlik");
360 MODULE_DESCRIPTION("AMD PCI IDE driver");
361 MODULE_LICENSE("GPL");