drivers/ide/pci/cs5535.c

   1 /*
   2  * Copyright (C) 2004-2005 Advanced Micro Devices, Inc.
   3  * Copyright (C)      2007 Bartlomiej Zolnierkiewicz
   4  *
   5  * History:
   6  * 09/20/2005 - Jaya Kumar <jayakumar.ide@gmail.com>
   7  * - Reworked tuneproc, set_drive, misc mods to prep for mainline
   8  * - Work was sponsored by CIS (M) Sdn Bhd.
   9  * Ported to Kernel 2.6.11 on June 26, 2005 by
  10  *   Wolfgang Zuleger <wolfgang.zuleger@gmx.de>
  11  *   Alexander Kiausch <alex.kiausch@t-online.de>
  12  * Originally developed by AMD for 2.4/2.6
  13  *
  14  * Development of this chipset driver was funded
  15  * by the nice folks at National Semiconductor/AMD.
  16  *
  17  * This program is free software; you can redistribute it and/or modify it
  18  * under the terms of the GNU General Public License version 2 as published by
  19  * the Free Software Foundation.
  20  *
  21  * Documentation:
  22  *  CS5535 documentation available from AMD
  23  */
  24
  25 #include <linux/module.h>
  26 #include <linux/pci.h>
  27 #include <linux/ide.h>
  28
  29 #define MSR_ATAC_BASE           0x51300000
  30 #define ATAC_GLD_MSR_CAP        (MSR_ATAC_BASE+0)
  31 #define ATAC_GLD_MSR_CONFIG     (MSR_ATAC_BASE+0x01)
  32 #define ATAC_GLD_MSR_SMI        (MSR_ATAC_BASE+0x02)
  33 #define ATAC_GLD_MSR_ERROR      (MSR_ATAC_BASE+0x03)
  34 #define ATAC_GLD_MSR_PM         (MSR_ATAC_BASE+0x04)
  35 #define ATAC_GLD_MSR_DIAG       (MSR_ATAC_BASE+0x05)
  36 #define ATAC_IO_BAR             (MSR_ATAC_BASE+0x08)
  37 #define ATAC_RESET              (MSR_ATAC_BASE+0x10)
  38 #define ATAC_CH0D0_PIO          (MSR_ATAC_BASE+0x20)
  39 #define ATAC_CH0D0_DMA          (MSR_ATAC_BASE+0x21)
  40 #define ATAC_CH0D1_PIO          (MSR_ATAC_BASE+0x22)
  41 #define ATAC_CH0D1_DMA          (MSR_ATAC_BASE+0x23)
  42 #define ATAC_PCI_ABRTERR        (MSR_ATAC_BASE+0x24)
  43 #define ATAC_BM0_CMD_PRIM       0x00
  44 #define ATAC_BM0_STS_PRIM       0x02
  45 #define ATAC_BM0_PRD            0x04
  46 #define CS5535_CABLE_DETECT     0x48
  47
  48 /* Format I PIO settings. We separate out cmd and data for safer timings */
  49
  50 static unsigned int cs5535_pio_cmd_timings[5] =
  51 { 0xF7F4, 0x53F3, 0x13F1, 0x5131, 0x1131 };
  52 static unsigned int cs5535_pio_dta_timings[5] =
  53 { 0xF7F4, 0xF173, 0x8141, 0x5131, 0x1131 };
  54
  55 static unsigned int cs5535_mwdma_timings[3] =
  56 { 0x7F0FFFF3, 0x7F035352, 0x7f024241 };
  57
  58 static unsigned int cs5535_udma_timings[5] =
  59 { 0x7F7436A1, 0x7F733481, 0x7F723261, 0x7F713161, 0x7F703061 };
  60
  61 /* Macros to check if the register is the reset value -  reset value is an
  62    invalid timing and indicates the register has not been set previously */
  63
  64 #define CS5535_BAD_PIO(timings) ( (timings&~0x80000000UL) == 0x00009172 )
  65 #define CS5535_BAD_DMA(timings) ( (timings & 0x000FFFFF) == 0x00077771 )
  66
  67 /****
  68  *      cs5535_set_speed         -     Configure the chipset to the new speed
  69  *      @drive: Drive to set up
  70  *      @speed: desired speed
  71  *
  72  *      cs5535_set_speed() configures the chipset to a new speed.
  73  */
  74 static void cs5535_set_speed(ide_drive_t *drive, const u8 speed)
  75 {
  76         u32 reg = 0, dummy;
  77         int unit = drive->select.b.unit;
  78
  79         /* Set the PIO timings */
  80         if (speed < XFER_SW_DMA_0) {
  81                 ide_drive_t *pair = ide_get_paired_drive(drive);
  82                 u8 cmd, pioa;
  83
  84                 cmd = pioa = speed - XFER_PIO_0;
  85
  86                 if (pair->present) {
  87                         u8 piob = ide_get_best_pio_mode(pair, 255, 4);
  88
  89                         if (piob < cmd)
  90                                 cmd = piob;
  91                 }
  92
  93                 /* Write the speed of the current drive */
  94                 reg = (cs5535_pio_cmd_timings[cmd] << 16) |
  95                         cs5535_pio_dta_timings[pioa];
  96                 wrmsr(unit ? ATAC_CH0D1_PIO : ATAC_CH0D0_PIO, reg, 0);
  97
  98                 /* And if nessesary - change the speed of the other drive */
  99                 rdmsr(unit ?  ATAC_CH0D0_PIO : ATAC_CH0D1_PIO, reg, dummy);
 100
 101                 if (((reg >> 16) & cs5535_pio_cmd_timings[cmd]) !=
 102                         cs5535_pio_cmd_timings[cmd]) {
 103                         reg &= 0x0000FFFF;
 104                         reg |= cs5535_pio_cmd_timings[cmd] << 16;
 105                         wrmsr(unit ? ATAC_CH0D0_PIO : ATAC_CH0D1_PIO, reg, 0);
 106                 }
 107
 108                 /* Set bit 31 of the DMA register for PIO format 1 timings */
 109                 rdmsr(unit ?  ATAC_CH0D1_DMA : ATAC_CH0D0_DMA, reg, dummy);
 110                 wrmsr(unit ? ATAC_CH0D1_DMA : ATAC_CH0D0_DMA,
 111                                         reg | 0x80000000UL, 0);
 112         } else {
 113                 rdmsr(unit ? ATAC_CH0D1_DMA : ATAC_CH0D0_DMA, reg, dummy);
 114
 115                 reg &= 0x80000000UL;  /* Preserve the PIO format bit */
 116
 117                 if (speed >= XFER_UDMA_0 && speed <= XFER_UDMA_4)
 118                         reg |= cs5535_udma_timings[speed - XFER_UDMA_0];
 119                 else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2)
 120                         reg |= cs5535_mwdma_timings[speed - XFER_MW_DMA_0];
 121                 else
 122                         return;
 123
 124                 wrmsr(unit ? ATAC_CH0D1_DMA : ATAC_CH0D0_DMA, reg, 0);
 125         }
 126 }
 127
 128 /**
 129  *      cs5535_set_dma_mode     -       set host controller for DMA mode
 130  *      @drive: drive
 131  *      @speed: DMA mode
 132  *
 133  *      Programs the chipset for DMA mode.
 134  */
 135
 136 static void cs5535_set_dma_mode(ide_drive_t *drive, const u8 speed)
 137 {
 138         cs5535_set_speed(drive, speed);
 139 }
 140
 141 /**
 142  *      cs5535_set_pio_mode     -       set host controller for PIO mode
 143  *      @drive: drive
 144  *      @pio: PIO mode number
 145  *
 146  *      A callback from the upper layers for PIO-only tuning.
 147  */
 148
 149 static void cs5535_set_pio_mode(ide_drive_t *drive, const u8 pio)
 150 {
 151         cs5535_set_speed(drive, XFER_PIO_0 + pio);
 152 }
 153
 154 static u8 __devinit cs5535_cable_detect(ide_hwif_t *hwif)
 155 {
 156         struct pci_dev *dev = to_pci_dev(hwif->dev);
 157         u8 bit;
 158
 159         /* if a 80 wire cable was detected */
 160         pci_read_config_byte(dev, CS5535_CABLE_DETECT, &bit);
 161
 162         return (bit & 1) ? ATA_CBL_PATA80 : ATA_CBL_PATA40;
 163 }
 164
 165 static const struct ide_port_ops cs5535_port_ops = {
 166         .set_pio_mode           = cs5535_set_pio_mode,
 167         .set_dma_mode           = cs5535_set_dma_mode,
 168         .cable_detect           = cs5535_cable_detect,
 169 };
 170
 171 static const struct ide_port_info cs5535_chipset __devinitdata = {
 172         .name           = "CS5535",
 173         .port_ops       = &cs5535_port_ops,
 174         .host_flags     = IDE_HFLAG_SINGLE | IDE_HFLAG_POST_SET_MODE,
 175         .pio_mask       = ATA_PIO4,
 176         .mwdma_mask     = ATA_MWDMA2,
 177         .udma_mask      = ATA_UDMA4,
 178 };
 179
 180 static int __devinit cs5535_init_one(struct pci_dev *dev,
 181                                         const struct pci_device_id *id)
 182 {
 183         return ide_pci_init_one(dev, &cs5535_chipset, NULL);
 184 }
 185
 186 static const struct pci_device_id cs5535_pci_tbl[] = {
 187         { PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_CS5535_IDE), 0 },
 188         { 0, },
 189 };
 190
 191 MODULE_DEVICE_TABLE(pci, cs5535_pci_tbl);
 192
 193 static struct pci_driver driver = {
 194         .name       = "CS5535_IDE",
 195         .id_table   = cs5535_pci_tbl,
 196         .probe      = cs5535_init_one,
 197         .remove     = ide_pci_remove,
 198 };
 199
 200 static int __init cs5535_ide_init(void)
 201 {
 202         return ide_pci_register_driver(&driver);
 203 }
 204
 205 static void __exit cs5535_ide_exit(void)
 206 {
 207         pci_unregister_driver(&driver);
 208 }
 209
 210 module_init(cs5535_ide_init);
 211 module_exit(cs5535_ide_exit);
 212
 213 MODULE_AUTHOR("AMD");
 214 MODULE_DESCRIPTION("PCI driver module for AMD/NS CS5535 IDE");
 215 MODULE_LICENSE("GPL");