2 * Copyright (C) 1997-1998 Mark Lord <mlord@pobox.com>
3 * Copyright (C) 1998 Eddie C. Dost <ecd@skynet.be>
4 * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org>
5 * Copyright (C) 2004 Grant Grundler <grundler at parisc-linux.org>
7 * Inspired by an earlier effort from David S. Miller <davem@redhat.com>
10 #include <linux/module.h>
11 #include <linux/types.h>
12 #include <linux/kernel.h>
13 #include <linux/interrupt.h>
14 #include <linux/hdreg.h>
15 #include <linux/pci.h>
16 #include <linux/delay.h>
17 #include <linux/ide.h>
18 #include <linux/init.h>
23 /* SUPERIO 87560 is a PoS chip that NatSem denies exists.
24 * Unfortunately, it's built-in on all Astro-based PA-RISC workstations
25 * which use the integrated NS87514 cell for CD-ROM support.
26 * i.e we have to support for CD-ROM installs.
27 * See drivers/parisc/superio.c for more gory details.
29 #include <asm/superio.h>
31 #define SUPERIO_IDE_MAX_RETRIES 25
33 /* Because of a defect in Super I/O, all reads of the PCI DMA status
34 * registers, IDE status register and the IDE select register need to be
37 static u8
superio_ide_inb (unsigned long port
)
40 int retries
= SUPERIO_IDE_MAX_RETRIES
;
42 /* printk(" [ reading port 0x%x with retry ] ", port); */
48 } while (tmp
== 0 && retries
-- > 0);
53 static u8
superio_read_status(ide_hwif_t
*hwif
)
55 return superio_ide_inb(hwif
->io_ports
.status_addr
);
58 static u8
superio_read_sff_dma_status(ide_hwif_t
*hwif
)
60 return superio_ide_inb(hwif
->dma_base
+ ATA_DMA_STATUS
);
63 static void superio_tf_read(ide_drive_t
*drive
, ide_task_t
*task
)
65 struct ide_io_ports
*io_ports
= &drive
->hwif
->io_ports
;
66 struct ide_taskfile
*tf
= &task
->tf
;
68 if (task
->tf_flags
& IDE_TFLAG_IN_DATA
) {
69 u16 data
= inw(io_ports
->data_addr
);
71 tf
->data
= data
& 0xff;
72 tf
->hob_data
= (data
>> 8) & 0xff;
75 /* be sure we're looking at the low order bits */
76 outb(ATA_DEVCTL_OBS
& ~0x80, io_ports
->ctl_addr
);
78 if (task
->tf_flags
& IDE_TFLAG_IN_FEATURE
)
79 tf
->feature
= inb(io_ports
->feature_addr
);
80 if (task
->tf_flags
& IDE_TFLAG_IN_NSECT
)
81 tf
->nsect
= inb(io_ports
->nsect_addr
);
82 if (task
->tf_flags
& IDE_TFLAG_IN_LBAL
)
83 tf
->lbal
= inb(io_ports
->lbal_addr
);
84 if (task
->tf_flags
& IDE_TFLAG_IN_LBAM
)
85 tf
->lbam
= inb(io_ports
->lbam_addr
);
86 if (task
->tf_flags
& IDE_TFLAG_IN_LBAH
)
87 tf
->lbah
= inb(io_ports
->lbah_addr
);
88 if (task
->tf_flags
& IDE_TFLAG_IN_DEVICE
)
89 tf
->device
= superio_ide_inb(io_ports
->device_addr
);
91 if (task
->tf_flags
& IDE_TFLAG_LBA48
) {
92 outb(ATA_DEVCTL_OBS
| 0x80, io_ports
->ctl_addr
);
94 if (task
->tf_flags
& IDE_TFLAG_IN_HOB_FEATURE
)
95 tf
->hob_feature
= inb(io_ports
->feature_addr
);
96 if (task
->tf_flags
& IDE_TFLAG_IN_HOB_NSECT
)
97 tf
->hob_nsect
= inb(io_ports
->nsect_addr
);
98 if (task
->tf_flags
& IDE_TFLAG_IN_HOB_LBAL
)
99 tf
->hob_lbal
= inb(io_ports
->lbal_addr
);
100 if (task
->tf_flags
& IDE_TFLAG_IN_HOB_LBAM
)
101 tf
->hob_lbam
= inb(io_ports
->lbam_addr
);
102 if (task
->tf_flags
& IDE_TFLAG_IN_HOB_LBAH
)
103 tf
->hob_lbah
= inb(io_ports
->lbah_addr
);
107 static const struct ide_tp_ops superio_tp_ops
= {
108 .exec_command
= ide_exec_command
,
109 .read_status
= superio_read_status
,
110 .read_altstatus
= ide_read_altstatus
,
111 .read_sff_dma_status
= superio_read_sff_dma_status
,
113 .set_irq
= ide_set_irq
,
115 .tf_load
= ide_tf_load
,
116 .tf_read
= superio_tf_read
,
118 .input_data
= ide_input_data
,
119 .output_data
= ide_output_data
,
122 static void __devinit
superio_init_iops(struct hwif_s
*hwif
)
124 struct pci_dev
*pdev
= to_pci_dev(hwif
->dev
);
126 u8 port
= hwif
->channel
, tmp
;
128 dma_stat
= (pci_resource_start(pdev
, 4) & ~3) + (!port
? 2 : 0xa);
130 /* Clear error/interrupt, enable dma */
131 tmp
= superio_ide_inb(dma_stat
);
132 outb(tmp
| 0x66, dma_stat
);
136 static unsigned int ns87415_count
= 0, ns87415_control
[MAX_HWIFS
] = { 0 };
139 * This routine either enables/disables (according to drive->present)
140 * the IRQ associated with the port (HWIF(drive)),
141 * and selects either PIO or DMA handshaking for the next I/O operation.
143 static void ns87415_prepare_drive (ide_drive_t
*drive
, unsigned int use_dma
)
145 ide_hwif_t
*hwif
= HWIF(drive
);
146 struct pci_dev
*dev
= to_pci_dev(hwif
->dev
);
147 unsigned int bit
, other
, new, *old
= (unsigned int *) hwif
->select_data
;
150 local_irq_save(flags
);
153 /* Adjust IRQ enable bit */
154 bit
= 1 << (8 + hwif
->channel
);
155 new = drive
->present
? (new & ~bit
) : (new | bit
);
157 /* Select PIO or DMA, DMA may only be selected for one drive/channel. */
158 bit
= 1 << (20 + drive
->select
.b
.unit
+ (hwif
->channel
<< 1));
159 other
= 1 << (20 + (1 - drive
->select
.b
.unit
) + (hwif
->channel
<< 1));
160 new = use_dma
? ((new & ~other
) | bit
) : (new & ~bit
);
166 * Don't change DMA engine settings while Write Buffers
169 (void) pci_read_config_byte(dev
, 0x43, &stat
);
170 while (stat
& 0x03) {
172 (void) pci_read_config_byte(dev
, 0x43, &stat
);
176 (void) pci_write_config_dword(dev
, 0x40, new);
179 * And let things settle...
184 local_irq_restore(flags
);
187 static void ns87415_selectproc (ide_drive_t
*drive
)
189 ns87415_prepare_drive (drive
, drive
->using_dma
);
192 static int ns87415_dma_end(ide_drive_t
*drive
)
194 ide_hwif_t
*hwif
= HWIF(drive
);
195 u8 dma_stat
= 0, dma_cmd
= 0;
197 drive
->waiting_for_dma
= 0;
198 dma_stat
= hwif
->tp_ops
->read_sff_dma_status(hwif
);
199 /* get DMA command mode */
200 dma_cmd
= inb(hwif
->dma_base
+ ATA_DMA_CMD
);
202 outb(dma_cmd
& ~1, hwif
->dma_base
+ ATA_DMA_CMD
);
203 /* from ERRATA: clear the INTR & ERROR bits */
204 dma_cmd
= inb(hwif
->dma_base
+ ATA_DMA_CMD
);
205 outb(dma_cmd
| 6, hwif
->dma_base
+ ATA_DMA_CMD
);
206 /* and free any DMA resources */
207 ide_destroy_dmatable(drive
);
208 /* verify good DMA status */
209 return (dma_stat
& 7) != 4;
212 static int ns87415_dma_setup(ide_drive_t
*drive
)
214 /* select DMA xfer */
215 ns87415_prepare_drive(drive
, 1);
216 if (!ide_dma_setup(drive
))
218 /* DMA failed: select PIO xfer */
219 ns87415_prepare_drive(drive
, 0);
223 static void __devinit
init_hwif_ns87415 (ide_hwif_t
*hwif
)
225 struct pci_dev
*dev
= to_pci_dev(hwif
->dev
);
226 unsigned int ctrl
, using_inta
;
234 * We cannot probe for IRQ: both ports share common IRQ on INTA.
235 * Also, leave IRQ masked during drive probing, to prevent infinite
236 * interrupts from a potentially floating INTA..
238 * IRQs get unmasked in selectproc when drive is first used.
240 (void) pci_read_config_dword(dev
, 0x40, &ctrl
);
241 (void) pci_read_config_byte(dev
, 0x09, &progif
);
242 /* is irq in "native" mode? */
243 using_inta
= progif
& (1 << (hwif
->channel
<< 1));
245 using_inta
= ctrl
& (1 << (4 + hwif
->channel
));
247 hwif
->select_data
= hwif
->mate
->select_data
;
249 hwif
->select_data
= (unsigned long)
250 &ns87415_control
[ns87415_count
++];
251 ctrl
|= (1 << 8) | (1 << 9); /* mask both IRQs */
253 ctrl
&= ~(1 << 6); /* unmask INTA */
254 *((unsigned int *)hwif
->select_data
) = ctrl
;
255 (void) pci_write_config_dword(dev
, 0x40, ctrl
);
258 * Set prefetch size to 512 bytes for both ports,
259 * but don't turn on/off prefetching here.
261 pci_write_config_byte(dev
, 0x55, 0xee);
265 * XXX: Reset the device, if we don't it will not respond to
266 * SELECT_DRIVE() properly during first ide_probe_port().
269 outb(12, hwif
->io_ports
.ctl_addr
);
271 outb(8, hwif
->io_ports
.ctl_addr
);
274 stat
= hwif
->tp_ops
->read_status(hwif
);
277 } while ((stat
& BUSY_STAT
) && --timeout
);
282 hwif
->irq
= __ide_default_irq(hwif
->io_ports
.data_addr
);
283 else if (!hwif
->irq
&& hwif
->mate
&& hwif
->mate
->irq
)
284 hwif
->irq
= hwif
->mate
->irq
; /* share IRQ with mate */
289 outb(0x60, hwif
->dma_base
+ ATA_DMA_STATUS
);
292 static const struct ide_port_ops ns87415_port_ops
= {
293 .selectproc
= ns87415_selectproc
,
296 static const struct ide_dma_ops ns87415_dma_ops
= {
297 .dma_host_set
= ide_dma_host_set
,
298 .dma_setup
= ns87415_dma_setup
,
299 .dma_exec_cmd
= ide_dma_exec_cmd
,
300 .dma_start
= ide_dma_start
,
301 .dma_end
= ns87415_dma_end
,
302 .dma_test_irq
= ide_dma_test_irq
,
303 .dma_lost_irq
= ide_dma_lost_irq
,
304 .dma_timeout
= ide_dma_timeout
,
307 static const struct ide_port_info ns87415_chipset __devinitdata
= {
309 .init_hwif
= init_hwif_ns87415
,
310 .port_ops
= &ns87415_port_ops
,
311 .dma_ops
= &ns87415_dma_ops
,
312 .host_flags
= IDE_HFLAG_TRUST_BIOS_FOR_DMA
|
313 IDE_HFLAG_NO_ATAPI_DMA
,
316 static int __devinit
ns87415_init_one(struct pci_dev
*dev
, const struct pci_device_id
*id
)
318 struct ide_port_info d
= ns87415_chipset
;
320 #ifdef CONFIG_SUPERIO
321 if (PCI_SLOT(dev
->devfn
) == 0xE) {
322 /* Built-in - assume it's under superio. */
323 d
.init_iops
= superio_init_iops
;
324 d
.tp_ops
= &superio_tp_ops
;
327 return ide_pci_init_one(dev
, &d
, NULL
);
330 static const struct pci_device_id ns87415_pci_tbl
[] = {
331 { PCI_VDEVICE(NS
, PCI_DEVICE_ID_NS_87415
), 0 },
334 MODULE_DEVICE_TABLE(pci
, ns87415_pci_tbl
);
336 static struct pci_driver driver
= {
337 .name
= "NS87415_IDE",
338 .id_table
= ns87415_pci_tbl
,
339 .probe
= ns87415_init_one
,
342 static int __init
ns87415_ide_init(void)
344 return ide_pci_register_driver(&driver
);
347 module_init(ns87415_ide_init
);
349 MODULE_AUTHOR("Mark Lord, Eddie Dost, Andre Hedrick");
350 MODULE_DESCRIPTION("PCI driver module for NS87415 IDE");
351 MODULE_LICENSE("GPL");