2 * VIA IDE driver for Linux. Supported southbridges:
4 * vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b,
5 * vt82c686, vt82c686a, vt82c686b, vt8231, vt8233, vt8233c, vt8233a,
6 * vt8235, vt8237, vt8237a
8 * Copyright (c) 2000-2002 Vojtech Pavlik
9 * Copyright (c) 2007 Bartlomiej Zolnierkiewicz
11 * Based on the work of:
17 * Obsolete device documentation publically available from via.com.tw
18 * Current device documentation available under NDA only
22 * This program is free software; you can redistribute it and/or modify it
23 * under the terms of the GNU General Public License version 2 as published by
24 * the Free Software Foundation.
27 #include <linux/module.h>
28 #include <linux/kernel.h>
29 #include <linux/pci.h>
30 #include <linux/init.h>
31 #include <linux/ide.h>
32 #include <linux/dmi.h>
34 #ifdef CONFIG_PPC_CHRP
35 #include <asm/processor.h>
38 #define VIA_IDE_ENABLE 0x40
39 #define VIA_IDE_CONFIG 0x41
40 #define VIA_FIFO_CONFIG 0x43
41 #define VIA_MISC_1 0x44
42 #define VIA_MISC_2 0x45
43 #define VIA_MISC_3 0x46
44 #define VIA_DRIVE_TIMING 0x48
45 #define VIA_8BIT_TIMING 0x4e
46 #define VIA_ADDRESS_SETUP 0x4c
47 #define VIA_UDMA_TIMING 0x50
49 #define VIA_BAD_PREQ 0x01 /* Crashes if PREQ# till DDACK# set */
50 #define VIA_BAD_CLK66 0x02 /* 66 MHz clock doesn't work correctly */
51 #define VIA_SET_FIFO 0x04 /* Needs to have FIFO split set */
52 #define VIA_NO_UNMASK 0x08 /* Doesn't work with IRQ unmasking on */
53 #define VIA_BAD_ID 0x10 /* Has wrong vendor ID (0x1107) */
54 #define VIA_BAD_AST 0x20 /* Don't touch Address Setup Timing */
57 * VIA SouthBridge chips.
60 static struct via_isa_bridge
{
67 } via_isa_bridges
[] = {
68 { "vx800", PCI_DEVICE_ID_VIA_VX800
, 0x00, 0x2f, ATA_UDMA6
, VIA_BAD_AST
},
69 { "cx700", PCI_DEVICE_ID_VIA_CX700
, 0x00, 0x2f, ATA_UDMA6
, VIA_BAD_AST
},
70 { "vt8237s", PCI_DEVICE_ID_VIA_8237S
, 0x00, 0x2f, ATA_UDMA6
, VIA_BAD_AST
},
71 { "vt6410", PCI_DEVICE_ID_VIA_6410
, 0x00, 0x2f, ATA_UDMA6
, VIA_BAD_AST
},
72 { "vt8251", PCI_DEVICE_ID_VIA_8251
, 0x00, 0x2f, ATA_UDMA6
, VIA_BAD_AST
},
73 { "vt8237", PCI_DEVICE_ID_VIA_8237
, 0x00, 0x2f, ATA_UDMA6
, VIA_BAD_AST
},
74 { "vt8237a", PCI_DEVICE_ID_VIA_8237A
, 0x00, 0x2f, ATA_UDMA6
, VIA_BAD_AST
},
75 { "vt8235", PCI_DEVICE_ID_VIA_8235
, 0x00, 0x2f, ATA_UDMA6
, VIA_BAD_AST
},
76 { "vt8233a", PCI_DEVICE_ID_VIA_8233A
, 0x00, 0x2f, ATA_UDMA6
, VIA_BAD_AST
},
77 { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0
, 0x00, 0x2f, ATA_UDMA5
, },
78 { "vt8233", PCI_DEVICE_ID_VIA_8233_0
, 0x00, 0x2f, ATA_UDMA5
, },
79 { "vt8231", PCI_DEVICE_ID_VIA_8231
, 0x00, 0x2f, ATA_UDMA5
, },
80 { "vt82c686b", PCI_DEVICE_ID_VIA_82C686
, 0x40, 0x4f, ATA_UDMA5
, },
81 { "vt82c686a", PCI_DEVICE_ID_VIA_82C686
, 0x10, 0x2f, ATA_UDMA4
, },
82 { "vt82c686", PCI_DEVICE_ID_VIA_82C686
, 0x00, 0x0f, ATA_UDMA2
, VIA_BAD_CLK66
},
83 { "vt82c596b", PCI_DEVICE_ID_VIA_82C596
, 0x10, 0x2f, ATA_UDMA4
, },
84 { "vt82c596a", PCI_DEVICE_ID_VIA_82C596
, 0x00, 0x0f, ATA_UDMA2
, VIA_BAD_CLK66
},
85 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0
, 0x47, 0x4f, ATA_UDMA2
, VIA_SET_FIFO
},
86 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0
, 0x40, 0x46, ATA_UDMA2
, VIA_SET_FIFO
| VIA_BAD_PREQ
},
87 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0
, 0x30, 0x3f, ATA_UDMA2
, VIA_SET_FIFO
},
88 { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0
, 0x20, 0x2f, ATA_UDMA2
, VIA_SET_FIFO
},
89 { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0
, 0x00, 0x0f, 0x00, VIA_SET_FIFO
},
90 { "vt82c576", PCI_DEVICE_ID_VIA_82C576
, 0x00, 0x2f, 0x00, VIA_SET_FIFO
| VIA_NO_UNMASK
},
91 { "vt82c576", PCI_DEVICE_ID_VIA_82C576
, 0x00, 0x2f, 0x00, VIA_SET_FIFO
| VIA_NO_UNMASK
| VIA_BAD_ID
},
95 static unsigned int via_clock
;
96 static char *via_dma
[] = { "16", "25", "33", "44", "66", "100", "133" };
100 struct via_isa_bridge
*via_config
;
101 unsigned int via_80w
;
105 * via_set_speed - write timing registers
108 * @timing: IDE timing data to use
110 * via_set_speed writes timing values to the chipset registers
113 static void via_set_speed(ide_hwif_t
*hwif
, u8 dn
, struct ide_timing
*timing
)
115 struct pci_dev
*dev
= to_pci_dev(hwif
->dev
);
116 struct via82cxxx_dev
*vdev
= pci_get_drvdata(dev
);
119 if (~vdev
->via_config
->flags
& VIA_BAD_AST
) {
120 pci_read_config_byte(dev
, VIA_ADDRESS_SETUP
, &t
);
121 t
= (t
& ~(3 << ((3 - dn
) << 1))) | ((clamp_val(timing
->setup
, 1, 4) - 1) << ((3 - dn
) << 1));
122 pci_write_config_byte(dev
, VIA_ADDRESS_SETUP
, t
);
125 pci_write_config_byte(dev
, VIA_8BIT_TIMING
+ (1 - (dn
>> 1)),
126 ((clamp_val(timing
->act8b
, 1, 16) - 1) << 4) | (clamp_val(timing
->rec8b
, 1, 16) - 1));
128 pci_write_config_byte(dev
, VIA_DRIVE_TIMING
+ (3 - dn
),
129 ((clamp_val(timing
->active
, 1, 16) - 1) << 4) | (clamp_val(timing
->recover
, 1, 16) - 1));
131 switch (vdev
->via_config
->udma_mask
) {
132 case ATA_UDMA2
: t
= timing
->udma
? (0xe0 | (clamp_val(timing
->udma
, 2, 5) - 2)) : 0x03; break;
133 case ATA_UDMA4
: t
= timing
->udma
? (0xe8 | (clamp_val(timing
->udma
, 2, 9) - 2)) : 0x0f; break;
134 case ATA_UDMA5
: t
= timing
->udma
? (0xe0 | (clamp_val(timing
->udma
, 2, 9) - 2)) : 0x07; break;
135 case ATA_UDMA6
: t
= timing
->udma
? (0xe0 | (clamp_val(timing
->udma
, 2, 9) - 2)) : 0x07; break;
139 pci_write_config_byte(dev
, VIA_UDMA_TIMING
+ (3 - dn
), t
);
143 * via_set_drive - configure transfer mode
144 * @drive: Drive to set up
145 * @speed: desired speed
147 * via_set_drive() computes timing values configures the chipset to
148 * a desired transfer mode. It also can be called by upper layers.
151 static void via_set_drive(ide_drive_t
*drive
, const u8 speed
)
153 ide_hwif_t
*hwif
= drive
->hwif
;
154 ide_drive_t
*peer
= hwif
->drives
+ (~drive
->dn
& 1);
155 struct pci_dev
*dev
= to_pci_dev(hwif
->dev
);
156 struct via82cxxx_dev
*vdev
= pci_get_drvdata(dev
);
157 struct ide_timing t
, p
;
160 T
= 1000000000 / via_clock
;
162 switch (vdev
->via_config
->udma_mask
) {
163 case ATA_UDMA2
: UT
= T
; break;
164 case ATA_UDMA4
: UT
= T
/2; break;
165 case ATA_UDMA5
: UT
= T
/3; break;
166 case ATA_UDMA6
: UT
= T
/4; break;
170 ide_timing_compute(drive
, speed
, &t
, T
, UT
);
173 ide_timing_compute(peer
, peer
->current_speed
, &p
, T
, UT
);
174 ide_timing_merge(&p
, &t
, &t
, IDE_TIMING_8BIT
);
177 via_set_speed(HWIF(drive
), drive
->dn
, &t
);
181 * via_set_pio_mode - set host controller for PIO mode
183 * @pio: PIO mode number
185 * A callback from the upper layers for PIO-only tuning.
188 static void via_set_pio_mode(ide_drive_t
*drive
, const u8 pio
)
190 via_set_drive(drive
, XFER_PIO_0
+ pio
);
193 static struct via_isa_bridge
*via_config_find(struct pci_dev
**isa
)
195 struct via_isa_bridge
*via_config
;
197 for (via_config
= via_isa_bridges
; via_config
->id
; via_config
++)
198 if ((*isa
= pci_get_device(PCI_VENDOR_ID_VIA
+
199 !!(via_config
->flags
& VIA_BAD_ID
),
200 via_config
->id
, NULL
))) {
202 if ((*isa
)->revision
>= via_config
->rev_min
&&
203 (*isa
)->revision
<= via_config
->rev_max
)
212 * Check and handle 80-wire cable presence
214 static void __devinit
via_cable_detect(struct via82cxxx_dev
*vdev
, u32 u
)
218 switch (vdev
->via_config
->udma_mask
) {
220 for (i
= 24; i
>= 0; i
-= 8)
221 if (((u
>> (i
& 16)) & 8) &&
223 (((u
>> i
) & 7) < 2)) {
228 vdev
->via_80w
|= (1 << (1 - (i
>> 4)));
233 for (i
= 24; i
>= 0; i
-= 8)
234 if (((u
>> i
) & 0x10) ||
235 (((u
>> i
) & 0x20) &&
236 (((u
>> i
) & 7) < 4))) {
237 /* BIOS 80-wire bit or
238 * UDMA w/ < 60ns/cycle
240 vdev
->via_80w
|= (1 << (1 - (i
>> 4)));
245 for (i
= 24; i
>= 0; i
-= 8)
246 if (((u
>> i
) & 0x10) ||
247 (((u
>> i
) & 0x20) &&
248 (((u
>> i
) & 7) < 6))) {
249 /* BIOS 80-wire bit or
250 * UDMA w/ < 60ns/cycle
252 vdev
->via_80w
|= (1 << (1 - (i
>> 4)));
259 * init_chipset_via82cxxx - initialization handler
261 * @name: Name of interface
263 * The initialization callback. Here we determine the IDE chip type
264 * and initialize its drive independent registers.
267 static unsigned int __devinit
init_chipset_via82cxxx(struct pci_dev
*dev
, const char *name
)
269 struct pci_dev
*isa
= NULL
;
270 struct via82cxxx_dev
*vdev
;
271 struct via_isa_bridge
*via_config
;
275 vdev
= kzalloc(sizeof(*vdev
), GFP_KERNEL
);
277 printk(KERN_ERR
"VP_IDE: out of memory :(\n");
280 pci_set_drvdata(dev
, vdev
);
283 * Find the ISA bridge to see how good the IDE is.
285 vdev
->via_config
= via_config
= via_config_find(&isa
);
287 /* We checked this earlier so if it fails here deeep badness
290 BUG_ON(!via_config
->id
);
293 * Detect cable and configure Clk66
295 pci_read_config_dword(dev
, VIA_UDMA_TIMING
, &u
);
297 via_cable_detect(vdev
, u
);
299 if (via_config
->udma_mask
== ATA_UDMA4
) {
301 pci_write_config_dword(dev
, VIA_UDMA_TIMING
, u
|0x80008);
302 } else if (via_config
->flags
& VIA_BAD_CLK66
) {
303 /* Would cause trouble on 596a and 686 */
304 pci_write_config_dword(dev
, VIA_UDMA_TIMING
, u
& ~0x80008);
308 * Check whether interfaces are enabled.
311 pci_read_config_byte(dev
, VIA_IDE_ENABLE
, &v
);
314 * Set up FIFO sizes and thresholds.
317 pci_read_config_byte(dev
, VIA_FIFO_CONFIG
, &t
);
319 /* Disable PREQ# till DDACK# */
320 if (via_config
->flags
& VIA_BAD_PREQ
) {
321 /* Would crash on 586b rev 41 */
325 /* Fix FIFO split between channels */
326 if (via_config
->flags
& VIA_SET_FIFO
) {
329 case 2: t
|= 0x00; break; /* 16 on primary */
330 case 1: t
|= 0x60; break; /* 16 on secondary */
331 case 3: t
|= 0x20; break; /* 8 pri 8 sec */
335 pci_write_config_byte(dev
, VIA_FIFO_CONFIG
, t
);
338 * Determine system bus clock.
341 via_clock
= (ide_pci_clk
? ide_pci_clk
: 33) * 1000;
344 case 33000: via_clock
= 33333; break;
345 case 37000: via_clock
= 37500; break;
346 case 41000: via_clock
= 41666; break;
349 if (via_clock
< 20000 || via_clock
> 50000) {
350 printk(KERN_WARNING
"VP_IDE: User given PCI clock speed "
351 "impossible (%d), using 33 MHz instead.\n", via_clock
);
352 printk(KERN_WARNING
"VP_IDE: Use ide0=ata66 if you want "
353 "to assume 80-wire cable.\n");
358 * Print the boot message.
361 printk(KERN_INFO
"VP_IDE: VIA %s (rev %02x) IDE %sDMA%s "
362 "controller on pci%s\n",
363 via_config
->name
, isa
->revision
,
364 via_config
->udma_mask
? "U" : "MW",
365 via_dma
[via_config
->udma_mask
?
366 (fls(via_config
->udma_mask
) - 1) : 0],
374 * Cable special cases
377 static const struct dmi_system_id cable_dmi_table
[] = {
379 .ident
= "Acer Ferrari 3400",
381 DMI_MATCH(DMI_BOARD_VENDOR
, "Acer,Inc."),
382 DMI_MATCH(DMI_BOARD_NAME
, "Ferrari 3400"),
388 static int via_cable_override(struct pci_dev
*pdev
)
391 if (dmi_check_system(cable_dmi_table
))
394 /* Arima W730-K8/Targa Visionary 811/... */
395 if (pdev
->subsystem_vendor
== 0x161F &&
396 pdev
->subsystem_device
== 0x2032)
402 static u8 __devinit
via82cxxx_cable_detect(ide_hwif_t
*hwif
)
404 struct pci_dev
*pdev
= to_pci_dev(hwif
->dev
);
405 struct via82cxxx_dev
*vdev
= pci_get_drvdata(pdev
);
407 if (via_cable_override(pdev
))
408 return ATA_CBL_PATA40_SHORT
;
410 if ((vdev
->via_80w
>> hwif
->channel
) & 1)
411 return ATA_CBL_PATA80
;
413 return ATA_CBL_PATA40
;
416 static const struct ide_port_ops via_port_ops
= {
417 .set_pio_mode
= via_set_pio_mode
,
418 .set_dma_mode
= via_set_drive
,
419 .cable_detect
= via82cxxx_cable_detect
,
422 static const struct ide_port_info via82cxxx_chipset __devinitdata
= {
424 .init_chipset
= init_chipset_via82cxxx
,
425 .enablebits
= { { 0x40, 0x02, 0x02 }, { 0x40, 0x01, 0x01 } },
426 .port_ops
= &via_port_ops
,
427 .host_flags
= IDE_HFLAG_PIO_NO_BLACKLIST
|
428 IDE_HFLAG_ABUSE_SET_DMA_MODE
|
429 IDE_HFLAG_POST_SET_MODE
|
431 .pio_mask
= ATA_PIO5
,
432 .swdma_mask
= ATA_SWDMA2
,
433 .mwdma_mask
= ATA_MWDMA2
,
436 static int __devinit
via_init_one(struct pci_dev
*dev
, const struct pci_device_id
*id
)
438 struct pci_dev
*isa
= NULL
;
439 struct via_isa_bridge
*via_config
;
440 u8 idx
= id
->driver_data
;
441 struct ide_port_info d
;
443 d
= via82cxxx_chipset
;
446 * Find the ISA bridge and check we know what it is.
448 via_config
= via_config_find(&isa
);
450 if (!via_config
->id
) {
451 printk(KERN_WARNING
"VP_IDE: Unknown VIA SouthBridge, disabling DMA.\n");
456 d
.host_flags
|= IDE_HFLAG_NO_AUTODMA
;
458 d
.enablebits
[1].reg
= d
.enablebits
[0].reg
= 0;
460 if ((via_config
->flags
& VIA_NO_UNMASK
) == 0)
461 d
.host_flags
|= IDE_HFLAG_UNMASK_IRQS
;
463 #ifdef CONFIG_PPC_CHRP
464 if (machine_is(chrp
) && _chrp_type
== _CHRP_Pegasos
)
465 d
.host_flags
|= IDE_HFLAG_FORCE_LEGACY_IRQS
;
468 d
.udma_mask
= via_config
->udma_mask
;
470 return ide_setup_pci_device(dev
, &d
);
473 static const struct pci_device_id via_pci_tbl
[] = {
474 { PCI_VDEVICE(VIA
, PCI_DEVICE_ID_VIA_82C576_1
), 0 },
475 { PCI_VDEVICE(VIA
, PCI_DEVICE_ID_VIA_82C586_1
), 0 },
476 { PCI_VDEVICE(VIA
, PCI_DEVICE_ID_VIA_CX700_IDE
), 0 },
477 { PCI_VDEVICE(VIA
, PCI_DEVICE_ID_VIA_6410
), 1 },
478 { PCI_VDEVICE(VIA
, PCI_DEVICE_ID_VIA_SATA_EIDE
), 1 },
481 MODULE_DEVICE_TABLE(pci
, via_pci_tbl
);
483 static struct pci_driver driver
= {
485 .id_table
= via_pci_tbl
,
486 .probe
= via_init_one
,
489 static int __init
via_ide_init(void)
491 return ide_pci_register_driver(&driver
);
494 module_init(via_ide_init
);
496 MODULE_AUTHOR("Vojtech Pavlik, Michel Aubry, Jeff Garzik, Andre Hedrick");
497 MODULE_DESCRIPTION("PCI driver module for VIA IDE");
498 MODULE_LICENSE("GPL");