2 * dv1394.c - DV input/output over IEEE 1394 on OHCI chips
3 * Copyright (C)2001 Daniel Maas <dmaas@dcine.com>
4 * receive by Dan Dennedy <dan@dennedy.org>
7 * video1394.c - video driver for OHCI 1394 boards
8 * Copyright (C)1999,2000 Sebastien Rougeaux <sebastien.rougeaux@anu.edu.au>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software Foundation,
22 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
28 I designed dv1394 as a "pipe" that you can use to shoot DV onto a
29 FireWire bus. In transmission mode, dv1394 does the following:
31 1. accepts contiguous frames of DV data from user-space, via write()
32 or mmap() (see dv1394.h for the complete API)
33 2. wraps IEC 61883 packets around the DV data, inserting
34 empty synchronization packets as necessary
35 3. assigns accurate SYT timestamps to the outgoing packets
36 4. shoots them out using the OHCI card's IT DMA engine
38 Thanks to Dan Dennedy, we now have a receive mode that does the following:
40 1. accepts raw IEC 61883 packets from the OHCI card
41 2. re-assembles the DV data payloads into contiguous frames,
42 discarding empty packets
43 3. sends the DV data to user-space via read() or mmap()
49 - tunable frame-drop behavior: either loop last frame, or halt transmission
51 - use a scatter/gather buffer for DMA programs (f->descriptor_pool)
52 so that we don't rely on allocating 64KB of contiguous kernel memory
53 via pci_alloc_consistent()
56 - during reception, better handling of dropped frames and continuity errors
57 - during reception, prevent DMA from bypassing the irq tasklets
58 - reduce irq rate during reception (1/250 packets).
59 - add many more internal buffers during reception with scatter/gather dma.
60 - add dbc (continuity) checking on receive, increment status.dropped_frames
62 - restart IT DMA after a bus reset
63 - safely obtain and release ISO Tx channels in cooperation with OHCI driver
64 - map received DIF blocks to their proper location in DV frame (ensure
65 recovery if dropped packet)
66 - handle bus resets gracefully (OHCI card seems to take care of this itself(!))
67 - do not allow resizing the user_buf once allocated; eliminate nuke_buffer_mappings
68 - eliminated #ifdef DV1394_DEBUG_LEVEL by inventing macros debug_printk and irq_printk
69 - added wmb() and mb() to places where PCI read/write ordering needs to be enforced
70 - set video->id correctly
71 - store video_cards in an array indexed by OHCI card ID, rather than a list
72 - implement DMA context allocation to cooperate with other users of the OHCI
73 - fix all XXX showstoppers
74 - disable IR/IT DMA interrupts on shutdown
75 - flush pci writes to the card by issuing a read
76 - character device dispatching
77 - switch over to the new kernel DMA API (pci_map_*()) (* needs testing on platforms with IOMMU!)
78 - keep all video_cards in a list (for open() via chardev), set file->private_data = video
79 - dv1394_poll should indicate POLLIN when receiving buffers are available
80 - add proc fs interface to set cip_n, cip_d, syt_offset, and video signal
81 - expose xmit and recv as separate devices (not exclusive)
82 - expose NTSC and PAL as separate devices (can be overridden)
86 #include <linux/kernel.h>
87 #include <linux/list.h>
88 #include <linux/slab.h>
89 #include <linux/interrupt.h>
90 #include <linux/wait.h>
91 #include <linux/errno.h>
92 #include <linux/module.h>
93 #include <linux/init.h>
94 #include <linux/pci.h>
96 #include <linux/poll.h>
97 #include <linux/smp_lock.h>
98 #include <linux/mutex.h>
99 #include <linux/bitops.h>
100 #include <asm/byteorder.h>
101 #include <asm/atomic.h>
103 #include <asm/uaccess.h>
104 #include <linux/delay.h>
105 #include <asm/pgtable.h>
106 #include <asm/page.h>
107 #include <linux/sched.h>
108 #include <linux/types.h>
109 #include <linux/vmalloc.h>
110 #include <linux/string.h>
111 #include <linux/compat.h>
112 #include <linux/cdev.h>
115 #include "dv1394-private.h"
116 #include "highlevel.h"
118 #include "ieee1394.h"
119 #include "ieee1394_core.h"
120 #include "ieee1394_hotplug.h"
121 #include "ieee1394_types.h"
123 #include "ohci1394.h"
126 0 - no debugging messages
127 1 - some debugging messages, but none during DMA frame transmission
128 2 - lots of messages, including during DMA frame transmission
129 (will cause undeflows if your machine is too slow!)
132 #define DV1394_DEBUG_LEVEL 0
134 /* for debugging use ONLY: allow more than one open() of the device */
135 /* #define DV1394_ALLOW_MORE_THAN_ONE_OPEN 1 */
137 #if DV1394_DEBUG_LEVEL >= 2
138 #define irq_printk( args... ) printk( args )
140 #define irq_printk( args... )
143 #if DV1394_DEBUG_LEVEL >= 1
144 #define debug_printk( args... ) printk( args)
146 #define debug_printk( args... )
149 /* issue a dummy PCI read to force the preceding write
150 to be posted to the PCI bus immediately */
152 static inline void flush_pci_write(struct ti_ohci
*ohci
)
155 reg_read(ohci
, OHCI1394_IsochronousCycleTimer
);
158 static void it_tasklet_func(unsigned long data
);
159 static void ir_tasklet_func(unsigned long data
);
162 static long dv1394_compat_ioctl(struct file
*file
, unsigned int cmd
,
168 /* list of all video_cards */
169 static LIST_HEAD(dv1394_cards
);
170 static DEFINE_SPINLOCK(dv1394_cards_lock
);
172 /* translate from a struct file* to the corresponding struct video_card* */
174 static inline struct video_card
* file_to_video_card(struct file
*file
)
176 return (struct video_card
*) file
->private_data
;
179 /*** FRAME METHODS *********************************************************/
181 static void frame_reset(struct frame
*f
)
183 f
->state
= FRAME_CLEAR
;
186 f
->frame_begin_timestamp
= NULL
;
187 f
->assigned_timestamp
= 0;
190 f
->mid_frame_timestamp
= NULL
;
191 f
->frame_end_timestamp
= NULL
;
192 f
->frame_end_branch
= NULL
;
195 static struct frame
* frame_new(unsigned int frame_num
, struct video_card
*video
)
197 struct frame
*f
= kmalloc(sizeof(*f
), GFP_KERNEL
);
202 f
->frame_num
= frame_num
;
204 f
->header_pool
= pci_alloc_consistent(f
->video
->ohci
->dev
, PAGE_SIZE
, &f
->header_pool_dma
);
205 if (!f
->header_pool
) {
206 printk(KERN_ERR
"dv1394: failed to allocate CIP header pool\n");
211 debug_printk("dv1394: frame_new: allocated CIP header pool at virt 0x%08lx (contig) dma 0x%08lx size %ld\n",
212 (unsigned long) f
->header_pool
, (unsigned long) f
->header_pool_dma
, PAGE_SIZE
);
214 f
->descriptor_pool_size
= MAX_PACKETS
* sizeof(struct DMA_descriptor_block
);
215 /* make it an even # of pages */
216 f
->descriptor_pool_size
+= PAGE_SIZE
- (f
->descriptor_pool_size
%PAGE_SIZE
);
218 f
->descriptor_pool
= pci_alloc_consistent(f
->video
->ohci
->dev
,
219 f
->descriptor_pool_size
,
220 &f
->descriptor_pool_dma
);
221 if (!f
->descriptor_pool
) {
222 pci_free_consistent(f
->video
->ohci
->dev
, PAGE_SIZE
, f
->header_pool
, f
->header_pool_dma
);
227 debug_printk("dv1394: frame_new: allocated DMA program memory at virt 0x%08lx (contig) dma 0x%08lx size %ld\n",
228 (unsigned long) f
->descriptor_pool
, (unsigned long) f
->descriptor_pool_dma
, f
->descriptor_pool_size
);
236 static void frame_delete(struct frame
*f
)
238 pci_free_consistent(f
->video
->ohci
->dev
, PAGE_SIZE
, f
->header_pool
, f
->header_pool_dma
);
239 pci_free_consistent(f
->video
->ohci
->dev
, f
->descriptor_pool_size
, f
->descriptor_pool
, f
->descriptor_pool_dma
);
247 frame_prepare() - build the DMA program for transmitting
249 Frame_prepare() must be called OUTSIDE the video->spinlock.
250 However, frame_prepare() must still be serialized, so
251 it should be called WITH the video->mtx taken.
254 static void frame_prepare(struct video_card
*video
, unsigned int this_frame
)
256 struct frame
*f
= video
->frames
[this_frame
];
259 struct DMA_descriptor_block
*block
;
260 dma_addr_t block_dma
;
261 struct CIP_header
*cip
;
264 unsigned int n_descriptors
, full_packets
, packets_per_frame
, payload_size
;
266 /* these flags denote packets that need special attention */
267 int empty_packet
, first_packet
, last_packet
, mid_packet
;
269 u32
*branch_address
, *last_branch_address
= NULL
;
270 unsigned long data_p
;
271 int first_packet_empty
= 0;
272 u32 cycleTimer
, ct_sec
, ct_cyc
, ct_off
;
273 unsigned long irq_flags
;
275 irq_printk("frame_prepare( %d ) ---------------------\n", this_frame
);
281 if (video
->pal_or_ntsc
== DV1394_PAL
)
282 packets_per_frame
= DV1394_PAL_PACKETS_PER_FRAME
;
284 packets_per_frame
= DV1394_NTSC_PACKETS_PER_FRAME
;
286 while ( full_packets
< packets_per_frame
) {
287 empty_packet
= first_packet
= last_packet
= mid_packet
= 0;
289 data_p
= f
->data
+ full_packets
* 480;
291 /************************************************/
292 /* allocate a descriptor block and a CIP header */
293 /************************************************/
295 /* note: these should NOT cross a page boundary (DMA restriction) */
297 if (f
->n_packets
>= MAX_PACKETS
) {
298 printk(KERN_ERR
"dv1394: FATAL ERROR: max packet count exceeded\n");
302 /* the block surely won't cross a page boundary,
303 since an even number of descriptor_blocks fit on a page */
304 block
= &(f
->descriptor_pool
[f
->n_packets
]);
306 /* DMA address of the block = offset of block relative
307 to the kernel base address of the descriptor pool
308 + DMA base address of the descriptor pool */
309 block_dma
= ((unsigned long) block
- (unsigned long) f
->descriptor_pool
) + f
->descriptor_pool_dma
;
312 /* the whole CIP pool fits on one page, so no worries about boundaries */
313 if ( ((unsigned long) &(f
->header_pool
[f
->n_packets
]) - (unsigned long) f
->header_pool
)
315 printk(KERN_ERR
"dv1394: FATAL ERROR: no room to allocate CIP header\n");
319 cip
= &(f
->header_pool
[f
->n_packets
]);
321 /* DMA address of the CIP header = offset of cip
322 relative to kernel base address of the header pool
323 + DMA base address of the header pool */
324 cip_dma
= (unsigned long) cip
% PAGE_SIZE
+ f
->header_pool_dma
;
326 /* is this an empty packet? */
328 if (video
->cip_accum
> (video
->cip_d
- video
->cip_n
)) {
331 video
->cip_accum
-= (video
->cip_d
- video
->cip_n
);
334 video
->cip_accum
+= video
->cip_n
;
337 /* there are three important packets each frame:
339 the first packet in the frame - we ask the card to record the timestamp when
340 this packet is actually sent, so we can monitor
341 how accurate our timestamps are. Also, the first
342 packet serves as a semaphore to let us know that
343 it's OK to free the *previous* frame's DMA buffer
345 the last packet in the frame - this packet is used to detect buffer underflows.
346 if this is the last ready frame, the last DMA block
347 will have a branch back to the beginning of the frame
348 (so that the card will re-send the frame on underflow).
349 if this branch gets taken, we know that at least one
350 frame has been dropped. When the next frame is ready,
351 the branch is pointed to its first packet, and the
352 semaphore is disabled.
354 a "mid" packet slightly before the end of the frame - this packet should trigger
355 an interrupt so we can go and assign a timestamp to the first packet
356 in the next frame. We don't use the very last packet in the frame
357 for this purpose, because that would leave very little time to set
358 the timestamp before DMA starts on the next frame.
361 if (f
->n_packets
== 0) {
363 } else if ( full_packets
== (packets_per_frame
-1) ) {
365 } else if (f
->n_packets
== packets_per_frame
) {
370 /********************/
371 /* setup CIP header */
372 /********************/
374 /* the timestamp will be written later from the
375 mid-frame interrupt handler. For now we just
376 store the address of the CIP header(s) that
379 /* first packet in the frame needs a timestamp */
383 first_packet_empty
= 1;
385 } else if (first_packet_empty
&& (f
->n_packets
== 1) ) {
386 /* if the first packet was empty, the second
387 packet's CIP header also needs a timestamp */
392 /* the node ID number of the OHCI card */
393 reg_read(video
->ohci
, OHCI1394_NodeID
) & 0x3F,
394 video
->continuity_counter
,
396 0xFFFF /* the timestamp is filled in later */);
398 /* advance counter, only for full packets */
399 if ( ! empty_packet
)
400 video
->continuity_counter
++;
402 /******************************/
403 /* setup DMA descriptor block */
404 /******************************/
406 /* first descriptor - OUTPUT_MORE_IMMEDIATE, for the controller's IT header */
407 fill_output_more_immediate( &(block
->u
.out
.omi
), 1, video
->channel
, 0, payload_size
);
410 /* second descriptor - OUTPUT_LAST for CIP header */
411 fill_output_last( &(block
->u
.out
.u
.empty
.ol
),
413 /* want completion status on all interesting packets */
414 (first_packet
|| mid_packet
|| last_packet
) ? 1 : 0,
416 /* want interrupts on all interesting packets */
417 (first_packet
|| mid_packet
|| last_packet
) ? 1 : 0,
419 sizeof(struct CIP_header
), /* data size */
423 f
->frame_begin_timestamp
= &(block
->u
.out
.u
.empty
.ol
.q
[3]);
425 f
->mid_frame_timestamp
= &(block
->u
.out
.u
.empty
.ol
.q
[3]);
426 else if (last_packet
) {
427 f
->frame_end_timestamp
= &(block
->u
.out
.u
.empty
.ol
.q
[3]);
428 f
->frame_end_branch
= &(block
->u
.out
.u
.empty
.ol
.q
[2]);
431 branch_address
= &(block
->u
.out
.u
.empty
.ol
.q
[2]);
434 f
->first_n_descriptors
= n_descriptors
;
436 } else { /* full packet */
438 /* second descriptor - OUTPUT_MORE for CIP header */
439 fill_output_more( &(block
->u
.out
.u
.full
.om
),
440 sizeof(struct CIP_header
), /* data size */
444 /* third (and possibly fourth) descriptor - for DV data */
445 /* the 480-byte payload can cross a page boundary; if so,
446 we need to split it into two DMA descriptors */
448 /* does the 480-byte data payload cross a page boundary? */
449 if ( (PAGE_SIZE
- ((unsigned long)data_p
% PAGE_SIZE
) ) < 480 ) {
451 /* page boundary crossed */
453 fill_output_more( &(block
->u
.out
.u
.full
.u
.cross
.om
),
454 /* data size - how much of data_p fits on the first page */
455 PAGE_SIZE
- (data_p
% PAGE_SIZE
),
457 /* DMA address of data_p */
458 dma_region_offset_to_bus(&video
->dv_buf
,
459 data_p
- (unsigned long) video
->dv_buf
.kvirt
));
461 fill_output_last( &(block
->u
.out
.u
.full
.u
.cross
.ol
),
463 /* want completion status on all interesting packets */
464 (first_packet
|| mid_packet
|| last_packet
) ? 1 : 0,
466 /* want interrupt on all interesting packets */
467 (first_packet
|| mid_packet
|| last_packet
) ? 1 : 0,
469 /* data size - remaining portion of data_p */
470 480 - (PAGE_SIZE
- (data_p
% PAGE_SIZE
)),
472 /* DMA address of data_p + PAGE_SIZE - (data_p % PAGE_SIZE) */
473 dma_region_offset_to_bus(&video
->dv_buf
,
474 data_p
+ PAGE_SIZE
- (data_p
% PAGE_SIZE
) - (unsigned long) video
->dv_buf
.kvirt
));
477 f
->frame_begin_timestamp
= &(block
->u
.out
.u
.full
.u
.cross
.ol
.q
[3]);
479 f
->mid_frame_timestamp
= &(block
->u
.out
.u
.full
.u
.cross
.ol
.q
[3]);
480 else if (last_packet
) {
481 f
->frame_end_timestamp
= &(block
->u
.out
.u
.full
.u
.cross
.ol
.q
[3]);
482 f
->frame_end_branch
= &(block
->u
.out
.u
.full
.u
.cross
.ol
.q
[2]);
485 branch_address
= &(block
->u
.out
.u
.full
.u
.cross
.ol
.q
[2]);
489 f
->first_n_descriptors
= n_descriptors
;
494 /* fits on one page */
496 fill_output_last( &(block
->u
.out
.u
.full
.u
.nocross
.ol
),
498 /* want completion status on all interesting packets */
499 (first_packet
|| mid_packet
|| last_packet
) ? 1 : 0,
501 /* want interrupt on all interesting packets */
502 (first_packet
|| mid_packet
|| last_packet
) ? 1 : 0,
504 480, /* data size (480 bytes of DV data) */
507 /* DMA address of data_p */
508 dma_region_offset_to_bus(&video
->dv_buf
,
509 data_p
- (unsigned long) video
->dv_buf
.kvirt
));
512 f
->frame_begin_timestamp
= &(block
->u
.out
.u
.full
.u
.nocross
.ol
.q
[3]);
514 f
->mid_frame_timestamp
= &(block
->u
.out
.u
.full
.u
.nocross
.ol
.q
[3]);
515 else if (last_packet
) {
516 f
->frame_end_timestamp
= &(block
->u
.out
.u
.full
.u
.nocross
.ol
.q
[3]);
517 f
->frame_end_branch
= &(block
->u
.out
.u
.full
.u
.nocross
.ol
.q
[2]);
520 branch_address
= &(block
->u
.out
.u
.full
.u
.nocross
.ol
.q
[2]);
524 f
->first_n_descriptors
= n_descriptors
;
530 /* link this descriptor block into the DMA program by filling in
531 the branch address of the previous block */
533 /* note: we are not linked into the active DMA chain yet */
535 if (last_branch_address
) {
536 *(last_branch_address
) = cpu_to_le32(block_dma
| n_descriptors
);
539 last_branch_address
= branch_address
;
546 /* when we first assemble a new frame, set the final branch
547 to loop back up to the top */
548 *(f
->frame_end_branch
) = cpu_to_le32(f
->descriptor_pool_dma
| f
->first_n_descriptors
);
550 /* make the latest version of this frame visible to the PCI card */
551 dma_region_sync_for_device(&video
->dv_buf
, f
->data
- (unsigned long) video
->dv_buf
.kvirt
, video
->frame_size
);
553 /* lock against DMA interrupt */
554 spin_lock_irqsave(&video
->spinlock
, irq_flags
);
556 f
->state
= FRAME_READY
;
558 video
->n_clear_frames
--;
560 last_frame
= video
->first_clear_frame
- 1;
561 if (last_frame
== -1)
562 last_frame
= video
->n_frames
-1;
564 video
->first_clear_frame
= (video
->first_clear_frame
+ 1) % video
->n_frames
;
566 irq_printk(" frame %d prepared, active_frame = %d, n_clear_frames = %d, first_clear_frame = %d\n last=%d\n",
567 this_frame
, video
->active_frame
, video
->n_clear_frames
, video
->first_clear_frame
, last_frame
);
569 irq_printk(" begin_ts %08lx mid_ts %08lx end_ts %08lx end_br %08lx\n",
570 (unsigned long) f
->frame_begin_timestamp
,
571 (unsigned long) f
->mid_frame_timestamp
,
572 (unsigned long) f
->frame_end_timestamp
,
573 (unsigned long) f
->frame_end_branch
);
575 if (video
->active_frame
!= -1) {
577 /* if DMA is already active, we are almost done */
578 /* just link us onto the active DMA chain */
579 if (video
->frames
[last_frame
]->frame_end_branch
) {
582 /* point the previous frame's tail to this frame's head */
583 *(video
->frames
[last_frame
]->frame_end_branch
) = cpu_to_le32(f
->descriptor_pool_dma
| f
->first_n_descriptors
);
585 /* this write MUST precede the next one, or we could silently drop frames */
588 /* disable the want_status semaphore on the last packet */
589 temp
= le32_to_cpu(*(video
->frames
[last_frame
]->frame_end_branch
- 2));
591 *(video
->frames
[last_frame
]->frame_end_branch
- 2) = cpu_to_le32(temp
);
593 /* flush these writes to memory ASAP */
594 flush_pci_write(video
->ohci
);
597 ideally the writes should be "atomic": if
598 the OHCI card reads the want_status flag in
599 between them, we'll falsely report a
600 dropped frame. Hopefully this window is too
601 small to really matter, and the consequence
602 is rather harmless. */
605 irq_printk(" new frame %d linked onto DMA chain\n", this_frame
);
608 printk(KERN_ERR
"dv1394: last frame not ready???\n");
613 u32 transmit_sec
, transmit_cyc
;
616 /* DMA is stopped, so this is the very first frame */
617 video
->active_frame
= this_frame
;
619 /* set CommandPtr to address and size of first descriptor block */
620 reg_write(video
->ohci
, video
->ohci_IsoXmitCommandPtr
,
621 video
->frames
[video
->active_frame
]->descriptor_pool_dma
|
622 f
->first_n_descriptors
);
624 /* assign a timestamp based on the current cycle time...
625 We'll tell the card to begin DMA 100 cycles from now,
626 and assign a timestamp 103 cycles from now */
628 cycleTimer
= reg_read(video
->ohci
, OHCI1394_IsochronousCycleTimer
);
630 ct_sec
= cycleTimer
>> 25;
631 ct_cyc
= (cycleTimer
>> 12) & 0x1FFF;
632 ct_off
= cycleTimer
& 0xFFF;
634 transmit_sec
= ct_sec
;
635 transmit_cyc
= ct_cyc
+ 100;
637 transmit_sec
+= transmit_cyc
/8000;
638 transmit_cyc
%= 8000;
641 ts_cyc
= transmit_cyc
+ 3;
644 f
->assigned_timestamp
= (ts_cyc
&0xF) << 12;
646 /* now actually write the timestamp into the appropriate CIP headers */
648 f
->cip_syt1
->b
[6] = f
->assigned_timestamp
>> 8;
649 f
->cip_syt1
->b
[7] = f
->assigned_timestamp
& 0xFF;
652 f
->cip_syt2
->b
[6] = f
->assigned_timestamp
>> 8;
653 f
->cip_syt2
->b
[7] = f
->assigned_timestamp
& 0xFF;
656 /* --- start DMA --- */
658 /* clear all bits in ContextControl register */
660 reg_write(video
->ohci
, video
->ohci_IsoXmitContextControlClear
, 0xFFFFFFFF);
663 /* the OHCI card has the ability to start ISO transmission on a
664 particular cycle (start-on-cycle). This way we can ensure that
665 the first DV frame will have an accurate timestamp.
667 However, start-on-cycle only appears to work if the OHCI card
668 is cycle master! Since the consequences of messing up the first
669 timestamp are minimal*, just disable start-on-cycle for now.
671 * my DV deck drops the first few frames before it "locks in;"
672 so the first frame having an incorrect timestamp is inconsequential.
676 reg_write(video
->ohci
, video
->ohci_IsoXmitContextControlSet
,
677 (1 << 31) /* enable start-on-cycle */
678 | ( (transmit_sec
& 0x3) << 29)
679 | (transmit_cyc
<< 16));
683 video
->dma_running
= 1;
685 /* set the 'run' bit */
686 reg_write(video
->ohci
, video
->ohci_IsoXmitContextControlSet
, 0x8000);
687 flush_pci_write(video
->ohci
);
689 /* --- DMA should be running now --- */
691 debug_printk(" Cycle = %4u ContextControl = %08x CmdPtr = %08x\n",
692 (reg_read(video
->ohci
, OHCI1394_IsochronousCycleTimer
) >> 12) & 0x1FFF,
693 reg_read(video
->ohci
, video
->ohci_IsoXmitContextControlSet
),
694 reg_read(video
->ohci
, video
->ohci_IsoXmitCommandPtr
));
696 debug_printk(" DMA start - current cycle %4u, transmit cycle %4u (%2u), assigning ts cycle %2u\n",
697 ct_cyc
, transmit_cyc
, transmit_cyc
& 0xF, ts_cyc
& 0xF);
699 #if DV1394_DEBUG_LEVEL >= 2
701 /* check if DMA is really running */
706 if (reg_read(video
->ohci
, video
->ohci_IsoXmitContextControlSet
) & (1 << 10)) {
707 printk("DMA ACTIVE after %d msec\n", i
);
713 printk("set = %08x, cmdPtr = %08x\n",
714 reg_read(video
->ohci
, video
->ohci_IsoXmitContextControlSet
),
715 reg_read(video
->ohci
, video
->ohci_IsoXmitCommandPtr
)
718 if ( ! (reg_read(video
->ohci
, video
->ohci_IsoXmitContextControlSet
) & (1 << 10)) ) {
719 printk("DMA did NOT go active after 20ms, event = %x\n",
720 reg_read(video
->ohci
, video
->ohci_IsoXmitContextControlSet
) & 0x1F);
722 printk("DMA is RUNNING!\n");
729 spin_unlock_irqrestore(&video
->spinlock
, irq_flags
);
734 /*** RECEIVE FUNCTIONS *****************************************************/
737 frame method put_packet
739 map and copy the packet data to its location in the frame
740 based upon DIF section and sequence
744 frame_put_packet (struct frame
*f
, struct packet
*p
)
746 int section_type
= p
->data
[0] >> 5; /* section type is in bits 5 - 7 */
747 int dif_sequence
= p
->data
[1] >> 4; /* dif sequence number is in bits 4 - 7 */
748 int dif_block
= p
->data
[2];
751 if (dif_sequence
> 11 || dif_block
> 149) return;
753 switch (section_type
) {
754 case 0: /* 1 Header block */
755 memcpy( (void *) f
->data
+ dif_sequence
* 150 * 80, p
->data
, 480);
758 case 1: /* 2 Subcode blocks */
759 memcpy( (void *) f
->data
+ dif_sequence
* 150 * 80 + (1 + dif_block
) * 80, p
->data
, 480);
762 case 2: /* 3 VAUX blocks */
763 memcpy( (void *) f
->data
+ dif_sequence
* 150 * 80 + (3 + dif_block
) * 80, p
->data
, 480);
766 case 3: /* 9 Audio blocks interleaved with video */
767 memcpy( (void *) f
->data
+ dif_sequence
* 150 * 80 + (6 + dif_block
* 16) * 80, p
->data
, 480);
770 case 4: /* 135 Video blocks interleaved with audio */
771 memcpy( (void *) f
->data
+ dif_sequence
* 150 * 80 + (7 + (dif_block
/ 15) + dif_block
) * 80, p
->data
, 480);
774 default: /* we can not handle any other data */
780 static void start_dma_receive(struct video_card
*video
)
782 if (video
->first_run
== 1) {
783 video
->first_run
= 0;
785 /* start DMA once all of the frames are READY */
786 video
->n_clear_frames
= 0;
787 video
->first_clear_frame
= -1;
788 video
->current_packet
= 0;
789 video
->active_frame
= 0;
791 /* reset iso recv control register */
792 reg_write(video
->ohci
, video
->ohci_IsoRcvContextControlClear
, 0xFFFFFFFF);
795 /* clear bufferFill, set isochHeader and speed (0=100) */
796 reg_write(video
->ohci
, video
->ohci_IsoRcvContextControlSet
, 0x40000000);
798 /* match on all tags, listen on channel */
799 reg_write(video
->ohci
, video
->ohci_IsoRcvContextMatch
, 0xf0000000 | video
->channel
);
801 /* address and first descriptor block + Z=1 */
802 reg_write(video
->ohci
, video
->ohci_IsoRcvCommandPtr
,
803 video
->frames
[0]->descriptor_pool_dma
| 1); /* Z=1 */
806 video
->dma_running
= 1;
809 reg_write(video
->ohci
, video
->ohci_IsoRcvContextControlSet
, 0x8000);
810 flush_pci_write(video
->ohci
);
812 debug_printk("dv1394: DMA started\n");
814 #if DV1394_DEBUG_LEVEL >= 2
818 for (i
= 0; i
< 1000; ++i
) {
820 if (reg_read(video
->ohci
, video
->ohci_IsoRcvContextControlSet
) & (1 << 10)) {
821 printk("DMA ACTIVE after %d msec\n", i
);
825 if ( reg_read(video
->ohci
, video
->ohci_IsoRcvContextControlSet
) & (1 << 11) ) {
826 printk("DEAD, event = %x\n",
827 reg_read(video
->ohci
, video
->ohci_IsoRcvContextControlSet
) & 0x1F);
829 printk("RUNNING!\n");
832 } else if ( reg_read(video
->ohci
, video
->ohci_IsoRcvContextControlSet
) & (1 << 11) ) {
833 debug_printk("DEAD, event = %x\n",
834 reg_read(video
->ohci
, video
->ohci_IsoRcvContextControlSet
) & 0x1F);
837 reg_write(video
->ohci
, video
->ohci_IsoRcvContextControlSet
, (1 << 12));
843 receive_packets() - build the DMA program for receiving
846 static void receive_packets(struct video_card
*video
)
848 struct DMA_descriptor_block
*block
= NULL
;
849 dma_addr_t block_dma
= 0;
850 struct packet
*data
= NULL
;
851 dma_addr_t data_dma
= 0;
852 u32
*last_branch_address
= NULL
;
853 unsigned long irq_flags
;
854 int want_interrupt
= 0;
855 struct frame
*f
= NULL
;
858 spin_lock_irqsave(&video
->spinlock
, irq_flags
);
860 for (j
= 0; j
< video
->n_frames
; j
++) {
863 if (j
> 0 && f
!= NULL
&& f
->frame_end_branch
!= NULL
)
864 *(f
->frame_end_branch
) = cpu_to_le32(video
->frames
[j
]->descriptor_pool_dma
| 1); /* set Z=1 */
866 f
= video
->frames
[j
];
868 for (i
= 0; i
< MAX_PACKETS
; i
++) {
869 /* locate a descriptor block and packet from the buffer */
870 block
= &(f
->descriptor_pool
[i
]);
871 block_dma
= ((unsigned long) block
- (unsigned long) f
->descriptor_pool
) + f
->descriptor_pool_dma
;
873 data
= ((struct packet
*)video
->packet_buf
.kvirt
) + f
->frame_num
* MAX_PACKETS
+ i
;
874 data_dma
= dma_region_offset_to_bus( &video
->packet_buf
,
875 ((unsigned long) data
- (unsigned long) video
->packet_buf
.kvirt
) );
877 /* setup DMA descriptor block */
878 want_interrupt
= ((i
% (MAX_PACKETS
/2)) == 0 || i
== (MAX_PACKETS
-1));
879 fill_input_last( &(block
->u
.in
.il
), want_interrupt
, 512, data_dma
);
881 /* link descriptors */
882 last_branch_address
= f
->frame_end_branch
;
884 if (last_branch_address
!= NULL
)
885 *(last_branch_address
) = cpu_to_le32(block_dma
| 1); /* set Z=1 */
887 f
->frame_end_branch
= &(block
->u
.in
.il
.q
[2]);
892 spin_unlock_irqrestore(&video
->spinlock
, irq_flags
);
898 /*** MANAGEMENT FUNCTIONS **************************************************/
900 static int do_dv1394_init(struct video_card
*video
, struct dv1394_init
*init
)
902 unsigned long flags
, new_buf_size
;
905 int retval
= -EINVAL
;
907 debug_printk("dv1394: initialising %d\n", video
->id
);
908 if (init
->api_version
!= DV1394_API_VERSION
)
911 /* first sanitize all the parameters */
912 if ( (init
->n_frames
< 2) || (init
->n_frames
> DV1394_MAX_FRAMES
) )
915 if ( (init
->format
!= DV1394_NTSC
) && (init
->format
!= DV1394_PAL
) )
918 if ( (init
->syt_offset
== 0) || (init
->syt_offset
> 50) )
919 /* default SYT offset is 3 cycles */
920 init
->syt_offset
= 3;
922 if ( (init
->channel
> 63) || (init
->channel
< 0) )
925 chan_mask
= (u64
)1 << init
->channel
;
927 /* calculate what size DMA buffer is needed */
928 if (init
->format
== DV1394_NTSC
)
929 new_buf_size
= DV1394_NTSC_FRAME_SIZE
* init
->n_frames
;
931 new_buf_size
= DV1394_PAL_FRAME_SIZE
* init
->n_frames
;
933 /* round up to PAGE_SIZE */
934 if (new_buf_size
% PAGE_SIZE
) new_buf_size
+= PAGE_SIZE
- (new_buf_size
% PAGE_SIZE
);
936 /* don't allow the user to allocate the DMA buffer more than once */
937 if (video
->dv_buf
.kvirt
&& video
->dv_buf_size
!= new_buf_size
) {
938 printk("dv1394: re-sizing the DMA buffer is not allowed\n");
942 /* shutdown the card if it's currently active */
943 /* (the card should not be reset if the parameters are screwy) */
945 do_dv1394_shutdown(video
, 0);
947 /* try to claim the ISO channel */
948 spin_lock_irqsave(&video
->ohci
->IR_channel_lock
, flags
);
949 if (video
->ohci
->ISO_channel_usage
& chan_mask
) {
950 spin_unlock_irqrestore(&video
->ohci
->IR_channel_lock
, flags
);
954 video
->ohci
->ISO_channel_usage
|= chan_mask
;
955 spin_unlock_irqrestore(&video
->ohci
->IR_channel_lock
, flags
);
957 video
->channel
= init
->channel
;
959 /* initialize misc. fields of video */
960 video
->n_frames
= init
->n_frames
;
961 video
->pal_or_ntsc
= init
->format
;
963 video
->cip_accum
= 0;
964 video
->continuity_counter
= 0;
966 video
->active_frame
= -1;
967 video
->first_clear_frame
= 0;
968 video
->n_clear_frames
= video
->n_frames
;
969 video
->dropped_frames
= 0;
971 video
->write_off
= 0;
973 video
->first_run
= 1;
974 video
->current_packet
= -1;
975 video
->first_frame
= 0;
977 if (video
->pal_or_ntsc
== DV1394_NTSC
) {
978 video
->cip_n
= init
->cip_n
!= 0 ? init
->cip_n
: CIP_N_NTSC
;
979 video
->cip_d
= init
->cip_d
!= 0 ? init
->cip_d
: CIP_D_NTSC
;
980 video
->frame_size
= DV1394_NTSC_FRAME_SIZE
;
982 video
->cip_n
= init
->cip_n
!= 0 ? init
->cip_n
: CIP_N_PAL
;
983 video
->cip_d
= init
->cip_d
!= 0 ? init
->cip_d
: CIP_D_PAL
;
984 video
->frame_size
= DV1394_PAL_FRAME_SIZE
;
987 video
->syt_offset
= init
->syt_offset
;
989 /* find and claim DMA contexts on the OHCI card */
991 if (video
->ohci_it_ctx
== -1) {
992 ohci1394_init_iso_tasklet(&video
->it_tasklet
, OHCI_ISO_TRANSMIT
,
993 it_tasklet_func
, (unsigned long) video
);
995 if (ohci1394_register_iso_tasklet(video
->ohci
, &video
->it_tasklet
) < 0) {
996 printk(KERN_ERR
"dv1394: could not find an available IT DMA context\n");
1001 video
->ohci_it_ctx
= video
->it_tasklet
.context
;
1002 debug_printk("dv1394: claimed IT DMA context %d\n", video
->ohci_it_ctx
);
1005 if (video
->ohci_ir_ctx
== -1) {
1006 ohci1394_init_iso_tasklet(&video
->ir_tasklet
, OHCI_ISO_RECEIVE
,
1007 ir_tasklet_func
, (unsigned long) video
);
1009 if (ohci1394_register_iso_tasklet(video
->ohci
, &video
->ir_tasklet
) < 0) {
1010 printk(KERN_ERR
"dv1394: could not find an available IR DMA context\n");
1014 video
->ohci_ir_ctx
= video
->ir_tasklet
.context
;
1015 debug_printk("dv1394: claimed IR DMA context %d\n", video
->ohci_ir_ctx
);
1018 /* allocate struct frames */
1019 for (i
= 0; i
< init
->n_frames
; i
++) {
1020 video
->frames
[i
] = frame_new(i
, video
);
1022 if (!video
->frames
[i
]) {
1023 printk(KERN_ERR
"dv1394: Cannot allocate frame structs\n");
1029 if (!video
->dv_buf
.kvirt
) {
1030 /* allocate the ringbuffer */
1031 retval
= dma_region_alloc(&video
->dv_buf
, new_buf_size
, video
->ohci
->dev
, PCI_DMA_TODEVICE
);
1035 video
->dv_buf_size
= new_buf_size
;
1037 debug_printk("dv1394: Allocated %d frame buffers, total %u pages (%u DMA pages), %lu bytes\n",
1038 video
->n_frames
, video
->dv_buf
.n_pages
,
1039 video
->dv_buf
.n_dma_pages
, video
->dv_buf_size
);
1042 /* set up the frame->data pointers */
1043 for (i
= 0; i
< video
->n_frames
; i
++)
1044 video
->frames
[i
]->data
= (unsigned long) video
->dv_buf
.kvirt
+ i
* video
->frame_size
;
1046 if (!video
->packet_buf
.kvirt
) {
1047 /* allocate packet buffer */
1048 video
->packet_buf_size
= sizeof(struct packet
) * video
->n_frames
* MAX_PACKETS
;
1049 if (video
->packet_buf_size
% PAGE_SIZE
)
1050 video
->packet_buf_size
+= PAGE_SIZE
- (video
->packet_buf_size
% PAGE_SIZE
);
1052 retval
= dma_region_alloc(&video
->packet_buf
, video
->packet_buf_size
,
1053 video
->ohci
->dev
, PCI_DMA_FROMDEVICE
);
1057 debug_printk("dv1394: Allocated %d packets in buffer, total %u pages (%u DMA pages), %lu bytes\n",
1058 video
->n_frames
*MAX_PACKETS
, video
->packet_buf
.n_pages
,
1059 video
->packet_buf
.n_dma_pages
, video
->packet_buf_size
);
1062 /* set up register offsets for IT context */
1063 /* IT DMA context registers are spaced 16 bytes apart */
1064 video
->ohci_IsoXmitContextControlSet
= OHCI1394_IsoXmitContextControlSet
+16*video
->ohci_it_ctx
;
1065 video
->ohci_IsoXmitContextControlClear
= OHCI1394_IsoXmitContextControlClear
+16*video
->ohci_it_ctx
;
1066 video
->ohci_IsoXmitCommandPtr
= OHCI1394_IsoXmitCommandPtr
+16*video
->ohci_it_ctx
;
1068 /* enable interrupts for IT context */
1069 reg_write(video
->ohci
, OHCI1394_IsoXmitIntMaskSet
, (1 << video
->ohci_it_ctx
));
1070 debug_printk("dv1394: interrupts enabled for IT context %d\n", video
->ohci_it_ctx
);
1072 /* set up register offsets for IR context */
1073 /* IR DMA context registers are spaced 32 bytes apart */
1074 video
->ohci_IsoRcvContextControlSet
= OHCI1394_IsoRcvContextControlSet
+32*video
->ohci_ir_ctx
;
1075 video
->ohci_IsoRcvContextControlClear
= OHCI1394_IsoRcvContextControlClear
+32*video
->ohci_ir_ctx
;
1076 video
->ohci_IsoRcvCommandPtr
= OHCI1394_IsoRcvCommandPtr
+32*video
->ohci_ir_ctx
;
1077 video
->ohci_IsoRcvContextMatch
= OHCI1394_IsoRcvContextMatch
+32*video
->ohci_ir_ctx
;
1079 /* enable interrupts for IR context */
1080 reg_write(video
->ohci
, OHCI1394_IsoRecvIntMaskSet
, (1 << video
->ohci_ir_ctx
) );
1081 debug_printk("dv1394: interrupts enabled for IR context %d\n", video
->ohci_ir_ctx
);
1086 do_dv1394_shutdown(video
, 1);
1090 /* if the user doesn't bother to call ioctl(INIT) before starting
1091 mmap() or read()/write(), just give him some default values */
1093 static int do_dv1394_init_default(struct video_card
*video
)
1095 struct dv1394_init init
;
1097 init
.api_version
= DV1394_API_VERSION
;
1098 init
.n_frames
= DV1394_MAX_FRAMES
/ 4;
1099 init
.channel
= video
->channel
;
1100 init
.format
= video
->pal_or_ntsc
;
1101 init
.cip_n
= video
->cip_n
;
1102 init
.cip_d
= video
->cip_d
;
1103 init
.syt_offset
= video
->syt_offset
;
1105 return do_dv1394_init(video
, &init
);
1108 /* do NOT call from interrupt context */
1109 static void stop_dma(struct video_card
*video
)
1111 unsigned long flags
;
1115 spin_lock_irqsave(&video
->spinlock
, flags
);
1117 video
->dma_running
= 0;
1119 if ( (video
->ohci_it_ctx
== -1) && (video
->ohci_ir_ctx
== -1) )
1122 /* stop DMA if in progress */
1123 if ( (video
->active_frame
!= -1) ||
1124 (reg_read(video
->ohci
, video
->ohci_IsoXmitContextControlClear
) & (1 << 10)) ||
1125 (reg_read(video
->ohci
, video
->ohci_IsoRcvContextControlClear
) & (1 << 10)) ) {
1127 /* clear the .run bits */
1128 reg_write(video
->ohci
, video
->ohci_IsoXmitContextControlClear
, (1 << 15));
1129 reg_write(video
->ohci
, video
->ohci_IsoRcvContextControlClear
, (1 << 15));
1130 flush_pci_write(video
->ohci
);
1132 video
->active_frame
= -1;
1133 video
->first_run
= 1;
1135 /* wait until DMA really stops */
1139 /* wait 0.1 millisecond */
1142 if ( (reg_read(video
->ohci
, video
->ohci_IsoXmitContextControlClear
) & (1 << 10)) ||
1143 (reg_read(video
->ohci
, video
->ohci_IsoRcvContextControlClear
) & (1 << 10)) ) {
1145 debug_printk("dv1394: stop_dma: DMA not stopped yet\n" );
1148 debug_printk("dv1394: stop_dma: DMA stopped safely after %d ms\n", i
/10);
1156 printk(KERN_ERR
"dv1394: stop_dma: DMA still going after %d ms!\n", i
/10);
1160 debug_printk("dv1394: stop_dma: already stopped.\n");
1163 spin_unlock_irqrestore(&video
->spinlock
, flags
);
1168 static void do_dv1394_shutdown(struct video_card
*video
, int free_dv_buf
)
1172 debug_printk("dv1394: shutdown...\n");
1174 /* stop DMA if in progress */
1177 /* release the DMA contexts */
1178 if (video
->ohci_it_ctx
!= -1) {
1179 video
->ohci_IsoXmitContextControlSet
= 0;
1180 video
->ohci_IsoXmitContextControlClear
= 0;
1181 video
->ohci_IsoXmitCommandPtr
= 0;
1183 /* disable interrupts for IT context */
1184 reg_write(video
->ohci
, OHCI1394_IsoXmitIntMaskClear
, (1 << video
->ohci_it_ctx
));
1186 /* remove tasklet */
1187 ohci1394_unregister_iso_tasklet(video
->ohci
, &video
->it_tasklet
);
1188 debug_printk("dv1394: IT context %d released\n", video
->ohci_it_ctx
);
1189 video
->ohci_it_ctx
= -1;
1192 if (video
->ohci_ir_ctx
!= -1) {
1193 video
->ohci_IsoRcvContextControlSet
= 0;
1194 video
->ohci_IsoRcvContextControlClear
= 0;
1195 video
->ohci_IsoRcvCommandPtr
= 0;
1196 video
->ohci_IsoRcvContextMatch
= 0;
1198 /* disable interrupts for IR context */
1199 reg_write(video
->ohci
, OHCI1394_IsoRecvIntMaskClear
, (1 << video
->ohci_ir_ctx
));
1201 /* remove tasklet */
1202 ohci1394_unregister_iso_tasklet(video
->ohci
, &video
->ir_tasklet
);
1203 debug_printk("dv1394: IR context %d released\n", video
->ohci_ir_ctx
);
1204 video
->ohci_ir_ctx
= -1;
1207 /* release the ISO channel */
1208 if (video
->channel
!= -1) {
1210 unsigned long flags
;
1212 chan_mask
= (u64
)1 << video
->channel
;
1214 spin_lock_irqsave(&video
->ohci
->IR_channel_lock
, flags
);
1215 video
->ohci
->ISO_channel_usage
&= ~(chan_mask
);
1216 spin_unlock_irqrestore(&video
->ohci
->IR_channel_lock
, flags
);
1218 video
->channel
= -1;
1221 /* free the frame structs */
1222 for (i
= 0; i
< DV1394_MAX_FRAMES
; i
++) {
1223 if (video
->frames
[i
])
1224 frame_delete(video
->frames
[i
]);
1225 video
->frames
[i
] = NULL
;
1228 video
->n_frames
= 0;
1230 /* we can't free the DMA buffer unless it is guaranteed that
1231 no more user-space mappings exist */
1234 dma_region_free(&video
->dv_buf
);
1235 video
->dv_buf_size
= 0;
1238 /* free packet buffer */
1239 dma_region_free(&video
->packet_buf
);
1240 video
->packet_buf_size
= 0;
1242 debug_printk("dv1394: shutdown OK\n");
1246 **********************************
1247 *** MMAP() THEORY OF OPERATION ***
1248 **********************************
1250 The ringbuffer cannot be re-allocated or freed while
1251 a user program maintains a mapping of it. (note that a mapping
1252 can persist even after the device fd is closed!)
1254 So, only let the user process allocate the DMA buffer once.
1255 To resize or deallocate it, you must close the device file
1258 Previously Dan M. hacked out a scheme that allowed the DMA
1259 buffer to change by forcefully unmapping it from the user's
1260 address space. It was prone to error because it's very hard to
1261 track all the places the buffer could have been mapped (we
1262 would have had to walk the vma list of every process in the
1263 system to be sure we found all the mappings!). Instead, we
1264 force the user to choose one buffer size and stick with
1265 it. This small sacrifice is worth the huge reduction in
1266 error-prone code in dv1394.
1269 static int dv1394_mmap(struct file
*file
, struct vm_area_struct
*vma
)
1271 struct video_card
*video
= file_to_video_card(file
);
1272 int retval
= -EINVAL
;
1274 /* serialize mmap */
1275 mutex_lock(&video
->mtx
);
1277 if ( ! video_card_initialized(video
) ) {
1278 retval
= do_dv1394_init_default(video
);
1283 retval
= dma_region_mmap(&video
->dv_buf
, file
, vma
);
1285 mutex_unlock(&video
->mtx
);
1289 /*** DEVICE FILE INTERFACE *************************************************/
1291 /* no need to serialize, multiple threads OK */
1292 static unsigned int dv1394_poll(struct file
*file
, struct poll_table_struct
*wait
)
1294 struct video_card
*video
= file_to_video_card(file
);
1295 unsigned int mask
= 0;
1296 unsigned long flags
;
1298 poll_wait(file
, &video
->waitq
, wait
);
1300 spin_lock_irqsave(&video
->spinlock
, flags
);
1301 if ( video
->n_frames
== 0 ) {
1303 } else if ( video
->active_frame
== -1 ) {
1304 /* nothing going on */
1307 /* any clear/ready buffers? */
1308 if (video
->n_clear_frames
>0)
1309 mask
|= POLLOUT
| POLLIN
;
1311 spin_unlock_irqrestore(&video
->spinlock
, flags
);
1316 static int dv1394_fasync(int fd
, struct file
*file
, int on
)
1318 /* I just copied this code verbatim from Alan Cox's mouse driver example
1319 (Documentation/DocBook/) */
1321 struct video_card
*video
= file_to_video_card(file
);
1323 int retval
= fasync_helper(fd
, file
, on
, &video
->fasync
);
1330 static ssize_t
dv1394_write(struct file
*file
, const char __user
*buffer
, size_t count
, loff_t
*ppos
)
1332 struct video_card
*video
= file_to_video_card(file
);
1333 DECLARE_WAITQUEUE(wait
, current
);
1336 unsigned long flags
;
1339 /* serialize this to prevent multi-threaded mayhem */
1340 if (file
->f_flags
& O_NONBLOCK
) {
1341 if (!mutex_trylock(&video
->mtx
))
1344 if (mutex_lock_interruptible(&video
->mtx
))
1345 return -ERESTARTSYS
;
1348 if ( !video_card_initialized(video
) ) {
1349 ret
= do_dv1394_init_default(video
);
1351 mutex_unlock(&video
->mtx
);
1357 add_wait_queue(&video
->waitq
, &wait
);
1361 /* must set TASK_INTERRUPTIBLE *before* checking for free
1362 buffers; otherwise we could miss a wakeup if the interrupt
1363 fires between the check and the schedule() */
1365 set_current_state(TASK_INTERRUPTIBLE
);
1367 spin_lock_irqsave(&video
->spinlock
, flags
);
1369 target_frame
= video
->first_clear_frame
;
1371 spin_unlock_irqrestore(&video
->spinlock
, flags
);
1373 if (video
->frames
[target_frame
]->state
== FRAME_CLEAR
) {
1375 /* how much room is left in the target frame buffer */
1376 cnt
= video
->frame_size
- (video
->write_off
- target_frame
* video
->frame_size
);
1379 /* buffer is already used */
1387 /* no room left, gotta wait */
1388 if (file
->f_flags
& O_NONBLOCK
) {
1393 if (signal_pending(current
)) {
1401 continue; /* start over from 'while(count > 0)...' */
1404 if (copy_from_user(video
->dv_buf
.kvirt
+ video
->write_off
, buffer
, cnt
)) {
1410 video
->write_off
= (video
->write_off
+ cnt
) % (video
->n_frames
* video
->frame_size
);
1416 if (video
->write_off
== video
->frame_size
* ((target_frame
+ 1) % video
->n_frames
))
1417 frame_prepare(video
, target_frame
);
1420 remove_wait_queue(&video
->waitq
, &wait
);
1421 set_current_state(TASK_RUNNING
);
1422 mutex_unlock(&video
->mtx
);
1427 static ssize_t
dv1394_read(struct file
*file
, char __user
*buffer
, size_t count
, loff_t
*ppos
)
1429 struct video_card
*video
= file_to_video_card(file
);
1430 DECLARE_WAITQUEUE(wait
, current
);
1433 unsigned long flags
;
1436 /* serialize this to prevent multi-threaded mayhem */
1437 if (file
->f_flags
& O_NONBLOCK
) {
1438 if (!mutex_trylock(&video
->mtx
))
1441 if (mutex_lock_interruptible(&video
->mtx
))
1442 return -ERESTARTSYS
;
1445 if ( !video_card_initialized(video
) ) {
1446 ret
= do_dv1394_init_default(video
);
1448 mutex_unlock(&video
->mtx
);
1451 video
->continuity_counter
= -1;
1453 receive_packets(video
);
1455 start_dma_receive(video
);
1459 add_wait_queue(&video
->waitq
, &wait
);
1463 /* must set TASK_INTERRUPTIBLE *before* checking for free
1464 buffers; otherwise we could miss a wakeup if the interrupt
1465 fires between the check and the schedule() */
1467 set_current_state(TASK_INTERRUPTIBLE
);
1469 spin_lock_irqsave(&video
->spinlock
, flags
);
1471 target_frame
= video
->first_clear_frame
;
1473 spin_unlock_irqrestore(&video
->spinlock
, flags
);
1475 if (target_frame
>= 0 &&
1476 video
->n_clear_frames
> 0 &&
1477 video
->frames
[target_frame
]->state
== FRAME_CLEAR
) {
1479 /* how much room is left in the target frame buffer */
1480 cnt
= video
->frame_size
- (video
->write_off
- target_frame
* video
->frame_size
);
1483 /* buffer is already used */
1491 /* no room left, gotta wait */
1492 if (file
->f_flags
& O_NONBLOCK
) {
1497 if (signal_pending(current
)) {
1505 continue; /* start over from 'while(count > 0)...' */
1508 if (copy_to_user(buffer
, video
->dv_buf
.kvirt
+ video
->write_off
, cnt
)) {
1514 video
->write_off
= (video
->write_off
+ cnt
) % (video
->n_frames
* video
->frame_size
);
1520 if (video
->write_off
== video
->frame_size
* ((target_frame
+ 1) % video
->n_frames
)) {
1521 spin_lock_irqsave(&video
->spinlock
, flags
);
1522 video
->n_clear_frames
--;
1523 video
->first_clear_frame
= (video
->first_clear_frame
+ 1) % video
->n_frames
;
1524 spin_unlock_irqrestore(&video
->spinlock
, flags
);
1528 remove_wait_queue(&video
->waitq
, &wait
);
1529 set_current_state(TASK_RUNNING
);
1530 mutex_unlock(&video
->mtx
);
1535 /*** DEVICE IOCTL INTERFACE ************************************************/
1537 static long dv1394_ioctl(struct file
*file
, unsigned int cmd
, unsigned long arg
)
1539 struct video_card
*video
;
1540 unsigned long flags
;
1542 void __user
*argp
= (void __user
*)arg
;
1544 DECLARE_WAITQUEUE(wait
, current
);
1547 video
= file_to_video_card(file
);
1549 /* serialize this to prevent multi-threaded mayhem */
1550 if (file
->f_flags
& O_NONBLOCK
) {
1551 if (!mutex_trylock(&video
->mtx
)) {
1556 if (mutex_lock_interruptible(&video
->mtx
)) {
1558 return -ERESTARTSYS
;
1564 case DV1394_IOC_SUBMIT_FRAMES
: {
1565 unsigned int n_submit
;
1567 if ( !video_card_initialized(video
) ) {
1568 ret
= do_dv1394_init_default(video
);
1573 n_submit
= (unsigned int) arg
;
1575 if (n_submit
> video
->n_frames
) {
1580 while (n_submit
> 0) {
1582 add_wait_queue(&video
->waitq
, &wait
);
1583 set_current_state(TASK_INTERRUPTIBLE
);
1585 spin_lock_irqsave(&video
->spinlock
, flags
);
1587 /* wait until video->first_clear_frame is really CLEAR */
1588 while (video
->frames
[video
->first_clear_frame
]->state
!= FRAME_CLEAR
) {
1590 spin_unlock_irqrestore(&video
->spinlock
, flags
);
1592 if (signal_pending(current
)) {
1593 remove_wait_queue(&video
->waitq
, &wait
);
1594 set_current_state(TASK_RUNNING
);
1600 set_current_state(TASK_INTERRUPTIBLE
);
1602 spin_lock_irqsave(&video
->spinlock
, flags
);
1604 spin_unlock_irqrestore(&video
->spinlock
, flags
);
1606 remove_wait_queue(&video
->waitq
, &wait
);
1607 set_current_state(TASK_RUNNING
);
1609 frame_prepare(video
, video
->first_clear_frame
);
1618 case DV1394_IOC_WAIT_FRAMES
: {
1619 unsigned int n_wait
;
1621 if ( !video_card_initialized(video
) ) {
1626 n_wait
= (unsigned int) arg
;
1628 /* since we re-run the last frame on underflow, we will
1629 never actually have n_frames clear frames; at most only
1632 if (n_wait
> (video
->n_frames
-1) ) {
1637 add_wait_queue(&video
->waitq
, &wait
);
1638 set_current_state(TASK_INTERRUPTIBLE
);
1640 spin_lock_irqsave(&video
->spinlock
, flags
);
1642 while (video
->n_clear_frames
< n_wait
) {
1644 spin_unlock_irqrestore(&video
->spinlock
, flags
);
1646 if (signal_pending(current
)) {
1647 remove_wait_queue(&video
->waitq
, &wait
);
1648 set_current_state(TASK_RUNNING
);
1654 set_current_state(TASK_INTERRUPTIBLE
);
1656 spin_lock_irqsave(&video
->spinlock
, flags
);
1659 spin_unlock_irqrestore(&video
->spinlock
, flags
);
1661 remove_wait_queue(&video
->waitq
, &wait
);
1662 set_current_state(TASK_RUNNING
);
1667 case DV1394_IOC_RECEIVE_FRAMES
: {
1668 unsigned int n_recv
;
1670 if ( !video_card_initialized(video
) ) {
1675 n_recv
= (unsigned int) arg
;
1677 /* at least one frame must be active */
1678 if (n_recv
> (video
->n_frames
-1) ) {
1683 spin_lock_irqsave(&video
->spinlock
, flags
);
1685 /* release the clear frames */
1686 video
->n_clear_frames
-= n_recv
;
1688 /* advance the clear frame cursor */
1689 video
->first_clear_frame
= (video
->first_clear_frame
+ n_recv
) % video
->n_frames
;
1691 /* reset dropped_frames */
1692 video
->dropped_frames
= 0;
1694 spin_unlock_irqrestore(&video
->spinlock
, flags
);
1700 case DV1394_IOC_START_RECEIVE
: {
1701 if ( !video_card_initialized(video
) ) {
1702 ret
= do_dv1394_init_default(video
);
1707 video
->continuity_counter
= -1;
1709 receive_packets(video
);
1711 start_dma_receive(video
);
1717 case DV1394_IOC_INIT
: {
1718 struct dv1394_init init
;
1720 ret
= do_dv1394_init_default(video
);
1722 if (copy_from_user(&init
, argp
, sizeof(init
))) {
1726 ret
= do_dv1394_init(video
, &init
);
1731 case DV1394_IOC_SHUTDOWN
:
1732 do_dv1394_shutdown(video
, 0);
1737 case DV1394_IOC_GET_STATUS
: {
1738 struct dv1394_status status
;
1740 if ( !video_card_initialized(video
) ) {
1745 status
.init
.api_version
= DV1394_API_VERSION
;
1746 status
.init
.channel
= video
->channel
;
1747 status
.init
.n_frames
= video
->n_frames
;
1748 status
.init
.format
= video
->pal_or_ntsc
;
1749 status
.init
.cip_n
= video
->cip_n
;
1750 status
.init
.cip_d
= video
->cip_d
;
1751 status
.init
.syt_offset
= video
->syt_offset
;
1753 status
.first_clear_frame
= video
->first_clear_frame
;
1755 /* the rest of the fields need to be locked against the interrupt */
1756 spin_lock_irqsave(&video
->spinlock
, flags
);
1758 status
.active_frame
= video
->active_frame
;
1759 status
.n_clear_frames
= video
->n_clear_frames
;
1761 status
.dropped_frames
= video
->dropped_frames
;
1763 /* reset dropped_frames */
1764 video
->dropped_frames
= 0;
1766 spin_unlock_irqrestore(&video
->spinlock
, flags
);
1768 if (copy_to_user(argp
, &status
, sizeof(status
))) {
1782 mutex_unlock(&video
->mtx
);
1787 /*** DEVICE FILE INTERFACE CONTINUED ***************************************/
1789 static int dv1394_open(struct inode
*inode
, struct file
*file
)
1791 struct video_card
*video
= NULL
;
1793 if (file
->private_data
) {
1794 video
= (struct video_card
*) file
->private_data
;
1797 /* look up the card by ID */
1798 unsigned long flags
;
1800 spin_lock_irqsave(&dv1394_cards_lock
, flags
);
1801 if (!list_empty(&dv1394_cards
)) {
1802 struct video_card
*p
;
1803 list_for_each_entry(p
, &dv1394_cards
, list
) {
1804 if ((p
->id
) == ieee1394_file_to_instance(file
)) {
1810 spin_unlock_irqrestore(&dv1394_cards_lock
, flags
);
1813 debug_printk("dv1394: OHCI card %d not found", ieee1394_file_to_instance(file
));
1817 file
->private_data
= (void*) video
;
1820 #ifndef DV1394_ALLOW_MORE_THAN_ONE_OPEN
1822 if ( test_and_set_bit(0, &video
->open
) ) {
1823 /* video is already open by someone else */
1833 static int dv1394_release(struct inode
*inode
, struct file
*file
)
1835 struct video_card
*video
= file_to_video_card(file
);
1837 /* OK to free the DMA buffer, no more mappings can exist */
1838 do_dv1394_shutdown(video
, 1);
1840 /* clean up async I/O users */
1841 dv1394_fasync(-1, file
, 0);
1843 /* give someone else a turn */
1844 clear_bit(0, &video
->open
);
1850 /*** DEVICE DRIVER HANDLERS ************************************************/
1852 static void it_tasklet_func(unsigned long data
)
1855 struct video_card
*video
= (struct video_card
*) data
;
1857 spin_lock(&video
->spinlock
);
1859 if (!video
->dma_running
)
1862 irq_printk("ContextControl = %08x, CommandPtr = %08x\n",
1863 reg_read(video
->ohci
, video
->ohci_IsoXmitContextControlSet
),
1864 reg_read(video
->ohci
, video
->ohci_IsoXmitCommandPtr
)
1868 if ( (video
->ohci_it_ctx
!= -1) &&
1869 (reg_read(video
->ohci
, video
->ohci_IsoXmitContextControlSet
) & (1 << 10)) ) {
1872 unsigned int frame
, i
;
1875 if (video
->active_frame
== -1)
1878 frame
= video
->active_frame
;
1880 /* check all the DMA-able frames */
1881 for (i
= 0; i
< video
->n_frames
; i
++, frame
= (frame
+1) % video
->n_frames
) {
1883 irq_printk("IRQ checking frame %d...", frame
);
1884 f
= video
->frames
[frame
];
1885 if (f
->state
!= FRAME_READY
) {
1886 irq_printk("clear, skipping\n");
1887 /* we don't own this frame */
1891 irq_printk("DMA\n");
1893 /* check the frame begin semaphore to see if we can free the previous frame */
1894 if ( *(f
->frame_begin_timestamp
) ) {
1896 struct frame
*prev_f
;
1900 /* don't reset, need this later *(f->frame_begin_timestamp) = 0; */
1901 irq_printk(" BEGIN\n");
1903 prev_frame
= frame
- 1;
1904 if (prev_frame
== -1)
1905 prev_frame
+= video
->n_frames
;
1906 prev_f
= video
->frames
[prev_frame
];
1908 /* make sure we can actually garbage collect
1910 if ( (prev_f
->state
== FRAME_READY
) &&
1911 prev_f
->done
&& (!f
->done
) )
1913 frame_reset(prev_f
);
1914 video
->n_clear_frames
++;
1916 video
->active_frame
= frame
;
1918 irq_printk(" BEGIN - freeing previous frame %d, new active frame is %d\n", prev_frame
, frame
);
1920 irq_printk(" BEGIN - can't free yet\n");
1927 /* see if we need to set the timestamp for the next frame */
1928 if ( *(f
->mid_frame_timestamp
) ) {
1929 struct frame
*next_frame
;
1930 u32 begin_ts
, ts_cyc
, ts_off
;
1932 *(f
->mid_frame_timestamp
) = 0;
1934 begin_ts
= le32_to_cpu(*(f
->frame_begin_timestamp
));
1936 irq_printk(" MIDDLE - first packet was sent at cycle %4u (%2u), assigned timestamp was (%2u) %4u\n",
1937 begin_ts
& 0x1FFF, begin_ts
& 0xF,
1938 f
->assigned_timestamp
>> 12, f
->assigned_timestamp
& 0xFFF);
1940 /* prepare next frame and assign timestamp */
1941 next_frame
= video
->frames
[ (frame
+1) % video
->n_frames
];
1943 if (next_frame
->state
== FRAME_READY
) {
1944 irq_printk(" MIDDLE - next frame is ready, good\n");
1946 debug_printk("dv1394: Underflow! At least one frame has been dropped.\n");
1950 /* set the timestamp to the timestamp of the last frame sent,
1951 plus the length of the last frame sent, plus the syt latency */
1952 ts_cyc
= begin_ts
& 0xF;
1953 /* advance one frame, plus syt latency (typically 2-3) */
1954 ts_cyc
+= f
->n_packets
+ video
->syt_offset
;
1958 ts_cyc
+= ts_off
/3072;
1961 next_frame
->assigned_timestamp
= ((ts_cyc
&0xF) << 12) + ts_off
;
1962 if (next_frame
->cip_syt1
) {
1963 next_frame
->cip_syt1
->b
[6] = next_frame
->assigned_timestamp
>> 8;
1964 next_frame
->cip_syt1
->b
[7] = next_frame
->assigned_timestamp
& 0xFF;
1966 if (next_frame
->cip_syt2
) {
1967 next_frame
->cip_syt2
->b
[6] = next_frame
->assigned_timestamp
>> 8;
1968 next_frame
->cip_syt2
->b
[7] = next_frame
->assigned_timestamp
& 0xFF;
1973 /* see if the frame looped */
1974 if ( *(f
->frame_end_timestamp
) ) {
1976 *(f
->frame_end_timestamp
) = 0;
1978 debug_printk(" END - the frame looped at least once\n");
1980 video
->dropped_frames
++;
1983 } /* for (each frame) */
1987 kill_fasync(&video
->fasync
, SIGIO
, POLL_OUT
);
1989 /* wake readers/writers/ioctl'ers */
1990 wake_up_interruptible(&video
->waitq
);
1994 spin_unlock(&video
->spinlock
);
1997 static void ir_tasklet_func(unsigned long data
)
2000 struct video_card
*video
= (struct video_card
*) data
;
2002 spin_lock(&video
->spinlock
);
2004 if (!video
->dma_running
)
2007 if ( (video
->ohci_ir_ctx
!= -1) &&
2008 (reg_read(video
->ohci
, video
->ohci_IsoRcvContextControlSet
) & (1 << 10)) ) {
2010 int sof
=0; /* start-of-frame flag */
2012 u16 packet_length
, packet_time
;
2014 struct DMA_descriptor_block
*block
= NULL
;
2018 struct DMA_descriptor_block
*next
= NULL
;
2019 dma_addr_t next_dma
= 0;
2020 struct DMA_descriptor_block
*prev
= NULL
;
2022 /* loop over all descriptors in all frames */
2023 for (i
= 0; i
< video
->n_frames
*MAX_PACKETS
; i
++) {
2024 struct packet
*p
= dma_region_i(&video
->packet_buf
, struct packet
, video
->current_packet
);
2026 /* make sure we are seeing the latest changes to p */
2027 dma_region_sync_for_cpu(&video
->packet_buf
,
2028 (unsigned long) p
- (unsigned long) video
->packet_buf
.kvirt
,
2029 sizeof(struct packet
));
2031 packet_length
= le16_to_cpu(p
->data_length
);
2032 packet_time
= le16_to_cpu(p
->timestamp
);
2034 irq_printk("received packet %02d, timestamp=%04x, length=%04x, sof=%02x%02x\n", video
->current_packet
,
2035 packet_time
, packet_length
,
2036 p
->data
[0], p
->data
[1]);
2038 /* get the descriptor based on packet_buffer cursor */
2039 f
= video
->frames
[video
->current_packet
/ MAX_PACKETS
];
2040 block
= &(f
->descriptor_pool
[video
->current_packet
% MAX_PACKETS
]);
2041 xferstatus
= le32_to_cpu(block
->u
.in
.il
.q
[3]) >> 16;
2043 irq_printk("ir_tasklet_func: xferStatus/resCount [%d] = 0x%08x\n", i
, le32_to_cpu(block
->u
.in
.il
.q
[3]) );
2045 /* get the current frame */
2046 f
= video
->frames
[video
->active_frame
];
2048 /* exclude empty packet */
2049 if (packet_length
> 8 && xferstatus
== 0x11) {
2050 /* check for start of frame */
2051 /* DRD> Changed to check section type ([0]>>5==0)
2052 and dif sequence ([1]>>4==0) */
2053 sof
= ( (p
->data
[0] >> 5) == 0 && (p
->data
[1] >> 4) == 0);
2055 dbc
= (int) (p
->cip_h1
>> 24);
2056 if ( video
->continuity_counter
!= -1 && dbc
> ((video
->continuity_counter
+ 1) % 256) )
2058 printk(KERN_WARNING
"dv1394: discontinuity detected, dropping all frames\n" );
2059 video
->dropped_frames
+= video
->n_clear_frames
+ 1;
2060 video
->first_frame
= 0;
2061 video
->n_clear_frames
= 0;
2062 video
->first_clear_frame
= -1;
2064 video
->continuity_counter
= dbc
;
2066 if (!video
->first_frame
) {
2068 video
->first_frame
= 1;
2072 /* close current frame */
2073 frame_reset(f
); /* f->state = STATE_CLEAR */
2074 video
->n_clear_frames
++;
2075 if (video
->n_clear_frames
> video
->n_frames
) {
2076 video
->dropped_frames
++;
2077 printk(KERN_WARNING
"dv1394: dropped a frame during reception\n" );
2078 video
->n_clear_frames
= video
->n_frames
-1;
2079 video
->first_clear_frame
= (video
->first_clear_frame
+ 1) % video
->n_frames
;
2081 if (video
->first_clear_frame
== -1)
2082 video
->first_clear_frame
= video
->active_frame
;
2084 /* get the next frame */
2085 video
->active_frame
= (video
->active_frame
+ 1) % video
->n_frames
;
2086 f
= video
->frames
[video
->active_frame
];
2087 irq_printk(" frame received, active_frame = %d, n_clear_frames = %d, first_clear_frame = %d\n",
2088 video
->active_frame
, video
->n_clear_frames
, video
->first_clear_frame
);
2090 if (video
->first_frame
) {
2092 /* open next frame */
2093 f
->state
= FRAME_READY
;
2096 /* copy to buffer */
2097 if (f
->n_packets
> (video
->frame_size
/ 480)) {
2098 printk(KERN_ERR
"frame buffer overflow during receive\n");
2101 frame_put_packet(f
, p
);
2106 /* stop, end of ready packets */
2107 else if (xferstatus
== 0) {
2111 /* reset xferStatus & resCount */
2112 block
->u
.in
.il
.q
[3] = cpu_to_le32(512);
2114 /* terminate dma chain at this (next) packet */
2115 next_i
= video
->current_packet
;
2116 f
= video
->frames
[next_i
/ MAX_PACKETS
];
2117 next
= &(f
->descriptor_pool
[next_i
% MAX_PACKETS
]);
2118 next_dma
= ((unsigned long) block
- (unsigned long) f
->descriptor_pool
) + f
->descriptor_pool_dma
;
2119 next
->u
.in
.il
.q
[0] |= 3 << 20; /* enable interrupt */
2120 next
->u
.in
.il
.q
[2] = 0; /* disable branch */
2122 /* link previous to next */
2123 prev_i
= (next_i
== 0) ? (MAX_PACKETS
* video
->n_frames
- 1) : (next_i
- 1);
2124 f
= video
->frames
[prev_i
/ MAX_PACKETS
];
2125 prev
= &(f
->descriptor_pool
[prev_i
% MAX_PACKETS
]);
2126 if (prev_i
% (MAX_PACKETS
/2)) {
2127 prev
->u
.in
.il
.q
[0] &= ~(3 << 20); /* no interrupt */
2129 prev
->u
.in
.il
.q
[0] |= 3 << 20; /* enable interrupt */
2131 prev
->u
.in
.il
.q
[2] = cpu_to_le32(next_dma
| 1); /* set Z=1 */
2134 /* wake up DMA in case it fell asleep */
2135 reg_write(video
->ohci
, video
->ohci_IsoRcvContextControlSet
, (1 << 12));
2137 /* advance packet_buffer cursor */
2138 video
->current_packet
= (video
->current_packet
+ 1) % (MAX_PACKETS
* video
->n_frames
);
2140 } /* for all packets */
2142 wake
= 1; /* why the hell not? */
2144 } /* receive interrupt */
2147 kill_fasync(&video
->fasync
, SIGIO
, POLL_IN
);
2149 /* wake readers/writers/ioctl'ers */
2150 wake_up_interruptible(&video
->waitq
);
2154 spin_unlock(&video
->spinlock
);
2157 static struct cdev dv1394_cdev
;
2158 static struct file_operations dv1394_fops
=
2160 .owner
= THIS_MODULE
,
2161 .poll
= dv1394_poll
,
2162 .unlocked_ioctl
= dv1394_ioctl
,
2163 #ifdef CONFIG_COMPAT
2164 .compat_ioctl
= dv1394_compat_ioctl
,
2166 .mmap
= dv1394_mmap
,
2167 .open
= dv1394_open
,
2168 .write
= dv1394_write
,
2169 .read
= dv1394_read
,
2170 .release
= dv1394_release
,
2171 .fasync
= dv1394_fasync
,
2175 /*** HOTPLUG STUFF **********************************************************/
2177 * Export information about protocols/devices supported by this driver.
2179 static struct ieee1394_device_id dv1394_id_table
[] = {
2181 .match_flags
= IEEE1394_MATCH_SPECIFIER_ID
| IEEE1394_MATCH_VERSION
,
2182 .specifier_id
= AVC_UNIT_SPEC_ID_ENTRY
& 0xffffff,
2183 .version
= AVC_SW_VERSION_ENTRY
& 0xffffff
2188 MODULE_DEVICE_TABLE(ieee1394
, dv1394_id_table
);
2190 static struct hpsb_protocol_driver dv1394_driver
= {
2191 .name
= "DV/1394 Driver",
2192 .id_table
= dv1394_id_table
,
2195 .bus
= &ieee1394_bus_type
,
2200 /*** IEEE1394 HPSB CALLBACKS ***********************************************/
2202 static int dv1394_init(struct ti_ohci
*ohci
, enum pal_or_ntsc format
, enum modes mode
)
2204 struct video_card
*video
;
2205 unsigned long flags
;
2208 video
= kzalloc(sizeof(*video
), GFP_KERNEL
);
2210 printk(KERN_ERR
"dv1394: cannot allocate video_card\n");
2215 /* lower 2 bits of id indicate which of four "plugs"
2217 video
->id
= ohci
->host
->id
<< 2;
2218 if (format
== DV1394_NTSC
)
2221 video
->id
|= 2 + mode
;
2223 video
->ohci_it_ctx
= -1;
2224 video
->ohci_ir_ctx
= -1;
2226 video
->ohci_IsoXmitContextControlSet
= 0;
2227 video
->ohci_IsoXmitContextControlClear
= 0;
2228 video
->ohci_IsoXmitCommandPtr
= 0;
2230 video
->ohci_IsoRcvContextControlSet
= 0;
2231 video
->ohci_IsoRcvContextControlClear
= 0;
2232 video
->ohci_IsoRcvCommandPtr
= 0;
2233 video
->ohci_IsoRcvContextMatch
= 0;
2235 video
->n_frames
= 0; /* flag that video is not initialized */
2236 video
->channel
= 63; /* default to broadcast channel */
2237 video
->active_frame
= -1;
2239 /* initialize the following */
2240 video
->pal_or_ntsc
= format
;
2241 video
->cip_n
= 0; /* 0 = use builtin default */
2243 video
->syt_offset
= 0;
2246 for (i
= 0; i
< DV1394_MAX_FRAMES
; i
++)
2247 video
->frames
[i
] = NULL
;
2249 dma_region_init(&video
->dv_buf
);
2250 video
->dv_buf_size
= 0;
2251 dma_region_init(&video
->packet_buf
);
2252 video
->packet_buf_size
= 0;
2254 clear_bit(0, &video
->open
);
2255 spin_lock_init(&video
->spinlock
);
2256 video
->dma_running
= 0;
2257 mutex_init(&video
->mtx
);
2258 init_waitqueue_head(&video
->waitq
);
2259 video
->fasync
= NULL
;
2261 spin_lock_irqsave(&dv1394_cards_lock
, flags
);
2262 INIT_LIST_HEAD(&video
->list
);
2263 list_add_tail(&video
->list
, &dv1394_cards
);
2264 spin_unlock_irqrestore(&dv1394_cards_lock
, flags
);
2266 debug_printk("dv1394: dv1394_init() OK on ID %d\n", video
->id
);
2270 static void dv1394_un_init(struct video_card
*video
)
2272 /* obviously nobody has the driver open at this point */
2273 do_dv1394_shutdown(video
, 1);
2278 static void dv1394_remove_host (struct hpsb_host
*host
)
2280 struct video_card
*video
;
2281 unsigned long flags
;
2284 /* We only work with the OHCI-1394 driver */
2285 if (strcmp(host
->driver
->name
, OHCI1394_DRIVER_NAME
))
2288 /* find the corresponding video_cards */
2290 struct video_card
*tmp_vid
;
2294 spin_lock_irqsave(&dv1394_cards_lock
, flags
);
2295 list_for_each_entry(tmp_vid
, &dv1394_cards
, list
) {
2296 if ((tmp_vid
->id
>> 2) == id
) {
2297 list_del(&tmp_vid
->list
);
2302 spin_unlock_irqrestore(&dv1394_cards_lock
, flags
);
2305 dv1394_un_init(video
);
2306 } while (video
!= NULL
);
2308 class_device_destroy(hpsb_protocol_class
,
2309 MKDEV(IEEE1394_MAJOR
, IEEE1394_MINOR_BLOCK_DV1394
* 16 + (id
<<2)));
2312 static void dv1394_add_host (struct hpsb_host
*host
)
2314 struct ti_ohci
*ohci
;
2317 /* We only work with the OHCI-1394 driver */
2318 if (strcmp(host
->driver
->name
, OHCI1394_DRIVER_NAME
))
2321 ohci
= (struct ti_ohci
*)host
->hostdata
;
2323 class_device_create(hpsb_protocol_class
, NULL
, MKDEV(
2324 IEEE1394_MAJOR
, IEEE1394_MINOR_BLOCK_DV1394
* 16 + (id
<<2)),
2325 NULL
, "dv1394-%d", id
);
2327 dv1394_init(ohci
, DV1394_NTSC
, MODE_RECEIVE
);
2328 dv1394_init(ohci
, DV1394_NTSC
, MODE_TRANSMIT
);
2329 dv1394_init(ohci
, DV1394_PAL
, MODE_RECEIVE
);
2330 dv1394_init(ohci
, DV1394_PAL
, MODE_TRANSMIT
);
2334 /* Bus reset handler. In the event of a bus reset, we may need to
2335 re-start the DMA contexts - otherwise the user program would
2336 end up waiting forever.
2339 static void dv1394_host_reset(struct hpsb_host
*host
)
2341 struct ti_ohci
*ohci
;
2342 struct video_card
*video
= NULL
, *tmp_vid
;
2343 unsigned long flags
;
2345 /* We only work with the OHCI-1394 driver */
2346 if (strcmp(host
->driver
->name
, OHCI1394_DRIVER_NAME
))
2349 ohci
= (struct ti_ohci
*)host
->hostdata
;
2352 /* find the corresponding video_cards */
2353 spin_lock_irqsave(&dv1394_cards_lock
, flags
);
2354 list_for_each_entry(tmp_vid
, &dv1394_cards
, list
) {
2355 if ((tmp_vid
->id
>> 2) == host
->id
) {
2360 spin_unlock_irqrestore(&dv1394_cards_lock
, flags
);
2366 spin_lock_irqsave(&video
->spinlock
, flags
);
2368 if (!video
->dma_running
)
2371 /* check IT context */
2372 if (video
->ohci_it_ctx
!= -1) {
2375 ctx
= reg_read(video
->ohci
, video
->ohci_IsoXmitContextControlSet
);
2377 /* if (RUN but not ACTIVE) */
2378 if ( (ctx
& (1<<15)) &&
2379 !(ctx
& (1<<10)) ) {
2381 debug_printk("dv1394: IT context stopped due to bus reset; waking it up\n");
2383 /* to be safe, assume a frame has been dropped. User-space programs
2384 should handle this condition like an underflow. */
2385 video
->dropped_frames
++;
2387 /* for some reason you must clear, then re-set the RUN bit to restart DMA */
2390 reg_write(video
->ohci
, video
->ohci_IsoXmitContextControlClear
, (1 << 15));
2391 flush_pci_write(video
->ohci
);
2394 reg_write(video
->ohci
, video
->ohci_IsoXmitContextControlSet
, (1 << 15));
2395 flush_pci_write(video
->ohci
);
2397 /* set the WAKE bit (just in case; this isn't strictly necessary) */
2398 reg_write(video
->ohci
, video
->ohci_IsoXmitContextControlSet
, (1 << 12));
2399 flush_pci_write(video
->ohci
);
2401 irq_printk("dv1394: AFTER IT restart ctx 0x%08x ptr 0x%08x\n",
2402 reg_read(video
->ohci
, video
->ohci_IsoXmitContextControlSet
),
2403 reg_read(video
->ohci
, video
->ohci_IsoXmitCommandPtr
));
2407 /* check IR context */
2408 if (video
->ohci_ir_ctx
!= -1) {
2411 ctx
= reg_read(video
->ohci
, video
->ohci_IsoRcvContextControlSet
);
2413 /* if (RUN but not ACTIVE) */
2414 if ( (ctx
& (1<<15)) &&
2415 !(ctx
& (1<<10)) ) {
2417 debug_printk("dv1394: IR context stopped due to bus reset; waking it up\n");
2419 /* to be safe, assume a frame has been dropped. User-space programs
2420 should handle this condition like an overflow. */
2421 video
->dropped_frames
++;
2423 /* for some reason you must clear, then re-set the RUN bit to restart DMA */
2424 /* XXX this doesn't work for me, I can't get IR DMA to restart :[ */
2427 reg_write(video
->ohci
, video
->ohci_IsoRcvContextControlClear
, (1 << 15));
2428 flush_pci_write(video
->ohci
);
2431 reg_write(video
->ohci
, video
->ohci_IsoRcvContextControlSet
, (1 << 15));
2432 flush_pci_write(video
->ohci
);
2434 /* set the WAKE bit (just in case; this isn't strictly necessary) */
2435 reg_write(video
->ohci
, video
->ohci_IsoRcvContextControlSet
, (1 << 12));
2436 flush_pci_write(video
->ohci
);
2438 irq_printk("dv1394: AFTER IR restart ctx 0x%08x ptr 0x%08x\n",
2439 reg_read(video
->ohci
, video
->ohci_IsoRcvContextControlSet
),
2440 reg_read(video
->ohci
, video
->ohci_IsoRcvCommandPtr
));
2445 spin_unlock_irqrestore(&video
->spinlock
, flags
);
2447 /* wake readers/writers/ioctl'ers */
2448 wake_up_interruptible(&video
->waitq
);
2451 static struct hpsb_highlevel dv1394_highlevel
= {
2453 .add_host
= dv1394_add_host
,
2454 .remove_host
= dv1394_remove_host
,
2455 .host_reset
= dv1394_host_reset
,
2458 #ifdef CONFIG_COMPAT
2460 #define DV1394_IOC32_INIT _IOW('#', 0x06, struct dv1394_init32)
2461 #define DV1394_IOC32_GET_STATUS _IOR('#', 0x0c, struct dv1394_status32)
2463 struct dv1394_init32
{
2473 struct dv1394_status32
{
2474 struct dv1394_init32 init
;
2476 u32 first_clear_frame
;
2481 /* RED-PEN: this should use compat_alloc_userspace instead */
2483 static int handle_dv1394_init(struct file
*file
, unsigned int cmd
, unsigned long arg
)
2485 struct dv1394_init32 dv32
;
2486 struct dv1394_init dv
;
2487 mm_segment_t old_fs
;
2490 if (file
->f_op
->unlocked_ioctl
!= dv1394_ioctl
)
2493 if (copy_from_user(&dv32
, (void __user
*)arg
, sizeof(dv32
)))
2496 dv
.api_version
= dv32
.api_version
;
2497 dv
.channel
= dv32
.channel
;
2498 dv
.n_frames
= dv32
.n_frames
;
2499 dv
.format
= dv32
.format
;
2500 dv
.cip_n
= (unsigned long)dv32
.cip_n
;
2501 dv
.cip_d
= (unsigned long)dv32
.cip_d
;
2502 dv
.syt_offset
= dv32
.syt_offset
;
2506 ret
= dv1394_ioctl(file
, DV1394_IOC_INIT
, (unsigned long)&dv
);
2512 static int handle_dv1394_get_status(struct file
*file
, unsigned int cmd
, unsigned long arg
)
2514 struct dv1394_status32 dv32
;
2515 struct dv1394_status dv
;
2516 mm_segment_t old_fs
;
2519 if (file
->f_op
->unlocked_ioctl
!= dv1394_ioctl
)
2524 ret
= dv1394_ioctl(file
, DV1394_IOC_GET_STATUS
, (unsigned long)&dv
);
2528 dv32
.init
.api_version
= dv
.init
.api_version
;
2529 dv32
.init
.channel
= dv
.init
.channel
;
2530 dv32
.init
.n_frames
= dv
.init
.n_frames
;
2531 dv32
.init
.format
= dv
.init
.format
;
2532 dv32
.init
.cip_n
= (u32
)dv
.init
.cip_n
;
2533 dv32
.init
.cip_d
= (u32
)dv
.init
.cip_d
;
2534 dv32
.init
.syt_offset
= dv
.init
.syt_offset
;
2535 dv32
.active_frame
= dv
.active_frame
;
2536 dv32
.first_clear_frame
= dv
.first_clear_frame
;
2537 dv32
.n_clear_frames
= dv
.n_clear_frames
;
2538 dv32
.dropped_frames
= dv
.dropped_frames
;
2540 if (copy_to_user((struct dv1394_status32 __user
*)arg
, &dv32
, sizeof(dv32
)))
2549 static long dv1394_compat_ioctl(struct file
*file
, unsigned int cmd
,
2553 case DV1394_IOC_SHUTDOWN
:
2554 case DV1394_IOC_SUBMIT_FRAMES
:
2555 case DV1394_IOC_WAIT_FRAMES
:
2556 case DV1394_IOC_RECEIVE_FRAMES
:
2557 case DV1394_IOC_START_RECEIVE
:
2558 return dv1394_ioctl(file
, cmd
, arg
);
2560 case DV1394_IOC32_INIT
:
2561 return handle_dv1394_init(file
, cmd
, arg
);
2562 case DV1394_IOC32_GET_STATUS
:
2563 return handle_dv1394_get_status(file
, cmd
, arg
);
2565 return -ENOIOCTLCMD
;
2569 #endif /* CONFIG_COMPAT */
2572 /*** KERNEL MODULE HANDLERS ************************************************/
2574 MODULE_AUTHOR("Dan Maas <dmaas@dcine.com>, Dan Dennedy <dan@dennedy.org>");
2575 MODULE_DESCRIPTION("driver for DV input/output on OHCI board");
2576 MODULE_SUPPORTED_DEVICE("dv1394");
2577 MODULE_LICENSE("GPL");
2579 static void __exit
dv1394_exit_module(void)
2581 hpsb_unregister_protocol(&dv1394_driver
);
2582 hpsb_unregister_highlevel(&dv1394_highlevel
);
2583 cdev_del(&dv1394_cdev
);
2586 static int __init
dv1394_init_module(void)
2590 cdev_init(&dv1394_cdev
, &dv1394_fops
);
2591 dv1394_cdev
.owner
= THIS_MODULE
;
2592 kobject_set_name(&dv1394_cdev
.kobj
, "dv1394");
2593 ret
= cdev_add(&dv1394_cdev
, IEEE1394_DV1394_DEV
, 16);
2595 printk(KERN_ERR
"dv1394: unable to register character device\n");
2599 hpsb_register_highlevel(&dv1394_highlevel
);
2601 ret
= hpsb_register_protocol(&dv1394_driver
);
2603 printk(KERN_ERR
"dv1394: failed to register protocol\n");
2604 hpsb_unregister_highlevel(&dv1394_highlevel
);
2605 cdev_del(&dv1394_cdev
);
2612 module_init(dv1394_init_module
);
2613 module_exit(dv1394_exit_module
);