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196d6f006392df1ec4470994c472e32f0a23b31f
[deliverable/linux.git] / drivers / infiniband / hw / i40iw / i40iw_verbs.c
1 /*******************************************************************************
2 *
3 * Copyright (c) 2015-2016 Intel Corporation. All rights reserved.
4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenFabrics.org BSD license below:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 *
33 *******************************************************************************/
34
35 #include <linux/module.h>
36 #include <linux/moduleparam.h>
37 #include <linux/random.h>
38 #include <linux/highmem.h>
39 #include <linux/time.h>
40 #include <asm/byteorder.h>
41 #include <net/ip.h>
42 #include <rdma/ib_verbs.h>
43 #include <rdma/iw_cm.h>
44 #include <rdma/ib_user_verbs.h>
45 #include <rdma/ib_umem.h>
46 #include "i40iw.h"
47
48 /**
49 * i40iw_query_device - get device attributes
50 * @ibdev: device pointer from stack
51 * @props: returning device attributes
52 * @udata: user data
53 */
54 static int i40iw_query_device(struct ib_device *ibdev,
55 struct ib_device_attr *props,
56 struct ib_udata *udata)
57 {
58 struct i40iw_device *iwdev = to_iwdev(ibdev);
59
60 if (udata->inlen || udata->outlen)
61 return -EINVAL;
62 memset(props, 0, sizeof(*props));
63 ether_addr_copy((u8 *)&props->sys_image_guid, iwdev->netdev->dev_addr);
64 props->fw_ver = I40IW_FW_VERSION;
65 props->device_cap_flags = iwdev->device_cap_flags;
66 props->vendor_id = iwdev->ldev->pcidev->vendor;
67 props->vendor_part_id = iwdev->ldev->pcidev->device;
68 props->hw_ver = (u32)iwdev->sc_dev.hw_rev;
69 props->max_mr_size = I40IW_MAX_OUTBOUND_MESSAGE_SIZE;
70 props->max_qp = iwdev->max_qp;
71 props->max_qp_wr = (I40IW_MAX_WQ_ENTRIES >> 2) - 1;
72 props->max_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
73 props->max_cq = iwdev->max_cq;
74 props->max_cqe = iwdev->max_cqe;
75 props->max_mr = iwdev->max_mr;
76 props->max_pd = iwdev->max_pd;
77 props->max_sge_rd = 1;
78 props->max_qp_rd_atom = I40IW_MAX_IRD_SIZE;
79 props->max_qp_init_rd_atom = props->max_qp_rd_atom;
80 props->atomic_cap = IB_ATOMIC_NONE;
81 props->max_map_per_fmr = 1;
82 return 0;
83 }
84
85 /**
86 * i40iw_query_port - get port attrubutes
87 * @ibdev: device pointer from stack
88 * @port: port number for query
89 * @props: returning device attributes
90 */
91 static int i40iw_query_port(struct ib_device *ibdev,
92 u8 port,
93 struct ib_port_attr *props)
94 {
95 struct i40iw_device *iwdev = to_iwdev(ibdev);
96 struct net_device *netdev = iwdev->netdev;
97
98 memset(props, 0, sizeof(*props));
99
100 props->max_mtu = IB_MTU_4096;
101 if (netdev->mtu >= 4096)
102 props->active_mtu = IB_MTU_4096;
103 else if (netdev->mtu >= 2048)
104 props->active_mtu = IB_MTU_2048;
105 else if (netdev->mtu >= 1024)
106 props->active_mtu = IB_MTU_1024;
107 else if (netdev->mtu >= 512)
108 props->active_mtu = IB_MTU_512;
109 else
110 props->active_mtu = IB_MTU_256;
111
112 props->lid = 1;
113 if (netif_carrier_ok(iwdev->netdev))
114 props->state = IB_PORT_ACTIVE;
115 else
116 props->state = IB_PORT_DOWN;
117 props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_REINIT_SUP |
118 IB_PORT_VENDOR_CLASS_SUP | IB_PORT_BOOT_MGMT_SUP;
119 props->gid_tbl_len = 1;
120 props->pkey_tbl_len = 1;
121 props->active_width = IB_WIDTH_4X;
122 props->active_speed = 1;
123 props->max_msg_sz = I40IW_MAX_OUTBOUND_MESSAGE_SIZE;
124 return 0;
125 }
126
127 /**
128 * i40iw_alloc_ucontext - Allocate the user context data structure
129 * @ibdev: device pointer from stack
130 * @udata: user data
131 *
132 * This keeps track of all objects associated with a particular
133 * user-mode client.
134 */
135 static struct ib_ucontext *i40iw_alloc_ucontext(struct ib_device *ibdev,
136 struct ib_udata *udata)
137 {
138 struct i40iw_device *iwdev = to_iwdev(ibdev);
139 struct i40iw_alloc_ucontext_req req;
140 struct i40iw_alloc_ucontext_resp uresp;
141 struct i40iw_ucontext *ucontext;
142
143 if (ib_copy_from_udata(&req, udata, sizeof(req)))
144 return ERR_PTR(-EINVAL);
145
146 if (req.userspace_ver != I40IW_ABI_USERSPACE_VER) {
147 i40iw_pr_err("Invalid userspace driver version detected. Detected version %d, should be %d\n",
148 req.userspace_ver, I40IW_ABI_USERSPACE_VER);
149 return ERR_PTR(-EINVAL);
150 }
151
152 memset(&uresp, 0, sizeof(uresp));
153 uresp.max_qps = iwdev->max_qp;
154 uresp.max_pds = iwdev->max_pd;
155 uresp.wq_size = iwdev->max_qp_wr * 2;
156 uresp.kernel_ver = I40IW_ABI_KERNEL_VER;
157
158 ucontext = kzalloc(sizeof(*ucontext), GFP_KERNEL);
159 if (!ucontext)
160 return ERR_PTR(-ENOMEM);
161
162 ucontext->iwdev = iwdev;
163
164 if (ib_copy_to_udata(udata, &uresp, sizeof(uresp))) {
165 kfree(ucontext);
166 return ERR_PTR(-EFAULT);
167 }
168
169 INIT_LIST_HEAD(&ucontext->cq_reg_mem_list);
170 spin_lock_init(&ucontext->cq_reg_mem_list_lock);
171 INIT_LIST_HEAD(&ucontext->qp_reg_mem_list);
172 spin_lock_init(&ucontext->qp_reg_mem_list_lock);
173
174 return &ucontext->ibucontext;
175 }
176
177 /**
178 * i40iw_dealloc_ucontext - deallocate the user context data structure
179 * @context: user context created during alloc
180 */
181 static int i40iw_dealloc_ucontext(struct ib_ucontext *context)
182 {
183 struct i40iw_ucontext *ucontext = to_ucontext(context);
184 unsigned long flags;
185
186 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
187 if (!list_empty(&ucontext->cq_reg_mem_list)) {
188 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
189 return -EBUSY;
190 }
191 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
192 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
193 if (!list_empty(&ucontext->qp_reg_mem_list)) {
194 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
195 return -EBUSY;
196 }
197 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
198
199 kfree(ucontext);
200 return 0;
201 }
202
203 /**
204 * i40iw_mmap - user memory map
205 * @context: context created during alloc
206 * @vma: kernel info for user memory map
207 */
208 static int i40iw_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
209 {
210 struct i40iw_ucontext *ucontext;
211 u64 db_addr_offset;
212 u64 push_offset;
213
214 ucontext = to_ucontext(context);
215 if (ucontext->iwdev->sc_dev.is_pf) {
216 db_addr_offset = I40IW_DB_ADDR_OFFSET;
217 push_offset = I40IW_PUSH_OFFSET;
218 if (vma->vm_pgoff)
219 vma->vm_pgoff += I40IW_PF_FIRST_PUSH_PAGE_INDEX - 1;
220 } else {
221 db_addr_offset = I40IW_VF_DB_ADDR_OFFSET;
222 push_offset = I40IW_VF_PUSH_OFFSET;
223 if (vma->vm_pgoff)
224 vma->vm_pgoff += I40IW_VF_FIRST_PUSH_PAGE_INDEX - 1;
225 }
226
227 vma->vm_pgoff += db_addr_offset >> PAGE_SHIFT;
228
229 if (vma->vm_pgoff == (db_addr_offset >> PAGE_SHIFT)) {
230 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
231 vma->vm_private_data = ucontext;
232 } else {
233 if ((vma->vm_pgoff - (push_offset >> PAGE_SHIFT)) % 2)
234 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
235 else
236 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
237 }
238
239 if (io_remap_pfn_range(vma, vma->vm_start,
240 vma->vm_pgoff + (pci_resource_start(ucontext->iwdev->ldev->pcidev, 0) >> PAGE_SHIFT),
241 PAGE_SIZE, vma->vm_page_prot))
242 return -EAGAIN;
243
244 return 0;
245 }
246
247 /**
248 * i40iw_alloc_push_page - allocate a push page for qp
249 * @iwdev: iwarp device
250 * @qp: hardware control qp
251 */
252 static void i40iw_alloc_push_page(struct i40iw_device *iwdev, struct i40iw_sc_qp *qp)
253 {
254 struct i40iw_cqp_request *cqp_request;
255 struct cqp_commands_info *cqp_info;
256 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
257 enum i40iw_status_code status;
258
259 if (qp->push_idx != I40IW_INVALID_PUSH_PAGE_INDEX)
260 return;
261
262 cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
263 if (!cqp_request)
264 return;
265
266 atomic_inc(&cqp_request->refcount);
267
268 cqp_info = &cqp_request->info;
269 cqp_info->cqp_cmd = OP_MANAGE_PUSH_PAGE;
270 cqp_info->post_sq = 1;
271
272 cqp_info->in.u.manage_push_page.info.qs_handle = dev->qs_handle;
273 cqp_info->in.u.manage_push_page.info.free_page = 0;
274 cqp_info->in.u.manage_push_page.cqp = &iwdev->cqp.sc_cqp;
275 cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request;
276
277 status = i40iw_handle_cqp_op(iwdev, cqp_request);
278 if (!status)
279 qp->push_idx = cqp_request->compl_info.op_ret_val;
280 else
281 i40iw_pr_err("CQP-OP Push page fail");
282 i40iw_put_cqp_request(&iwdev->cqp, cqp_request);
283 }
284
285 /**
286 * i40iw_dealloc_push_page - free a push page for qp
287 * @iwdev: iwarp device
288 * @qp: hardware control qp
289 */
290 static void i40iw_dealloc_push_page(struct i40iw_device *iwdev, struct i40iw_sc_qp *qp)
291 {
292 struct i40iw_cqp_request *cqp_request;
293 struct cqp_commands_info *cqp_info;
294 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
295 enum i40iw_status_code status;
296
297 if (qp->push_idx == I40IW_INVALID_PUSH_PAGE_INDEX)
298 return;
299
300 cqp_request = i40iw_get_cqp_request(&iwdev->cqp, false);
301 if (!cqp_request)
302 return;
303
304 cqp_info = &cqp_request->info;
305 cqp_info->cqp_cmd = OP_MANAGE_PUSH_PAGE;
306 cqp_info->post_sq = 1;
307
308 cqp_info->in.u.manage_push_page.info.push_idx = qp->push_idx;
309 cqp_info->in.u.manage_push_page.info.qs_handle = dev->qs_handle;
310 cqp_info->in.u.manage_push_page.info.free_page = 1;
311 cqp_info->in.u.manage_push_page.cqp = &iwdev->cqp.sc_cqp;
312 cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request;
313
314 status = i40iw_handle_cqp_op(iwdev, cqp_request);
315 if (!status)
316 qp->push_idx = I40IW_INVALID_PUSH_PAGE_INDEX;
317 else
318 i40iw_pr_err("CQP-OP Push page fail");
319 }
320
321 /**
322 * i40iw_alloc_pd - allocate protection domain
323 * @ibdev: device pointer from stack
324 * @context: user context created during alloc
325 * @udata: user data
326 */
327 static struct ib_pd *i40iw_alloc_pd(struct ib_device *ibdev,
328 struct ib_ucontext *context,
329 struct ib_udata *udata)
330 {
331 struct i40iw_pd *iwpd;
332 struct i40iw_device *iwdev = to_iwdev(ibdev);
333 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
334 struct i40iw_alloc_pd_resp uresp;
335 struct i40iw_sc_pd *sc_pd;
336 u32 pd_id = 0;
337 int err;
338
339 err = i40iw_alloc_resource(iwdev, iwdev->allocated_pds,
340 iwdev->max_pd, &pd_id, &iwdev->next_pd);
341 if (err) {
342 i40iw_pr_err("alloc resource failed\n");
343 return ERR_PTR(err);
344 }
345
346 iwpd = kzalloc(sizeof(*iwpd), GFP_KERNEL);
347 if (!iwpd) {
348 err = -ENOMEM;
349 goto free_res;
350 }
351
352 sc_pd = &iwpd->sc_pd;
353 dev->iw_pd_ops->pd_init(dev, sc_pd, pd_id);
354
355 if (context) {
356 memset(&uresp, 0, sizeof(uresp));
357 uresp.pd_id = pd_id;
358 if (ib_copy_to_udata(udata, &uresp, sizeof(uresp))) {
359 err = -EFAULT;
360 goto error;
361 }
362 }
363
364 i40iw_add_pdusecount(iwpd);
365 return &iwpd->ibpd;
366 error:
367 kfree(iwpd);
368 free_res:
369 i40iw_free_resource(iwdev, iwdev->allocated_pds, pd_id);
370 return ERR_PTR(err);
371 }
372
373 /**
374 * i40iw_dealloc_pd - deallocate pd
375 * @ibpd: ptr of pd to be deallocated
376 */
377 static int i40iw_dealloc_pd(struct ib_pd *ibpd)
378 {
379 struct i40iw_pd *iwpd = to_iwpd(ibpd);
380 struct i40iw_device *iwdev = to_iwdev(ibpd->device);
381
382 i40iw_rem_pdusecount(iwpd, iwdev);
383 return 0;
384 }
385
386 /**
387 * i40iw_qp_roundup - return round up qp ring size
388 * @wr_ring_size: ring size to round up
389 */
390 static int i40iw_qp_roundup(u32 wr_ring_size)
391 {
392 int scount = 1;
393
394 if (wr_ring_size < I40IWQP_SW_MIN_WQSIZE)
395 wr_ring_size = I40IWQP_SW_MIN_WQSIZE;
396
397 for (wr_ring_size--; scount <= 16; scount *= 2)
398 wr_ring_size |= wr_ring_size >> scount;
399 return ++wr_ring_size;
400 }
401
402 /**
403 * i40iw_get_pbl - Retrieve pbl from a list given a virtual
404 * address
405 * @va: user virtual address
406 * @pbl_list: pbl list to search in (QP's or CQ's)
407 */
408 static struct i40iw_pbl *i40iw_get_pbl(unsigned long va,
409 struct list_head *pbl_list)
410 {
411 struct i40iw_pbl *iwpbl;
412
413 list_for_each_entry(iwpbl, pbl_list, list) {
414 if (iwpbl->user_base == va) {
415 list_del(&iwpbl->list);
416 return iwpbl;
417 }
418 }
419 return NULL;
420 }
421
422 /**
423 * i40iw_free_qp_resources - free up memory resources for qp
424 * @iwdev: iwarp device
425 * @iwqp: qp ptr (user or kernel)
426 * @qp_num: qp number assigned
427 */
428 void i40iw_free_qp_resources(struct i40iw_device *iwdev,
429 struct i40iw_qp *iwqp,
430 u32 qp_num)
431 {
432 i40iw_dealloc_push_page(iwdev, &iwqp->sc_qp);
433 if (qp_num)
434 i40iw_free_resource(iwdev, iwdev->allocated_qps, qp_num);
435 i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwqp->q2_ctx_mem);
436 i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwqp->kqp.dma_mem);
437 kfree(iwqp->kqp.wrid_mem);
438 iwqp->kqp.wrid_mem = NULL;
439 kfree(iwqp->allocated_buffer);
440 }
441
442 /**
443 * i40iw_clean_cqes - clean cq entries for qp
444 * @iwqp: qp ptr (user or kernel)
445 * @iwcq: cq ptr
446 */
447 static void i40iw_clean_cqes(struct i40iw_qp *iwqp, struct i40iw_cq *iwcq)
448 {
449 struct i40iw_cq_uk *ukcq = &iwcq->sc_cq.cq_uk;
450
451 ukcq->ops.iw_cq_clean(&iwqp->sc_qp.qp_uk, ukcq);
452 }
453
454 /**
455 * i40iw_destroy_qp - destroy qp
456 * @ibqp: qp's ib pointer also to get to device's qp address
457 */
458 static int i40iw_destroy_qp(struct ib_qp *ibqp)
459 {
460 struct i40iw_qp *iwqp = to_iwqp(ibqp);
461
462 iwqp->destroyed = 1;
463
464 if (iwqp->ibqp_state >= IB_QPS_INIT && iwqp->ibqp_state < IB_QPS_RTS)
465 i40iw_next_iw_state(iwqp, I40IW_QP_STATE_ERROR, 0, 0, 0);
466
467 if (!iwqp->user_mode) {
468 if (iwqp->iwscq) {
469 i40iw_clean_cqes(iwqp, iwqp->iwscq);
470 if (iwqp->iwrcq != iwqp->iwscq)
471 i40iw_clean_cqes(iwqp, iwqp->iwrcq);
472 }
473 }
474
475 i40iw_rem_ref(&iwqp->ibqp);
476 return 0;
477 }
478
479 /**
480 * i40iw_setup_virt_qp - setup for allocation of virtual qp
481 * @dev: iwarp device
482 * @qp: qp ptr
483 * @init_info: initialize info to return
484 */
485 static int i40iw_setup_virt_qp(struct i40iw_device *iwdev,
486 struct i40iw_qp *iwqp,
487 struct i40iw_qp_init_info *init_info)
488 {
489 struct i40iw_pbl *iwpbl = iwqp->iwpbl;
490 struct i40iw_qp_mr *qpmr = &iwpbl->qp_mr;
491
492 iwqp->page = qpmr->sq_page;
493 init_info->shadow_area_pa = cpu_to_le64(qpmr->shadow);
494 if (iwpbl->pbl_allocated) {
495 init_info->virtual_map = true;
496 init_info->sq_pa = qpmr->sq_pbl.idx;
497 init_info->rq_pa = qpmr->rq_pbl.idx;
498 } else {
499 init_info->sq_pa = qpmr->sq_pbl.addr;
500 init_info->rq_pa = qpmr->rq_pbl.addr;
501 }
502 return 0;
503 }
504
505 /**
506 * i40iw_setup_kmode_qp - setup initialization for kernel mode qp
507 * @iwdev: iwarp device
508 * @iwqp: qp ptr (user or kernel)
509 * @info: initialize info to return
510 */
511 static int i40iw_setup_kmode_qp(struct i40iw_device *iwdev,
512 struct i40iw_qp *iwqp,
513 struct i40iw_qp_init_info *info)
514 {
515 struct i40iw_dma_mem *mem = &iwqp->kqp.dma_mem;
516 u32 sqdepth, rqdepth;
517 u32 sq_size, rq_size;
518 u8 sqshift, rqshift;
519 u32 size;
520 enum i40iw_status_code status;
521 struct i40iw_qp_uk_init_info *ukinfo = &info->qp_uk_init_info;
522
523 ukinfo->max_sq_frag_cnt = I40IW_MAX_WQ_FRAGMENT_COUNT;
524
525 sq_size = i40iw_qp_roundup(ukinfo->sq_size + 1);
526 rq_size = i40iw_qp_roundup(ukinfo->rq_size + 1);
527
528 status = i40iw_get_wqe_shift(sq_size, ukinfo->max_sq_frag_cnt, ukinfo->max_inline_data, &sqshift);
529 if (!status)
530 status = i40iw_get_wqe_shift(rq_size, ukinfo->max_rq_frag_cnt, 0, &rqshift);
531
532 if (status)
533 return -ENOSYS;
534
535 sqdepth = sq_size << sqshift;
536 rqdepth = rq_size << rqshift;
537
538 size = sqdepth * sizeof(struct i40iw_sq_uk_wr_trk_info) + (rqdepth << 3);
539 iwqp->kqp.wrid_mem = kzalloc(size, GFP_KERNEL);
540
541 ukinfo->sq_wrtrk_array = (struct i40iw_sq_uk_wr_trk_info *)iwqp->kqp.wrid_mem;
542 if (!ukinfo->sq_wrtrk_array)
543 return -ENOMEM;
544
545 ukinfo->rq_wrid_array = (u64 *)&ukinfo->sq_wrtrk_array[sqdepth];
546
547 size = (sqdepth + rqdepth) * I40IW_QP_WQE_MIN_SIZE;
548 size += (I40IW_SHADOW_AREA_SIZE << 3);
549
550 status = i40iw_allocate_dma_mem(iwdev->sc_dev.hw, mem, size, 256);
551 if (status) {
552 kfree(ukinfo->sq_wrtrk_array);
553 ukinfo->sq_wrtrk_array = NULL;
554 return -ENOMEM;
555 }
556
557 ukinfo->sq = mem->va;
558 info->sq_pa = mem->pa;
559
560 ukinfo->rq = &ukinfo->sq[sqdepth];
561 info->rq_pa = info->sq_pa + (sqdepth * I40IW_QP_WQE_MIN_SIZE);
562
563 ukinfo->shadow_area = ukinfo->rq[rqdepth].elem;
564 info->shadow_area_pa = info->rq_pa + (rqdepth * I40IW_QP_WQE_MIN_SIZE);
565
566 ukinfo->sq_size = sq_size;
567 ukinfo->rq_size = rq_size;
568 ukinfo->qp_id = iwqp->ibqp.qp_num;
569 return 0;
570 }
571
572 /**
573 * i40iw_create_qp - create qp
574 * @ibpd: ptr of pd
575 * @init_attr: attributes for qp
576 * @udata: user data for create qp
577 */
578 static struct ib_qp *i40iw_create_qp(struct ib_pd *ibpd,
579 struct ib_qp_init_attr *init_attr,
580 struct ib_udata *udata)
581 {
582 struct i40iw_pd *iwpd = to_iwpd(ibpd);
583 struct i40iw_device *iwdev = to_iwdev(ibpd->device);
584 struct i40iw_cqp *iwcqp = &iwdev->cqp;
585 struct i40iw_qp *iwqp;
586 struct i40iw_ucontext *ucontext;
587 struct i40iw_create_qp_req req;
588 struct i40iw_create_qp_resp uresp;
589 u32 qp_num = 0;
590 void *mem;
591 enum i40iw_status_code ret;
592 int err_code;
593 int sq_size;
594 int rq_size;
595 struct i40iw_sc_qp *qp;
596 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
597 struct i40iw_qp_init_info init_info;
598 struct i40iw_create_qp_info *qp_info;
599 struct i40iw_cqp_request *cqp_request;
600 struct cqp_commands_info *cqp_info;
601
602 struct i40iw_qp_host_ctx_info *ctx_info;
603 struct i40iwarp_offload_info *iwarp_info;
604 unsigned long flags;
605
606 if (init_attr->create_flags)
607 return ERR_PTR(-EINVAL);
608 if (init_attr->cap.max_inline_data > I40IW_MAX_INLINE_DATA_SIZE)
609 init_attr->cap.max_inline_data = I40IW_MAX_INLINE_DATA_SIZE;
610
611 if (init_attr->cap.max_send_sge > I40IW_MAX_WQ_FRAGMENT_COUNT)
612 init_attr->cap.max_send_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
613
614 memset(&init_info, 0, sizeof(init_info));
615
616 sq_size = init_attr->cap.max_send_wr;
617 rq_size = init_attr->cap.max_recv_wr;
618
619 init_info.qp_uk_init_info.sq_size = sq_size;
620 init_info.qp_uk_init_info.rq_size = rq_size;
621 init_info.qp_uk_init_info.max_sq_frag_cnt = init_attr->cap.max_send_sge;
622 init_info.qp_uk_init_info.max_rq_frag_cnt = init_attr->cap.max_recv_sge;
623 init_info.qp_uk_init_info.max_inline_data = init_attr->cap.max_inline_data;
624
625 mem = kzalloc(sizeof(*iwqp), GFP_KERNEL);
626 if (!mem)
627 return ERR_PTR(-ENOMEM);
628
629 iwqp = (struct i40iw_qp *)mem;
630 qp = &iwqp->sc_qp;
631 qp->back_qp = (void *)iwqp;
632 qp->push_idx = I40IW_INVALID_PUSH_PAGE_INDEX;
633
634 iwqp->ctx_info.iwarp_info = &iwqp->iwarp_info;
635
636 if (i40iw_allocate_dma_mem(dev->hw,
637 &iwqp->q2_ctx_mem,
638 I40IW_Q2_BUFFER_SIZE + I40IW_QP_CTX_SIZE,
639 256)) {
640 i40iw_pr_err("dma_mem failed\n");
641 err_code = -ENOMEM;
642 goto error;
643 }
644
645 init_info.q2 = iwqp->q2_ctx_mem.va;
646 init_info.q2_pa = iwqp->q2_ctx_mem.pa;
647
648 init_info.host_ctx = (void *)init_info.q2 + I40IW_Q2_BUFFER_SIZE;
649 init_info.host_ctx_pa = init_info.q2_pa + I40IW_Q2_BUFFER_SIZE;
650
651 err_code = i40iw_alloc_resource(iwdev, iwdev->allocated_qps, iwdev->max_qp,
652 &qp_num, &iwdev->next_qp);
653 if (err_code) {
654 i40iw_pr_err("qp resource\n");
655 goto error;
656 }
657
658 iwqp->allocated_buffer = mem;
659 iwqp->iwdev = iwdev;
660 iwqp->iwpd = iwpd;
661 iwqp->ibqp.qp_num = qp_num;
662 qp = &iwqp->sc_qp;
663 iwqp->iwscq = to_iwcq(init_attr->send_cq);
664 iwqp->iwrcq = to_iwcq(init_attr->recv_cq);
665
666 iwqp->host_ctx.va = init_info.host_ctx;
667 iwqp->host_ctx.pa = init_info.host_ctx_pa;
668 iwqp->host_ctx.size = I40IW_QP_CTX_SIZE;
669
670 init_info.pd = &iwpd->sc_pd;
671 init_info.qp_uk_init_info.qp_id = iwqp->ibqp.qp_num;
672 iwqp->ctx_info.qp_compl_ctx = (uintptr_t)qp;
673
674 if (init_attr->qp_type != IB_QPT_RC) {
675 err_code = -ENOSYS;
676 goto error;
677 }
678 if (iwdev->push_mode)
679 i40iw_alloc_push_page(iwdev, qp);
680 if (udata) {
681 err_code = ib_copy_from_udata(&req, udata, sizeof(req));
682 if (err_code) {
683 i40iw_pr_err("ib_copy_from_data\n");
684 goto error;
685 }
686 iwqp->ctx_info.qp_compl_ctx = req.user_compl_ctx;
687 if (ibpd->uobject && ibpd->uobject->context) {
688 iwqp->user_mode = 1;
689 ucontext = to_ucontext(ibpd->uobject->context);
690
691 if (req.user_wqe_buffers) {
692 spin_lock_irqsave(
693 &ucontext->qp_reg_mem_list_lock, flags);
694 iwqp->iwpbl = i40iw_get_pbl(
695 (unsigned long)req.user_wqe_buffers,
696 &ucontext->qp_reg_mem_list);
697 spin_unlock_irqrestore(
698 &ucontext->qp_reg_mem_list_lock, flags);
699
700 if (!iwqp->iwpbl) {
701 err_code = -ENODATA;
702 i40iw_pr_err("no pbl info\n");
703 goto error;
704 }
705 }
706 }
707 err_code = i40iw_setup_virt_qp(iwdev, iwqp, &init_info);
708 } else {
709 err_code = i40iw_setup_kmode_qp(iwdev, iwqp, &init_info);
710 }
711
712 if (err_code) {
713 i40iw_pr_err("setup qp failed\n");
714 goto error;
715 }
716
717 init_info.type = I40IW_QP_TYPE_IWARP;
718 ret = dev->iw_priv_qp_ops->qp_init(qp, &init_info);
719 if (ret) {
720 err_code = -EPROTO;
721 i40iw_pr_err("qp_init fail\n");
722 goto error;
723 }
724 ctx_info = &iwqp->ctx_info;
725 iwarp_info = &iwqp->iwarp_info;
726 iwarp_info->rd_enable = true;
727 iwarp_info->wr_rdresp_en = true;
728 if (!iwqp->user_mode) {
729 iwarp_info->fast_reg_en = true;
730 iwarp_info->priv_mode_en = true;
731 }
732 iwarp_info->ddp_ver = 1;
733 iwarp_info->rdmap_ver = 1;
734
735 ctx_info->iwarp_info_valid = true;
736 ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
737 ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
738 if (qp->push_idx == I40IW_INVALID_PUSH_PAGE_INDEX) {
739 ctx_info->push_mode_en = false;
740 } else {
741 ctx_info->push_mode_en = true;
742 ctx_info->push_idx = qp->push_idx;
743 }
744
745 ret = dev->iw_priv_qp_ops->qp_setctx(&iwqp->sc_qp,
746 (u64 *)iwqp->host_ctx.va,
747 ctx_info);
748 ctx_info->iwarp_info_valid = false;
749 cqp_request = i40iw_get_cqp_request(iwcqp, true);
750 if (!cqp_request) {
751 err_code = -ENOMEM;
752 goto error;
753 }
754 cqp_info = &cqp_request->info;
755 qp_info = &cqp_request->info.in.u.qp_create.info;
756
757 memset(qp_info, 0, sizeof(*qp_info));
758
759 qp_info->cq_num_valid = true;
760 qp_info->next_iwarp_state = I40IW_QP_STATE_IDLE;
761
762 cqp_info->cqp_cmd = OP_QP_CREATE;
763 cqp_info->post_sq = 1;
764 cqp_info->in.u.qp_create.qp = qp;
765 cqp_info->in.u.qp_create.scratch = (uintptr_t)cqp_request;
766 ret = i40iw_handle_cqp_op(iwdev, cqp_request);
767 if (ret) {
768 i40iw_pr_err("CQP-OP QP create fail");
769 err_code = -EACCES;
770 goto error;
771 }
772
773 i40iw_add_ref(&iwqp->ibqp);
774 spin_lock_init(&iwqp->lock);
775 iwqp->sig_all = (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) ? 1 : 0;
776 iwdev->qp_table[qp_num] = iwqp;
777 i40iw_add_pdusecount(iwqp->iwpd);
778 if (ibpd->uobject && udata) {
779 memset(&uresp, 0, sizeof(uresp));
780 uresp.actual_sq_size = sq_size;
781 uresp.actual_rq_size = rq_size;
782 uresp.qp_id = qp_num;
783 uresp.push_idx = qp->push_idx;
784 err_code = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
785 if (err_code) {
786 i40iw_pr_err("copy_to_udata failed\n");
787 i40iw_destroy_qp(&iwqp->ibqp);
788 /* let the completion of the qp destroy free the qp */
789 return ERR_PTR(err_code);
790 }
791 }
792
793 return &iwqp->ibqp;
794 error:
795 i40iw_free_qp_resources(iwdev, iwqp, qp_num);
796 kfree(mem);
797 return ERR_PTR(err_code);
798 }
799
800 /**
801 * i40iw_query - query qp attributes
802 * @ibqp: qp pointer
803 * @attr: attributes pointer
804 * @attr_mask: Not used
805 * @init_attr: qp attributes to return
806 */
807 static int i40iw_query_qp(struct ib_qp *ibqp,
808 struct ib_qp_attr *attr,
809 int attr_mask,
810 struct ib_qp_init_attr *init_attr)
811 {
812 struct i40iw_qp *iwqp = to_iwqp(ibqp);
813 struct i40iw_sc_qp *qp = &iwqp->sc_qp;
814
815 attr->qp_access_flags = 0;
816 attr->cap.max_send_wr = qp->qp_uk.sq_size;
817 attr->cap.max_recv_wr = qp->qp_uk.rq_size;
818 attr->cap.max_recv_sge = 1;
819 attr->cap.max_inline_data = I40IW_MAX_INLINE_DATA_SIZE;
820 init_attr->event_handler = iwqp->ibqp.event_handler;
821 init_attr->qp_context = iwqp->ibqp.qp_context;
822 init_attr->send_cq = iwqp->ibqp.send_cq;
823 init_attr->recv_cq = iwqp->ibqp.recv_cq;
824 init_attr->srq = iwqp->ibqp.srq;
825 init_attr->cap = attr->cap;
826 return 0;
827 }
828
829 /**
830 * i40iw_hw_modify_qp - setup cqp for modify qp
831 * @iwdev: iwarp device
832 * @iwqp: qp ptr (user or kernel)
833 * @info: info for modify qp
834 * @wait: flag to wait or not for modify qp completion
835 */
836 void i40iw_hw_modify_qp(struct i40iw_device *iwdev, struct i40iw_qp *iwqp,
837 struct i40iw_modify_qp_info *info, bool wait)
838 {
839 enum i40iw_status_code status;
840 struct i40iw_cqp_request *cqp_request;
841 struct cqp_commands_info *cqp_info;
842 struct i40iw_modify_qp_info *m_info;
843
844 cqp_request = i40iw_get_cqp_request(&iwdev->cqp, wait);
845 if (!cqp_request)
846 return;
847
848 cqp_info = &cqp_request->info;
849 m_info = &cqp_info->in.u.qp_modify.info;
850 memcpy(m_info, info, sizeof(*m_info));
851 cqp_info->cqp_cmd = OP_QP_MODIFY;
852 cqp_info->post_sq = 1;
853 cqp_info->in.u.qp_modify.qp = &iwqp->sc_qp;
854 cqp_info->in.u.qp_modify.scratch = (uintptr_t)cqp_request;
855 status = i40iw_handle_cqp_op(iwdev, cqp_request);
856 if (status)
857 i40iw_pr_err("CQP-OP Modify QP fail");
858 }
859
860 /**
861 * i40iw_modify_qp - modify qp request
862 * @ibqp: qp's pointer for modify
863 * @attr: access attributes
864 * @attr_mask: state mask
865 * @udata: user data
866 */
867 int i40iw_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
868 int attr_mask, struct ib_udata *udata)
869 {
870 struct i40iw_qp *iwqp = to_iwqp(ibqp);
871 struct i40iw_device *iwdev = iwqp->iwdev;
872 struct i40iw_qp_host_ctx_info *ctx_info;
873 struct i40iwarp_offload_info *iwarp_info;
874 struct i40iw_modify_qp_info info;
875 u8 issue_modify_qp = 0;
876 u8 dont_wait = 0;
877 u32 err;
878 unsigned long flags;
879
880 memset(&info, 0, sizeof(info));
881 ctx_info = &iwqp->ctx_info;
882 iwarp_info = &iwqp->iwarp_info;
883
884 spin_lock_irqsave(&iwqp->lock, flags);
885
886 if (attr_mask & IB_QP_STATE) {
887 switch (attr->qp_state) {
888 case IB_QPS_INIT:
889 case IB_QPS_RTR:
890 if (iwqp->iwarp_state > (u32)I40IW_QP_STATE_IDLE) {
891 err = -EINVAL;
892 goto exit;
893 }
894 if (iwqp->iwarp_state == I40IW_QP_STATE_INVALID) {
895 info.next_iwarp_state = I40IW_QP_STATE_IDLE;
896 issue_modify_qp = 1;
897 }
898 break;
899 case IB_QPS_RTS:
900 if ((iwqp->iwarp_state > (u32)I40IW_QP_STATE_RTS) ||
901 (!iwqp->cm_id)) {
902 err = -EINVAL;
903 goto exit;
904 }
905
906 issue_modify_qp = 1;
907 iwqp->hw_tcp_state = I40IW_TCP_STATE_ESTABLISHED;
908 iwqp->hte_added = 1;
909 info.next_iwarp_state = I40IW_QP_STATE_RTS;
910 info.tcp_ctx_valid = true;
911 info.ord_valid = true;
912 info.arp_cache_idx_valid = true;
913 info.cq_num_valid = true;
914 break;
915 case IB_QPS_SQD:
916 if (iwqp->hw_iwarp_state > (u32)I40IW_QP_STATE_RTS) {
917 err = 0;
918 goto exit;
919 }
920 if ((iwqp->iwarp_state == (u32)I40IW_QP_STATE_CLOSING) ||
921 (iwqp->iwarp_state < (u32)I40IW_QP_STATE_RTS)) {
922 err = 0;
923 goto exit;
924 }
925 if (iwqp->iwarp_state > (u32)I40IW_QP_STATE_CLOSING) {
926 err = -EINVAL;
927 goto exit;
928 }
929 info.next_iwarp_state = I40IW_QP_STATE_CLOSING;
930 issue_modify_qp = 1;
931 break;
932 case IB_QPS_SQE:
933 if (iwqp->iwarp_state >= (u32)I40IW_QP_STATE_TERMINATE) {
934 err = -EINVAL;
935 goto exit;
936 }
937 info.next_iwarp_state = I40IW_QP_STATE_TERMINATE;
938 issue_modify_qp = 1;
939 break;
940 case IB_QPS_ERR:
941 case IB_QPS_RESET:
942 if (iwqp->iwarp_state == (u32)I40IW_QP_STATE_ERROR) {
943 err = -EINVAL;
944 goto exit;
945 }
946 if (iwqp->sc_qp.term_flags)
947 del_timer(&iwqp->terminate_timer);
948 info.next_iwarp_state = I40IW_QP_STATE_ERROR;
949 if ((iwqp->hw_tcp_state > I40IW_TCP_STATE_CLOSED) &&
950 iwdev->iw_status &&
951 (iwqp->hw_tcp_state != I40IW_TCP_STATE_TIME_WAIT))
952 info.reset_tcp_conn = true;
953 else
954 dont_wait = 1;
955 issue_modify_qp = 1;
956 info.next_iwarp_state = I40IW_QP_STATE_ERROR;
957 break;
958 default:
959 err = -EINVAL;
960 goto exit;
961 }
962
963 iwqp->ibqp_state = attr->qp_state;
964
965 if (issue_modify_qp)
966 iwqp->iwarp_state = info.next_iwarp_state;
967 else
968 info.next_iwarp_state = iwqp->iwarp_state;
969 }
970 if (attr_mask & IB_QP_ACCESS_FLAGS) {
971 ctx_info->iwarp_info_valid = true;
972 if (attr->qp_access_flags & IB_ACCESS_LOCAL_WRITE)
973 iwarp_info->wr_rdresp_en = true;
974 if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE)
975 iwarp_info->wr_rdresp_en = true;
976 if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ)
977 iwarp_info->rd_enable = true;
978 if (attr->qp_access_flags & IB_ACCESS_MW_BIND)
979 iwarp_info->bind_en = true;
980
981 if (iwqp->user_mode) {
982 iwarp_info->rd_enable = true;
983 iwarp_info->wr_rdresp_en = true;
984 iwarp_info->priv_mode_en = false;
985 }
986 }
987
988 if (ctx_info->iwarp_info_valid) {
989 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
990 int ret;
991
992 ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
993 ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
994 ret = dev->iw_priv_qp_ops->qp_setctx(&iwqp->sc_qp,
995 (u64 *)iwqp->host_ctx.va,
996 ctx_info);
997 if (ret) {
998 i40iw_pr_err("setting QP context\n");
999 err = -EINVAL;
1000 goto exit;
1001 }
1002 }
1003
1004 spin_unlock_irqrestore(&iwqp->lock, flags);
1005
1006 if (issue_modify_qp)
1007 i40iw_hw_modify_qp(iwdev, iwqp, &info, true);
1008
1009 if (issue_modify_qp && (iwqp->ibqp_state > IB_QPS_RTS)) {
1010 if (dont_wait) {
1011 if (iwqp->cm_id && iwqp->hw_tcp_state) {
1012 spin_lock_irqsave(&iwqp->lock, flags);
1013 iwqp->hw_tcp_state = I40IW_TCP_STATE_CLOSED;
1014 iwqp->last_aeq = I40IW_AE_RESET_SENT;
1015 spin_unlock_irqrestore(&iwqp->lock, flags);
1016 }
1017 }
1018 }
1019 return 0;
1020 exit:
1021 spin_unlock_irqrestore(&iwqp->lock, flags);
1022 return err;
1023 }
1024
1025 /**
1026 * cq_free_resources - free up recources for cq
1027 * @iwdev: iwarp device
1028 * @iwcq: cq ptr
1029 */
1030 static void cq_free_resources(struct i40iw_device *iwdev, struct i40iw_cq *iwcq)
1031 {
1032 struct i40iw_sc_cq *cq = &iwcq->sc_cq;
1033
1034 if (!iwcq->user_mode)
1035 i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwcq->kmem);
1036 i40iw_free_resource(iwdev, iwdev->allocated_cqs, cq->cq_uk.cq_id);
1037 }
1038
1039 /**
1040 * cq_wq_destroy - send cq destroy cqp
1041 * @iwdev: iwarp device
1042 * @cq: hardware control cq
1043 */
1044 static void cq_wq_destroy(struct i40iw_device *iwdev, struct i40iw_sc_cq *cq)
1045 {
1046 enum i40iw_status_code status;
1047 struct i40iw_cqp_request *cqp_request;
1048 struct cqp_commands_info *cqp_info;
1049
1050 cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1051 if (!cqp_request)
1052 return;
1053
1054 cqp_info = &cqp_request->info;
1055
1056 cqp_info->cqp_cmd = OP_CQ_DESTROY;
1057 cqp_info->post_sq = 1;
1058 cqp_info->in.u.cq_destroy.cq = cq;
1059 cqp_info->in.u.cq_destroy.scratch = (uintptr_t)cqp_request;
1060 status = i40iw_handle_cqp_op(iwdev, cqp_request);
1061 if (status)
1062 i40iw_pr_err("CQP-OP Destroy QP fail");
1063 }
1064
1065 /**
1066 * i40iw_destroy_cq - destroy cq
1067 * @ib_cq: cq pointer
1068 */
1069 static int i40iw_destroy_cq(struct ib_cq *ib_cq)
1070 {
1071 struct i40iw_cq *iwcq;
1072 struct i40iw_device *iwdev;
1073 struct i40iw_sc_cq *cq;
1074
1075 if (!ib_cq) {
1076 i40iw_pr_err("ib_cq == NULL\n");
1077 return 0;
1078 }
1079
1080 iwcq = to_iwcq(ib_cq);
1081 iwdev = to_iwdev(ib_cq->device);
1082 cq = &iwcq->sc_cq;
1083 cq_wq_destroy(iwdev, cq);
1084 cq_free_resources(iwdev, iwcq);
1085 kfree(iwcq);
1086 return 0;
1087 }
1088
1089 /**
1090 * i40iw_create_cq - create cq
1091 * @ibdev: device pointer from stack
1092 * @attr: attributes for cq
1093 * @context: user context created during alloc
1094 * @udata: user data
1095 */
1096 static struct ib_cq *i40iw_create_cq(struct ib_device *ibdev,
1097 const struct ib_cq_init_attr *attr,
1098 struct ib_ucontext *context,
1099 struct ib_udata *udata)
1100 {
1101 struct i40iw_device *iwdev = to_iwdev(ibdev);
1102 struct i40iw_cq *iwcq;
1103 struct i40iw_pbl *iwpbl;
1104 u32 cq_num = 0;
1105 struct i40iw_sc_cq *cq;
1106 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
1107 struct i40iw_cq_init_info info;
1108 enum i40iw_status_code status;
1109 struct i40iw_cqp_request *cqp_request;
1110 struct cqp_commands_info *cqp_info;
1111 struct i40iw_cq_uk_init_info *ukinfo = &info.cq_uk_init_info;
1112 unsigned long flags;
1113 int err_code;
1114 int entries = attr->cqe;
1115
1116 if (entries > iwdev->max_cqe)
1117 return ERR_PTR(-EINVAL);
1118
1119 iwcq = kzalloc(sizeof(*iwcq), GFP_KERNEL);
1120 if (!iwcq)
1121 return ERR_PTR(-ENOMEM);
1122
1123 memset(&info, 0, sizeof(info));
1124
1125 err_code = i40iw_alloc_resource(iwdev, iwdev->allocated_cqs,
1126 iwdev->max_cq, &cq_num,
1127 &iwdev->next_cq);
1128 if (err_code)
1129 goto error;
1130
1131 cq = &iwcq->sc_cq;
1132 cq->back_cq = (void *)iwcq;
1133 spin_lock_init(&iwcq->lock);
1134
1135 info.dev = dev;
1136 ukinfo->cq_size = max(entries, 4);
1137 ukinfo->cq_id = cq_num;
1138 iwcq->ibcq.cqe = info.cq_uk_init_info.cq_size;
1139 info.ceqe_mask = 0;
1140 info.ceq_id = 0;
1141 info.ceq_id_valid = true;
1142 info.ceqe_mask = 1;
1143 info.type = I40IW_CQ_TYPE_IWARP;
1144 if (context) {
1145 struct i40iw_ucontext *ucontext;
1146 struct i40iw_create_cq_req req;
1147 struct i40iw_cq_mr *cqmr;
1148
1149 memset(&req, 0, sizeof(req));
1150 iwcq->user_mode = true;
1151 ucontext = to_ucontext(context);
1152 if (ib_copy_from_udata(&req, udata, sizeof(struct i40iw_create_cq_req)))
1153 goto cq_free_resources;
1154
1155 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1156 iwpbl = i40iw_get_pbl((unsigned long)req.user_cq_buffer,
1157 &ucontext->cq_reg_mem_list);
1158 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
1159 if (!iwpbl) {
1160 err_code = -EPROTO;
1161 goto cq_free_resources;
1162 }
1163
1164 iwcq->iwpbl = iwpbl;
1165 iwcq->cq_mem_size = 0;
1166 cqmr = &iwpbl->cq_mr;
1167 info.shadow_area_pa = cpu_to_le64(cqmr->shadow);
1168 if (iwpbl->pbl_allocated) {
1169 info.virtual_map = true;
1170 info.pbl_chunk_size = 1;
1171 info.first_pm_pbl_idx = cqmr->cq_pbl.idx;
1172 } else {
1173 info.cq_base_pa = cqmr->cq_pbl.addr;
1174 }
1175 } else {
1176 /* Kmode allocations */
1177 int rsize;
1178 int shadow;
1179
1180 rsize = info.cq_uk_init_info.cq_size * sizeof(struct i40iw_cqe);
1181 rsize = round_up(rsize, 256);
1182 shadow = I40IW_SHADOW_AREA_SIZE << 3;
1183 status = i40iw_allocate_dma_mem(dev->hw, &iwcq->kmem,
1184 rsize + shadow, 256);
1185 if (status) {
1186 err_code = -ENOMEM;
1187 goto cq_free_resources;
1188 }
1189 ukinfo->cq_base = iwcq->kmem.va;
1190 info.cq_base_pa = iwcq->kmem.pa;
1191 info.shadow_area_pa = info.cq_base_pa + rsize;
1192 ukinfo->shadow_area = iwcq->kmem.va + rsize;
1193 }
1194
1195 if (dev->iw_priv_cq_ops->cq_init(cq, &info)) {
1196 i40iw_pr_err("init cq fail\n");
1197 err_code = -EPROTO;
1198 goto cq_free_resources;
1199 }
1200
1201 cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1202 if (!cqp_request) {
1203 err_code = -ENOMEM;
1204 goto cq_free_resources;
1205 }
1206
1207 cqp_info = &cqp_request->info;
1208 cqp_info->cqp_cmd = OP_CQ_CREATE;
1209 cqp_info->post_sq = 1;
1210 cqp_info->in.u.cq_create.cq = cq;
1211 cqp_info->in.u.cq_create.scratch = (uintptr_t)cqp_request;
1212 status = i40iw_handle_cqp_op(iwdev, cqp_request);
1213 if (status) {
1214 i40iw_pr_err("CQP-OP Create QP fail");
1215 err_code = -EPROTO;
1216 goto cq_free_resources;
1217 }
1218
1219 if (context) {
1220 struct i40iw_create_cq_resp resp;
1221
1222 memset(&resp, 0, sizeof(resp));
1223 resp.cq_id = info.cq_uk_init_info.cq_id;
1224 resp.cq_size = info.cq_uk_init_info.cq_size;
1225 if (ib_copy_to_udata(udata, &resp, sizeof(resp))) {
1226 i40iw_pr_err("copy to user data\n");
1227 err_code = -EPROTO;
1228 goto cq_destroy;
1229 }
1230 }
1231
1232 return (struct ib_cq *)iwcq;
1233
1234 cq_destroy:
1235 cq_wq_destroy(iwdev, cq);
1236 cq_free_resources:
1237 cq_free_resources(iwdev, iwcq);
1238 error:
1239 kfree(iwcq);
1240 return ERR_PTR(err_code);
1241 }
1242
1243 /**
1244 * i40iw_get_user_access - get hw access from IB access
1245 * @acc: IB access to return hw access
1246 */
1247 static inline u16 i40iw_get_user_access(int acc)
1248 {
1249 u16 access = 0;
1250
1251 access |= (acc & IB_ACCESS_LOCAL_WRITE) ? I40IW_ACCESS_FLAGS_LOCALWRITE : 0;
1252 access |= (acc & IB_ACCESS_REMOTE_WRITE) ? I40IW_ACCESS_FLAGS_REMOTEWRITE : 0;
1253 access |= (acc & IB_ACCESS_REMOTE_READ) ? I40IW_ACCESS_FLAGS_REMOTEREAD : 0;
1254 access |= (acc & IB_ACCESS_MW_BIND) ? I40IW_ACCESS_FLAGS_BIND_WINDOW : 0;
1255 return access;
1256 }
1257
1258 /**
1259 * i40iw_free_stag - free stag resource
1260 * @iwdev: iwarp device
1261 * @stag: stag to free
1262 */
1263 static void i40iw_free_stag(struct i40iw_device *iwdev, u32 stag)
1264 {
1265 u32 stag_idx;
1266
1267 stag_idx = (stag & iwdev->mr_stagmask) >> I40IW_CQPSQ_STAG_IDX_SHIFT;
1268 i40iw_free_resource(iwdev, iwdev->allocated_mrs, stag_idx);
1269 }
1270
1271 /**
1272 * i40iw_create_stag - create random stag
1273 * @iwdev: iwarp device
1274 */
1275 static u32 i40iw_create_stag(struct i40iw_device *iwdev)
1276 {
1277 u32 stag = 0;
1278 u32 stag_index = 0;
1279 u32 next_stag_index;
1280 u32 driver_key;
1281 u32 random;
1282 u8 consumer_key;
1283 int ret;
1284
1285 get_random_bytes(&random, sizeof(random));
1286 consumer_key = (u8)random;
1287
1288 driver_key = random & ~iwdev->mr_stagmask;
1289 next_stag_index = (random & iwdev->mr_stagmask) >> 8;
1290 next_stag_index %= iwdev->max_mr;
1291
1292 ret = i40iw_alloc_resource(iwdev,
1293 iwdev->allocated_mrs, iwdev->max_mr,
1294 &stag_index, &next_stag_index);
1295 if (!ret) {
1296 stag = stag_index << I40IW_CQPSQ_STAG_IDX_SHIFT;
1297 stag |= driver_key;
1298 stag += (u32)consumer_key;
1299 }
1300 return stag;
1301 }
1302
1303 /**
1304 * i40iw_next_pbl_addr - Get next pbl address
1305 * @palloc: Poiner to allocated pbles
1306 * @pbl: pointer to a pble
1307 * @pinfo: info pointer
1308 * @idx: index
1309 */
1310 static inline u64 *i40iw_next_pbl_addr(struct i40iw_pble_alloc *palloc,
1311 u64 *pbl,
1312 struct i40iw_pble_info **pinfo,
1313 u32 *idx)
1314 {
1315 *idx += 1;
1316 if ((!(*pinfo)) || (*idx != (*pinfo)->cnt))
1317 return ++pbl;
1318 *idx = 0;
1319 (*pinfo)++;
1320 return (u64 *)(*pinfo)->addr;
1321 }
1322
1323 /**
1324 * i40iw_copy_user_pgaddrs - copy user page address to pble's os locally
1325 * @iwmr: iwmr for IB's user page addresses
1326 * @pbl: ple pointer to save 1 level or 0 level pble
1327 * @level: indicated level 0, 1 or 2
1328 */
1329 static void i40iw_copy_user_pgaddrs(struct i40iw_mr *iwmr,
1330 u64 *pbl,
1331 enum i40iw_pble_level level)
1332 {
1333 struct ib_umem *region = iwmr->region;
1334 struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1335 int chunk_pages, entry, pg_shift, i;
1336 struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1337 struct i40iw_pble_info *pinfo;
1338 struct scatterlist *sg;
1339 u32 idx = 0;
1340
1341 pinfo = (level == I40IW_LEVEL_1) ? NULL : palloc->level2.leaf;
1342 pg_shift = ffs(region->page_size) - 1;
1343 for_each_sg(region->sg_head.sgl, sg, region->nmap, entry) {
1344 chunk_pages = sg_dma_len(sg) >> pg_shift;
1345 if ((iwmr->type == IW_MEMREG_TYPE_QP) &&
1346 !iwpbl->qp_mr.sq_page)
1347 iwpbl->qp_mr.sq_page = sg_page(sg);
1348 for (i = 0; i < chunk_pages; i++) {
1349 *pbl = cpu_to_le64(sg_dma_address(sg) + region->page_size * i);
1350 pbl = i40iw_next_pbl_addr(palloc, pbl, &pinfo, &idx);
1351 }
1352 }
1353 }
1354
1355 /**
1356 * i40iw_setup_pbles - copy user pg address to pble's
1357 * @iwdev: iwarp device
1358 * @iwmr: mr pointer for this memory registration
1359 * @use_pbles: flag if to use pble's or memory (level 0)
1360 */
1361 static int i40iw_setup_pbles(struct i40iw_device *iwdev,
1362 struct i40iw_mr *iwmr,
1363 bool use_pbles)
1364 {
1365 struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1366 struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1367 struct i40iw_pble_info *pinfo;
1368 u64 *pbl;
1369 enum i40iw_status_code status;
1370 enum i40iw_pble_level level = I40IW_LEVEL_1;
1371
1372 if (!use_pbles && (iwmr->page_cnt > MAX_SAVE_PAGE_ADDRS))
1373 return -ENOMEM;
1374
1375 if (use_pbles) {
1376 mutex_lock(&iwdev->pbl_mutex);
1377 status = i40iw_get_pble(&iwdev->sc_dev, iwdev->pble_rsrc, palloc, iwmr->page_cnt);
1378 mutex_unlock(&iwdev->pbl_mutex);
1379 if (status)
1380 return -ENOMEM;
1381
1382 iwpbl->pbl_allocated = true;
1383 level = palloc->level;
1384 pinfo = (level == I40IW_LEVEL_1) ? &palloc->level1 : palloc->level2.leaf;
1385 pbl = (u64 *)pinfo->addr;
1386 } else {
1387 pbl = iwmr->pgaddrmem;
1388 }
1389
1390 i40iw_copy_user_pgaddrs(iwmr, pbl, level);
1391 return 0;
1392 }
1393
1394 /**
1395 * i40iw_handle_q_mem - handle memory for qp and cq
1396 * @iwdev: iwarp device
1397 * @req: information for q memory management
1398 * @iwpbl: pble struct
1399 * @use_pbles: flag to use pble
1400 */
1401 static int i40iw_handle_q_mem(struct i40iw_device *iwdev,
1402 struct i40iw_mem_reg_req *req,
1403 struct i40iw_pbl *iwpbl,
1404 bool use_pbles)
1405 {
1406 struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1407 struct i40iw_mr *iwmr = iwpbl->iwmr;
1408 struct i40iw_qp_mr *qpmr = &iwpbl->qp_mr;
1409 struct i40iw_cq_mr *cqmr = &iwpbl->cq_mr;
1410 struct i40iw_hmc_pble *hmc_p;
1411 u64 *arr = iwmr->pgaddrmem;
1412 int err;
1413 int total;
1414
1415 total = req->sq_pages + req->rq_pages + req->cq_pages;
1416
1417 err = i40iw_setup_pbles(iwdev, iwmr, use_pbles);
1418 if (err)
1419 return err;
1420 if (use_pbles && (palloc->level != I40IW_LEVEL_1)) {
1421 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1422 iwpbl->pbl_allocated = false;
1423 return -ENOMEM;
1424 }
1425
1426 if (use_pbles)
1427 arr = (u64 *)palloc->level1.addr;
1428 if (req->reg_type == IW_MEMREG_TYPE_QP) {
1429 hmc_p = &qpmr->sq_pbl;
1430 qpmr->shadow = (dma_addr_t)arr[total];
1431 if (use_pbles) {
1432 hmc_p->idx = palloc->level1.idx;
1433 hmc_p = &qpmr->rq_pbl;
1434 hmc_p->idx = palloc->level1.idx + req->sq_pages;
1435 } else {
1436 hmc_p->addr = arr[0];
1437 hmc_p = &qpmr->rq_pbl;
1438 hmc_p->addr = arr[1];
1439 }
1440 } else { /* CQ */
1441 hmc_p = &cqmr->cq_pbl;
1442 cqmr->shadow = (dma_addr_t)arr[total];
1443 if (use_pbles)
1444 hmc_p->idx = palloc->level1.idx;
1445 else
1446 hmc_p->addr = arr[0];
1447 }
1448 return err;
1449 }
1450
1451 /**
1452 * i40iw_hw_alloc_stag - cqp command to allocate stag
1453 * @iwdev: iwarp device
1454 * @iwmr: iwarp mr pointer
1455 */
1456 static int i40iw_hw_alloc_stag(struct i40iw_device *iwdev, struct i40iw_mr *iwmr)
1457 {
1458 struct i40iw_allocate_stag_info *info;
1459 struct i40iw_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
1460 enum i40iw_status_code status;
1461 int err = 0;
1462 struct i40iw_cqp_request *cqp_request;
1463 struct cqp_commands_info *cqp_info;
1464
1465 cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1466 if (!cqp_request)
1467 return -ENOMEM;
1468
1469 cqp_info = &cqp_request->info;
1470 info = &cqp_info->in.u.alloc_stag.info;
1471 memset(info, 0, sizeof(*info));
1472 info->page_size = PAGE_SIZE;
1473 info->stag_idx = iwmr->stag >> I40IW_CQPSQ_STAG_IDX_SHIFT;
1474 info->pd_id = iwpd->sc_pd.pd_id;
1475 info->total_len = iwmr->length;
1476 cqp_info->cqp_cmd = OP_ALLOC_STAG;
1477 cqp_info->post_sq = 1;
1478 cqp_info->in.u.alloc_stag.dev = &iwdev->sc_dev;
1479 cqp_info->in.u.alloc_stag.scratch = (uintptr_t)cqp_request;
1480
1481 status = i40iw_handle_cqp_op(iwdev, cqp_request);
1482 if (status) {
1483 err = -ENOMEM;
1484 i40iw_pr_err("CQP-OP MR Reg fail");
1485 }
1486 return err;
1487 }
1488
1489 /**
1490 * i40iw_alloc_mr - register stag for fast memory registration
1491 * @pd: ibpd pointer
1492 * @mr_type: memory for stag registrion
1493 * @max_num_sg: man number of pages
1494 */
1495 static struct ib_mr *i40iw_alloc_mr(struct ib_pd *pd,
1496 enum ib_mr_type mr_type,
1497 u32 max_num_sg)
1498 {
1499 struct i40iw_pd *iwpd = to_iwpd(pd);
1500 struct i40iw_device *iwdev = to_iwdev(pd->device);
1501 struct i40iw_pble_alloc *palloc;
1502 struct i40iw_pbl *iwpbl;
1503 struct i40iw_mr *iwmr;
1504 enum i40iw_status_code status;
1505 u32 stag;
1506 int err_code = -ENOMEM;
1507
1508 iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
1509 if (!iwmr)
1510 return ERR_PTR(-ENOMEM);
1511
1512 stag = i40iw_create_stag(iwdev);
1513 if (!stag) {
1514 err_code = -EOVERFLOW;
1515 goto err;
1516 }
1517 iwmr->stag = stag;
1518 iwmr->ibmr.rkey = stag;
1519 iwmr->ibmr.lkey = stag;
1520 iwmr->ibmr.pd = pd;
1521 iwmr->ibmr.device = pd->device;
1522 iwpbl = &iwmr->iwpbl;
1523 iwpbl->iwmr = iwmr;
1524 iwmr->type = IW_MEMREG_TYPE_MEM;
1525 palloc = &iwpbl->pble_alloc;
1526 iwmr->page_cnt = max_num_sg;
1527 mutex_lock(&iwdev->pbl_mutex);
1528 status = i40iw_get_pble(&iwdev->sc_dev, iwdev->pble_rsrc, palloc, iwmr->page_cnt);
1529 mutex_unlock(&iwdev->pbl_mutex);
1530 if (!status)
1531 goto err1;
1532
1533 if (palloc->level != I40IW_LEVEL_1)
1534 goto err2;
1535 err_code = i40iw_hw_alloc_stag(iwdev, iwmr);
1536 if (err_code)
1537 goto err2;
1538 iwpbl->pbl_allocated = true;
1539 i40iw_add_pdusecount(iwpd);
1540 return &iwmr->ibmr;
1541 err2:
1542 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1543 err1:
1544 i40iw_free_stag(iwdev, stag);
1545 err:
1546 kfree(iwmr);
1547 return ERR_PTR(err_code);
1548 }
1549
1550 /**
1551 * i40iw_set_page - populate pbl list for fmr
1552 * @ibmr: ib mem to access iwarp mr pointer
1553 * @addr: page dma address fro pbl list
1554 */
1555 static int i40iw_set_page(struct ib_mr *ibmr, u64 addr)
1556 {
1557 struct i40iw_mr *iwmr = to_iwmr(ibmr);
1558 struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1559 struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1560 u64 *pbl;
1561
1562 if (unlikely(iwmr->npages == iwmr->page_cnt))
1563 return -ENOMEM;
1564
1565 pbl = (u64 *)palloc->level1.addr;
1566 pbl[iwmr->npages++] = cpu_to_le64(addr);
1567 return 0;
1568 }
1569
1570 /**
1571 * i40iw_map_mr_sg - map of sg list for fmr
1572 * @ibmr: ib mem to access iwarp mr pointer
1573 * @sg: scatter gather list for fmr
1574 * @sg_nents: number of sg pages
1575 */
1576 static int i40iw_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg, int sg_nents)
1577 {
1578 struct i40iw_mr *iwmr = to_iwmr(ibmr);
1579
1580 iwmr->npages = 0;
1581 return ib_sg_to_pages(ibmr, sg, sg_nents, i40iw_set_page);
1582 }
1583
1584 /**
1585 * i40iw_hwreg_mr - send cqp command for memory registration
1586 * @iwdev: iwarp device
1587 * @iwmr: iwarp mr pointer
1588 * @access: access for MR
1589 */
1590 static int i40iw_hwreg_mr(struct i40iw_device *iwdev,
1591 struct i40iw_mr *iwmr,
1592 u16 access)
1593 {
1594 struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1595 struct i40iw_reg_ns_stag_info *stag_info;
1596 struct i40iw_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
1597 struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1598 enum i40iw_status_code status;
1599 int err = 0;
1600 struct i40iw_cqp_request *cqp_request;
1601 struct cqp_commands_info *cqp_info;
1602
1603 cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1604 if (!cqp_request)
1605 return -ENOMEM;
1606
1607 cqp_info = &cqp_request->info;
1608 stag_info = &cqp_info->in.u.mr_reg_non_shared.info;
1609 memset(stag_info, 0, sizeof(*stag_info));
1610 stag_info->va = (void *)(unsigned long)iwpbl->user_base;
1611 stag_info->stag_idx = iwmr->stag >> I40IW_CQPSQ_STAG_IDX_SHIFT;
1612 stag_info->stag_key = (u8)iwmr->stag;
1613 stag_info->total_len = iwmr->length;
1614 stag_info->access_rights = access;
1615 stag_info->pd_id = iwpd->sc_pd.pd_id;
1616 stag_info->addr_type = I40IW_ADDR_TYPE_VA_BASED;
1617
1618 if (iwmr->page_cnt > 1) {
1619 if (palloc->level == I40IW_LEVEL_1) {
1620 stag_info->first_pm_pbl_index = palloc->level1.idx;
1621 stag_info->chunk_size = 1;
1622 } else {
1623 stag_info->first_pm_pbl_index = palloc->level2.root.idx;
1624 stag_info->chunk_size = 3;
1625 }
1626 } else {
1627 stag_info->reg_addr_pa = iwmr->pgaddrmem[0];
1628 }
1629
1630 cqp_info->cqp_cmd = OP_MR_REG_NON_SHARED;
1631 cqp_info->post_sq = 1;
1632 cqp_info->in.u.mr_reg_non_shared.dev = &iwdev->sc_dev;
1633 cqp_info->in.u.mr_reg_non_shared.scratch = (uintptr_t)cqp_request;
1634
1635 status = i40iw_handle_cqp_op(iwdev, cqp_request);
1636 if (status) {
1637 err = -ENOMEM;
1638 i40iw_pr_err("CQP-OP MR Reg fail");
1639 }
1640 return err;
1641 }
1642
1643 /**
1644 * i40iw_reg_user_mr - Register a user memory region
1645 * @pd: ptr of pd
1646 * @start: virtual start address
1647 * @length: length of mr
1648 * @virt: virtual address
1649 * @acc: access of mr
1650 * @udata: user data
1651 */
1652 static struct ib_mr *i40iw_reg_user_mr(struct ib_pd *pd,
1653 u64 start,
1654 u64 length,
1655 u64 virt,
1656 int acc,
1657 struct ib_udata *udata)
1658 {
1659 struct i40iw_pd *iwpd = to_iwpd(pd);
1660 struct i40iw_device *iwdev = to_iwdev(pd->device);
1661 struct i40iw_ucontext *ucontext;
1662 struct i40iw_pble_alloc *palloc;
1663 struct i40iw_pbl *iwpbl;
1664 struct i40iw_mr *iwmr;
1665 struct ib_umem *region;
1666 struct i40iw_mem_reg_req req;
1667 u64 pbl_depth = 0;
1668 u32 stag = 0;
1669 u16 access;
1670 u64 region_length;
1671 bool use_pbles = false;
1672 unsigned long flags;
1673 int err = -ENOSYS;
1674
1675 if (length > I40IW_MAX_MR_SIZE)
1676 return ERR_PTR(-EINVAL);
1677 region = ib_umem_get(pd->uobject->context, start, length, acc, 0);
1678 if (IS_ERR(region))
1679 return (struct ib_mr *)region;
1680
1681 if (ib_copy_from_udata(&req, udata, sizeof(req))) {
1682 ib_umem_release(region);
1683 return ERR_PTR(-EFAULT);
1684 }
1685
1686 iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
1687 if (!iwmr) {
1688 ib_umem_release(region);
1689 return ERR_PTR(-ENOMEM);
1690 }
1691
1692 iwpbl = &iwmr->iwpbl;
1693 iwpbl->iwmr = iwmr;
1694 iwmr->region = region;
1695 iwmr->ibmr.pd = pd;
1696 iwmr->ibmr.device = pd->device;
1697 ucontext = to_ucontext(pd->uobject->context);
1698 region_length = region->length + (start & 0xfff);
1699 pbl_depth = region_length >> 12;
1700 pbl_depth += (region_length & (4096 - 1)) ? 1 : 0;
1701 iwmr->length = region->length;
1702
1703 iwpbl->user_base = virt;
1704 palloc = &iwpbl->pble_alloc;
1705
1706 iwmr->type = req.reg_type;
1707 iwmr->page_cnt = (u32)pbl_depth;
1708
1709 switch (req.reg_type) {
1710 case IW_MEMREG_TYPE_QP:
1711 use_pbles = ((req.sq_pages + req.rq_pages) > 2);
1712 err = i40iw_handle_q_mem(iwdev, &req, iwpbl, use_pbles);
1713 if (err)
1714 goto error;
1715 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
1716 list_add_tail(&iwpbl->list, &ucontext->qp_reg_mem_list);
1717 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
1718 break;
1719 case IW_MEMREG_TYPE_CQ:
1720 use_pbles = (req.cq_pages > 1);
1721 err = i40iw_handle_q_mem(iwdev, &req, iwpbl, use_pbles);
1722 if (err)
1723 goto error;
1724
1725 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1726 list_add_tail(&iwpbl->list, &ucontext->cq_reg_mem_list);
1727 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
1728 break;
1729 case IW_MEMREG_TYPE_MEM:
1730 access = I40IW_ACCESS_FLAGS_LOCALREAD;
1731
1732 use_pbles = (iwmr->page_cnt != 1);
1733 err = i40iw_setup_pbles(iwdev, iwmr, use_pbles);
1734 if (err)
1735 goto error;
1736
1737 access |= i40iw_get_user_access(acc);
1738 stag = i40iw_create_stag(iwdev);
1739 if (!stag) {
1740 err = -ENOMEM;
1741 goto error;
1742 }
1743
1744 iwmr->stag = stag;
1745 iwmr->ibmr.rkey = stag;
1746 iwmr->ibmr.lkey = stag;
1747
1748 err = i40iw_hwreg_mr(iwdev, iwmr, access);
1749 if (err) {
1750 i40iw_free_stag(iwdev, stag);
1751 goto error;
1752 }
1753 break;
1754 default:
1755 goto error;
1756 }
1757
1758 iwmr->type = req.reg_type;
1759 if (req.reg_type == IW_MEMREG_TYPE_MEM)
1760 i40iw_add_pdusecount(iwpd);
1761 return &iwmr->ibmr;
1762
1763 error:
1764 if (palloc->level != I40IW_LEVEL_0)
1765 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1766 ib_umem_release(region);
1767 kfree(iwmr);
1768 return ERR_PTR(err);
1769 }
1770
1771 /**
1772 * i40iw_reg_phys_mr - register kernel physical memory
1773 * @pd: ibpd pointer
1774 * @addr: physical address of memory to register
1775 * @size: size of memory to register
1776 * @acc: Access rights
1777 * @iova_start: start of virtual address for physical buffers
1778 */
1779 struct ib_mr *i40iw_reg_phys_mr(struct ib_pd *pd,
1780 u64 addr,
1781 u64 size,
1782 int acc,
1783 u64 *iova_start)
1784 {
1785 struct i40iw_pd *iwpd = to_iwpd(pd);
1786 struct i40iw_device *iwdev = to_iwdev(pd->device);
1787 struct i40iw_pbl *iwpbl;
1788 struct i40iw_mr *iwmr;
1789 enum i40iw_status_code status;
1790 u32 stag;
1791 u16 access = I40IW_ACCESS_FLAGS_LOCALREAD;
1792 int ret;
1793
1794 iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
1795 if (!iwmr)
1796 return ERR_PTR(-ENOMEM);
1797 iwmr->ibmr.pd = pd;
1798 iwmr->ibmr.device = pd->device;
1799 iwpbl = &iwmr->iwpbl;
1800 iwpbl->iwmr = iwmr;
1801 iwmr->type = IW_MEMREG_TYPE_MEM;
1802 iwpbl->user_base = *iova_start;
1803 stag = i40iw_create_stag(iwdev);
1804 if (!stag) {
1805 ret = -EOVERFLOW;
1806 goto err;
1807 }
1808 access |= i40iw_get_user_access(acc);
1809 iwmr->stag = stag;
1810 iwmr->ibmr.rkey = stag;
1811 iwmr->ibmr.lkey = stag;
1812 iwmr->page_cnt = 1;
1813 iwmr->pgaddrmem[0] = addr;
1814 status = i40iw_hwreg_mr(iwdev, iwmr, access);
1815 if (status) {
1816 i40iw_free_stag(iwdev, stag);
1817 ret = -ENOMEM;
1818 goto err;
1819 }
1820
1821 i40iw_add_pdusecount(iwpd);
1822 return &iwmr->ibmr;
1823 err:
1824 kfree(iwmr);
1825 return ERR_PTR(ret);
1826 }
1827
1828 /**
1829 * i40iw_get_dma_mr - register physical mem
1830 * @pd: ptr of pd
1831 * @acc: access for memory
1832 */
1833 static struct ib_mr *i40iw_get_dma_mr(struct ib_pd *pd, int acc)
1834 {
1835 u64 kva = 0;
1836
1837 return i40iw_reg_phys_mr(pd, 0, 0xffffffffffULL, acc, &kva);
1838 }
1839
1840 /**
1841 * i40iw_del_mem_list - Deleting pbl list entries for CQ/QP
1842 * @iwmr: iwmr for IB's user page addresses
1843 * @ucontext: ptr to user context
1844 */
1845 static void i40iw_del_memlist(struct i40iw_mr *iwmr,
1846 struct i40iw_ucontext *ucontext)
1847 {
1848 struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1849 unsigned long flags;
1850
1851 switch (iwmr->type) {
1852 case IW_MEMREG_TYPE_CQ:
1853 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1854 if (!list_empty(&ucontext->cq_reg_mem_list))
1855 list_del(&iwpbl->list);
1856 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
1857 break;
1858 case IW_MEMREG_TYPE_QP:
1859 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
1860 if (!list_empty(&ucontext->qp_reg_mem_list))
1861 list_del(&iwpbl->list);
1862 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
1863 break;
1864 default:
1865 break;
1866 }
1867 }
1868
1869 /**
1870 * i40iw_dereg_mr - deregister mr
1871 * @ib_mr: mr ptr for dereg
1872 */
1873 static int i40iw_dereg_mr(struct ib_mr *ib_mr)
1874 {
1875 struct ib_pd *ibpd = ib_mr->pd;
1876 struct i40iw_pd *iwpd = to_iwpd(ibpd);
1877 struct i40iw_mr *iwmr = to_iwmr(ib_mr);
1878 struct i40iw_device *iwdev = to_iwdev(ib_mr->device);
1879 enum i40iw_status_code status;
1880 struct i40iw_dealloc_stag_info *info;
1881 struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1882 struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1883 struct i40iw_cqp_request *cqp_request;
1884 struct cqp_commands_info *cqp_info;
1885 u32 stag_idx;
1886
1887 if (iwmr->region)
1888 ib_umem_release(iwmr->region);
1889
1890 if (iwmr->type != IW_MEMREG_TYPE_MEM) {
1891 if (ibpd->uobject) {
1892 struct i40iw_ucontext *ucontext;
1893
1894 ucontext = to_ucontext(ibpd->uobject->context);
1895 i40iw_del_memlist(iwmr, ucontext);
1896 }
1897 if (iwpbl->pbl_allocated)
1898 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1899 kfree(iwpbl->iwmr);
1900 iwpbl->iwmr = NULL;
1901 return 0;
1902 }
1903
1904 cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1905 if (!cqp_request)
1906 return -ENOMEM;
1907
1908 cqp_info = &cqp_request->info;
1909 info = &cqp_info->in.u.dealloc_stag.info;
1910 memset(info, 0, sizeof(*info));
1911
1912 info->pd_id = cpu_to_le32(iwpd->sc_pd.pd_id & 0x00007fff);
1913 info->stag_idx = RS_64_1(ib_mr->rkey, I40IW_CQPSQ_STAG_IDX_SHIFT);
1914 stag_idx = info->stag_idx;
1915 info->mr = true;
1916 if (iwpbl->pbl_allocated)
1917 info->dealloc_pbl = true;
1918
1919 cqp_info->cqp_cmd = OP_DEALLOC_STAG;
1920 cqp_info->post_sq = 1;
1921 cqp_info->in.u.dealloc_stag.dev = &iwdev->sc_dev;
1922 cqp_info->in.u.dealloc_stag.scratch = (uintptr_t)cqp_request;
1923 status = i40iw_handle_cqp_op(iwdev, cqp_request);
1924 if (status)
1925 i40iw_pr_err("CQP-OP dealloc failed for stag_idx = 0x%x\n", stag_idx);
1926 i40iw_rem_pdusecount(iwpd, iwdev);
1927 i40iw_free_stag(iwdev, iwmr->stag);
1928 if (iwpbl->pbl_allocated)
1929 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1930 kfree(iwmr);
1931 return 0;
1932 }
1933
1934 /**
1935 * i40iw_show_rev
1936 */
1937 static ssize_t i40iw_show_rev(struct device *dev,
1938 struct device_attribute *attr, char *buf)
1939 {
1940 struct i40iw_ib_device *iwibdev = container_of(dev,
1941 struct i40iw_ib_device,
1942 ibdev.dev);
1943 u32 hw_rev = iwibdev->iwdev->sc_dev.hw_rev;
1944
1945 return sprintf(buf, "%x\n", hw_rev);
1946 }
1947
1948 /**
1949 * i40iw_show_fw_ver
1950 */
1951 static ssize_t i40iw_show_fw_ver(struct device *dev,
1952 struct device_attribute *attr, char *buf)
1953 {
1954 u32 firmware_version = I40IW_FW_VERSION;
1955
1956 return sprintf(buf, "%u.%u\n", firmware_version,
1957 (firmware_version & 0x000000ff));
1958 }
1959
1960 /**
1961 * i40iw_show_hca
1962 */
1963 static ssize_t i40iw_show_hca(struct device *dev,
1964 struct device_attribute *attr, char *buf)
1965 {
1966 return sprintf(buf, "I40IW\n");
1967 }
1968
1969 /**
1970 * i40iw_show_board
1971 */
1972 static ssize_t i40iw_show_board(struct device *dev,
1973 struct device_attribute *attr,
1974 char *buf)
1975 {
1976 return sprintf(buf, "%.*s\n", 32, "I40IW Board ID");
1977 }
1978
1979 static DEVICE_ATTR(hw_rev, S_IRUGO, i40iw_show_rev, NULL);
1980 static DEVICE_ATTR(fw_ver, S_IRUGO, i40iw_show_fw_ver, NULL);
1981 static DEVICE_ATTR(hca_type, S_IRUGO, i40iw_show_hca, NULL);
1982 static DEVICE_ATTR(board_id, S_IRUGO, i40iw_show_board, NULL);
1983
1984 static struct device_attribute *i40iw_dev_attributes[] = {
1985 &dev_attr_hw_rev,
1986 &dev_attr_fw_ver,
1987 &dev_attr_hca_type,
1988 &dev_attr_board_id
1989 };
1990
1991 /**
1992 * i40iw_copy_sg_list - copy sg list for qp
1993 * @sg_list: copied into sg_list
1994 * @sgl: copy from sgl
1995 * @num_sges: count of sg entries
1996 */
1997 static void i40iw_copy_sg_list(struct i40iw_sge *sg_list, struct ib_sge *sgl, int num_sges)
1998 {
1999 unsigned int i;
2000
2001 for (i = 0; (i < num_sges) && (i < I40IW_MAX_WQ_FRAGMENT_COUNT); i++) {
2002 sg_list[i].tag_off = sgl[i].addr;
2003 sg_list[i].len = sgl[i].length;
2004 sg_list[i].stag = sgl[i].lkey;
2005 }
2006 }
2007
2008 /**
2009 * i40iw_post_send - kernel application wr
2010 * @ibqp: qp ptr for wr
2011 * @ib_wr: work request ptr
2012 * @bad_wr: return of bad wr if err
2013 */
2014 static int i40iw_post_send(struct ib_qp *ibqp,
2015 struct ib_send_wr *ib_wr,
2016 struct ib_send_wr **bad_wr)
2017 {
2018 struct i40iw_qp *iwqp;
2019 struct i40iw_qp_uk *ukqp;
2020 struct i40iw_post_sq_info info;
2021 enum i40iw_status_code ret;
2022 int err = 0;
2023 unsigned long flags;
2024 bool inv_stag;
2025
2026 iwqp = (struct i40iw_qp *)ibqp;
2027 ukqp = &iwqp->sc_qp.qp_uk;
2028
2029 spin_lock_irqsave(&iwqp->lock, flags);
2030 while (ib_wr) {
2031 inv_stag = false;
2032 memset(&info, 0, sizeof(info));
2033 info.wr_id = (u64)(ib_wr->wr_id);
2034 if ((ib_wr->send_flags & IB_SEND_SIGNALED) || iwqp->sig_all)
2035 info.signaled = true;
2036 if (ib_wr->send_flags & IB_SEND_FENCE)
2037 info.read_fence = true;
2038
2039 switch (ib_wr->opcode) {
2040 case IB_WR_SEND:
2041 /* fall-through */
2042 case IB_WR_SEND_WITH_INV:
2043 if (ib_wr->opcode == IB_WR_SEND) {
2044 if (ib_wr->send_flags & IB_SEND_SOLICITED)
2045 info.op_type = I40IW_OP_TYPE_SEND_SOL;
2046 else
2047 info.op_type = I40IW_OP_TYPE_SEND;
2048 } else {
2049 if (ib_wr->send_flags & IB_SEND_SOLICITED)
2050 info.op_type = I40IW_OP_TYPE_SEND_SOL_INV;
2051 else
2052 info.op_type = I40IW_OP_TYPE_SEND_INV;
2053 }
2054
2055 if (ib_wr->send_flags & IB_SEND_INLINE) {
2056 info.op.inline_send.data = (void *)(unsigned long)ib_wr->sg_list[0].addr;
2057 info.op.inline_send.len = ib_wr->sg_list[0].length;
2058 ret = ukqp->ops.iw_inline_send(ukqp, &info, ib_wr->ex.invalidate_rkey, false);
2059 } else {
2060 info.op.send.num_sges = ib_wr->num_sge;
2061 info.op.send.sg_list = (struct i40iw_sge *)ib_wr->sg_list;
2062 ret = ukqp->ops.iw_send(ukqp, &info, ib_wr->ex.invalidate_rkey, false);
2063 }
2064
2065 if (ret)
2066 err = -EIO;
2067 break;
2068 case IB_WR_RDMA_WRITE:
2069 info.op_type = I40IW_OP_TYPE_RDMA_WRITE;
2070
2071 if (ib_wr->send_flags & IB_SEND_INLINE) {
2072 info.op.inline_rdma_write.data = (void *)(unsigned long)ib_wr->sg_list[0].addr;
2073 info.op.inline_rdma_write.len = ib_wr->sg_list[0].length;
2074 info.op.inline_rdma_write.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
2075 info.op.inline_rdma_write.rem_addr.stag = rdma_wr(ib_wr)->rkey;
2076 info.op.inline_rdma_write.rem_addr.len = ib_wr->sg_list->length;
2077 ret = ukqp->ops.iw_inline_rdma_write(ukqp, &info, false);
2078 } else {
2079 info.op.rdma_write.lo_sg_list = (void *)ib_wr->sg_list;
2080 info.op.rdma_write.num_lo_sges = ib_wr->num_sge;
2081 info.op.rdma_write.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
2082 info.op.rdma_write.rem_addr.stag = rdma_wr(ib_wr)->rkey;
2083 info.op.rdma_write.rem_addr.len = ib_wr->sg_list->length;
2084 ret = ukqp->ops.iw_rdma_write(ukqp, &info, false);
2085 }
2086
2087 if (ret)
2088 err = -EIO;
2089 break;
2090 case IB_WR_RDMA_READ_WITH_INV:
2091 inv_stag = true;
2092 /* fall-through*/
2093 case IB_WR_RDMA_READ:
2094 info.op_type = I40IW_OP_TYPE_RDMA_READ;
2095 info.op.rdma_read.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
2096 info.op.rdma_read.rem_addr.stag = rdma_wr(ib_wr)->rkey;
2097 info.op.rdma_read.rem_addr.len = ib_wr->sg_list->length;
2098 info.op.rdma_read.lo_addr.tag_off = ib_wr->sg_list->addr;
2099 info.op.rdma_read.lo_addr.stag = ib_wr->sg_list->lkey;
2100 info.op.rdma_read.lo_addr.len = ib_wr->sg_list->length;
2101 ret = ukqp->ops.iw_rdma_read(ukqp, &info, inv_stag, false);
2102 if (ret)
2103 err = -EIO;
2104 break;
2105 case IB_WR_LOCAL_INV:
2106 info.op_type = I40IW_OP_TYPE_INV_STAG;
2107 info.op.inv_local_stag.target_stag = ib_wr->ex.invalidate_rkey;
2108 ret = ukqp->ops.iw_stag_local_invalidate(ukqp, &info, true);
2109 if (ret)
2110 err = -EIO;
2111 break;
2112 case IB_WR_REG_MR:
2113 {
2114 struct i40iw_mr *iwmr = to_iwmr(reg_wr(ib_wr)->mr);
2115 int page_shift = ilog2(reg_wr(ib_wr)->mr->page_size);
2116 int flags = reg_wr(ib_wr)->access;
2117 struct i40iw_pble_alloc *palloc = &iwmr->iwpbl.pble_alloc;
2118 struct i40iw_sc_dev *dev = &iwqp->iwdev->sc_dev;
2119 struct i40iw_fast_reg_stag_info info;
2120
2121 info.access_rights = I40IW_ACCESS_FLAGS_LOCALREAD;
2122 info.access_rights |= i40iw_get_user_access(flags);
2123 info.stag_key = reg_wr(ib_wr)->key & 0xff;
2124 info.stag_idx = reg_wr(ib_wr)->key >> 8;
2125 info.wr_id = ib_wr->wr_id;
2126
2127 info.addr_type = I40IW_ADDR_TYPE_VA_BASED;
2128 info.va = (void *)(uintptr_t)iwmr->ibmr.iova;
2129 info.total_len = iwmr->ibmr.length;
2130 info.first_pm_pbl_index = palloc->level1.idx;
2131 info.local_fence = ib_wr->send_flags & IB_SEND_FENCE;
2132 info.signaled = ib_wr->send_flags & IB_SEND_SIGNALED;
2133
2134 if (page_shift == 21)
2135 info.page_size = 1; /* 2M page */
2136
2137 ret = dev->iw_priv_qp_ops->iw_mr_fast_register(&iwqp->sc_qp, &info, true);
2138 if (ret)
2139 err = -EIO;
2140 break;
2141 }
2142 default:
2143 err = -EINVAL;
2144 i40iw_pr_err(" upost_send bad opcode = 0x%x\n",
2145 ib_wr->opcode);
2146 break;
2147 }
2148
2149 if (err)
2150 break;
2151 ib_wr = ib_wr->next;
2152 }
2153
2154 if (err)
2155 *bad_wr = ib_wr;
2156 else
2157 ukqp->ops.iw_qp_post_wr(ukqp);
2158 spin_unlock_irqrestore(&iwqp->lock, flags);
2159
2160 return err;
2161 }
2162
2163 /**
2164 * i40iw_post_recv - post receive wr for kernel application
2165 * @ibqp: ib qp pointer
2166 * @ib_wr: work request for receive
2167 * @bad_wr: bad wr caused an error
2168 */
2169 static int i40iw_post_recv(struct ib_qp *ibqp,
2170 struct ib_recv_wr *ib_wr,
2171 struct ib_recv_wr **bad_wr)
2172 {
2173 struct i40iw_qp *iwqp;
2174 struct i40iw_qp_uk *ukqp;
2175 struct i40iw_post_rq_info post_recv;
2176 struct i40iw_sge sg_list[I40IW_MAX_WQ_FRAGMENT_COUNT];
2177 enum i40iw_status_code ret = 0;
2178 unsigned long flags;
2179
2180 iwqp = (struct i40iw_qp *)ibqp;
2181 ukqp = &iwqp->sc_qp.qp_uk;
2182
2183 memset(&post_recv, 0, sizeof(post_recv));
2184 spin_lock_irqsave(&iwqp->lock, flags);
2185 while (ib_wr) {
2186 post_recv.num_sges = ib_wr->num_sge;
2187 post_recv.wr_id = ib_wr->wr_id;
2188 i40iw_copy_sg_list(sg_list, ib_wr->sg_list, ib_wr->num_sge);
2189 post_recv.sg_list = sg_list;
2190 ret = ukqp->ops.iw_post_receive(ukqp, &post_recv);
2191 if (ret) {
2192 i40iw_pr_err(" post_recv err %d\n", ret);
2193 *bad_wr = ib_wr;
2194 goto out;
2195 }
2196 ib_wr = ib_wr->next;
2197 }
2198 out:
2199 spin_unlock_irqrestore(&iwqp->lock, flags);
2200 if (ret)
2201 return -ENOSYS;
2202 return 0;
2203 }
2204
2205 /**
2206 * i40iw_poll_cq - poll cq for completion (kernel apps)
2207 * @ibcq: cq to poll
2208 * @num_entries: number of entries to poll
2209 * @entry: wr of entry completed
2210 */
2211 static int i40iw_poll_cq(struct ib_cq *ibcq,
2212 int num_entries,
2213 struct ib_wc *entry)
2214 {
2215 struct i40iw_cq *iwcq;
2216 int cqe_count = 0;
2217 struct i40iw_cq_poll_info cq_poll_info;
2218 enum i40iw_status_code ret;
2219 struct i40iw_cq_uk *ukcq;
2220 struct i40iw_sc_qp *qp;
2221 unsigned long flags;
2222
2223 iwcq = (struct i40iw_cq *)ibcq;
2224 ukcq = &iwcq->sc_cq.cq_uk;
2225
2226 spin_lock_irqsave(&iwcq->lock, flags);
2227 while (cqe_count < num_entries) {
2228 ret = ukcq->ops.iw_cq_poll_completion(ukcq, &cq_poll_info, true);
2229 if (ret == I40IW_ERR_QUEUE_EMPTY) {
2230 break;
2231 } else if (ret) {
2232 if (!cqe_count)
2233 cqe_count = -1;
2234 break;
2235 }
2236 entry->wc_flags = 0;
2237 entry->wr_id = cq_poll_info.wr_id;
2238 if (cq_poll_info.error) {
2239 entry->status = IB_WC_WR_FLUSH_ERR;
2240 entry->vendor_err = cq_poll_info.major_err << 16 | cq_poll_info.minor_err;
2241 } else {
2242 entry->status = IB_WC_SUCCESS;
2243 }
2244
2245 switch (cq_poll_info.op_type) {
2246 case I40IW_OP_TYPE_RDMA_WRITE:
2247 entry->opcode = IB_WC_RDMA_WRITE;
2248 break;
2249 case I40IW_OP_TYPE_RDMA_READ_INV_STAG:
2250 case I40IW_OP_TYPE_RDMA_READ:
2251 entry->opcode = IB_WC_RDMA_READ;
2252 break;
2253 case I40IW_OP_TYPE_SEND_SOL:
2254 case I40IW_OP_TYPE_SEND_SOL_INV:
2255 case I40IW_OP_TYPE_SEND_INV:
2256 case I40IW_OP_TYPE_SEND:
2257 entry->opcode = IB_WC_SEND;
2258 break;
2259 case I40IW_OP_TYPE_REC:
2260 entry->opcode = IB_WC_RECV;
2261 break;
2262 default:
2263 entry->opcode = IB_WC_RECV;
2264 break;
2265 }
2266
2267 entry->ex.imm_data = 0;
2268 qp = (struct i40iw_sc_qp *)cq_poll_info.qp_handle;
2269 entry->qp = (struct ib_qp *)qp->back_qp;
2270 entry->src_qp = cq_poll_info.qp_id;
2271 entry->byte_len = cq_poll_info.bytes_xfered;
2272 entry++;
2273 cqe_count++;
2274 }
2275 spin_unlock_irqrestore(&iwcq->lock, flags);
2276 return cqe_count;
2277 }
2278
2279 /**
2280 * i40iw_req_notify_cq - arm cq kernel application
2281 * @ibcq: cq to arm
2282 * @notify_flags: notofication flags
2283 */
2284 static int i40iw_req_notify_cq(struct ib_cq *ibcq,
2285 enum ib_cq_notify_flags notify_flags)
2286 {
2287 struct i40iw_cq *iwcq;
2288 struct i40iw_cq_uk *ukcq;
2289 enum i40iw_completion_notify cq_notify = IW_CQ_COMPL_SOLICITED;
2290
2291 iwcq = (struct i40iw_cq *)ibcq;
2292 ukcq = &iwcq->sc_cq.cq_uk;
2293 if (notify_flags == IB_CQ_NEXT_COMP)
2294 cq_notify = IW_CQ_COMPL_EVENT;
2295 ukcq->ops.iw_cq_request_notification(ukcq, cq_notify);
2296 return 0;
2297 }
2298
2299 /**
2300 * i40iw_port_immutable - return port's immutable data
2301 * @ibdev: ib dev struct
2302 * @port_num: port number
2303 * @immutable: immutable data for the port return
2304 */
2305 static int i40iw_port_immutable(struct ib_device *ibdev, u8 port_num,
2306 struct ib_port_immutable *immutable)
2307 {
2308 struct ib_port_attr attr;
2309 int err;
2310
2311 err = i40iw_query_port(ibdev, port_num, &attr);
2312
2313 if (err)
2314 return err;
2315
2316 immutable->pkey_tbl_len = attr.pkey_tbl_len;
2317 immutable->gid_tbl_len = attr.gid_tbl_len;
2318 immutable->core_cap_flags = RDMA_CORE_PORT_IWARP;
2319
2320 return 0;
2321 }
2322
2323 /**
2324 * i40iw_get_protocol_stats - Populates the rdma_stats structure
2325 * @ibdev: ib dev struct
2326 * @stats: iw protocol stats struct
2327 */
2328 static int i40iw_get_protocol_stats(struct ib_device *ibdev,
2329 union rdma_protocol_stats *stats)
2330 {
2331 struct i40iw_device *iwdev = to_iwdev(ibdev);
2332 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
2333 struct i40iw_dev_pestat *devstat = &dev->dev_pestat;
2334 struct i40iw_dev_hw_stats *hw_stats = &devstat->hw_stats;
2335 struct timespec curr_time;
2336 static struct timespec last_rd_time = {0, 0};
2337 unsigned long flags;
2338
2339 curr_time = current_kernel_time();
2340 memset(stats, 0, sizeof(*stats));
2341
2342 if (dev->is_pf) {
2343 spin_lock_irqsave(&devstat->stats_lock, flags);
2344 devstat->ops.iw_hw_stat_read_all(devstat,
2345 &devstat->hw_stats);
2346 spin_unlock_irqrestore(&devstat->stats_lock, flags);
2347 } else {
2348 if (((u64)curr_time.tv_sec - (u64)last_rd_time.tv_sec) > 1)
2349 if (i40iw_vchnl_vf_get_pe_stats(dev, &devstat->hw_stats))
2350 return -ENOSYS;
2351 }
2352
2353 stats->iw.ipInReceives = hw_stats->stat_value_64[I40IW_HW_STAT_INDEX_IP4RXPKTS] +
2354 hw_stats->stat_value_64[I40IW_HW_STAT_INDEX_IP6RXPKTS];
2355 stats->iw.ipInTruncatedPkts = hw_stats->stat_value_32[I40IW_HW_STAT_INDEX_IP4RXTRUNC] +
2356 hw_stats->stat_value_32[I40IW_HW_STAT_INDEX_IP6RXTRUNC];
2357 stats->iw.ipInDiscards = hw_stats->stat_value_32[I40IW_HW_STAT_INDEX_IP4RXDISCARD] +
2358 hw_stats->stat_value_32[I40IW_HW_STAT_INDEX_IP6RXDISCARD];
2359 stats->iw.ipOutNoRoutes = hw_stats->stat_value_32[I40IW_HW_STAT_INDEX_IP4TXNOROUTE] +
2360 hw_stats->stat_value_32[I40IW_HW_STAT_INDEX_IP6TXNOROUTE];
2361 stats->iw.ipReasmReqds = hw_stats->stat_value_64[I40IW_HW_STAT_INDEX_IP4RXFRAGS] +
2362 hw_stats->stat_value_64[I40IW_HW_STAT_INDEX_IP6RXFRAGS];
2363 stats->iw.ipFragCreates = hw_stats->stat_value_64[I40IW_HW_STAT_INDEX_IP4TXFRAGS] +
2364 hw_stats->stat_value_64[I40IW_HW_STAT_INDEX_IP6TXFRAGS];
2365 stats->iw.ipInMcastPkts = hw_stats->stat_value_64[I40IW_HW_STAT_INDEX_IP4RXMCPKTS] +
2366 hw_stats->stat_value_64[I40IW_HW_STAT_INDEX_IP6RXMCPKTS];
2367 stats->iw.ipOutMcastPkts = hw_stats->stat_value_64[I40IW_HW_STAT_INDEX_IP4TXMCPKTS] +
2368 hw_stats->stat_value_64[I40IW_HW_STAT_INDEX_IP6TXMCPKTS];
2369 stats->iw.tcpOutSegs = hw_stats->stat_value_64[I40IW_HW_STAT_INDEX_TCPTXSEG];
2370 stats->iw.tcpInSegs = hw_stats->stat_value_64[I40IW_HW_STAT_INDEX_TCPRXSEGS];
2371 stats->iw.tcpRetransSegs = hw_stats->stat_value_32[I40IW_HW_STAT_INDEX_TCPRTXSEG];
2372
2373 last_rd_time = curr_time;
2374 return 0;
2375 }
2376
2377 /**
2378 * i40iw_query_gid - Query port GID
2379 * @ibdev: device pointer from stack
2380 * @port: port number
2381 * @index: Entry index
2382 * @gid: Global ID
2383 */
2384 static int i40iw_query_gid(struct ib_device *ibdev,
2385 u8 port,
2386 int index,
2387 union ib_gid *gid)
2388 {
2389 struct i40iw_device *iwdev = to_iwdev(ibdev);
2390
2391 memset(gid->raw, 0, sizeof(gid->raw));
2392 ether_addr_copy(gid->raw, iwdev->netdev->dev_addr);
2393 return 0;
2394 }
2395
2396 /**
2397 * i40iw_modify_port Modify port properties
2398 * @ibdev: device pointer from stack
2399 * @port: port number
2400 * @port_modify_mask: mask for port modifications
2401 * @props: port properties
2402 */
2403 static int i40iw_modify_port(struct ib_device *ibdev,
2404 u8 port,
2405 int port_modify_mask,
2406 struct ib_port_modify *props)
2407 {
2408 return 0;
2409 }
2410
2411 /**
2412 * i40iw_query_pkey - Query partition key
2413 * @ibdev: device pointer from stack
2414 * @port: port number
2415 * @index: index of pkey
2416 * @pkey: pointer to store the pkey
2417 */
2418 static int i40iw_query_pkey(struct ib_device *ibdev,
2419 u8 port,
2420 u16 index,
2421 u16 *pkey)
2422 {
2423 *pkey = 0;
2424 return 0;
2425 }
2426
2427 /**
2428 * i40iw_create_ah - create address handle
2429 * @ibpd: ptr of pd
2430 * @ah_attr: address handle attributes
2431 */
2432 static struct ib_ah *i40iw_create_ah(struct ib_pd *ibpd,
2433 struct ib_ah_attr *attr)
2434 {
2435 return ERR_PTR(-ENOSYS);
2436 }
2437
2438 /**
2439 * i40iw_destroy_ah - Destroy address handle
2440 * @ah: pointer to address handle
2441 */
2442 static int i40iw_destroy_ah(struct ib_ah *ah)
2443 {
2444 return -ENOSYS;
2445 }
2446
2447 /**
2448 * i40iw_init_rdma_device - initialization of iwarp device
2449 * @iwdev: iwarp device
2450 */
2451 static struct i40iw_ib_device *i40iw_init_rdma_device(struct i40iw_device *iwdev)
2452 {
2453 struct i40iw_ib_device *iwibdev;
2454 struct net_device *netdev = iwdev->netdev;
2455 struct pci_dev *pcidev = (struct pci_dev *)iwdev->hw.dev_context;
2456
2457 iwibdev = (struct i40iw_ib_device *)ib_alloc_device(sizeof(*iwibdev));
2458 if (!iwibdev) {
2459 i40iw_pr_err("iwdev == NULL\n");
2460 return NULL;
2461 }
2462 strlcpy(iwibdev->ibdev.name, "i40iw%d", IB_DEVICE_NAME_MAX);
2463 iwibdev->ibdev.owner = THIS_MODULE;
2464 iwdev->iwibdev = iwibdev;
2465 iwibdev->iwdev = iwdev;
2466
2467 iwibdev->ibdev.node_type = RDMA_NODE_RNIC;
2468 ether_addr_copy((u8 *)&iwibdev->ibdev.node_guid, netdev->dev_addr);
2469
2470 iwibdev->ibdev.uverbs_cmd_mask =
2471 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
2472 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
2473 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
2474 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
2475 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
2476 (1ull << IB_USER_VERBS_CMD_REG_MR) |
2477 (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
2478 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
2479 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
2480 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
2481 (1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ) |
2482 (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
2483 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
2484 (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
2485 (1ull << IB_USER_VERBS_CMD_POLL_CQ) |
2486 (1ull << IB_USER_VERBS_CMD_CREATE_AH) |
2487 (1ull << IB_USER_VERBS_CMD_DESTROY_AH) |
2488 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
2489 (1ull << IB_USER_VERBS_CMD_POST_RECV) |
2490 (1ull << IB_USER_VERBS_CMD_POST_SEND);
2491 iwibdev->ibdev.phys_port_cnt = 1;
2492 iwibdev->ibdev.num_comp_vectors = 1;
2493 iwibdev->ibdev.dma_device = &pcidev->dev;
2494 iwibdev->ibdev.dev.parent = &pcidev->dev;
2495 iwibdev->ibdev.query_port = i40iw_query_port;
2496 iwibdev->ibdev.modify_port = i40iw_modify_port;
2497 iwibdev->ibdev.query_pkey = i40iw_query_pkey;
2498 iwibdev->ibdev.query_gid = i40iw_query_gid;
2499 iwibdev->ibdev.alloc_ucontext = i40iw_alloc_ucontext;
2500 iwibdev->ibdev.dealloc_ucontext = i40iw_dealloc_ucontext;
2501 iwibdev->ibdev.mmap = i40iw_mmap;
2502 iwibdev->ibdev.alloc_pd = i40iw_alloc_pd;
2503 iwibdev->ibdev.dealloc_pd = i40iw_dealloc_pd;
2504 iwibdev->ibdev.create_qp = i40iw_create_qp;
2505 iwibdev->ibdev.modify_qp = i40iw_modify_qp;
2506 iwibdev->ibdev.query_qp = i40iw_query_qp;
2507 iwibdev->ibdev.destroy_qp = i40iw_destroy_qp;
2508 iwibdev->ibdev.create_cq = i40iw_create_cq;
2509 iwibdev->ibdev.destroy_cq = i40iw_destroy_cq;
2510 iwibdev->ibdev.get_dma_mr = i40iw_get_dma_mr;
2511 iwibdev->ibdev.reg_user_mr = i40iw_reg_user_mr;
2512 iwibdev->ibdev.dereg_mr = i40iw_dereg_mr;
2513 iwibdev->ibdev.get_protocol_stats = i40iw_get_protocol_stats;
2514 iwibdev->ibdev.query_device = i40iw_query_device;
2515 iwibdev->ibdev.create_ah = i40iw_create_ah;
2516 iwibdev->ibdev.destroy_ah = i40iw_destroy_ah;
2517 iwibdev->ibdev.alloc_mr = i40iw_alloc_mr;
2518 iwibdev->ibdev.map_mr_sg = i40iw_map_mr_sg;
2519 iwibdev->ibdev.iwcm = kzalloc(sizeof(*iwibdev->ibdev.iwcm), GFP_KERNEL);
2520 if (!iwibdev->ibdev.iwcm) {
2521 ib_dealloc_device(&iwibdev->ibdev);
2522 i40iw_pr_err("iwcm == NULL\n");
2523 return NULL;
2524 }
2525
2526 iwibdev->ibdev.iwcm->add_ref = i40iw_add_ref;
2527 iwibdev->ibdev.iwcm->rem_ref = i40iw_rem_ref;
2528 iwibdev->ibdev.iwcm->get_qp = i40iw_get_qp;
2529 iwibdev->ibdev.iwcm->connect = i40iw_connect;
2530 iwibdev->ibdev.iwcm->accept = i40iw_accept;
2531 iwibdev->ibdev.iwcm->reject = i40iw_reject;
2532 iwibdev->ibdev.iwcm->create_listen = i40iw_create_listen;
2533 iwibdev->ibdev.iwcm->destroy_listen = i40iw_destroy_listen;
2534 memcpy(iwibdev->ibdev.iwcm->ifname, netdev->name,
2535 sizeof(iwibdev->ibdev.iwcm->ifname));
2536 iwibdev->ibdev.get_port_immutable = i40iw_port_immutable;
2537 iwibdev->ibdev.poll_cq = i40iw_poll_cq;
2538 iwibdev->ibdev.req_notify_cq = i40iw_req_notify_cq;
2539 iwibdev->ibdev.post_send = i40iw_post_send;
2540 iwibdev->ibdev.post_recv = i40iw_post_recv;
2541
2542 return iwibdev;
2543 }
2544
2545 /**
2546 * i40iw_port_ibevent - indicate port event
2547 * @iwdev: iwarp device
2548 */
2549 void i40iw_port_ibevent(struct i40iw_device *iwdev)
2550 {
2551 struct i40iw_ib_device *iwibdev = iwdev->iwibdev;
2552 struct ib_event event;
2553
2554 event.device = &iwibdev->ibdev;
2555 event.element.port_num = 1;
2556 event.event = iwdev->iw_status ? IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
2557 ib_dispatch_event(&event);
2558 }
2559
2560 /**
2561 * i40iw_unregister_rdma_device - unregister of iwarp from IB
2562 * @iwibdev: rdma device ptr
2563 */
2564 static void i40iw_unregister_rdma_device(struct i40iw_ib_device *iwibdev)
2565 {
2566 int i;
2567
2568 for (i = 0; i < ARRAY_SIZE(i40iw_dev_attributes); ++i)
2569 device_remove_file(&iwibdev->ibdev.dev,
2570 i40iw_dev_attributes[i]);
2571 ib_unregister_device(&iwibdev->ibdev);
2572 }
2573
2574 /**
2575 * i40iw_destroy_rdma_device - destroy rdma device and free resources
2576 * @iwibdev: IB device ptr
2577 */
2578 void i40iw_destroy_rdma_device(struct i40iw_ib_device *iwibdev)
2579 {
2580 if (!iwibdev)
2581 return;
2582
2583 i40iw_unregister_rdma_device(iwibdev);
2584 kfree(iwibdev->ibdev.iwcm);
2585 iwibdev->ibdev.iwcm = NULL;
2586 ib_dealloc_device(&iwibdev->ibdev);
2587 }
2588
2589 /**
2590 * i40iw_register_rdma_device - register iwarp device to IB
2591 * @iwdev: iwarp device
2592 */
2593 int i40iw_register_rdma_device(struct i40iw_device *iwdev)
2594 {
2595 int i, ret;
2596 struct i40iw_ib_device *iwibdev;
2597
2598 iwdev->iwibdev = i40iw_init_rdma_device(iwdev);
2599 if (!iwdev->iwibdev)
2600 return -ENOSYS;
2601 iwibdev = iwdev->iwibdev;
2602
2603 ret = ib_register_device(&iwibdev->ibdev, NULL);
2604 if (ret)
2605 goto error;
2606
2607 for (i = 0; i < ARRAY_SIZE(i40iw_dev_attributes); ++i) {
2608 ret =
2609 device_create_file(&iwibdev->ibdev.dev,
2610 i40iw_dev_attributes[i]);
2611 if (ret) {
2612 while (i > 0) {
2613 i--;
2614 device_remove_file(&iwibdev->ibdev.dev, i40iw_dev_attributes[i]);
2615 }
2616 ib_unregister_device(&iwibdev->ibdev);
2617 goto error;
2618 }
2619 }
2620 return 0;
2621 error:
2622 kfree(iwdev->iwibdev->ibdev.iwcm);
2623 iwdev->iwibdev->ibdev.iwcm = NULL;
2624 ib_dealloc_device(&iwdev->iwibdev->ibdev);
2625 return -ENOSYS;
2626 }
Linux kernel - Deliverables
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