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Merge tag 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost
[deliverable/linux.git] / drivers / infiniband / hw / i40iw / i40iw_verbs.c
1 /*******************************************************************************
2 *
3 * Copyright (c) 2015-2016 Intel Corporation. All rights reserved.
4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenFabrics.org BSD license below:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 *
33 *******************************************************************************/
34
35 #include <linux/module.h>
36 #include <linux/moduleparam.h>
37 #include <linux/random.h>
38 #include <linux/highmem.h>
39 #include <linux/time.h>
40 #include <asm/byteorder.h>
41 #include <net/ip.h>
42 #include <rdma/ib_verbs.h>
43 #include <rdma/iw_cm.h>
44 #include <rdma/ib_user_verbs.h>
45 #include <rdma/ib_umem.h>
46 #include "i40iw.h"
47
48 /**
49 * i40iw_query_device - get device attributes
50 * @ibdev: device pointer from stack
51 * @props: returning device attributes
52 * @udata: user data
53 */
54 static int i40iw_query_device(struct ib_device *ibdev,
55 struct ib_device_attr *props,
56 struct ib_udata *udata)
57 {
58 struct i40iw_device *iwdev = to_iwdev(ibdev);
59
60 if (udata->inlen || udata->outlen)
61 return -EINVAL;
62 memset(props, 0, sizeof(*props));
63 ether_addr_copy((u8 *)&props->sys_image_guid, iwdev->netdev->dev_addr);
64 props->fw_ver = I40IW_FW_VERSION;
65 props->device_cap_flags = iwdev->device_cap_flags;
66 props->vendor_id = iwdev->ldev->pcidev->vendor;
67 props->vendor_part_id = iwdev->ldev->pcidev->device;
68 props->hw_ver = (u32)iwdev->sc_dev.hw_rev;
69 props->max_mr_size = I40IW_MAX_OUTBOUND_MESSAGE_SIZE;
70 props->max_qp = iwdev->max_qp;
71 props->max_qp_wr = (I40IW_MAX_WQ_ENTRIES >> 2) - 1;
72 props->max_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
73 props->max_cq = iwdev->max_cq;
74 props->max_cqe = iwdev->max_cqe;
75 props->max_mr = iwdev->max_mr;
76 props->max_pd = iwdev->max_pd;
77 props->max_sge_rd = I40IW_MAX_SGE_RD;
78 props->max_qp_rd_atom = I40IW_MAX_IRD_SIZE;
79 props->max_qp_init_rd_atom = props->max_qp_rd_atom;
80 props->atomic_cap = IB_ATOMIC_NONE;
81 props->max_map_per_fmr = 1;
82 return 0;
83 }
84
85 /**
86 * i40iw_query_port - get port attrubutes
87 * @ibdev: device pointer from stack
88 * @port: port number for query
89 * @props: returning device attributes
90 */
91 static int i40iw_query_port(struct ib_device *ibdev,
92 u8 port,
93 struct ib_port_attr *props)
94 {
95 struct i40iw_device *iwdev = to_iwdev(ibdev);
96 struct net_device *netdev = iwdev->netdev;
97
98 memset(props, 0, sizeof(*props));
99
100 props->max_mtu = IB_MTU_4096;
101 if (netdev->mtu >= 4096)
102 props->active_mtu = IB_MTU_4096;
103 else if (netdev->mtu >= 2048)
104 props->active_mtu = IB_MTU_2048;
105 else if (netdev->mtu >= 1024)
106 props->active_mtu = IB_MTU_1024;
107 else if (netdev->mtu >= 512)
108 props->active_mtu = IB_MTU_512;
109 else
110 props->active_mtu = IB_MTU_256;
111
112 props->lid = 1;
113 if (netif_carrier_ok(iwdev->netdev))
114 props->state = IB_PORT_ACTIVE;
115 else
116 props->state = IB_PORT_DOWN;
117 props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_REINIT_SUP |
118 IB_PORT_VENDOR_CLASS_SUP | IB_PORT_BOOT_MGMT_SUP;
119 props->gid_tbl_len = 1;
120 props->pkey_tbl_len = 1;
121 props->active_width = IB_WIDTH_4X;
122 props->active_speed = 1;
123 props->max_msg_sz = I40IW_MAX_OUTBOUND_MESSAGE_SIZE;
124 return 0;
125 }
126
127 /**
128 * i40iw_alloc_ucontext - Allocate the user context data structure
129 * @ibdev: device pointer from stack
130 * @udata: user data
131 *
132 * This keeps track of all objects associated with a particular
133 * user-mode client.
134 */
135 static struct ib_ucontext *i40iw_alloc_ucontext(struct ib_device *ibdev,
136 struct ib_udata *udata)
137 {
138 struct i40iw_device *iwdev = to_iwdev(ibdev);
139 struct i40iw_alloc_ucontext_req req;
140 struct i40iw_alloc_ucontext_resp uresp;
141 struct i40iw_ucontext *ucontext;
142
143 if (ib_copy_from_udata(&req, udata, sizeof(req)))
144 return ERR_PTR(-EINVAL);
145
146 if (req.userspace_ver != I40IW_ABI_USERSPACE_VER) {
147 i40iw_pr_err("Invalid userspace driver version detected. Detected version %d, should be %d\n",
148 req.userspace_ver, I40IW_ABI_USERSPACE_VER);
149 return ERR_PTR(-EINVAL);
150 }
151
152 memset(&uresp, 0, sizeof(uresp));
153 uresp.max_qps = iwdev->max_qp;
154 uresp.max_pds = iwdev->max_pd;
155 uresp.wq_size = iwdev->max_qp_wr * 2;
156 uresp.kernel_ver = I40IW_ABI_KERNEL_VER;
157
158 ucontext = kzalloc(sizeof(*ucontext), GFP_KERNEL);
159 if (!ucontext)
160 return ERR_PTR(-ENOMEM);
161
162 ucontext->iwdev = iwdev;
163
164 if (ib_copy_to_udata(udata, &uresp, sizeof(uresp))) {
165 kfree(ucontext);
166 return ERR_PTR(-EFAULT);
167 }
168
169 INIT_LIST_HEAD(&ucontext->cq_reg_mem_list);
170 spin_lock_init(&ucontext->cq_reg_mem_list_lock);
171 INIT_LIST_HEAD(&ucontext->qp_reg_mem_list);
172 spin_lock_init(&ucontext->qp_reg_mem_list_lock);
173
174 return &ucontext->ibucontext;
175 }
176
177 /**
178 * i40iw_dealloc_ucontext - deallocate the user context data structure
179 * @context: user context created during alloc
180 */
181 static int i40iw_dealloc_ucontext(struct ib_ucontext *context)
182 {
183 struct i40iw_ucontext *ucontext = to_ucontext(context);
184 unsigned long flags;
185
186 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
187 if (!list_empty(&ucontext->cq_reg_mem_list)) {
188 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
189 return -EBUSY;
190 }
191 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
192 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
193 if (!list_empty(&ucontext->qp_reg_mem_list)) {
194 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
195 return -EBUSY;
196 }
197 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
198
199 kfree(ucontext);
200 return 0;
201 }
202
203 /**
204 * i40iw_mmap - user memory map
205 * @context: context created during alloc
206 * @vma: kernel info for user memory map
207 */
208 static int i40iw_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
209 {
210 struct i40iw_ucontext *ucontext;
211 u64 db_addr_offset;
212 u64 push_offset;
213
214 ucontext = to_ucontext(context);
215 if (ucontext->iwdev->sc_dev.is_pf) {
216 db_addr_offset = I40IW_DB_ADDR_OFFSET;
217 push_offset = I40IW_PUSH_OFFSET;
218 if (vma->vm_pgoff)
219 vma->vm_pgoff += I40IW_PF_FIRST_PUSH_PAGE_INDEX - 1;
220 } else {
221 db_addr_offset = I40IW_VF_DB_ADDR_OFFSET;
222 push_offset = I40IW_VF_PUSH_OFFSET;
223 if (vma->vm_pgoff)
224 vma->vm_pgoff += I40IW_VF_FIRST_PUSH_PAGE_INDEX - 1;
225 }
226
227 vma->vm_pgoff += db_addr_offset >> PAGE_SHIFT;
228
229 if (vma->vm_pgoff == (db_addr_offset >> PAGE_SHIFT)) {
230 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
231 vma->vm_private_data = ucontext;
232 } else {
233 if ((vma->vm_pgoff - (push_offset >> PAGE_SHIFT)) % 2)
234 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
235 else
236 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
237 }
238
239 if (io_remap_pfn_range(vma, vma->vm_start,
240 vma->vm_pgoff + (pci_resource_start(ucontext->iwdev->ldev->pcidev, 0) >> PAGE_SHIFT),
241 PAGE_SIZE, vma->vm_page_prot))
242 return -EAGAIN;
243
244 return 0;
245 }
246
247 /**
248 * i40iw_alloc_push_page - allocate a push page for qp
249 * @iwdev: iwarp device
250 * @qp: hardware control qp
251 */
252 static void i40iw_alloc_push_page(struct i40iw_device *iwdev, struct i40iw_sc_qp *qp)
253 {
254 struct i40iw_cqp_request *cqp_request;
255 struct cqp_commands_info *cqp_info;
256 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
257 enum i40iw_status_code status;
258
259 if (qp->push_idx != I40IW_INVALID_PUSH_PAGE_INDEX)
260 return;
261
262 cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
263 if (!cqp_request)
264 return;
265
266 atomic_inc(&cqp_request->refcount);
267
268 cqp_info = &cqp_request->info;
269 cqp_info->cqp_cmd = OP_MANAGE_PUSH_PAGE;
270 cqp_info->post_sq = 1;
271
272 cqp_info->in.u.manage_push_page.info.qs_handle = dev->qs_handle;
273 cqp_info->in.u.manage_push_page.info.free_page = 0;
274 cqp_info->in.u.manage_push_page.cqp = &iwdev->cqp.sc_cqp;
275 cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request;
276
277 status = i40iw_handle_cqp_op(iwdev, cqp_request);
278 if (!status)
279 qp->push_idx = cqp_request->compl_info.op_ret_val;
280 else
281 i40iw_pr_err("CQP-OP Push page fail");
282 i40iw_put_cqp_request(&iwdev->cqp, cqp_request);
283 }
284
285 /**
286 * i40iw_dealloc_push_page - free a push page for qp
287 * @iwdev: iwarp device
288 * @qp: hardware control qp
289 */
290 static void i40iw_dealloc_push_page(struct i40iw_device *iwdev, struct i40iw_sc_qp *qp)
291 {
292 struct i40iw_cqp_request *cqp_request;
293 struct cqp_commands_info *cqp_info;
294 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
295 enum i40iw_status_code status;
296
297 if (qp->push_idx == I40IW_INVALID_PUSH_PAGE_INDEX)
298 return;
299
300 cqp_request = i40iw_get_cqp_request(&iwdev->cqp, false);
301 if (!cqp_request)
302 return;
303
304 cqp_info = &cqp_request->info;
305 cqp_info->cqp_cmd = OP_MANAGE_PUSH_PAGE;
306 cqp_info->post_sq = 1;
307
308 cqp_info->in.u.manage_push_page.info.push_idx = qp->push_idx;
309 cqp_info->in.u.manage_push_page.info.qs_handle = dev->qs_handle;
310 cqp_info->in.u.manage_push_page.info.free_page = 1;
311 cqp_info->in.u.manage_push_page.cqp = &iwdev->cqp.sc_cqp;
312 cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request;
313
314 status = i40iw_handle_cqp_op(iwdev, cqp_request);
315 if (!status)
316 qp->push_idx = I40IW_INVALID_PUSH_PAGE_INDEX;
317 else
318 i40iw_pr_err("CQP-OP Push page fail");
319 }
320
321 /**
322 * i40iw_alloc_pd - allocate protection domain
323 * @ibdev: device pointer from stack
324 * @context: user context created during alloc
325 * @udata: user data
326 */
327 static struct ib_pd *i40iw_alloc_pd(struct ib_device *ibdev,
328 struct ib_ucontext *context,
329 struct ib_udata *udata)
330 {
331 struct i40iw_pd *iwpd;
332 struct i40iw_device *iwdev = to_iwdev(ibdev);
333 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
334 struct i40iw_alloc_pd_resp uresp;
335 struct i40iw_sc_pd *sc_pd;
336 u32 pd_id = 0;
337 int err;
338
339 err = i40iw_alloc_resource(iwdev, iwdev->allocated_pds,
340 iwdev->max_pd, &pd_id, &iwdev->next_pd);
341 if (err) {
342 i40iw_pr_err("alloc resource failed\n");
343 return ERR_PTR(err);
344 }
345
346 iwpd = kzalloc(sizeof(*iwpd), GFP_KERNEL);
347 if (!iwpd) {
348 err = -ENOMEM;
349 goto free_res;
350 }
351
352 sc_pd = &iwpd->sc_pd;
353 dev->iw_pd_ops->pd_init(dev, sc_pd, pd_id);
354
355 if (context) {
356 memset(&uresp, 0, sizeof(uresp));
357 uresp.pd_id = pd_id;
358 if (ib_copy_to_udata(udata, &uresp, sizeof(uresp))) {
359 err = -EFAULT;
360 goto error;
361 }
362 }
363
364 i40iw_add_pdusecount(iwpd);
365 return &iwpd->ibpd;
366 error:
367 kfree(iwpd);
368 free_res:
369 i40iw_free_resource(iwdev, iwdev->allocated_pds, pd_id);
370 return ERR_PTR(err);
371 }
372
373 /**
374 * i40iw_dealloc_pd - deallocate pd
375 * @ibpd: ptr of pd to be deallocated
376 */
377 static int i40iw_dealloc_pd(struct ib_pd *ibpd)
378 {
379 struct i40iw_pd *iwpd = to_iwpd(ibpd);
380 struct i40iw_device *iwdev = to_iwdev(ibpd->device);
381
382 i40iw_rem_pdusecount(iwpd, iwdev);
383 return 0;
384 }
385
386 /**
387 * i40iw_qp_roundup - return round up qp ring size
388 * @wr_ring_size: ring size to round up
389 */
390 static int i40iw_qp_roundup(u32 wr_ring_size)
391 {
392 int scount = 1;
393
394 if (wr_ring_size < I40IWQP_SW_MIN_WQSIZE)
395 wr_ring_size = I40IWQP_SW_MIN_WQSIZE;
396
397 for (wr_ring_size--; scount <= 16; scount *= 2)
398 wr_ring_size |= wr_ring_size >> scount;
399 return ++wr_ring_size;
400 }
401
402 /**
403 * i40iw_get_pbl - Retrieve pbl from a list given a virtual
404 * address
405 * @va: user virtual address
406 * @pbl_list: pbl list to search in (QP's or CQ's)
407 */
408 static struct i40iw_pbl *i40iw_get_pbl(unsigned long va,
409 struct list_head *pbl_list)
410 {
411 struct i40iw_pbl *iwpbl;
412
413 list_for_each_entry(iwpbl, pbl_list, list) {
414 if (iwpbl->user_base == va) {
415 list_del(&iwpbl->list);
416 return iwpbl;
417 }
418 }
419 return NULL;
420 }
421
422 /**
423 * i40iw_free_qp_resources - free up memory resources for qp
424 * @iwdev: iwarp device
425 * @iwqp: qp ptr (user or kernel)
426 * @qp_num: qp number assigned
427 */
428 void i40iw_free_qp_resources(struct i40iw_device *iwdev,
429 struct i40iw_qp *iwqp,
430 u32 qp_num)
431 {
432 i40iw_dealloc_push_page(iwdev, &iwqp->sc_qp);
433 if (qp_num)
434 i40iw_free_resource(iwdev, iwdev->allocated_qps, qp_num);
435 i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwqp->q2_ctx_mem);
436 i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwqp->kqp.dma_mem);
437 kfree(iwqp->kqp.wrid_mem);
438 iwqp->kqp.wrid_mem = NULL;
439 kfree(iwqp->allocated_buffer);
440 }
441
442 /**
443 * i40iw_clean_cqes - clean cq entries for qp
444 * @iwqp: qp ptr (user or kernel)
445 * @iwcq: cq ptr
446 */
447 static void i40iw_clean_cqes(struct i40iw_qp *iwqp, struct i40iw_cq *iwcq)
448 {
449 struct i40iw_cq_uk *ukcq = &iwcq->sc_cq.cq_uk;
450
451 ukcq->ops.iw_cq_clean(&iwqp->sc_qp.qp_uk, ukcq);
452 }
453
454 /**
455 * i40iw_destroy_qp - destroy qp
456 * @ibqp: qp's ib pointer also to get to device's qp address
457 */
458 static int i40iw_destroy_qp(struct ib_qp *ibqp)
459 {
460 struct i40iw_qp *iwqp = to_iwqp(ibqp);
461
462 iwqp->destroyed = 1;
463
464 if (iwqp->ibqp_state >= IB_QPS_INIT && iwqp->ibqp_state < IB_QPS_RTS)
465 i40iw_next_iw_state(iwqp, I40IW_QP_STATE_ERROR, 0, 0, 0);
466
467 if (!iwqp->user_mode) {
468 if (iwqp->iwscq) {
469 i40iw_clean_cqes(iwqp, iwqp->iwscq);
470 if (iwqp->iwrcq != iwqp->iwscq)
471 i40iw_clean_cqes(iwqp, iwqp->iwrcq);
472 }
473 }
474
475 i40iw_rem_ref(&iwqp->ibqp);
476 return 0;
477 }
478
479 /**
480 * i40iw_setup_virt_qp - setup for allocation of virtual qp
481 * @dev: iwarp device
482 * @qp: qp ptr
483 * @init_info: initialize info to return
484 */
485 static int i40iw_setup_virt_qp(struct i40iw_device *iwdev,
486 struct i40iw_qp *iwqp,
487 struct i40iw_qp_init_info *init_info)
488 {
489 struct i40iw_pbl *iwpbl = iwqp->iwpbl;
490 struct i40iw_qp_mr *qpmr = &iwpbl->qp_mr;
491
492 iwqp->page = qpmr->sq_page;
493 init_info->shadow_area_pa = cpu_to_le64(qpmr->shadow);
494 if (iwpbl->pbl_allocated) {
495 init_info->virtual_map = true;
496 init_info->sq_pa = qpmr->sq_pbl.idx;
497 init_info->rq_pa = qpmr->rq_pbl.idx;
498 } else {
499 init_info->sq_pa = qpmr->sq_pbl.addr;
500 init_info->rq_pa = qpmr->rq_pbl.addr;
501 }
502 return 0;
503 }
504
505 /**
506 * i40iw_setup_kmode_qp - setup initialization for kernel mode qp
507 * @iwdev: iwarp device
508 * @iwqp: qp ptr (user or kernel)
509 * @info: initialize info to return
510 */
511 static int i40iw_setup_kmode_qp(struct i40iw_device *iwdev,
512 struct i40iw_qp *iwqp,
513 struct i40iw_qp_init_info *info)
514 {
515 struct i40iw_dma_mem *mem = &iwqp->kqp.dma_mem;
516 u32 sqdepth, rqdepth;
517 u32 sq_size, rq_size;
518 u8 sqshift, rqshift;
519 u32 size;
520 enum i40iw_status_code status;
521 struct i40iw_qp_uk_init_info *ukinfo = &info->qp_uk_init_info;
522
523 sq_size = i40iw_qp_roundup(ukinfo->sq_size + 1);
524 rq_size = i40iw_qp_roundup(ukinfo->rq_size + 1);
525
526 status = i40iw_get_wqe_shift(sq_size, ukinfo->max_sq_frag_cnt, ukinfo->max_inline_data, &sqshift);
527 if (!status)
528 status = i40iw_get_wqe_shift(rq_size, ukinfo->max_rq_frag_cnt, 0, &rqshift);
529
530 if (status)
531 return -ENOSYS;
532
533 sqdepth = sq_size << sqshift;
534 rqdepth = rq_size << rqshift;
535
536 size = sqdepth * sizeof(struct i40iw_sq_uk_wr_trk_info) + (rqdepth << 3);
537 iwqp->kqp.wrid_mem = kzalloc(size, GFP_KERNEL);
538
539 ukinfo->sq_wrtrk_array = (struct i40iw_sq_uk_wr_trk_info *)iwqp->kqp.wrid_mem;
540 if (!ukinfo->sq_wrtrk_array)
541 return -ENOMEM;
542
543 ukinfo->rq_wrid_array = (u64 *)&ukinfo->sq_wrtrk_array[sqdepth];
544
545 size = (sqdepth + rqdepth) * I40IW_QP_WQE_MIN_SIZE;
546 size += (I40IW_SHADOW_AREA_SIZE << 3);
547
548 status = i40iw_allocate_dma_mem(iwdev->sc_dev.hw, mem, size, 256);
549 if (status) {
550 kfree(ukinfo->sq_wrtrk_array);
551 ukinfo->sq_wrtrk_array = NULL;
552 return -ENOMEM;
553 }
554
555 ukinfo->sq = mem->va;
556 info->sq_pa = mem->pa;
557
558 ukinfo->rq = &ukinfo->sq[sqdepth];
559 info->rq_pa = info->sq_pa + (sqdepth * I40IW_QP_WQE_MIN_SIZE);
560
561 ukinfo->shadow_area = ukinfo->rq[rqdepth].elem;
562 info->shadow_area_pa = info->rq_pa + (rqdepth * I40IW_QP_WQE_MIN_SIZE);
563
564 ukinfo->sq_size = sq_size;
565 ukinfo->rq_size = rq_size;
566 ukinfo->qp_id = iwqp->ibqp.qp_num;
567 return 0;
568 }
569
570 /**
571 * i40iw_create_qp - create qp
572 * @ibpd: ptr of pd
573 * @init_attr: attributes for qp
574 * @udata: user data for create qp
575 */
576 static struct ib_qp *i40iw_create_qp(struct ib_pd *ibpd,
577 struct ib_qp_init_attr *init_attr,
578 struct ib_udata *udata)
579 {
580 struct i40iw_pd *iwpd = to_iwpd(ibpd);
581 struct i40iw_device *iwdev = to_iwdev(ibpd->device);
582 struct i40iw_cqp *iwcqp = &iwdev->cqp;
583 struct i40iw_qp *iwqp;
584 struct i40iw_ucontext *ucontext;
585 struct i40iw_create_qp_req req;
586 struct i40iw_create_qp_resp uresp;
587 u32 qp_num = 0;
588 void *mem;
589 enum i40iw_status_code ret;
590 int err_code;
591 int sq_size;
592 int rq_size;
593 struct i40iw_sc_qp *qp;
594 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
595 struct i40iw_qp_init_info init_info;
596 struct i40iw_create_qp_info *qp_info;
597 struct i40iw_cqp_request *cqp_request;
598 struct cqp_commands_info *cqp_info;
599
600 struct i40iw_qp_host_ctx_info *ctx_info;
601 struct i40iwarp_offload_info *iwarp_info;
602 unsigned long flags;
603
604 if (init_attr->create_flags)
605 return ERR_PTR(-EINVAL);
606 if (init_attr->cap.max_inline_data > I40IW_MAX_INLINE_DATA_SIZE)
607 init_attr->cap.max_inline_data = I40IW_MAX_INLINE_DATA_SIZE;
608
609 if (init_attr->cap.max_send_sge > I40IW_MAX_WQ_FRAGMENT_COUNT)
610 init_attr->cap.max_send_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
611
612 memset(&init_info, 0, sizeof(init_info));
613
614 sq_size = init_attr->cap.max_send_wr;
615 rq_size = init_attr->cap.max_recv_wr;
616
617 init_info.qp_uk_init_info.sq_size = sq_size;
618 init_info.qp_uk_init_info.rq_size = rq_size;
619 init_info.qp_uk_init_info.max_sq_frag_cnt = init_attr->cap.max_send_sge;
620 init_info.qp_uk_init_info.max_rq_frag_cnt = init_attr->cap.max_recv_sge;
621 init_info.qp_uk_init_info.max_inline_data = init_attr->cap.max_inline_data;
622
623 mem = kzalloc(sizeof(*iwqp), GFP_KERNEL);
624 if (!mem)
625 return ERR_PTR(-ENOMEM);
626
627 iwqp = (struct i40iw_qp *)mem;
628 qp = &iwqp->sc_qp;
629 qp->back_qp = (void *)iwqp;
630 qp->push_idx = I40IW_INVALID_PUSH_PAGE_INDEX;
631
632 iwqp->ctx_info.iwarp_info = &iwqp->iwarp_info;
633
634 if (i40iw_allocate_dma_mem(dev->hw,
635 &iwqp->q2_ctx_mem,
636 I40IW_Q2_BUFFER_SIZE + I40IW_QP_CTX_SIZE,
637 256)) {
638 i40iw_pr_err("dma_mem failed\n");
639 err_code = -ENOMEM;
640 goto error;
641 }
642
643 init_info.q2 = iwqp->q2_ctx_mem.va;
644 init_info.q2_pa = iwqp->q2_ctx_mem.pa;
645
646 init_info.host_ctx = (void *)init_info.q2 + I40IW_Q2_BUFFER_SIZE;
647 init_info.host_ctx_pa = init_info.q2_pa + I40IW_Q2_BUFFER_SIZE;
648
649 err_code = i40iw_alloc_resource(iwdev, iwdev->allocated_qps, iwdev->max_qp,
650 &qp_num, &iwdev->next_qp);
651 if (err_code) {
652 i40iw_pr_err("qp resource\n");
653 goto error;
654 }
655
656 iwqp->allocated_buffer = mem;
657 iwqp->iwdev = iwdev;
658 iwqp->iwpd = iwpd;
659 iwqp->ibqp.qp_num = qp_num;
660 qp = &iwqp->sc_qp;
661 iwqp->iwscq = to_iwcq(init_attr->send_cq);
662 iwqp->iwrcq = to_iwcq(init_attr->recv_cq);
663
664 iwqp->host_ctx.va = init_info.host_ctx;
665 iwqp->host_ctx.pa = init_info.host_ctx_pa;
666 iwqp->host_ctx.size = I40IW_QP_CTX_SIZE;
667
668 init_info.pd = &iwpd->sc_pd;
669 init_info.qp_uk_init_info.qp_id = iwqp->ibqp.qp_num;
670 iwqp->ctx_info.qp_compl_ctx = (uintptr_t)qp;
671
672 if (init_attr->qp_type != IB_QPT_RC) {
673 err_code = -ENOSYS;
674 goto error;
675 }
676 if (iwdev->push_mode)
677 i40iw_alloc_push_page(iwdev, qp);
678 if (udata) {
679 err_code = ib_copy_from_udata(&req, udata, sizeof(req));
680 if (err_code) {
681 i40iw_pr_err("ib_copy_from_data\n");
682 goto error;
683 }
684 iwqp->ctx_info.qp_compl_ctx = req.user_compl_ctx;
685 if (ibpd->uobject && ibpd->uobject->context) {
686 iwqp->user_mode = 1;
687 ucontext = to_ucontext(ibpd->uobject->context);
688
689 if (req.user_wqe_buffers) {
690 spin_lock_irqsave(
691 &ucontext->qp_reg_mem_list_lock, flags);
692 iwqp->iwpbl = i40iw_get_pbl(
693 (unsigned long)req.user_wqe_buffers,
694 &ucontext->qp_reg_mem_list);
695 spin_unlock_irqrestore(
696 &ucontext->qp_reg_mem_list_lock, flags);
697
698 if (!iwqp->iwpbl) {
699 err_code = -ENODATA;
700 i40iw_pr_err("no pbl info\n");
701 goto error;
702 }
703 }
704 }
705 err_code = i40iw_setup_virt_qp(iwdev, iwqp, &init_info);
706 } else {
707 err_code = i40iw_setup_kmode_qp(iwdev, iwqp, &init_info);
708 }
709
710 if (err_code) {
711 i40iw_pr_err("setup qp failed\n");
712 goto error;
713 }
714
715 init_info.type = I40IW_QP_TYPE_IWARP;
716 ret = dev->iw_priv_qp_ops->qp_init(qp, &init_info);
717 if (ret) {
718 err_code = -EPROTO;
719 i40iw_pr_err("qp_init fail\n");
720 goto error;
721 }
722 ctx_info = &iwqp->ctx_info;
723 iwarp_info = &iwqp->iwarp_info;
724 iwarp_info->rd_enable = true;
725 iwarp_info->wr_rdresp_en = true;
726 if (!iwqp->user_mode) {
727 iwarp_info->fast_reg_en = true;
728 iwarp_info->priv_mode_en = true;
729 }
730 iwarp_info->ddp_ver = 1;
731 iwarp_info->rdmap_ver = 1;
732
733 ctx_info->iwarp_info_valid = true;
734 ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
735 ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
736 if (qp->push_idx == I40IW_INVALID_PUSH_PAGE_INDEX) {
737 ctx_info->push_mode_en = false;
738 } else {
739 ctx_info->push_mode_en = true;
740 ctx_info->push_idx = qp->push_idx;
741 }
742
743 ret = dev->iw_priv_qp_ops->qp_setctx(&iwqp->sc_qp,
744 (u64 *)iwqp->host_ctx.va,
745 ctx_info);
746 ctx_info->iwarp_info_valid = false;
747 cqp_request = i40iw_get_cqp_request(iwcqp, true);
748 if (!cqp_request) {
749 err_code = -ENOMEM;
750 goto error;
751 }
752 cqp_info = &cqp_request->info;
753 qp_info = &cqp_request->info.in.u.qp_create.info;
754
755 memset(qp_info, 0, sizeof(*qp_info));
756
757 qp_info->cq_num_valid = true;
758 qp_info->next_iwarp_state = I40IW_QP_STATE_IDLE;
759
760 cqp_info->cqp_cmd = OP_QP_CREATE;
761 cqp_info->post_sq = 1;
762 cqp_info->in.u.qp_create.qp = qp;
763 cqp_info->in.u.qp_create.scratch = (uintptr_t)cqp_request;
764 ret = i40iw_handle_cqp_op(iwdev, cqp_request);
765 if (ret) {
766 i40iw_pr_err("CQP-OP QP create fail");
767 err_code = -EACCES;
768 goto error;
769 }
770
771 i40iw_add_ref(&iwqp->ibqp);
772 spin_lock_init(&iwqp->lock);
773 iwqp->sig_all = (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) ? 1 : 0;
774 iwdev->qp_table[qp_num] = iwqp;
775 i40iw_add_pdusecount(iwqp->iwpd);
776 if (ibpd->uobject && udata) {
777 memset(&uresp, 0, sizeof(uresp));
778 uresp.actual_sq_size = sq_size;
779 uresp.actual_rq_size = rq_size;
780 uresp.qp_id = qp_num;
781 uresp.push_idx = qp->push_idx;
782 err_code = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
783 if (err_code) {
784 i40iw_pr_err("copy_to_udata failed\n");
785 i40iw_destroy_qp(&iwqp->ibqp);
786 /* let the completion of the qp destroy free the qp */
787 return ERR_PTR(err_code);
788 }
789 }
790 init_completion(&iwqp->sq_drained);
791 init_completion(&iwqp->rq_drained);
792
793 return &iwqp->ibqp;
794 error:
795 i40iw_free_qp_resources(iwdev, iwqp, qp_num);
796 kfree(mem);
797 return ERR_PTR(err_code);
798 }
799
800 /**
801 * i40iw_query - query qp attributes
802 * @ibqp: qp pointer
803 * @attr: attributes pointer
804 * @attr_mask: Not used
805 * @init_attr: qp attributes to return
806 */
807 static int i40iw_query_qp(struct ib_qp *ibqp,
808 struct ib_qp_attr *attr,
809 int attr_mask,
810 struct ib_qp_init_attr *init_attr)
811 {
812 struct i40iw_qp *iwqp = to_iwqp(ibqp);
813 struct i40iw_sc_qp *qp = &iwqp->sc_qp;
814
815 attr->qp_access_flags = 0;
816 attr->cap.max_send_wr = qp->qp_uk.sq_size;
817 attr->cap.max_recv_wr = qp->qp_uk.rq_size;
818 attr->cap.max_recv_sge = 1;
819 attr->cap.max_inline_data = I40IW_MAX_INLINE_DATA_SIZE;
820 init_attr->event_handler = iwqp->ibqp.event_handler;
821 init_attr->qp_context = iwqp->ibqp.qp_context;
822 init_attr->send_cq = iwqp->ibqp.send_cq;
823 init_attr->recv_cq = iwqp->ibqp.recv_cq;
824 init_attr->srq = iwqp->ibqp.srq;
825 init_attr->cap = attr->cap;
826 return 0;
827 }
828
829 /**
830 * i40iw_hw_modify_qp - setup cqp for modify qp
831 * @iwdev: iwarp device
832 * @iwqp: qp ptr (user or kernel)
833 * @info: info for modify qp
834 * @wait: flag to wait or not for modify qp completion
835 */
836 void i40iw_hw_modify_qp(struct i40iw_device *iwdev, struct i40iw_qp *iwqp,
837 struct i40iw_modify_qp_info *info, bool wait)
838 {
839 enum i40iw_status_code status;
840 struct i40iw_cqp_request *cqp_request;
841 struct cqp_commands_info *cqp_info;
842 struct i40iw_modify_qp_info *m_info;
843
844 cqp_request = i40iw_get_cqp_request(&iwdev->cqp, wait);
845 if (!cqp_request)
846 return;
847
848 cqp_info = &cqp_request->info;
849 m_info = &cqp_info->in.u.qp_modify.info;
850 memcpy(m_info, info, sizeof(*m_info));
851 cqp_info->cqp_cmd = OP_QP_MODIFY;
852 cqp_info->post_sq = 1;
853 cqp_info->in.u.qp_modify.qp = &iwqp->sc_qp;
854 cqp_info->in.u.qp_modify.scratch = (uintptr_t)cqp_request;
855 status = i40iw_handle_cqp_op(iwdev, cqp_request);
856 if (status)
857 i40iw_pr_err("CQP-OP Modify QP fail");
858 }
859
860 /**
861 * i40iw_modify_qp - modify qp request
862 * @ibqp: qp's pointer for modify
863 * @attr: access attributes
864 * @attr_mask: state mask
865 * @udata: user data
866 */
867 int i40iw_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
868 int attr_mask, struct ib_udata *udata)
869 {
870 struct i40iw_qp *iwqp = to_iwqp(ibqp);
871 struct i40iw_device *iwdev = iwqp->iwdev;
872 struct i40iw_qp_host_ctx_info *ctx_info;
873 struct i40iwarp_offload_info *iwarp_info;
874 struct i40iw_modify_qp_info info;
875 u8 issue_modify_qp = 0;
876 u8 dont_wait = 0;
877 u32 err;
878 unsigned long flags;
879
880 memset(&info, 0, sizeof(info));
881 ctx_info = &iwqp->ctx_info;
882 iwarp_info = &iwqp->iwarp_info;
883
884 spin_lock_irqsave(&iwqp->lock, flags);
885
886 if (attr_mask & IB_QP_STATE) {
887 switch (attr->qp_state) {
888 case IB_QPS_INIT:
889 case IB_QPS_RTR:
890 if (iwqp->iwarp_state > (u32)I40IW_QP_STATE_IDLE) {
891 err = -EINVAL;
892 goto exit;
893 }
894 if (iwqp->iwarp_state == I40IW_QP_STATE_INVALID) {
895 info.next_iwarp_state = I40IW_QP_STATE_IDLE;
896 issue_modify_qp = 1;
897 }
898 break;
899 case IB_QPS_RTS:
900 if ((iwqp->iwarp_state > (u32)I40IW_QP_STATE_RTS) ||
901 (!iwqp->cm_id)) {
902 err = -EINVAL;
903 goto exit;
904 }
905
906 issue_modify_qp = 1;
907 iwqp->hw_tcp_state = I40IW_TCP_STATE_ESTABLISHED;
908 iwqp->hte_added = 1;
909 info.next_iwarp_state = I40IW_QP_STATE_RTS;
910 info.tcp_ctx_valid = true;
911 info.ord_valid = true;
912 info.arp_cache_idx_valid = true;
913 info.cq_num_valid = true;
914 break;
915 case IB_QPS_SQD:
916 if (iwqp->hw_iwarp_state > (u32)I40IW_QP_STATE_RTS) {
917 err = 0;
918 goto exit;
919 }
920 if ((iwqp->iwarp_state == (u32)I40IW_QP_STATE_CLOSING) ||
921 (iwqp->iwarp_state < (u32)I40IW_QP_STATE_RTS)) {
922 err = 0;
923 goto exit;
924 }
925 if (iwqp->iwarp_state > (u32)I40IW_QP_STATE_CLOSING) {
926 err = -EINVAL;
927 goto exit;
928 }
929 info.next_iwarp_state = I40IW_QP_STATE_CLOSING;
930 issue_modify_qp = 1;
931 break;
932 case IB_QPS_SQE:
933 if (iwqp->iwarp_state >= (u32)I40IW_QP_STATE_TERMINATE) {
934 err = -EINVAL;
935 goto exit;
936 }
937 info.next_iwarp_state = I40IW_QP_STATE_TERMINATE;
938 issue_modify_qp = 1;
939 break;
940 case IB_QPS_ERR:
941 case IB_QPS_RESET:
942 if (iwqp->iwarp_state == (u32)I40IW_QP_STATE_ERROR) {
943 err = -EINVAL;
944 goto exit;
945 }
946 if (iwqp->sc_qp.term_flags)
947 del_timer(&iwqp->terminate_timer);
948 info.next_iwarp_state = I40IW_QP_STATE_ERROR;
949 if ((iwqp->hw_tcp_state > I40IW_TCP_STATE_CLOSED) &&
950 iwdev->iw_status &&
951 (iwqp->hw_tcp_state != I40IW_TCP_STATE_TIME_WAIT))
952 info.reset_tcp_conn = true;
953 else
954 dont_wait = 1;
955 issue_modify_qp = 1;
956 info.next_iwarp_state = I40IW_QP_STATE_ERROR;
957 break;
958 default:
959 err = -EINVAL;
960 goto exit;
961 }
962
963 iwqp->ibqp_state = attr->qp_state;
964
965 if (issue_modify_qp)
966 iwqp->iwarp_state = info.next_iwarp_state;
967 else
968 info.next_iwarp_state = iwqp->iwarp_state;
969 }
970 if (attr_mask & IB_QP_ACCESS_FLAGS) {
971 ctx_info->iwarp_info_valid = true;
972 if (attr->qp_access_flags & IB_ACCESS_LOCAL_WRITE)
973 iwarp_info->wr_rdresp_en = true;
974 if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE)
975 iwarp_info->wr_rdresp_en = true;
976 if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ)
977 iwarp_info->rd_enable = true;
978 if (attr->qp_access_flags & IB_ACCESS_MW_BIND)
979 iwarp_info->bind_en = true;
980
981 if (iwqp->user_mode) {
982 iwarp_info->rd_enable = true;
983 iwarp_info->wr_rdresp_en = true;
984 iwarp_info->priv_mode_en = false;
985 }
986 }
987
988 if (ctx_info->iwarp_info_valid) {
989 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
990 int ret;
991
992 ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
993 ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
994 ret = dev->iw_priv_qp_ops->qp_setctx(&iwqp->sc_qp,
995 (u64 *)iwqp->host_ctx.va,
996 ctx_info);
997 if (ret) {
998 i40iw_pr_err("setting QP context\n");
999 err = -EINVAL;
1000 goto exit;
1001 }
1002 }
1003
1004 spin_unlock_irqrestore(&iwqp->lock, flags);
1005
1006 if (issue_modify_qp)
1007 i40iw_hw_modify_qp(iwdev, iwqp, &info, true);
1008
1009 if (issue_modify_qp && (iwqp->ibqp_state > IB_QPS_RTS)) {
1010 if (dont_wait) {
1011 if (iwqp->cm_id && iwqp->hw_tcp_state) {
1012 spin_lock_irqsave(&iwqp->lock, flags);
1013 iwqp->hw_tcp_state = I40IW_TCP_STATE_CLOSED;
1014 iwqp->last_aeq = I40IW_AE_RESET_SENT;
1015 spin_unlock_irqrestore(&iwqp->lock, flags);
1016 }
1017 }
1018 }
1019 return 0;
1020 exit:
1021 spin_unlock_irqrestore(&iwqp->lock, flags);
1022 return err;
1023 }
1024
1025 /**
1026 * cq_free_resources - free up recources for cq
1027 * @iwdev: iwarp device
1028 * @iwcq: cq ptr
1029 */
1030 static void cq_free_resources(struct i40iw_device *iwdev, struct i40iw_cq *iwcq)
1031 {
1032 struct i40iw_sc_cq *cq = &iwcq->sc_cq;
1033
1034 if (!iwcq->user_mode)
1035 i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwcq->kmem);
1036 i40iw_free_resource(iwdev, iwdev->allocated_cqs, cq->cq_uk.cq_id);
1037 }
1038
1039 /**
1040 * cq_wq_destroy - send cq destroy cqp
1041 * @iwdev: iwarp device
1042 * @cq: hardware control cq
1043 */
1044 static void cq_wq_destroy(struct i40iw_device *iwdev, struct i40iw_sc_cq *cq)
1045 {
1046 enum i40iw_status_code status;
1047 struct i40iw_cqp_request *cqp_request;
1048 struct cqp_commands_info *cqp_info;
1049
1050 cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1051 if (!cqp_request)
1052 return;
1053
1054 cqp_info = &cqp_request->info;
1055
1056 cqp_info->cqp_cmd = OP_CQ_DESTROY;
1057 cqp_info->post_sq = 1;
1058 cqp_info->in.u.cq_destroy.cq = cq;
1059 cqp_info->in.u.cq_destroy.scratch = (uintptr_t)cqp_request;
1060 status = i40iw_handle_cqp_op(iwdev, cqp_request);
1061 if (status)
1062 i40iw_pr_err("CQP-OP Destroy QP fail");
1063 }
1064
1065 /**
1066 * i40iw_destroy_cq - destroy cq
1067 * @ib_cq: cq pointer
1068 */
1069 static int i40iw_destroy_cq(struct ib_cq *ib_cq)
1070 {
1071 struct i40iw_cq *iwcq;
1072 struct i40iw_device *iwdev;
1073 struct i40iw_sc_cq *cq;
1074
1075 if (!ib_cq) {
1076 i40iw_pr_err("ib_cq == NULL\n");
1077 return 0;
1078 }
1079
1080 iwcq = to_iwcq(ib_cq);
1081 iwdev = to_iwdev(ib_cq->device);
1082 cq = &iwcq->sc_cq;
1083 cq_wq_destroy(iwdev, cq);
1084 cq_free_resources(iwdev, iwcq);
1085 kfree(iwcq);
1086 return 0;
1087 }
1088
1089 /**
1090 * i40iw_create_cq - create cq
1091 * @ibdev: device pointer from stack
1092 * @attr: attributes for cq
1093 * @context: user context created during alloc
1094 * @udata: user data
1095 */
1096 static struct ib_cq *i40iw_create_cq(struct ib_device *ibdev,
1097 const struct ib_cq_init_attr *attr,
1098 struct ib_ucontext *context,
1099 struct ib_udata *udata)
1100 {
1101 struct i40iw_device *iwdev = to_iwdev(ibdev);
1102 struct i40iw_cq *iwcq;
1103 struct i40iw_pbl *iwpbl;
1104 u32 cq_num = 0;
1105 struct i40iw_sc_cq *cq;
1106 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
1107 struct i40iw_cq_init_info info;
1108 enum i40iw_status_code status;
1109 struct i40iw_cqp_request *cqp_request;
1110 struct cqp_commands_info *cqp_info;
1111 struct i40iw_cq_uk_init_info *ukinfo = &info.cq_uk_init_info;
1112 unsigned long flags;
1113 int err_code;
1114 int entries = attr->cqe;
1115
1116 if (entries > iwdev->max_cqe)
1117 return ERR_PTR(-EINVAL);
1118
1119 iwcq = kzalloc(sizeof(*iwcq), GFP_KERNEL);
1120 if (!iwcq)
1121 return ERR_PTR(-ENOMEM);
1122
1123 memset(&info, 0, sizeof(info));
1124
1125 err_code = i40iw_alloc_resource(iwdev, iwdev->allocated_cqs,
1126 iwdev->max_cq, &cq_num,
1127 &iwdev->next_cq);
1128 if (err_code)
1129 goto error;
1130
1131 cq = &iwcq->sc_cq;
1132 cq->back_cq = (void *)iwcq;
1133 spin_lock_init(&iwcq->lock);
1134
1135 info.dev = dev;
1136 ukinfo->cq_size = max(entries, 4);
1137 ukinfo->cq_id = cq_num;
1138 iwcq->ibcq.cqe = info.cq_uk_init_info.cq_size;
1139 info.ceqe_mask = 0;
1140 info.ceq_id = 0;
1141 info.ceq_id_valid = true;
1142 info.ceqe_mask = 1;
1143 info.type = I40IW_CQ_TYPE_IWARP;
1144 if (context) {
1145 struct i40iw_ucontext *ucontext;
1146 struct i40iw_create_cq_req req;
1147 struct i40iw_cq_mr *cqmr;
1148
1149 memset(&req, 0, sizeof(req));
1150 iwcq->user_mode = true;
1151 ucontext = to_ucontext(context);
1152 if (ib_copy_from_udata(&req, udata, sizeof(struct i40iw_create_cq_req)))
1153 goto cq_free_resources;
1154
1155 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1156 iwpbl = i40iw_get_pbl((unsigned long)req.user_cq_buffer,
1157 &ucontext->cq_reg_mem_list);
1158 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
1159 if (!iwpbl) {
1160 err_code = -EPROTO;
1161 goto cq_free_resources;
1162 }
1163
1164 iwcq->iwpbl = iwpbl;
1165 iwcq->cq_mem_size = 0;
1166 cqmr = &iwpbl->cq_mr;
1167 info.shadow_area_pa = cpu_to_le64(cqmr->shadow);
1168 if (iwpbl->pbl_allocated) {
1169 info.virtual_map = true;
1170 info.pbl_chunk_size = 1;
1171 info.first_pm_pbl_idx = cqmr->cq_pbl.idx;
1172 } else {
1173 info.cq_base_pa = cqmr->cq_pbl.addr;
1174 }
1175 } else {
1176 /* Kmode allocations */
1177 int rsize;
1178 int shadow;
1179
1180 rsize = info.cq_uk_init_info.cq_size * sizeof(struct i40iw_cqe);
1181 rsize = round_up(rsize, 256);
1182 shadow = I40IW_SHADOW_AREA_SIZE << 3;
1183 status = i40iw_allocate_dma_mem(dev->hw, &iwcq->kmem,
1184 rsize + shadow, 256);
1185 if (status) {
1186 err_code = -ENOMEM;
1187 goto cq_free_resources;
1188 }
1189 ukinfo->cq_base = iwcq->kmem.va;
1190 info.cq_base_pa = iwcq->kmem.pa;
1191 info.shadow_area_pa = info.cq_base_pa + rsize;
1192 ukinfo->shadow_area = iwcq->kmem.va + rsize;
1193 }
1194
1195 if (dev->iw_priv_cq_ops->cq_init(cq, &info)) {
1196 i40iw_pr_err("init cq fail\n");
1197 err_code = -EPROTO;
1198 goto cq_free_resources;
1199 }
1200
1201 cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1202 if (!cqp_request) {
1203 err_code = -ENOMEM;
1204 goto cq_free_resources;
1205 }
1206
1207 cqp_info = &cqp_request->info;
1208 cqp_info->cqp_cmd = OP_CQ_CREATE;
1209 cqp_info->post_sq = 1;
1210 cqp_info->in.u.cq_create.cq = cq;
1211 cqp_info->in.u.cq_create.scratch = (uintptr_t)cqp_request;
1212 status = i40iw_handle_cqp_op(iwdev, cqp_request);
1213 if (status) {
1214 i40iw_pr_err("CQP-OP Create QP fail");
1215 err_code = -EPROTO;
1216 goto cq_free_resources;
1217 }
1218
1219 if (context) {
1220 struct i40iw_create_cq_resp resp;
1221
1222 memset(&resp, 0, sizeof(resp));
1223 resp.cq_id = info.cq_uk_init_info.cq_id;
1224 resp.cq_size = info.cq_uk_init_info.cq_size;
1225 if (ib_copy_to_udata(udata, &resp, sizeof(resp))) {
1226 i40iw_pr_err("copy to user data\n");
1227 err_code = -EPROTO;
1228 goto cq_destroy;
1229 }
1230 }
1231
1232 return (struct ib_cq *)iwcq;
1233
1234 cq_destroy:
1235 cq_wq_destroy(iwdev, cq);
1236 cq_free_resources:
1237 cq_free_resources(iwdev, iwcq);
1238 error:
1239 kfree(iwcq);
1240 return ERR_PTR(err_code);
1241 }
1242
1243 /**
1244 * i40iw_get_user_access - get hw access from IB access
1245 * @acc: IB access to return hw access
1246 */
1247 static inline u16 i40iw_get_user_access(int acc)
1248 {
1249 u16 access = 0;
1250
1251 access |= (acc & IB_ACCESS_LOCAL_WRITE) ? I40IW_ACCESS_FLAGS_LOCALWRITE : 0;
1252 access |= (acc & IB_ACCESS_REMOTE_WRITE) ? I40IW_ACCESS_FLAGS_REMOTEWRITE : 0;
1253 access |= (acc & IB_ACCESS_REMOTE_READ) ? I40IW_ACCESS_FLAGS_REMOTEREAD : 0;
1254 access |= (acc & IB_ACCESS_MW_BIND) ? I40IW_ACCESS_FLAGS_BIND_WINDOW : 0;
1255 return access;
1256 }
1257
1258 /**
1259 * i40iw_free_stag - free stag resource
1260 * @iwdev: iwarp device
1261 * @stag: stag to free
1262 */
1263 static void i40iw_free_stag(struct i40iw_device *iwdev, u32 stag)
1264 {
1265 u32 stag_idx;
1266
1267 stag_idx = (stag & iwdev->mr_stagmask) >> I40IW_CQPSQ_STAG_IDX_SHIFT;
1268 i40iw_free_resource(iwdev, iwdev->allocated_mrs, stag_idx);
1269 }
1270
1271 /**
1272 * i40iw_create_stag - create random stag
1273 * @iwdev: iwarp device
1274 */
1275 static u32 i40iw_create_stag(struct i40iw_device *iwdev)
1276 {
1277 u32 stag = 0;
1278 u32 stag_index = 0;
1279 u32 next_stag_index;
1280 u32 driver_key;
1281 u32 random;
1282 u8 consumer_key;
1283 int ret;
1284
1285 get_random_bytes(&random, sizeof(random));
1286 consumer_key = (u8)random;
1287
1288 driver_key = random & ~iwdev->mr_stagmask;
1289 next_stag_index = (random & iwdev->mr_stagmask) >> 8;
1290 next_stag_index %= iwdev->max_mr;
1291
1292 ret = i40iw_alloc_resource(iwdev,
1293 iwdev->allocated_mrs, iwdev->max_mr,
1294 &stag_index, &next_stag_index);
1295 if (!ret) {
1296 stag = stag_index << I40IW_CQPSQ_STAG_IDX_SHIFT;
1297 stag |= driver_key;
1298 stag += (u32)consumer_key;
1299 }
1300 return stag;
1301 }
1302
1303 /**
1304 * i40iw_next_pbl_addr - Get next pbl address
1305 * @palloc: Poiner to allocated pbles
1306 * @pbl: pointer to a pble
1307 * @pinfo: info pointer
1308 * @idx: index
1309 */
1310 static inline u64 *i40iw_next_pbl_addr(struct i40iw_pble_alloc *palloc,
1311 u64 *pbl,
1312 struct i40iw_pble_info **pinfo,
1313 u32 *idx)
1314 {
1315 *idx += 1;
1316 if ((!(*pinfo)) || (*idx != (*pinfo)->cnt))
1317 return ++pbl;
1318 *idx = 0;
1319 (*pinfo)++;
1320 return (u64 *)(*pinfo)->addr;
1321 }
1322
1323 /**
1324 * i40iw_copy_user_pgaddrs - copy user page address to pble's os locally
1325 * @iwmr: iwmr for IB's user page addresses
1326 * @pbl: ple pointer to save 1 level or 0 level pble
1327 * @level: indicated level 0, 1 or 2
1328 */
1329 static void i40iw_copy_user_pgaddrs(struct i40iw_mr *iwmr,
1330 u64 *pbl,
1331 enum i40iw_pble_level level)
1332 {
1333 struct ib_umem *region = iwmr->region;
1334 struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1335 int chunk_pages, entry, pg_shift, i;
1336 struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1337 struct i40iw_pble_info *pinfo;
1338 struct scatterlist *sg;
1339 u32 idx = 0;
1340
1341 pinfo = (level == I40IW_LEVEL_1) ? NULL : palloc->level2.leaf;
1342 pg_shift = ffs(region->page_size) - 1;
1343 for_each_sg(region->sg_head.sgl, sg, region->nmap, entry) {
1344 chunk_pages = sg_dma_len(sg) >> pg_shift;
1345 if ((iwmr->type == IW_MEMREG_TYPE_QP) &&
1346 !iwpbl->qp_mr.sq_page)
1347 iwpbl->qp_mr.sq_page = sg_page(sg);
1348 for (i = 0; i < chunk_pages; i++) {
1349 *pbl = cpu_to_le64(sg_dma_address(sg) + region->page_size * i);
1350 pbl = i40iw_next_pbl_addr(palloc, pbl, &pinfo, &idx);
1351 }
1352 }
1353 }
1354
1355 /**
1356 * i40iw_setup_pbles - copy user pg address to pble's
1357 * @iwdev: iwarp device
1358 * @iwmr: mr pointer for this memory registration
1359 * @use_pbles: flag if to use pble's or memory (level 0)
1360 */
1361 static int i40iw_setup_pbles(struct i40iw_device *iwdev,
1362 struct i40iw_mr *iwmr,
1363 bool use_pbles)
1364 {
1365 struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1366 struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1367 struct i40iw_pble_info *pinfo;
1368 u64 *pbl;
1369 enum i40iw_status_code status;
1370 enum i40iw_pble_level level = I40IW_LEVEL_1;
1371
1372 if (!use_pbles && (iwmr->page_cnt > MAX_SAVE_PAGE_ADDRS))
1373 return -ENOMEM;
1374
1375 if (use_pbles) {
1376 mutex_lock(&iwdev->pbl_mutex);
1377 status = i40iw_get_pble(&iwdev->sc_dev, iwdev->pble_rsrc, palloc, iwmr->page_cnt);
1378 mutex_unlock(&iwdev->pbl_mutex);
1379 if (status)
1380 return -ENOMEM;
1381
1382 iwpbl->pbl_allocated = true;
1383 level = palloc->level;
1384 pinfo = (level == I40IW_LEVEL_1) ? &palloc->level1 : palloc->level2.leaf;
1385 pbl = (u64 *)pinfo->addr;
1386 } else {
1387 pbl = iwmr->pgaddrmem;
1388 }
1389
1390 i40iw_copy_user_pgaddrs(iwmr, pbl, level);
1391 return 0;
1392 }
1393
1394 /**
1395 * i40iw_handle_q_mem - handle memory for qp and cq
1396 * @iwdev: iwarp device
1397 * @req: information for q memory management
1398 * @iwpbl: pble struct
1399 * @use_pbles: flag to use pble
1400 */
1401 static int i40iw_handle_q_mem(struct i40iw_device *iwdev,
1402 struct i40iw_mem_reg_req *req,
1403 struct i40iw_pbl *iwpbl,
1404 bool use_pbles)
1405 {
1406 struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1407 struct i40iw_mr *iwmr = iwpbl->iwmr;
1408 struct i40iw_qp_mr *qpmr = &iwpbl->qp_mr;
1409 struct i40iw_cq_mr *cqmr = &iwpbl->cq_mr;
1410 struct i40iw_hmc_pble *hmc_p;
1411 u64 *arr = iwmr->pgaddrmem;
1412 int err;
1413 int total;
1414
1415 total = req->sq_pages + req->rq_pages + req->cq_pages;
1416
1417 err = i40iw_setup_pbles(iwdev, iwmr, use_pbles);
1418 if (err)
1419 return err;
1420 if (use_pbles && (palloc->level != I40IW_LEVEL_1)) {
1421 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1422 iwpbl->pbl_allocated = false;
1423 return -ENOMEM;
1424 }
1425
1426 if (use_pbles)
1427 arr = (u64 *)palloc->level1.addr;
1428 if (req->reg_type == IW_MEMREG_TYPE_QP) {
1429 hmc_p = &qpmr->sq_pbl;
1430 qpmr->shadow = (dma_addr_t)arr[total];
1431 if (use_pbles) {
1432 hmc_p->idx = palloc->level1.idx;
1433 hmc_p = &qpmr->rq_pbl;
1434 hmc_p->idx = palloc->level1.idx + req->sq_pages;
1435 } else {
1436 hmc_p->addr = arr[0];
1437 hmc_p = &qpmr->rq_pbl;
1438 hmc_p->addr = arr[1];
1439 }
1440 } else { /* CQ */
1441 hmc_p = &cqmr->cq_pbl;
1442 cqmr->shadow = (dma_addr_t)arr[total];
1443 if (use_pbles)
1444 hmc_p->idx = palloc->level1.idx;
1445 else
1446 hmc_p->addr = arr[0];
1447 }
1448 return err;
1449 }
1450
1451 /**
1452 * i40iw_hw_alloc_stag - cqp command to allocate stag
1453 * @iwdev: iwarp device
1454 * @iwmr: iwarp mr pointer
1455 */
1456 static int i40iw_hw_alloc_stag(struct i40iw_device *iwdev, struct i40iw_mr *iwmr)
1457 {
1458 struct i40iw_allocate_stag_info *info;
1459 struct i40iw_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
1460 enum i40iw_status_code status;
1461 int err = 0;
1462 struct i40iw_cqp_request *cqp_request;
1463 struct cqp_commands_info *cqp_info;
1464
1465 cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1466 if (!cqp_request)
1467 return -ENOMEM;
1468
1469 cqp_info = &cqp_request->info;
1470 info = &cqp_info->in.u.alloc_stag.info;
1471 memset(info, 0, sizeof(*info));
1472 info->page_size = PAGE_SIZE;
1473 info->stag_idx = iwmr->stag >> I40IW_CQPSQ_STAG_IDX_SHIFT;
1474 info->pd_id = iwpd->sc_pd.pd_id;
1475 info->total_len = iwmr->length;
1476 cqp_info->cqp_cmd = OP_ALLOC_STAG;
1477 cqp_info->post_sq = 1;
1478 cqp_info->in.u.alloc_stag.dev = &iwdev->sc_dev;
1479 cqp_info->in.u.alloc_stag.scratch = (uintptr_t)cqp_request;
1480
1481 status = i40iw_handle_cqp_op(iwdev, cqp_request);
1482 if (status) {
1483 err = -ENOMEM;
1484 i40iw_pr_err("CQP-OP MR Reg fail");
1485 }
1486 return err;
1487 }
1488
1489 /**
1490 * i40iw_alloc_mr - register stag for fast memory registration
1491 * @pd: ibpd pointer
1492 * @mr_type: memory for stag registrion
1493 * @max_num_sg: man number of pages
1494 */
1495 static struct ib_mr *i40iw_alloc_mr(struct ib_pd *pd,
1496 enum ib_mr_type mr_type,
1497 u32 max_num_sg)
1498 {
1499 struct i40iw_pd *iwpd = to_iwpd(pd);
1500 struct i40iw_device *iwdev = to_iwdev(pd->device);
1501 struct i40iw_pble_alloc *palloc;
1502 struct i40iw_pbl *iwpbl;
1503 struct i40iw_mr *iwmr;
1504 enum i40iw_status_code status;
1505 u32 stag;
1506 int err_code = -ENOMEM;
1507
1508 iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
1509 if (!iwmr)
1510 return ERR_PTR(-ENOMEM);
1511
1512 stag = i40iw_create_stag(iwdev);
1513 if (!stag) {
1514 err_code = -EOVERFLOW;
1515 goto err;
1516 }
1517 iwmr->stag = stag;
1518 iwmr->ibmr.rkey = stag;
1519 iwmr->ibmr.lkey = stag;
1520 iwmr->ibmr.pd = pd;
1521 iwmr->ibmr.device = pd->device;
1522 iwpbl = &iwmr->iwpbl;
1523 iwpbl->iwmr = iwmr;
1524 iwmr->type = IW_MEMREG_TYPE_MEM;
1525 palloc = &iwpbl->pble_alloc;
1526 iwmr->page_cnt = max_num_sg;
1527 mutex_lock(&iwdev->pbl_mutex);
1528 status = i40iw_get_pble(&iwdev->sc_dev, iwdev->pble_rsrc, palloc, iwmr->page_cnt);
1529 mutex_unlock(&iwdev->pbl_mutex);
1530 if (!status)
1531 goto err1;
1532
1533 if (palloc->level != I40IW_LEVEL_1)
1534 goto err2;
1535 err_code = i40iw_hw_alloc_stag(iwdev, iwmr);
1536 if (err_code)
1537 goto err2;
1538 iwpbl->pbl_allocated = true;
1539 i40iw_add_pdusecount(iwpd);
1540 return &iwmr->ibmr;
1541 err2:
1542 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1543 err1:
1544 i40iw_free_stag(iwdev, stag);
1545 err:
1546 kfree(iwmr);
1547 return ERR_PTR(err_code);
1548 }
1549
1550 /**
1551 * i40iw_set_page - populate pbl list for fmr
1552 * @ibmr: ib mem to access iwarp mr pointer
1553 * @addr: page dma address fro pbl list
1554 */
1555 static int i40iw_set_page(struct ib_mr *ibmr, u64 addr)
1556 {
1557 struct i40iw_mr *iwmr = to_iwmr(ibmr);
1558 struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1559 struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1560 u64 *pbl;
1561
1562 if (unlikely(iwmr->npages == iwmr->page_cnt))
1563 return -ENOMEM;
1564
1565 pbl = (u64 *)palloc->level1.addr;
1566 pbl[iwmr->npages++] = cpu_to_le64(addr);
1567 return 0;
1568 }
1569
1570 /**
1571 * i40iw_map_mr_sg - map of sg list for fmr
1572 * @ibmr: ib mem to access iwarp mr pointer
1573 * @sg: scatter gather list for fmr
1574 * @sg_nents: number of sg pages
1575 */
1576 static int i40iw_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg,
1577 int sg_nents, unsigned int *sg_offset)
1578 {
1579 struct i40iw_mr *iwmr = to_iwmr(ibmr);
1580
1581 iwmr->npages = 0;
1582 return ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset, i40iw_set_page);
1583 }
1584
1585 /**
1586 * i40iw_drain_sq - drain the send queue
1587 * @ibqp: ib qp pointer
1588 */
1589 static void i40iw_drain_sq(struct ib_qp *ibqp)
1590 {
1591 struct i40iw_qp *iwqp = to_iwqp(ibqp);
1592 struct i40iw_sc_qp *qp = &iwqp->sc_qp;
1593
1594 if (I40IW_RING_MORE_WORK(qp->qp_uk.sq_ring))
1595 wait_for_completion(&iwqp->sq_drained);
1596 }
1597
1598 /**
1599 * i40iw_drain_rq - drain the receive queue
1600 * @ibqp: ib qp pointer
1601 */
1602 static void i40iw_drain_rq(struct ib_qp *ibqp)
1603 {
1604 struct i40iw_qp *iwqp = to_iwqp(ibqp);
1605 struct i40iw_sc_qp *qp = &iwqp->sc_qp;
1606
1607 if (I40IW_RING_MORE_WORK(qp->qp_uk.rq_ring))
1608 wait_for_completion(&iwqp->rq_drained);
1609 }
1610
1611 /**
1612 * i40iw_hwreg_mr - send cqp command for memory registration
1613 * @iwdev: iwarp device
1614 * @iwmr: iwarp mr pointer
1615 * @access: access for MR
1616 */
1617 static int i40iw_hwreg_mr(struct i40iw_device *iwdev,
1618 struct i40iw_mr *iwmr,
1619 u16 access)
1620 {
1621 struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1622 struct i40iw_reg_ns_stag_info *stag_info;
1623 struct i40iw_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
1624 struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1625 enum i40iw_status_code status;
1626 int err = 0;
1627 struct i40iw_cqp_request *cqp_request;
1628 struct cqp_commands_info *cqp_info;
1629
1630 cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1631 if (!cqp_request)
1632 return -ENOMEM;
1633
1634 cqp_info = &cqp_request->info;
1635 stag_info = &cqp_info->in.u.mr_reg_non_shared.info;
1636 memset(stag_info, 0, sizeof(*stag_info));
1637 stag_info->va = (void *)(unsigned long)iwpbl->user_base;
1638 stag_info->stag_idx = iwmr->stag >> I40IW_CQPSQ_STAG_IDX_SHIFT;
1639 stag_info->stag_key = (u8)iwmr->stag;
1640 stag_info->total_len = iwmr->length;
1641 stag_info->access_rights = access;
1642 stag_info->pd_id = iwpd->sc_pd.pd_id;
1643 stag_info->addr_type = I40IW_ADDR_TYPE_VA_BASED;
1644
1645 if (iwmr->page_cnt > 1) {
1646 if (palloc->level == I40IW_LEVEL_1) {
1647 stag_info->first_pm_pbl_index = palloc->level1.idx;
1648 stag_info->chunk_size = 1;
1649 } else {
1650 stag_info->first_pm_pbl_index = palloc->level2.root.idx;
1651 stag_info->chunk_size = 3;
1652 }
1653 } else {
1654 stag_info->reg_addr_pa = iwmr->pgaddrmem[0];
1655 }
1656
1657 cqp_info->cqp_cmd = OP_MR_REG_NON_SHARED;
1658 cqp_info->post_sq = 1;
1659 cqp_info->in.u.mr_reg_non_shared.dev = &iwdev->sc_dev;
1660 cqp_info->in.u.mr_reg_non_shared.scratch = (uintptr_t)cqp_request;
1661
1662 status = i40iw_handle_cqp_op(iwdev, cqp_request);
1663 if (status) {
1664 err = -ENOMEM;
1665 i40iw_pr_err("CQP-OP MR Reg fail");
1666 }
1667 return err;
1668 }
1669
1670 /**
1671 * i40iw_reg_user_mr - Register a user memory region
1672 * @pd: ptr of pd
1673 * @start: virtual start address
1674 * @length: length of mr
1675 * @virt: virtual address
1676 * @acc: access of mr
1677 * @udata: user data
1678 */
1679 static struct ib_mr *i40iw_reg_user_mr(struct ib_pd *pd,
1680 u64 start,
1681 u64 length,
1682 u64 virt,
1683 int acc,
1684 struct ib_udata *udata)
1685 {
1686 struct i40iw_pd *iwpd = to_iwpd(pd);
1687 struct i40iw_device *iwdev = to_iwdev(pd->device);
1688 struct i40iw_ucontext *ucontext;
1689 struct i40iw_pble_alloc *palloc;
1690 struct i40iw_pbl *iwpbl;
1691 struct i40iw_mr *iwmr;
1692 struct ib_umem *region;
1693 struct i40iw_mem_reg_req req;
1694 u64 pbl_depth = 0;
1695 u32 stag = 0;
1696 u16 access;
1697 u64 region_length;
1698 bool use_pbles = false;
1699 unsigned long flags;
1700 int err = -ENOSYS;
1701
1702 if (length > I40IW_MAX_MR_SIZE)
1703 return ERR_PTR(-EINVAL);
1704 region = ib_umem_get(pd->uobject->context, start, length, acc, 0);
1705 if (IS_ERR(region))
1706 return (struct ib_mr *)region;
1707
1708 if (ib_copy_from_udata(&req, udata, sizeof(req))) {
1709 ib_umem_release(region);
1710 return ERR_PTR(-EFAULT);
1711 }
1712
1713 iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
1714 if (!iwmr) {
1715 ib_umem_release(region);
1716 return ERR_PTR(-ENOMEM);
1717 }
1718
1719 iwpbl = &iwmr->iwpbl;
1720 iwpbl->iwmr = iwmr;
1721 iwmr->region = region;
1722 iwmr->ibmr.pd = pd;
1723 iwmr->ibmr.device = pd->device;
1724 ucontext = to_ucontext(pd->uobject->context);
1725 region_length = region->length + (start & 0xfff);
1726 pbl_depth = region_length >> 12;
1727 pbl_depth += (region_length & (4096 - 1)) ? 1 : 0;
1728 iwmr->length = region->length;
1729
1730 iwpbl->user_base = virt;
1731 palloc = &iwpbl->pble_alloc;
1732
1733 iwmr->type = req.reg_type;
1734 iwmr->page_cnt = (u32)pbl_depth;
1735
1736 switch (req.reg_type) {
1737 case IW_MEMREG_TYPE_QP:
1738 use_pbles = ((req.sq_pages + req.rq_pages) > 2);
1739 err = i40iw_handle_q_mem(iwdev, &req, iwpbl, use_pbles);
1740 if (err)
1741 goto error;
1742 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
1743 list_add_tail(&iwpbl->list, &ucontext->qp_reg_mem_list);
1744 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
1745 break;
1746 case IW_MEMREG_TYPE_CQ:
1747 use_pbles = (req.cq_pages > 1);
1748 err = i40iw_handle_q_mem(iwdev, &req, iwpbl, use_pbles);
1749 if (err)
1750 goto error;
1751
1752 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1753 list_add_tail(&iwpbl->list, &ucontext->cq_reg_mem_list);
1754 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
1755 break;
1756 case IW_MEMREG_TYPE_MEM:
1757 access = I40IW_ACCESS_FLAGS_LOCALREAD;
1758
1759 use_pbles = (iwmr->page_cnt != 1);
1760 err = i40iw_setup_pbles(iwdev, iwmr, use_pbles);
1761 if (err)
1762 goto error;
1763
1764 access |= i40iw_get_user_access(acc);
1765 stag = i40iw_create_stag(iwdev);
1766 if (!stag) {
1767 err = -ENOMEM;
1768 goto error;
1769 }
1770
1771 iwmr->stag = stag;
1772 iwmr->ibmr.rkey = stag;
1773 iwmr->ibmr.lkey = stag;
1774
1775 err = i40iw_hwreg_mr(iwdev, iwmr, access);
1776 if (err) {
1777 i40iw_free_stag(iwdev, stag);
1778 goto error;
1779 }
1780 break;
1781 default:
1782 goto error;
1783 }
1784
1785 iwmr->type = req.reg_type;
1786 if (req.reg_type == IW_MEMREG_TYPE_MEM)
1787 i40iw_add_pdusecount(iwpd);
1788 return &iwmr->ibmr;
1789
1790 error:
1791 if (palloc->level != I40IW_LEVEL_0)
1792 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1793 ib_umem_release(region);
1794 kfree(iwmr);
1795 return ERR_PTR(err);
1796 }
1797
1798 /**
1799 * i40iw_reg_phys_mr - register kernel physical memory
1800 * @pd: ibpd pointer
1801 * @addr: physical address of memory to register
1802 * @size: size of memory to register
1803 * @acc: Access rights
1804 * @iova_start: start of virtual address for physical buffers
1805 */
1806 struct ib_mr *i40iw_reg_phys_mr(struct ib_pd *pd,
1807 u64 addr,
1808 u64 size,
1809 int acc,
1810 u64 *iova_start)
1811 {
1812 struct i40iw_pd *iwpd = to_iwpd(pd);
1813 struct i40iw_device *iwdev = to_iwdev(pd->device);
1814 struct i40iw_pbl *iwpbl;
1815 struct i40iw_mr *iwmr;
1816 enum i40iw_status_code status;
1817 u32 stag;
1818 u16 access = I40IW_ACCESS_FLAGS_LOCALREAD;
1819 int ret;
1820
1821 iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
1822 if (!iwmr)
1823 return ERR_PTR(-ENOMEM);
1824 iwmr->ibmr.pd = pd;
1825 iwmr->ibmr.device = pd->device;
1826 iwpbl = &iwmr->iwpbl;
1827 iwpbl->iwmr = iwmr;
1828 iwmr->type = IW_MEMREG_TYPE_MEM;
1829 iwpbl->user_base = *iova_start;
1830 stag = i40iw_create_stag(iwdev);
1831 if (!stag) {
1832 ret = -EOVERFLOW;
1833 goto err;
1834 }
1835 access |= i40iw_get_user_access(acc);
1836 iwmr->stag = stag;
1837 iwmr->ibmr.rkey = stag;
1838 iwmr->ibmr.lkey = stag;
1839 iwmr->page_cnt = 1;
1840 iwmr->pgaddrmem[0] = addr;
1841 status = i40iw_hwreg_mr(iwdev, iwmr, access);
1842 if (status) {
1843 i40iw_free_stag(iwdev, stag);
1844 ret = -ENOMEM;
1845 goto err;
1846 }
1847
1848 i40iw_add_pdusecount(iwpd);
1849 return &iwmr->ibmr;
1850 err:
1851 kfree(iwmr);
1852 return ERR_PTR(ret);
1853 }
1854
1855 /**
1856 * i40iw_get_dma_mr - register physical mem
1857 * @pd: ptr of pd
1858 * @acc: access for memory
1859 */
1860 static struct ib_mr *i40iw_get_dma_mr(struct ib_pd *pd, int acc)
1861 {
1862 u64 kva = 0;
1863
1864 return i40iw_reg_phys_mr(pd, 0, 0xffffffffffULL, acc, &kva);
1865 }
1866
1867 /**
1868 * i40iw_del_mem_list - Deleting pbl list entries for CQ/QP
1869 * @iwmr: iwmr for IB's user page addresses
1870 * @ucontext: ptr to user context
1871 */
1872 static void i40iw_del_memlist(struct i40iw_mr *iwmr,
1873 struct i40iw_ucontext *ucontext)
1874 {
1875 struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1876 unsigned long flags;
1877
1878 switch (iwmr->type) {
1879 case IW_MEMREG_TYPE_CQ:
1880 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1881 if (!list_empty(&ucontext->cq_reg_mem_list))
1882 list_del(&iwpbl->list);
1883 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
1884 break;
1885 case IW_MEMREG_TYPE_QP:
1886 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
1887 if (!list_empty(&ucontext->qp_reg_mem_list))
1888 list_del(&iwpbl->list);
1889 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
1890 break;
1891 default:
1892 break;
1893 }
1894 }
1895
1896 /**
1897 * i40iw_dereg_mr - deregister mr
1898 * @ib_mr: mr ptr for dereg
1899 */
1900 static int i40iw_dereg_mr(struct ib_mr *ib_mr)
1901 {
1902 struct ib_pd *ibpd = ib_mr->pd;
1903 struct i40iw_pd *iwpd = to_iwpd(ibpd);
1904 struct i40iw_mr *iwmr = to_iwmr(ib_mr);
1905 struct i40iw_device *iwdev = to_iwdev(ib_mr->device);
1906 enum i40iw_status_code status;
1907 struct i40iw_dealloc_stag_info *info;
1908 struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1909 struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1910 struct i40iw_cqp_request *cqp_request;
1911 struct cqp_commands_info *cqp_info;
1912 u32 stag_idx;
1913
1914 if (iwmr->region)
1915 ib_umem_release(iwmr->region);
1916
1917 if (iwmr->type != IW_MEMREG_TYPE_MEM) {
1918 if (ibpd->uobject) {
1919 struct i40iw_ucontext *ucontext;
1920
1921 ucontext = to_ucontext(ibpd->uobject->context);
1922 i40iw_del_memlist(iwmr, ucontext);
1923 }
1924 if (iwpbl->pbl_allocated)
1925 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1926 kfree(iwpbl->iwmr);
1927 iwpbl->iwmr = NULL;
1928 return 0;
1929 }
1930
1931 cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1932 if (!cqp_request)
1933 return -ENOMEM;
1934
1935 cqp_info = &cqp_request->info;
1936 info = &cqp_info->in.u.dealloc_stag.info;
1937 memset(info, 0, sizeof(*info));
1938
1939 info->pd_id = cpu_to_le32(iwpd->sc_pd.pd_id & 0x00007fff);
1940 info->stag_idx = RS_64_1(ib_mr->rkey, I40IW_CQPSQ_STAG_IDX_SHIFT);
1941 stag_idx = info->stag_idx;
1942 info->mr = true;
1943 if (iwpbl->pbl_allocated)
1944 info->dealloc_pbl = true;
1945
1946 cqp_info->cqp_cmd = OP_DEALLOC_STAG;
1947 cqp_info->post_sq = 1;
1948 cqp_info->in.u.dealloc_stag.dev = &iwdev->sc_dev;
1949 cqp_info->in.u.dealloc_stag.scratch = (uintptr_t)cqp_request;
1950 status = i40iw_handle_cqp_op(iwdev, cqp_request);
1951 if (status)
1952 i40iw_pr_err("CQP-OP dealloc failed for stag_idx = 0x%x\n", stag_idx);
1953 i40iw_rem_pdusecount(iwpd, iwdev);
1954 i40iw_free_stag(iwdev, iwmr->stag);
1955 if (iwpbl->pbl_allocated)
1956 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1957 kfree(iwmr);
1958 return 0;
1959 }
1960
1961 /**
1962 * i40iw_show_rev
1963 */
1964 static ssize_t i40iw_show_rev(struct device *dev,
1965 struct device_attribute *attr, char *buf)
1966 {
1967 struct i40iw_ib_device *iwibdev = container_of(dev,
1968 struct i40iw_ib_device,
1969 ibdev.dev);
1970 u32 hw_rev = iwibdev->iwdev->sc_dev.hw_rev;
1971
1972 return sprintf(buf, "%x\n", hw_rev);
1973 }
1974
1975 /**
1976 * i40iw_show_fw_ver
1977 */
1978 static ssize_t i40iw_show_fw_ver(struct device *dev,
1979 struct device_attribute *attr, char *buf)
1980 {
1981 u32 firmware_version = I40IW_FW_VERSION;
1982
1983 return sprintf(buf, "%u.%u\n", firmware_version,
1984 (firmware_version & 0x000000ff));
1985 }
1986
1987 /**
1988 * i40iw_show_hca
1989 */
1990 static ssize_t i40iw_show_hca(struct device *dev,
1991 struct device_attribute *attr, char *buf)
1992 {
1993 return sprintf(buf, "I40IW\n");
1994 }
1995
1996 /**
1997 * i40iw_show_board
1998 */
1999 static ssize_t i40iw_show_board(struct device *dev,
2000 struct device_attribute *attr,
2001 char *buf)
2002 {
2003 return sprintf(buf, "%.*s\n", 32, "I40IW Board ID");
2004 }
2005
2006 static DEVICE_ATTR(hw_rev, S_IRUGO, i40iw_show_rev, NULL);
2007 static DEVICE_ATTR(fw_ver, S_IRUGO, i40iw_show_fw_ver, NULL);
2008 static DEVICE_ATTR(hca_type, S_IRUGO, i40iw_show_hca, NULL);
2009 static DEVICE_ATTR(board_id, S_IRUGO, i40iw_show_board, NULL);
2010
2011 static struct device_attribute *i40iw_dev_attributes[] = {
2012 &dev_attr_hw_rev,
2013 &dev_attr_fw_ver,
2014 &dev_attr_hca_type,
2015 &dev_attr_board_id
2016 };
2017
2018 /**
2019 * i40iw_copy_sg_list - copy sg list for qp
2020 * @sg_list: copied into sg_list
2021 * @sgl: copy from sgl
2022 * @num_sges: count of sg entries
2023 */
2024 static void i40iw_copy_sg_list(struct i40iw_sge *sg_list, struct ib_sge *sgl, int num_sges)
2025 {
2026 unsigned int i;
2027
2028 for (i = 0; (i < num_sges) && (i < I40IW_MAX_WQ_FRAGMENT_COUNT); i++) {
2029 sg_list[i].tag_off = sgl[i].addr;
2030 sg_list[i].len = sgl[i].length;
2031 sg_list[i].stag = sgl[i].lkey;
2032 }
2033 }
2034
2035 /**
2036 * i40iw_post_send - kernel application wr
2037 * @ibqp: qp ptr for wr
2038 * @ib_wr: work request ptr
2039 * @bad_wr: return of bad wr if err
2040 */
2041 static int i40iw_post_send(struct ib_qp *ibqp,
2042 struct ib_send_wr *ib_wr,
2043 struct ib_send_wr **bad_wr)
2044 {
2045 struct i40iw_qp *iwqp;
2046 struct i40iw_qp_uk *ukqp;
2047 struct i40iw_post_sq_info info;
2048 enum i40iw_status_code ret;
2049 int err = 0;
2050 unsigned long flags;
2051 bool inv_stag;
2052
2053 iwqp = (struct i40iw_qp *)ibqp;
2054 ukqp = &iwqp->sc_qp.qp_uk;
2055
2056 spin_lock_irqsave(&iwqp->lock, flags);
2057 while (ib_wr) {
2058 inv_stag = false;
2059 memset(&info, 0, sizeof(info));
2060 info.wr_id = (u64)(ib_wr->wr_id);
2061 if ((ib_wr->send_flags & IB_SEND_SIGNALED) || iwqp->sig_all)
2062 info.signaled = true;
2063 if (ib_wr->send_flags & IB_SEND_FENCE)
2064 info.read_fence = true;
2065
2066 switch (ib_wr->opcode) {
2067 case IB_WR_SEND:
2068 /* fall-through */
2069 case IB_WR_SEND_WITH_INV:
2070 if (ib_wr->opcode == IB_WR_SEND) {
2071 if (ib_wr->send_flags & IB_SEND_SOLICITED)
2072 info.op_type = I40IW_OP_TYPE_SEND_SOL;
2073 else
2074 info.op_type = I40IW_OP_TYPE_SEND;
2075 } else {
2076 if (ib_wr->send_flags & IB_SEND_SOLICITED)
2077 info.op_type = I40IW_OP_TYPE_SEND_SOL_INV;
2078 else
2079 info.op_type = I40IW_OP_TYPE_SEND_INV;
2080 }
2081
2082 if (ib_wr->send_flags & IB_SEND_INLINE) {
2083 info.op.inline_send.data = (void *)(unsigned long)ib_wr->sg_list[0].addr;
2084 info.op.inline_send.len = ib_wr->sg_list[0].length;
2085 ret = ukqp->ops.iw_inline_send(ukqp, &info, ib_wr->ex.invalidate_rkey, false);
2086 } else {
2087 info.op.send.num_sges = ib_wr->num_sge;
2088 info.op.send.sg_list = (struct i40iw_sge *)ib_wr->sg_list;
2089 ret = ukqp->ops.iw_send(ukqp, &info, ib_wr->ex.invalidate_rkey, false);
2090 }
2091
2092 if (ret)
2093 err = -EIO;
2094 break;
2095 case IB_WR_RDMA_WRITE:
2096 info.op_type = I40IW_OP_TYPE_RDMA_WRITE;
2097
2098 if (ib_wr->send_flags & IB_SEND_INLINE) {
2099 info.op.inline_rdma_write.data = (void *)(unsigned long)ib_wr->sg_list[0].addr;
2100 info.op.inline_rdma_write.len = ib_wr->sg_list[0].length;
2101 info.op.inline_rdma_write.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
2102 info.op.inline_rdma_write.rem_addr.stag = rdma_wr(ib_wr)->rkey;
2103 info.op.inline_rdma_write.rem_addr.len = ib_wr->sg_list->length;
2104 ret = ukqp->ops.iw_inline_rdma_write(ukqp, &info, false);
2105 } else {
2106 info.op.rdma_write.lo_sg_list = (void *)ib_wr->sg_list;
2107 info.op.rdma_write.num_lo_sges = ib_wr->num_sge;
2108 info.op.rdma_write.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
2109 info.op.rdma_write.rem_addr.stag = rdma_wr(ib_wr)->rkey;
2110 info.op.rdma_write.rem_addr.len = ib_wr->sg_list->length;
2111 ret = ukqp->ops.iw_rdma_write(ukqp, &info, false);
2112 }
2113
2114 if (ret)
2115 err = -EIO;
2116 break;
2117 case IB_WR_RDMA_READ_WITH_INV:
2118 inv_stag = true;
2119 /* fall-through*/
2120 case IB_WR_RDMA_READ:
2121 if (ib_wr->num_sge > I40IW_MAX_SGE_RD) {
2122 err = -EINVAL;
2123 break;
2124 }
2125 info.op_type = I40IW_OP_TYPE_RDMA_READ;
2126 info.op.rdma_read.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
2127 info.op.rdma_read.rem_addr.stag = rdma_wr(ib_wr)->rkey;
2128 info.op.rdma_read.rem_addr.len = ib_wr->sg_list->length;
2129 info.op.rdma_read.lo_addr.tag_off = ib_wr->sg_list->addr;
2130 info.op.rdma_read.lo_addr.stag = ib_wr->sg_list->lkey;
2131 info.op.rdma_read.lo_addr.len = ib_wr->sg_list->length;
2132 ret = ukqp->ops.iw_rdma_read(ukqp, &info, inv_stag, false);
2133 if (ret)
2134 err = -EIO;
2135 break;
2136 case IB_WR_LOCAL_INV:
2137 info.op_type = I40IW_OP_TYPE_INV_STAG;
2138 info.op.inv_local_stag.target_stag = ib_wr->ex.invalidate_rkey;
2139 ret = ukqp->ops.iw_stag_local_invalidate(ukqp, &info, true);
2140 if (ret)
2141 err = -EIO;
2142 break;
2143 case IB_WR_REG_MR:
2144 {
2145 struct i40iw_mr *iwmr = to_iwmr(reg_wr(ib_wr)->mr);
2146 int page_shift = ilog2(reg_wr(ib_wr)->mr->page_size);
2147 int flags = reg_wr(ib_wr)->access;
2148 struct i40iw_pble_alloc *palloc = &iwmr->iwpbl.pble_alloc;
2149 struct i40iw_sc_dev *dev = &iwqp->iwdev->sc_dev;
2150 struct i40iw_fast_reg_stag_info info;
2151
2152 info.access_rights = I40IW_ACCESS_FLAGS_LOCALREAD;
2153 info.access_rights |= i40iw_get_user_access(flags);
2154 info.stag_key = reg_wr(ib_wr)->key & 0xff;
2155 info.stag_idx = reg_wr(ib_wr)->key >> 8;
2156 info.wr_id = ib_wr->wr_id;
2157
2158 info.addr_type = I40IW_ADDR_TYPE_VA_BASED;
2159 info.va = (void *)(uintptr_t)iwmr->ibmr.iova;
2160 info.total_len = iwmr->ibmr.length;
2161 info.first_pm_pbl_index = palloc->level1.idx;
2162 info.local_fence = ib_wr->send_flags & IB_SEND_FENCE;
2163 info.signaled = ib_wr->send_flags & IB_SEND_SIGNALED;
2164
2165 if (page_shift == 21)
2166 info.page_size = 1; /* 2M page */
2167
2168 ret = dev->iw_priv_qp_ops->iw_mr_fast_register(&iwqp->sc_qp, &info, true);
2169 if (ret)
2170 err = -EIO;
2171 break;
2172 }
2173 default:
2174 err = -EINVAL;
2175 i40iw_pr_err(" upost_send bad opcode = 0x%x\n",
2176 ib_wr->opcode);
2177 break;
2178 }
2179
2180 if (err)
2181 break;
2182 ib_wr = ib_wr->next;
2183 }
2184
2185 if (err)
2186 *bad_wr = ib_wr;
2187 else
2188 ukqp->ops.iw_qp_post_wr(ukqp);
2189 spin_unlock_irqrestore(&iwqp->lock, flags);
2190
2191 return err;
2192 }
2193
2194 /**
2195 * i40iw_post_recv - post receive wr for kernel application
2196 * @ibqp: ib qp pointer
2197 * @ib_wr: work request for receive
2198 * @bad_wr: bad wr caused an error
2199 */
2200 static int i40iw_post_recv(struct ib_qp *ibqp,
2201 struct ib_recv_wr *ib_wr,
2202 struct ib_recv_wr **bad_wr)
2203 {
2204 struct i40iw_qp *iwqp;
2205 struct i40iw_qp_uk *ukqp;
2206 struct i40iw_post_rq_info post_recv;
2207 struct i40iw_sge sg_list[I40IW_MAX_WQ_FRAGMENT_COUNT];
2208 enum i40iw_status_code ret = 0;
2209 unsigned long flags;
2210
2211 iwqp = (struct i40iw_qp *)ibqp;
2212 ukqp = &iwqp->sc_qp.qp_uk;
2213
2214 memset(&post_recv, 0, sizeof(post_recv));
2215 spin_lock_irqsave(&iwqp->lock, flags);
2216 while (ib_wr) {
2217 post_recv.num_sges = ib_wr->num_sge;
2218 post_recv.wr_id = ib_wr->wr_id;
2219 i40iw_copy_sg_list(sg_list, ib_wr->sg_list, ib_wr->num_sge);
2220 post_recv.sg_list = sg_list;
2221 ret = ukqp->ops.iw_post_receive(ukqp, &post_recv);
2222 if (ret) {
2223 i40iw_pr_err(" post_recv err %d\n", ret);
2224 *bad_wr = ib_wr;
2225 goto out;
2226 }
2227 ib_wr = ib_wr->next;
2228 }
2229 out:
2230 spin_unlock_irqrestore(&iwqp->lock, flags);
2231 if (ret)
2232 return -ENOSYS;
2233 return 0;
2234 }
2235
2236 /**
2237 * i40iw_poll_cq - poll cq for completion (kernel apps)
2238 * @ibcq: cq to poll
2239 * @num_entries: number of entries to poll
2240 * @entry: wr of entry completed
2241 */
2242 static int i40iw_poll_cq(struct ib_cq *ibcq,
2243 int num_entries,
2244 struct ib_wc *entry)
2245 {
2246 struct i40iw_cq *iwcq;
2247 int cqe_count = 0;
2248 struct i40iw_cq_poll_info cq_poll_info;
2249 enum i40iw_status_code ret;
2250 struct i40iw_cq_uk *ukcq;
2251 struct i40iw_sc_qp *qp;
2252 struct i40iw_qp *iwqp;
2253 unsigned long flags;
2254
2255 iwcq = (struct i40iw_cq *)ibcq;
2256 ukcq = &iwcq->sc_cq.cq_uk;
2257
2258 spin_lock_irqsave(&iwcq->lock, flags);
2259 while (cqe_count < num_entries) {
2260 ret = ukcq->ops.iw_cq_poll_completion(ukcq, &cq_poll_info, true);
2261 if (ret == I40IW_ERR_QUEUE_EMPTY) {
2262 break;
2263 } else if (ret == I40IW_ERR_QUEUE_DESTROYED) {
2264 continue;
2265 } else if (ret) {
2266 if (!cqe_count)
2267 cqe_count = -1;
2268 break;
2269 }
2270 entry->wc_flags = 0;
2271 entry->wr_id = cq_poll_info.wr_id;
2272 if (cq_poll_info.error) {
2273 entry->status = IB_WC_WR_FLUSH_ERR;
2274 entry->vendor_err = cq_poll_info.major_err << 16 | cq_poll_info.minor_err;
2275 } else {
2276 entry->status = IB_WC_SUCCESS;
2277 }
2278
2279 switch (cq_poll_info.op_type) {
2280 case I40IW_OP_TYPE_RDMA_WRITE:
2281 entry->opcode = IB_WC_RDMA_WRITE;
2282 break;
2283 case I40IW_OP_TYPE_RDMA_READ_INV_STAG:
2284 case I40IW_OP_TYPE_RDMA_READ:
2285 entry->opcode = IB_WC_RDMA_READ;
2286 break;
2287 case I40IW_OP_TYPE_SEND_SOL:
2288 case I40IW_OP_TYPE_SEND_SOL_INV:
2289 case I40IW_OP_TYPE_SEND_INV:
2290 case I40IW_OP_TYPE_SEND:
2291 entry->opcode = IB_WC_SEND;
2292 break;
2293 case I40IW_OP_TYPE_REC:
2294 entry->opcode = IB_WC_RECV;
2295 break;
2296 default:
2297 entry->opcode = IB_WC_RECV;
2298 break;
2299 }
2300
2301 entry->ex.imm_data = 0;
2302 qp = (struct i40iw_sc_qp *)cq_poll_info.qp_handle;
2303 entry->qp = (struct ib_qp *)qp->back_qp;
2304 entry->src_qp = cq_poll_info.qp_id;
2305 iwqp = (struct i40iw_qp *)qp->back_qp;
2306 if (iwqp->iwarp_state > I40IW_QP_STATE_RTS) {
2307 if (!I40IW_RING_MORE_WORK(qp->qp_uk.sq_ring))
2308 complete(&iwqp->sq_drained);
2309 if (!I40IW_RING_MORE_WORK(qp->qp_uk.rq_ring))
2310 complete(&iwqp->rq_drained);
2311 }
2312 entry->byte_len = cq_poll_info.bytes_xfered;
2313 entry++;
2314 cqe_count++;
2315 }
2316 spin_unlock_irqrestore(&iwcq->lock, flags);
2317 return cqe_count;
2318 }
2319
2320 /**
2321 * i40iw_req_notify_cq - arm cq kernel application
2322 * @ibcq: cq to arm
2323 * @notify_flags: notofication flags
2324 */
2325 static int i40iw_req_notify_cq(struct ib_cq *ibcq,
2326 enum ib_cq_notify_flags notify_flags)
2327 {
2328 struct i40iw_cq *iwcq;
2329 struct i40iw_cq_uk *ukcq;
2330 enum i40iw_completion_notify cq_notify = IW_CQ_COMPL_SOLICITED;
2331
2332 iwcq = (struct i40iw_cq *)ibcq;
2333 ukcq = &iwcq->sc_cq.cq_uk;
2334 if (notify_flags == IB_CQ_NEXT_COMP)
2335 cq_notify = IW_CQ_COMPL_EVENT;
2336 ukcq->ops.iw_cq_request_notification(ukcq, cq_notify);
2337 return 0;
2338 }
2339
2340 /**
2341 * i40iw_port_immutable - return port's immutable data
2342 * @ibdev: ib dev struct
2343 * @port_num: port number
2344 * @immutable: immutable data for the port return
2345 */
2346 static int i40iw_port_immutable(struct ib_device *ibdev, u8 port_num,
2347 struct ib_port_immutable *immutable)
2348 {
2349 struct ib_port_attr attr;
2350 int err;
2351
2352 err = i40iw_query_port(ibdev, port_num, &attr);
2353
2354 if (err)
2355 return err;
2356
2357 immutable->pkey_tbl_len = attr.pkey_tbl_len;
2358 immutable->gid_tbl_len = attr.gid_tbl_len;
2359 immutable->core_cap_flags = RDMA_CORE_PORT_IWARP;
2360
2361 return 0;
2362 }
2363
2364 /**
2365 * i40iw_get_protocol_stats - Populates the rdma_stats structure
2366 * @ibdev: ib dev struct
2367 * @stats: iw protocol stats struct
2368 */
2369 static int i40iw_get_protocol_stats(struct ib_device *ibdev,
2370 union rdma_protocol_stats *stats)
2371 {
2372 struct i40iw_device *iwdev = to_iwdev(ibdev);
2373 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
2374 struct i40iw_dev_pestat *devstat = &dev->dev_pestat;
2375 struct i40iw_dev_hw_stats *hw_stats = &devstat->hw_stats;
2376 struct timespec curr_time;
2377 static struct timespec last_rd_time = {0, 0};
2378 unsigned long flags;
2379
2380 curr_time = current_kernel_time();
2381 memset(stats, 0, sizeof(*stats));
2382
2383 if (dev->is_pf) {
2384 spin_lock_irqsave(&devstat->stats_lock, flags);
2385 devstat->ops.iw_hw_stat_read_all(devstat,
2386 &devstat->hw_stats);
2387 spin_unlock_irqrestore(&devstat->stats_lock, flags);
2388 } else {
2389 if (((u64)curr_time.tv_sec - (u64)last_rd_time.tv_sec) > 1)
2390 if (i40iw_vchnl_vf_get_pe_stats(dev, &devstat->hw_stats))
2391 return -ENOSYS;
2392 }
2393
2394 stats->iw.ipInReceives = hw_stats->stat_value_64[I40IW_HW_STAT_INDEX_IP4RXPKTS] +
2395 hw_stats->stat_value_64[I40IW_HW_STAT_INDEX_IP6RXPKTS];
2396 stats->iw.ipInTruncatedPkts = hw_stats->stat_value_32[I40IW_HW_STAT_INDEX_IP4RXTRUNC] +
2397 hw_stats->stat_value_32[I40IW_HW_STAT_INDEX_IP6RXTRUNC];
2398 stats->iw.ipInDiscards = hw_stats->stat_value_32[I40IW_HW_STAT_INDEX_IP4RXDISCARD] +
2399 hw_stats->stat_value_32[I40IW_HW_STAT_INDEX_IP6RXDISCARD];
2400 stats->iw.ipOutNoRoutes = hw_stats->stat_value_32[I40IW_HW_STAT_INDEX_IP4TXNOROUTE] +
2401 hw_stats->stat_value_32[I40IW_HW_STAT_INDEX_IP6TXNOROUTE];
2402 stats->iw.ipReasmReqds = hw_stats->stat_value_64[I40IW_HW_STAT_INDEX_IP4RXFRAGS] +
2403 hw_stats->stat_value_64[I40IW_HW_STAT_INDEX_IP6RXFRAGS];
2404 stats->iw.ipFragCreates = hw_stats->stat_value_64[I40IW_HW_STAT_INDEX_IP4TXFRAGS] +
2405 hw_stats->stat_value_64[I40IW_HW_STAT_INDEX_IP6TXFRAGS];
2406 stats->iw.ipInMcastPkts = hw_stats->stat_value_64[I40IW_HW_STAT_INDEX_IP4RXMCPKTS] +
2407 hw_stats->stat_value_64[I40IW_HW_STAT_INDEX_IP6RXMCPKTS];
2408 stats->iw.ipOutMcastPkts = hw_stats->stat_value_64[I40IW_HW_STAT_INDEX_IP4TXMCPKTS] +
2409 hw_stats->stat_value_64[I40IW_HW_STAT_INDEX_IP6TXMCPKTS];
2410 stats->iw.tcpOutSegs = hw_stats->stat_value_64[I40IW_HW_STAT_INDEX_TCPTXSEG];
2411 stats->iw.tcpInSegs = hw_stats->stat_value_64[I40IW_HW_STAT_INDEX_TCPRXSEGS];
2412 stats->iw.tcpRetransSegs = hw_stats->stat_value_32[I40IW_HW_STAT_INDEX_TCPRTXSEG];
2413
2414 last_rd_time = curr_time;
2415 return 0;
2416 }
2417
2418 /**
2419 * i40iw_query_gid - Query port GID
2420 * @ibdev: device pointer from stack
2421 * @port: port number
2422 * @index: Entry index
2423 * @gid: Global ID
2424 */
2425 static int i40iw_query_gid(struct ib_device *ibdev,
2426 u8 port,
2427 int index,
2428 union ib_gid *gid)
2429 {
2430 struct i40iw_device *iwdev = to_iwdev(ibdev);
2431
2432 memset(gid->raw, 0, sizeof(gid->raw));
2433 ether_addr_copy(gid->raw, iwdev->netdev->dev_addr);
2434 return 0;
2435 }
2436
2437 /**
2438 * i40iw_modify_port Modify port properties
2439 * @ibdev: device pointer from stack
2440 * @port: port number
2441 * @port_modify_mask: mask for port modifications
2442 * @props: port properties
2443 */
2444 static int i40iw_modify_port(struct ib_device *ibdev,
2445 u8 port,
2446 int port_modify_mask,
2447 struct ib_port_modify *props)
2448 {
2449 return 0;
2450 }
2451
2452 /**
2453 * i40iw_query_pkey - Query partition key
2454 * @ibdev: device pointer from stack
2455 * @port: port number
2456 * @index: index of pkey
2457 * @pkey: pointer to store the pkey
2458 */
2459 static int i40iw_query_pkey(struct ib_device *ibdev,
2460 u8 port,
2461 u16 index,
2462 u16 *pkey)
2463 {
2464 *pkey = 0;
2465 return 0;
2466 }
2467
2468 /**
2469 * i40iw_create_ah - create address handle
2470 * @ibpd: ptr of pd
2471 * @ah_attr: address handle attributes
2472 */
2473 static struct ib_ah *i40iw_create_ah(struct ib_pd *ibpd,
2474 struct ib_ah_attr *attr)
2475 {
2476 return ERR_PTR(-ENOSYS);
2477 }
2478
2479 /**
2480 * i40iw_destroy_ah - Destroy address handle
2481 * @ah: pointer to address handle
2482 */
2483 static int i40iw_destroy_ah(struct ib_ah *ah)
2484 {
2485 return -ENOSYS;
2486 }
2487
2488 /**
2489 * i40iw_init_rdma_device - initialization of iwarp device
2490 * @iwdev: iwarp device
2491 */
2492 static struct i40iw_ib_device *i40iw_init_rdma_device(struct i40iw_device *iwdev)
2493 {
2494 struct i40iw_ib_device *iwibdev;
2495 struct net_device *netdev = iwdev->netdev;
2496 struct pci_dev *pcidev = (struct pci_dev *)iwdev->hw.dev_context;
2497
2498 iwibdev = (struct i40iw_ib_device *)ib_alloc_device(sizeof(*iwibdev));
2499 if (!iwibdev) {
2500 i40iw_pr_err("iwdev == NULL\n");
2501 return NULL;
2502 }
2503 strlcpy(iwibdev->ibdev.name, "i40iw%d", IB_DEVICE_NAME_MAX);
2504 iwibdev->ibdev.owner = THIS_MODULE;
2505 iwdev->iwibdev = iwibdev;
2506 iwibdev->iwdev = iwdev;
2507
2508 iwibdev->ibdev.node_type = RDMA_NODE_RNIC;
2509 ether_addr_copy((u8 *)&iwibdev->ibdev.node_guid, netdev->dev_addr);
2510
2511 iwibdev->ibdev.uverbs_cmd_mask =
2512 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
2513 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
2514 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
2515 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
2516 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
2517 (1ull << IB_USER_VERBS_CMD_REG_MR) |
2518 (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
2519 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
2520 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
2521 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
2522 (1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ) |
2523 (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
2524 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
2525 (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
2526 (1ull << IB_USER_VERBS_CMD_POLL_CQ) |
2527 (1ull << IB_USER_VERBS_CMD_CREATE_AH) |
2528 (1ull << IB_USER_VERBS_CMD_DESTROY_AH) |
2529 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
2530 (1ull << IB_USER_VERBS_CMD_POST_RECV) |
2531 (1ull << IB_USER_VERBS_CMD_POST_SEND);
2532 iwibdev->ibdev.phys_port_cnt = 1;
2533 iwibdev->ibdev.num_comp_vectors = 1;
2534 iwibdev->ibdev.dma_device = &pcidev->dev;
2535 iwibdev->ibdev.dev.parent = &pcidev->dev;
2536 iwibdev->ibdev.query_port = i40iw_query_port;
2537 iwibdev->ibdev.modify_port = i40iw_modify_port;
2538 iwibdev->ibdev.query_pkey = i40iw_query_pkey;
2539 iwibdev->ibdev.query_gid = i40iw_query_gid;
2540 iwibdev->ibdev.alloc_ucontext = i40iw_alloc_ucontext;
2541 iwibdev->ibdev.dealloc_ucontext = i40iw_dealloc_ucontext;
2542 iwibdev->ibdev.mmap = i40iw_mmap;
2543 iwibdev->ibdev.alloc_pd = i40iw_alloc_pd;
2544 iwibdev->ibdev.dealloc_pd = i40iw_dealloc_pd;
2545 iwibdev->ibdev.create_qp = i40iw_create_qp;
2546 iwibdev->ibdev.modify_qp = i40iw_modify_qp;
2547 iwibdev->ibdev.query_qp = i40iw_query_qp;
2548 iwibdev->ibdev.destroy_qp = i40iw_destroy_qp;
2549 iwibdev->ibdev.create_cq = i40iw_create_cq;
2550 iwibdev->ibdev.destroy_cq = i40iw_destroy_cq;
2551 iwibdev->ibdev.get_dma_mr = i40iw_get_dma_mr;
2552 iwibdev->ibdev.reg_user_mr = i40iw_reg_user_mr;
2553 iwibdev->ibdev.dereg_mr = i40iw_dereg_mr;
2554 iwibdev->ibdev.get_protocol_stats = i40iw_get_protocol_stats;
2555 iwibdev->ibdev.query_device = i40iw_query_device;
2556 iwibdev->ibdev.create_ah = i40iw_create_ah;
2557 iwibdev->ibdev.destroy_ah = i40iw_destroy_ah;
2558 iwibdev->ibdev.drain_sq = i40iw_drain_sq;
2559 iwibdev->ibdev.drain_rq = i40iw_drain_rq;
2560 iwibdev->ibdev.alloc_mr = i40iw_alloc_mr;
2561 iwibdev->ibdev.map_mr_sg = i40iw_map_mr_sg;
2562 iwibdev->ibdev.iwcm = kzalloc(sizeof(*iwibdev->ibdev.iwcm), GFP_KERNEL);
2563 if (!iwibdev->ibdev.iwcm) {
2564 ib_dealloc_device(&iwibdev->ibdev);
2565 i40iw_pr_err("iwcm == NULL\n");
2566 return NULL;
2567 }
2568
2569 iwibdev->ibdev.iwcm->add_ref = i40iw_add_ref;
2570 iwibdev->ibdev.iwcm->rem_ref = i40iw_rem_ref;
2571 iwibdev->ibdev.iwcm->get_qp = i40iw_get_qp;
2572 iwibdev->ibdev.iwcm->connect = i40iw_connect;
2573 iwibdev->ibdev.iwcm->accept = i40iw_accept;
2574 iwibdev->ibdev.iwcm->reject = i40iw_reject;
2575 iwibdev->ibdev.iwcm->create_listen = i40iw_create_listen;
2576 iwibdev->ibdev.iwcm->destroy_listen = i40iw_destroy_listen;
2577 memcpy(iwibdev->ibdev.iwcm->ifname, netdev->name,
2578 sizeof(iwibdev->ibdev.iwcm->ifname));
2579 iwibdev->ibdev.get_port_immutable = i40iw_port_immutable;
2580 iwibdev->ibdev.poll_cq = i40iw_poll_cq;
2581 iwibdev->ibdev.req_notify_cq = i40iw_req_notify_cq;
2582 iwibdev->ibdev.post_send = i40iw_post_send;
2583 iwibdev->ibdev.post_recv = i40iw_post_recv;
2584
2585 return iwibdev;
2586 }
2587
2588 /**
2589 * i40iw_port_ibevent - indicate port event
2590 * @iwdev: iwarp device
2591 */
2592 void i40iw_port_ibevent(struct i40iw_device *iwdev)
2593 {
2594 struct i40iw_ib_device *iwibdev = iwdev->iwibdev;
2595 struct ib_event event;
2596
2597 event.device = &iwibdev->ibdev;
2598 event.element.port_num = 1;
2599 event.event = iwdev->iw_status ? IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
2600 ib_dispatch_event(&event);
2601 }
2602
2603 /**
2604 * i40iw_unregister_rdma_device - unregister of iwarp from IB
2605 * @iwibdev: rdma device ptr
2606 */
2607 static void i40iw_unregister_rdma_device(struct i40iw_ib_device *iwibdev)
2608 {
2609 int i;
2610
2611 for (i = 0; i < ARRAY_SIZE(i40iw_dev_attributes); ++i)
2612 device_remove_file(&iwibdev->ibdev.dev,
2613 i40iw_dev_attributes[i]);
2614 ib_unregister_device(&iwibdev->ibdev);
2615 }
2616
2617 /**
2618 * i40iw_destroy_rdma_device - destroy rdma device and free resources
2619 * @iwibdev: IB device ptr
2620 */
2621 void i40iw_destroy_rdma_device(struct i40iw_ib_device *iwibdev)
2622 {
2623 if (!iwibdev)
2624 return;
2625
2626 i40iw_unregister_rdma_device(iwibdev);
2627 kfree(iwibdev->ibdev.iwcm);
2628 iwibdev->ibdev.iwcm = NULL;
2629 ib_dealloc_device(&iwibdev->ibdev);
2630 }
2631
2632 /**
2633 * i40iw_register_rdma_device - register iwarp device to IB
2634 * @iwdev: iwarp device
2635 */
2636 int i40iw_register_rdma_device(struct i40iw_device *iwdev)
2637 {
2638 int i, ret;
2639 struct i40iw_ib_device *iwibdev;
2640
2641 iwdev->iwibdev = i40iw_init_rdma_device(iwdev);
2642 if (!iwdev->iwibdev)
2643 return -ENOSYS;
2644 iwibdev = iwdev->iwibdev;
2645
2646 ret = ib_register_device(&iwibdev->ibdev, NULL);
2647 if (ret)
2648 goto error;
2649
2650 for (i = 0; i < ARRAY_SIZE(i40iw_dev_attributes); ++i) {
2651 ret =
2652 device_create_file(&iwibdev->ibdev.dev,
2653 i40iw_dev_attributes[i]);
2654 if (ret) {
2655 while (i > 0) {
2656 i--;
2657 device_remove_file(&iwibdev->ibdev.dev, i40iw_dev_attributes[i]);
2658 }
2659 ib_unregister_device(&iwibdev->ibdev);
2660 goto error;
2661 }
2662 }
2663 return 0;
2664 error:
2665 kfree(iwdev->iwibdev->ibdev.iwcm);
2666 iwdev->iwibdev->ibdev.iwcm = NULL;
2667 ib_dealloc_device(&iwdev->iwibdev->ibdev);
2668 return -ENOSYS;
2669 }
Linux kernel - Deliverables
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