drivers/infiniband/hw/nes/nes.h

   1 /*
   2  * Copyright (c) 2006 - 2011 Intel Corporation.  All rights reserved.
   3  * Copyright (c) 2005 Open Grid Computing, Inc. All rights reserved.
   4  *
   5  * This software is available to you under a choice of one of two
   6  * licenses.  You may choose to be licensed under the terms of the GNU
   7  * General Public License (GPL) Version 2, available from the file
   8  * COPYING in the main directory of this source tree, or the
   9  * OpenIB.org BSD license below:
  10  *
  11  *     Redistribution and use in source and binary forms, with or
  12  *     without modification, are permitted provided that the following
  13  *     conditions are met:
  14  *
  15  *      - Redistributions of source code must retain the above
  16  *        copyright notice, this list of conditions and the following
  17  *        disclaimer.
  18  *
  19  *      - Redistributions in binary form must reproduce the above
  20  *        copyright notice, this list of conditions and the following
  21  *        disclaimer in the documentation and/or other materials
  22  *        provided with the distribution.
  23  *
  24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31  * SOFTWARE.
  32  */
  33
  34 #ifndef __NES_H
  35 #define __NES_H
  36
  37 #include <linux/netdevice.h>
  38 #include <linux/inetdevice.h>
  39 #include <linux/spinlock.h>
  40 #include <linux/kernel.h>
  41 #include <linux/delay.h>
  42 #include <linux/pci.h>
  43 #include <linux/dma-mapping.h>
  44 #include <linux/workqueue.h>
  45 #include <linux/slab.h>
  46 #include <asm/io.h>
  47 #include <linux/crc32c.h>
  48
  49 #include <rdma/ib_smi.h>
  50 #include <rdma/ib_verbs.h>
  51 #include <rdma/ib_pack.h>
  52 #include <rdma/rdma_cm.h>
  53 #include <rdma/iw_cm.h>
  54 #include <rdma/rdma_netlink.h>
  55 #include <rdma/iw_portmap.h>
  56
  57 #define NES_SEND_FIRST_WRITE
  58
  59 #define QUEUE_DISCONNECTS
  60
  61 #define DRV_NAME    "iw_nes"
  62 #define DRV_VERSION "1.5.0.1"
  63 #define PFX         DRV_NAME ": "
  64
  65 /*
  66  * NetEffect PCI vendor id and NE010 PCI device id.
  67  */
  68 #ifndef PCI_VENDOR_ID_NETEFFECT /* not in pci.ids yet */
  69 #define PCI_VENDOR_ID_NETEFFECT          0x1678
  70 #define PCI_DEVICE_ID_NETEFFECT_NE020    0x0100
  71 #define PCI_DEVICE_ID_NETEFFECT_NE020_KR 0x0110
  72 #endif
  73
  74 #define NE020_REV   4
  75 #define NE020_REV1  5
  76
  77 #define BAR_0       0
  78 #define BAR_1       2
  79
  80 #define RX_BUF_SIZE             (1536 + 8)
  81 #define NES_REG0_SIZE           (4 * 1024)
  82 #define NES_TX_TIMEOUT          (6*HZ)
  83 #define NES_FIRST_QPN           64
  84 #define NES_SW_CONTEXT_ALIGN    1024
  85
  86 #define NES_NIC_MAX_NICS        16
  87 #define NES_MAX_ARP_TABLE_SIZE  4096
  88
  89 #define NES_NIC_CEQ_SIZE        8
  90 /* NICs will be on a separate CQ */
  91 #define NES_CCEQ_SIZE ((nesadapter->max_cq / nesadapter->port_count) - 32)
  92
  93 #define NES_MAX_PORT_COUNT 4
  94
  95 #define MAX_DPC_ITERATIONS               128
  96
  97 #define NES_DRV_OPT_ENABLE_MPA_VER_0     0x00000001
  98 #define NES_DRV_OPT_DISABLE_MPA_CRC      0x00000002
  99 #define NES_DRV_OPT_DISABLE_FIRST_WRITE  0x00000004
 100 #define NES_DRV_OPT_DISABLE_INTF         0x00000008
 101 #define NES_DRV_OPT_ENABLE_MSI           0x00000010
 102 #define NES_DRV_OPT_DUAL_LOGICAL_PORT    0x00000020
 103 #define NES_DRV_OPT_SUPRESS_OPTION_BC    0x00000040
 104 #define NES_DRV_OPT_NO_INLINE_DATA       0x00000080
 105 #define NES_DRV_OPT_DISABLE_INT_MOD      0x00000100
 106 #define NES_DRV_OPT_DISABLE_VIRT_WQ      0x00000200
 107 #define NES_DRV_OPT_ENABLE_PAU           0x00000400
 108
 109 #define NES_AEQ_EVENT_TIMEOUT         2500
 110 #define NES_DISCONNECT_EVENT_TIMEOUT  2000
 111
 112 /* debug levels */
 113 /* must match userspace */
 114 #define NES_DBG_HW          0x00000001
 115 #define NES_DBG_INIT        0x00000002
 116 #define NES_DBG_ISR         0x00000004
 117 #define NES_DBG_PHY         0x00000008
 118 #define NES_DBG_NETDEV      0x00000010
 119 #define NES_DBG_CM          0x00000020
 120 #define NES_DBG_CM1         0x00000040
 121 #define NES_DBG_NIC_RX      0x00000080
 122 #define NES_DBG_NIC_TX      0x00000100
 123 #define NES_DBG_CQP         0x00000200
 124 #define NES_DBG_MMAP        0x00000400
 125 #define NES_DBG_MR          0x00000800
 126 #define NES_DBG_PD          0x00001000
 127 #define NES_DBG_CQ          0x00002000
 128 #define NES_DBG_QP          0x00004000
 129 #define NES_DBG_MOD_QP      0x00008000
 130 #define NES_DBG_AEQ         0x00010000
 131 #define NES_DBG_IW_RX       0x00020000
 132 #define NES_DBG_IW_TX       0x00040000
 133 #define NES_DBG_SHUTDOWN    0x00080000
 134 #define NES_DBG_PAU         0x00100000
 135 #define NES_DBG_NLMSG       0x00200000
 136 #define NES_DBG_RSVD1       0x10000000
 137 #define NES_DBG_RSVD2       0x20000000
 138 #define NES_DBG_RSVD3       0x40000000
 139 #define NES_DBG_RSVD4       0x80000000
 140 #define NES_DBG_ALL         0xffffffff
 141
 142 #ifdef CONFIG_INFINIBAND_NES_DEBUG
 143 #define nes_debug(level, fmt, args...) \
 144 do { \
 145         if (level & nes_debug_level) \
 146                 printk(KERN_ERR PFX "%s[%u]: " fmt, __func__, __LINE__, ##args); \
 147 } while (0)
 148
 149 #define assert(expr) \
 150 do { \
 151         if (!(expr)) { \
 152                 printk(KERN_ERR PFX "Assertion failed! %s, %s, %s, line %d\n", \
 153                            #expr, __FILE__, __func__, __LINE__); \
 154         } \
 155 } while (0)
 156
 157 #define NES_EVENT_TIMEOUT   1200000
 158 #else
 159 #define nes_debug(level, fmt, args...)
 160 #define assert(expr)          do {} while (0)
 161
 162 #define NES_EVENT_TIMEOUT   100000
 163 #endif
 164
 165 #include "nes_hw.h"
 166 #include "nes_verbs.h"
 167 #include "nes_context.h"
 168 #include "nes_user.h"
 169 #include "nes_cm.h"
 170 #include "nes_mgt.h"
 171
 172 extern int max_mtu;
 173 #define max_frame_len (max_mtu+ETH_HLEN)
 174 extern int interrupt_mod_interval;
 175 extern int nes_if_count;
 176 extern int mpa_version;
 177 extern int disable_mpa_crc;
 178 extern unsigned int nes_drv_opt;
 179 extern unsigned int nes_debug_level;
 180 extern unsigned int wqm_quanta;
 181 extern struct list_head nes_adapter_list;
 182
 183 extern atomic_t cm_connects;
 184 extern atomic_t cm_accepts;
 185 extern atomic_t cm_disconnects;
 186 extern atomic_t cm_closes;
 187 extern atomic_t cm_connecteds;
 188 extern atomic_t cm_connect_reqs;
 189 extern atomic_t cm_rejects;
 190 extern atomic_t mod_qp_timouts;
 191 extern atomic_t qps_created;
 192 extern atomic_t qps_destroyed;
 193 extern atomic_t sw_qps_destroyed;
 194 extern u32 mh_detected;
 195 extern u32 mh_pauses_sent;
 196 extern u32 cm_packets_sent;
 197 extern u32 cm_packets_bounced;
 198 extern u32 cm_packets_created;
 199 extern u32 cm_packets_received;
 200 extern u32 cm_packets_dropped;
 201 extern u32 cm_packets_retrans;
 202 extern atomic_t cm_listens_created;
 203 extern atomic_t cm_listens_destroyed;
 204 extern u32 cm_backlog_drops;
 205 extern atomic_t cm_loopbacks;
 206 extern atomic_t cm_nodes_created;
 207 extern atomic_t cm_nodes_destroyed;
 208 extern atomic_t cm_accel_dropped_pkts;
 209 extern atomic_t cm_resets_recvd;
 210 extern atomic_t pau_qps_created;
 211 extern atomic_t pau_qps_destroyed;
 212
 213 extern u32 int_mod_timer_init;
 214 extern u32 int_mod_cq_depth_256;
 215 extern u32 int_mod_cq_depth_128;
 216 extern u32 int_mod_cq_depth_32;
 217 extern u32 int_mod_cq_depth_24;
 218 extern u32 int_mod_cq_depth_16;
 219 extern u32 int_mod_cq_depth_4;
 220 extern u32 int_mod_cq_depth_1;
 221
 222 struct nes_device {
 223         struct nes_adapter         *nesadapter;
 224         void __iomem           *regs;
 225         void __iomem           *index_reg;
 226         struct pci_dev         *pcidev;
 227         struct net_device      *netdev[NES_NIC_MAX_NICS];
 228         u64                    link_status_interrupts;
 229         struct tasklet_struct  dpc_tasklet;
 230         spinlock_t             indexed_regs_lock;
 231         unsigned long          csr_start;
 232         unsigned long          doorbell_region;
 233         unsigned long          doorbell_start;
 234         unsigned long          mac_tx_errors;
 235         unsigned long          mac_pause_frames_sent;
 236         unsigned long          mac_pause_frames_received;
 237         unsigned long          mac_rx_errors;
 238         unsigned long          mac_rx_crc_errors;
 239         unsigned long          mac_rx_symbol_err_frames;
 240         unsigned long          mac_rx_jabber_frames;
 241         unsigned long          mac_rx_oversized_frames;
 242         unsigned long          mac_rx_short_frames;
 243         unsigned long          port_rx_discards;
 244         unsigned long          port_tx_discards;
 245         unsigned int           mac_index;
 246         unsigned int           nes_stack_start;
 247
 248         /* Control Structures */
 249         void                   *cqp_vbase;
 250         dma_addr_t             cqp_pbase;
 251         u32                    cqp_mem_size;
 252         u8                     ceq_index;
 253         u8                     nic_ceq_index;
 254         struct nes_hw_cqp      cqp;
 255         struct nes_hw_cq       ccq;
 256         struct list_head       cqp_avail_reqs;
 257         struct list_head       cqp_pending_reqs;
 258         struct nes_cqp_request *nes_cqp_requests;
 259
 260         u32                    int_req;
 261         u32                    int_stat;
 262         u32                    timer_int_req;
 263         u32                    timer_only_int_count;
 264         u32                    intf_int_req;
 265         u32                    last_mac_tx_pauses;
 266         u32                    last_used_chunks_tx;
 267         struct list_head       list;
 268
 269         u16                    base_doorbell_index;
 270         u16                    currcq_count;
 271         u16                    deepcq_count;
 272         u8                     iw_status;
 273         u8                     msi_enabled;
 274         u8                     netdev_count;
 275         u8                     napi_isr_ran;
 276         u8                     disable_rx_flow_control;
 277         u8                     disable_tx_flow_control;
 278
 279         struct delayed_work    work;
 280         u8                     link_recheck;
 281 };
 282
 283 /* Receive skb private area - must fit in skb->cb area */
 284 struct nes_rskb_cb {
 285         u64                    busaddr;
 286         u32                    maplen;
 287         u32                    seqnum;
 288         u8                     *data_start;
 289         struct nes_qp          *nesqp;
 290 };
 291
 292 static inline __le32 get_crc_value(struct nes_v4_quad *nes_quad)
 293 {
 294         u32 crc_value;
 295         crc_value = crc32c(~0, (void *)nes_quad, sizeof (struct nes_v4_quad));
 296
 297         /*
 298          * With commit ef19454b ("[LIB] crc32c: Keep intermediate crc
 299          * state in cpu order"), behavior of crc32c changes on
 300          * big-endian platforms.  Our algorithm expects the previous
 301          * behavior; otherwise we have RDMA connection establishment
 302          * issue on big-endian.
 303          */
 304         return cpu_to_le32(crc_value);
 305 }
 306
 307 static inline void
 308 set_wqe_64bit_value(__le32 *wqe_words, u32 index, u64 value)
 309 {
 310         wqe_words[index]     = cpu_to_le32((u32) value);
 311         wqe_words[index + 1] = cpu_to_le32(upper_32_bits(value));
 312 }
 313
 314 static inline void
 315 set_wqe_32bit_value(__le32 *wqe_words, u32 index, u32 value)
 316 {
 317         wqe_words[index] = cpu_to_le32(value);
 318 }
 319
 320 static inline void
 321 nes_fill_init_cqp_wqe(struct nes_hw_cqp_wqe *cqp_wqe, struct nes_device *nesdev)
 322 {
 323         cqp_wqe->wqe_words[NES_CQP_WQE_COMP_CTX_LOW_IDX]       = 0;
 324         cqp_wqe->wqe_words[NES_CQP_WQE_COMP_CTX_HIGH_IDX]      = 0;
 325         cqp_wqe->wqe_words[NES_CQP_WQE_COMP_SCRATCH_LOW_IDX]   = 0;
 326         cqp_wqe->wqe_words[NES_CQP_WQE_COMP_SCRATCH_HIGH_IDX]  = 0;
 327         cqp_wqe->wqe_words[NES_CQP_STAG_WQE_PBL_BLK_COUNT_IDX] = 0;
 328         cqp_wqe->wqe_words[NES_CQP_STAG_WQE_PBL_LEN_IDX]       = 0;
 329         cqp_wqe->wqe_words[NES_CQP_STAG_WQE_LEN_LOW_IDX]       = 0;
 330         cqp_wqe->wqe_words[NES_CQP_STAG_WQE_PA_LOW_IDX]        = 0;
 331         cqp_wqe->wqe_words[NES_CQP_STAG_WQE_PA_HIGH_IDX]       = 0;
 332 }
 333
 334 static inline void
 335 nes_fill_init_qp_wqe(struct nes_hw_qp_wqe *wqe, struct nes_qp *nesqp, u32 head)
 336 {
 337         u32 value;
 338         value = ((u32)((unsigned long) nesqp)) | head;
 339         set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_COMP_CTX_HIGH_IDX,
 340                         (u32)(upper_32_bits((unsigned long)(nesqp))));
 341         set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_COMP_CTX_LOW_IDX, value);
 342 }
 343
 344 /* Read from memory-mapped device */
 345 static inline u32 nes_read_indexed(struct nes_device *nesdev, u32 reg_index)
 346 {
 347         unsigned long flags;
 348         void __iomem *addr = nesdev->index_reg;
 349         u32 value;
 350
 351         spin_lock_irqsave(&nesdev->indexed_regs_lock, flags);
 352
 353         writel(reg_index, addr);
 354         value = readl((void __iomem *)addr + 4);
 355
 356         spin_unlock_irqrestore(&nesdev->indexed_regs_lock, flags);
 357         return value;
 358 }
 359
 360 static inline u32 nes_read32(const void __iomem *addr)
 361 {
 362         return readl(addr);
 363 }
 364
 365 static inline u16 nes_read16(const void __iomem *addr)
 366 {
 367         return readw(addr);
 368 }
 369
 370 static inline u8 nes_read8(const void __iomem *addr)
 371 {
 372         return readb(addr);
 373 }
 374
 375 /* Write to memory-mapped device */
 376 static inline void nes_write_indexed(struct nes_device *nesdev, u32 reg_index, u32 val)
 377 {
 378         unsigned long flags;
 379         void __iomem *addr = nesdev->index_reg;
 380
 381         spin_lock_irqsave(&nesdev->indexed_regs_lock, flags);
 382
 383         writel(reg_index, addr);
 384         writel(val, (void __iomem *)addr + 4);
 385
 386         spin_unlock_irqrestore(&nesdev->indexed_regs_lock, flags);
 387 }
 388
 389 static inline void nes_write32(void __iomem *addr, u32 val)
 390 {
 391         writel(val, addr);
 392 }
 393
 394 static inline void nes_write16(void __iomem *addr, u16 val)
 395 {
 396         writew(val, addr);
 397 }
 398
 399 static inline void nes_write8(void __iomem *addr, u8 val)
 400 {
 401         writeb(val, addr);
 402 }
 403
 404 enum nes_resource {
 405         NES_RESOURCE_MW = 1,
 406         NES_RESOURCE_FAST_MR,
 407         NES_RESOURCE_PHYS_MR,
 408         NES_RESOURCE_USER_MR,
 409         NES_RESOURCE_PD,
 410         NES_RESOURCE_QP,
 411         NES_RESOURCE_CQ,
 412         NES_RESOURCE_ARP
 413 };
 414
 415 static inline int nes_alloc_resource(struct nes_adapter *nesadapter,
 416                 unsigned long *resource_array, u32 max_resources,
 417                 u32 *req_resource_num, u32 *next, enum nes_resource resource_type)
 418 {
 419         unsigned long flags;
 420         u32 resource_num;
 421
 422         spin_lock_irqsave(&nesadapter->resource_lock, flags);
 423
 424         resource_num = find_next_zero_bit(resource_array, max_resources, *next);
 425         if (resource_num >= max_resources) {
 426                 resource_num = find_first_zero_bit(resource_array, max_resources);
 427                 if (resource_num >= max_resources) {
 428                         printk(KERN_ERR PFX "%s: No available resources [type=%u].\n", __func__, resource_type);
 429                         spin_unlock_irqrestore(&nesadapter->resource_lock, flags);
 430                         return -EMFILE;
 431                 }
 432         }
 433         set_bit(resource_num, resource_array);
 434         *next = resource_num+1;
 435         if (*next == max_resources) {
 436                 *next = 0;
 437         }
 438         spin_unlock_irqrestore(&nesadapter->resource_lock, flags);
 439         *req_resource_num = resource_num;
 440
 441         return 0;
 442 }
 443
 444 static inline int nes_is_resource_allocated(struct nes_adapter *nesadapter,
 445                 unsigned long *resource_array, u32 resource_num)
 446 {
 447         unsigned long flags;
 448         int bit_is_set;
 449
 450         spin_lock_irqsave(&nesadapter->resource_lock, flags);
 451
 452         bit_is_set = test_bit(resource_num, resource_array);
 453         nes_debug(NES_DBG_HW, "resource_num %u is%s allocated.\n",
 454                         resource_num, (bit_is_set ? "": " not"));
 455         spin_unlock_irqrestore(&nesadapter->resource_lock, flags);
 456
 457         return bit_is_set;
 458 }
 459
 460 static inline void nes_free_resource(struct nes_adapter *nesadapter,
 461                 unsigned long *resource_array, u32 resource_num)
 462 {
 463         unsigned long flags;
 464
 465         spin_lock_irqsave(&nesadapter->resource_lock, flags);
 466         clear_bit(resource_num, resource_array);
 467         spin_unlock_irqrestore(&nesadapter->resource_lock, flags);
 468 }
 469
 470 static inline struct nes_vnic *to_nesvnic(struct ib_device *ibdev)
 471 {
 472         return container_of(ibdev, struct nes_ib_device, ibdev)->nesvnic;
 473 }
 474
 475 static inline struct nes_pd *to_nespd(struct ib_pd *ibpd)
 476 {
 477         return container_of(ibpd, struct nes_pd, ibpd);
 478 }
 479
 480 static inline struct nes_ucontext *to_nesucontext(struct ib_ucontext *ibucontext)
 481 {
 482         return container_of(ibucontext, struct nes_ucontext, ibucontext);
 483 }
 484
 485 static inline struct nes_mr *to_nesmr(struct ib_mr *ibmr)
 486 {
 487         return container_of(ibmr, struct nes_mr, ibmr);
 488 }
 489
 490 static inline struct nes_mr *to_nesmr_from_ibfmr(struct ib_fmr *ibfmr)
 491 {
 492         return container_of(ibfmr, struct nes_mr, ibfmr);
 493 }
 494
 495 static inline struct nes_mr *to_nesmw(struct ib_mw *ibmw)
 496 {
 497         return container_of(ibmw, struct nes_mr, ibmw);
 498 }
 499
 500 static inline struct nes_fmr *to_nesfmr(struct nes_mr *nesmr)
 501 {
 502         return container_of(nesmr, struct nes_fmr, nesmr);
 503 }
 504
 505 static inline struct nes_cq *to_nescq(struct ib_cq *ibcq)
 506 {
 507         return container_of(ibcq, struct nes_cq, ibcq);
 508 }
 509
 510 static inline struct nes_qp *to_nesqp(struct ib_qp *ibqp)
 511 {
 512         return container_of(ibqp, struct nes_qp, ibqp);
 513 }
 514
 515
 516
 517 /* nes.c */
 518 void nes_add_ref(struct ib_qp *);
 519 void nes_rem_ref(struct ib_qp *);
 520 struct ib_qp *nes_get_qp(struct ib_device *, int);
 521
 522
 523 /* nes_hw.c */
 524 struct nes_adapter *nes_init_adapter(struct nes_device *, u8);
 525 void  nes_nic_init_timer_defaults(struct nes_device *, u8);
 526 void nes_destroy_adapter(struct nes_adapter *);
 527 int nes_init_cqp(struct nes_device *);
 528 int nes_init_phy(struct nes_device *);
 529 int nes_init_nic_qp(struct nes_device *, struct net_device *);
 530 void nes_destroy_nic_qp(struct nes_vnic *);
 531 int nes_napi_isr(struct nes_device *);
 532 void nes_dpc(unsigned long);
 533 void nes_nic_ce_handler(struct nes_device *, struct nes_hw_nic_cq *);
 534 void nes_iwarp_ce_handler(struct nes_device *, struct nes_hw_cq *);
 535 int nes_destroy_cqp(struct nes_device *);
 536 int nes_nic_cm_xmit(struct sk_buff *, struct net_device *);
 537 void nes_recheck_link_status(struct work_struct *work);
 538 void nes_terminate_timeout(unsigned long context);
 539
 540 /* nes_nic.c */
 541 struct net_device *nes_netdev_init(struct nes_device *, void __iomem *);
 542 void nes_netdev_destroy(struct net_device *);
 543 int nes_nic_cm_xmit(struct sk_buff *, struct net_device *);
 544
 545 /* nes_cm.c */
 546 void *nes_cm_create(struct net_device *);
 547 int nes_cm_recv(struct sk_buff *, struct net_device *);
 548 void nes_update_arp(unsigned char *, u32, u32, u16, u16);
 549 void nes_manage_arp_cache(struct net_device *, unsigned char *, u32, u32);
 550 void nes_sock_release(struct nes_qp *, unsigned long *);
 551 void flush_wqes(struct nes_device *nesdev, struct nes_qp *, u32, u32);
 552 int nes_manage_apbvt(struct nes_vnic *, u32, u32, u32);
 553 int nes_cm_disconn(struct nes_qp *);
 554 void nes_cm_disconn_worker(void *);
 555
 556 /* nes_verbs.c */
 557 int nes_hw_modify_qp(struct nes_device *, struct nes_qp *, u32, u32, u32);
 558 int nes_modify_qp(struct ib_qp *, struct ib_qp_attr *, int, struct ib_udata *);
 559 struct nes_ib_device *nes_init_ofa_device(struct net_device *);
 560 void  nes_port_ibevent(struct nes_vnic *nesvnic);
 561 void nes_destroy_ofa_device(struct nes_ib_device *);
 562 int nes_register_ofa_device(struct nes_ib_device *);
 563
 564 /* nes_util.c */
 565 int nes_read_eeprom_values(struct nes_device *, struct nes_adapter *);
 566 void nes_write_1G_phy_reg(struct nes_device *, u8, u8, u16);
 567 void nes_read_1G_phy_reg(struct nes_device *, u8, u8, u16 *);
 568 void nes_write_10G_phy_reg(struct nes_device *, u16, u8, u16, u16);
 569 void nes_read_10G_phy_reg(struct nes_device *, u8, u8, u16);
 570 struct nes_cqp_request *nes_get_cqp_request(struct nes_device *);
 571 void nes_free_cqp_request(struct nes_device *nesdev,
 572                           struct nes_cqp_request *cqp_request);
 573 void nes_put_cqp_request(struct nes_device *nesdev,
 574                          struct nes_cqp_request *cqp_request);
 575 void nes_post_cqp_request(struct nes_device *, struct nes_cqp_request *);
 576 int nes_arp_table(struct nes_device *, u32, u8 *, u32);
 577 void nes_mh_fix(unsigned long);
 578 void nes_clc(unsigned long);
 579 void nes_dump_mem(unsigned int, void *, int);
 580 u32 nes_crc32(u32, u32, u32, u32, u8 *, u32, u32, u32);
 581
 582 #endif  /* __NES_H */