qlcnic: use the correct ring in qlcnic_83xx_process_rcv_ring_diag()
[deliverable/linux.git] / drivers / irqchip / Kconfig
1 config IRQCHIP
2 def_bool y
3 depends on OF_IRQ
4
5 config ARM_GIC
6 bool
7 select IRQ_DOMAIN
8 select IRQ_DOMAIN_HIERARCHY
9 select MULTI_IRQ_HANDLER
10
11 config ARM_GIC_MAX_NR
12 int
13 default 2 if ARCH_REALVIEW
14 default 1
15
16 config ARM_GIC_V2M
17 bool
18 depends on ARM_GIC
19 depends on PCI && PCI_MSI
20 select PCI_MSI_IRQ_DOMAIN
21
22 config GIC_NON_BANKED
23 bool
24
25 config ARM_GIC_V3
26 bool
27 select IRQ_DOMAIN
28 select MULTI_IRQ_HANDLER
29 select IRQ_DOMAIN_HIERARCHY
30 select PARTITION_PERCPU
31
32 config ARM_GIC_V3_ITS
33 bool
34 select PCI_MSI_IRQ_DOMAIN
35
36 config ARM_NVIC
37 bool
38 select IRQ_DOMAIN
39 select IRQ_DOMAIN_HIERARCHY
40 select GENERIC_IRQ_CHIP
41
42 config ARM_VIC
43 bool
44 select IRQ_DOMAIN
45 select MULTI_IRQ_HANDLER
46
47 config ARM_VIC_NR
48 int
49 default 4 if ARCH_S5PV210
50 default 2
51 depends on ARM_VIC
52 help
53 The maximum number of VICs available in the system, for
54 power management.
55
56 config ARMADA_370_XP_IRQ
57 bool
58 select GENERIC_IRQ_CHIP
59 select PCI_MSI_IRQ_DOMAIN if PCI_MSI
60
61 config ALPINE_MSI
62 bool
63 depends on PCI && PCI_MSI
64 select GENERIC_IRQ_CHIP
65 select PCI_MSI_IRQ_DOMAIN
66
67 config ATMEL_AIC_IRQ
68 bool
69 select GENERIC_IRQ_CHIP
70 select IRQ_DOMAIN
71 select MULTI_IRQ_HANDLER
72 select SPARSE_IRQ
73
74 config ATMEL_AIC5_IRQ
75 bool
76 select GENERIC_IRQ_CHIP
77 select IRQ_DOMAIN
78 select MULTI_IRQ_HANDLER
79 select SPARSE_IRQ
80
81 config I8259
82 bool
83 select IRQ_DOMAIN
84
85 config BCM6345_L1_IRQ
86 bool
87 select GENERIC_IRQ_CHIP
88 select IRQ_DOMAIN
89
90 config BCM7038_L1_IRQ
91 bool
92 select GENERIC_IRQ_CHIP
93 select IRQ_DOMAIN
94
95 config BCM7120_L2_IRQ
96 bool
97 select GENERIC_IRQ_CHIP
98 select IRQ_DOMAIN
99
100 config BRCMSTB_L2_IRQ
101 bool
102 select GENERIC_IRQ_CHIP
103 select IRQ_DOMAIN
104
105 config DW_APB_ICTL
106 bool
107 select GENERIC_IRQ_CHIP
108 select IRQ_DOMAIN
109
110 config HISILICON_IRQ_MBIGEN
111 bool
112 select ARM_GIC_V3
113 select ARM_GIC_V3_ITS
114 select GENERIC_MSI_IRQ_DOMAIN
115
116 config IMGPDC_IRQ
117 bool
118 select GENERIC_IRQ_CHIP
119 select IRQ_DOMAIN
120
121 config IRQ_MIPS_CPU
122 bool
123 select GENERIC_IRQ_CHIP
124 select IRQ_DOMAIN
125
126 config CLPS711X_IRQCHIP
127 bool
128 depends on ARCH_CLPS711X
129 select IRQ_DOMAIN
130 select MULTI_IRQ_HANDLER
131 select SPARSE_IRQ
132 default y
133
134 config OR1K_PIC
135 bool
136 select IRQ_DOMAIN
137
138 config OMAP_IRQCHIP
139 bool
140 select GENERIC_IRQ_CHIP
141 select IRQ_DOMAIN
142
143 config ORION_IRQCHIP
144 bool
145 select IRQ_DOMAIN
146 select MULTI_IRQ_HANDLER
147
148 config PIC32_EVIC
149 bool
150 select GENERIC_IRQ_CHIP
151 select IRQ_DOMAIN
152
153 config RENESAS_INTC_IRQPIN
154 bool
155 select IRQ_DOMAIN
156
157 config RENESAS_IRQC
158 bool
159 select GENERIC_IRQ_CHIP
160 select IRQ_DOMAIN
161
162 config ST_IRQCHIP
163 bool
164 select REGMAP
165 select MFD_SYSCON
166 help
167 Enables SysCfg Controlled IRQs on STi based platforms.
168
169 config TANGO_IRQ
170 bool
171 select IRQ_DOMAIN
172 select GENERIC_IRQ_CHIP
173
174 config TB10X_IRQC
175 bool
176 select IRQ_DOMAIN
177 select GENERIC_IRQ_CHIP
178
179 config TS4800_IRQ
180 tristate "TS-4800 IRQ controller"
181 select IRQ_DOMAIN
182 depends on HAS_IOMEM
183 depends on SOC_IMX51 || COMPILE_TEST
184 help
185 Support for the TS-4800 FPGA IRQ controller
186
187 config VERSATILE_FPGA_IRQ
188 bool
189 select IRQ_DOMAIN
190
191 config VERSATILE_FPGA_IRQ_NR
192 int
193 default 4
194 depends on VERSATILE_FPGA_IRQ
195
196 config XTENSA_MX
197 bool
198 select IRQ_DOMAIN
199
200 config IRQ_CROSSBAR
201 bool
202 help
203 Support for a CROSSBAR ip that precedes the main interrupt controller.
204 The primary irqchip invokes the crossbar's callback which inturn allocates
205 a free irq and configures the IP. Thus the peripheral interrupts are
206 routed to one of the free irqchip interrupt lines.
207
208 config KEYSTONE_IRQ
209 tristate "Keystone 2 IRQ controller IP"
210 depends on ARCH_KEYSTONE
211 help
212 Support for Texas Instruments Keystone 2 IRQ controller IP which
213 is part of the Keystone 2 IPC mechanism
214
215 config MIPS_GIC
216 bool
217 select GENERIC_IRQ_IPI
218 select IRQ_DOMAIN_HIERARCHY
219 select MIPS_CM
220
221 config INGENIC_IRQ
222 bool
223 depends on MACH_INGENIC
224 default y
225
226 config RENESAS_H8300H_INTC
227 bool
228 select IRQ_DOMAIN
229
230 config RENESAS_H8S_INTC
231 bool
232 select IRQ_DOMAIN
233
234 config IMX_GPCV2
235 bool
236 select IRQ_DOMAIN
237 help
238 Enables the wakeup IRQs for IMX platforms with GPCv2 block
239
240 config IRQ_MXS
241 def_bool y if MACH_ASM9260 || ARCH_MXS
242 select IRQ_DOMAIN
243 select STMP_DEVICE
244
245 config MVEBU_ODMI
246 bool
247 select GENERIC_MSI_IRQ_DOMAIN
248
249 config LS_SCFG_MSI
250 def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE
251 depends on PCI && PCI_MSI
252 select PCI_MSI_IRQ_DOMAIN
253
254 config PARTITION_PERCPU
255 bool
256
257 config EZNPS_GIC
258 bool "NPS400 Global Interrupt Manager (GIM)"
259 depends on ARC || (COMPILE_TEST && !64BIT)
260 select IRQ_DOMAIN
261 help
262 Support the EZchip NPS400 global interrupt controller
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