2 * Copyright (C) 2001 MandrakeSoft S.A.
7 * http://www.linux-mandrake.com/
8 * http://www.mandrakesoft.com/
10 * This library is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU Lesser General Public
12 * License as published by the Free Software Foundation; either
13 * version 2 of the License, or (at your option) any later version.
15 * This library is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * Lesser General Public License for more details.
20 * You should have received a copy of the GNU Lesser General Public
21 * License along with this library; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 * Yunhong Jiang <yunhong.jiang@intel.com>
25 * Yaozu (Eddie) Dong <eddie.dong@intel.com>
26 * Based on Xen 3.1 code.
30 #include <linux/kvm.h>
32 #include <linux/highmem.h>
33 #include <linux/smp.h>
34 #include <linux/hrtimer.h>
36 #include <asm/processor.h>
39 #include <asm/current.h>
40 #include <asm/apicdef.h>
41 #include <asm/io_apic.h>
44 #define ioapic_debug(fmt,arg...) printk(KERN_WARNING fmt,##arg)
46 #define ioapic_debug(fmt, arg...)
48 static void ioapic_deliver(struct kvm_ioapic
*vioapic
, int irq
);
50 static unsigned long ioapic_read_indirect(struct kvm_ioapic
*ioapic
,
54 unsigned long result
= 0;
56 switch (ioapic
->ioregsel
) {
57 case IOAPIC_REG_VERSION
:
58 result
= ((((IOAPIC_NUM_PINS
- 1) & 0xff) << 16)
59 | (IOAPIC_VERSION_ID
& 0xff));
62 case IOAPIC_REG_APIC_ID
:
63 case IOAPIC_REG_ARB_ID
:
64 result
= ((ioapic
->id
& 0xf) << 24);
69 u32 redir_index
= (ioapic
->ioregsel
- 0x10) >> 1;
72 ASSERT(redir_index
< IOAPIC_NUM_PINS
);
74 redir_content
= ioapic
->redirtbl
[redir_index
].bits
;
75 result
= (ioapic
->ioregsel
& 0x1) ?
76 (redir_content
>> 32) & 0xffffffff :
77 redir_content
& 0xffffffff;
85 static void ioapic_service(struct kvm_ioapic
*ioapic
, unsigned int idx
)
87 union ioapic_redir_entry
*pent
;
89 pent
= &ioapic
->redirtbl
[idx
];
91 if (!pent
->fields
.mask
) {
92 ioapic_deliver(ioapic
, idx
);
93 if (pent
->fields
.trig_mode
== IOAPIC_LEVEL_TRIG
)
94 pent
->fields
.remote_irr
= 1;
96 if (!pent
->fields
.trig_mode
)
97 ioapic
->irr
&= ~(1 << idx
);
100 static void ioapic_write_indirect(struct kvm_ioapic
*ioapic
, u32 val
)
104 switch (ioapic
->ioregsel
) {
105 case IOAPIC_REG_VERSION
:
106 /* Writes are ignored. */
109 case IOAPIC_REG_APIC_ID
:
110 ioapic
->id
= (val
>> 24) & 0xf;
113 case IOAPIC_REG_ARB_ID
:
117 index
= (ioapic
->ioregsel
- 0x10) >> 1;
119 ioapic_debug("change redir index %x val %x\n", index
, val
);
120 if (index
>= IOAPIC_NUM_PINS
)
122 if (ioapic
->ioregsel
& 1) {
123 ioapic
->redirtbl
[index
].bits
&= 0xffffffff;
124 ioapic
->redirtbl
[index
].bits
|= (u64
) val
<< 32;
126 ioapic
->redirtbl
[index
].bits
&= ~0xffffffffULL
;
127 ioapic
->redirtbl
[index
].bits
|= (u32
) val
;
128 ioapic
->redirtbl
[index
].fields
.remote_irr
= 0;
130 if (ioapic
->irr
& (1 << index
))
131 ioapic_service(ioapic
, index
);
136 static void ioapic_inj_irq(struct kvm_ioapic
*ioapic
,
137 struct kvm_lapic
*target
,
138 u8 vector
, u8 trig_mode
, u8 delivery_mode
)
140 ioapic_debug("irq %d trig %d deliv %d\n", vector
, trig_mode
,
143 ASSERT((delivery_mode
== dest_Fixed
) ||
144 (delivery_mode
== dest_LowestPrio
));
146 kvm_apic_set_irq(target
, vector
, trig_mode
);
149 static u32
ioapic_get_delivery_bitmask(struct kvm_ioapic
*ioapic
, u8 dest
,
154 struct kvm
*kvm
= ioapic
->kvm
;
155 struct kvm_vcpu
*vcpu
;
157 ioapic_debug("dest %d dest_mode %d\n", dest
, dest_mode
);
159 if (dest_mode
== 0) { /* Physical mode. */
160 if (dest
== 0xFF) { /* Broadcast. */
161 for (i
= 0; i
< KVM_MAX_VCPUS
; ++i
)
162 if (kvm
->vcpus
[i
] && kvm
->vcpus
[i
]->apic
)
166 for (i
= 0; i
< KVM_MAX_VCPUS
; ++i
) {
167 vcpu
= kvm
->vcpus
[i
];
170 if (kvm_apic_match_physical_addr(vcpu
->apic
, dest
)) {
176 } else if (dest
!= 0) /* Logical mode, MDA non-zero. */
177 for (i
= 0; i
< KVM_MAX_VCPUS
; ++i
) {
178 vcpu
= kvm
->vcpus
[i
];
182 kvm_apic_match_logical_addr(vcpu
->apic
, dest
))
183 mask
|= 1 << vcpu
->vcpu_id
;
185 ioapic_debug("mask %x\n", mask
);
189 static void ioapic_deliver(struct kvm_ioapic
*ioapic
, int irq
)
191 u8 dest
= ioapic
->redirtbl
[irq
].fields
.dest_id
;
192 u8 dest_mode
= ioapic
->redirtbl
[irq
].fields
.dest_mode
;
193 u8 delivery_mode
= ioapic
->redirtbl
[irq
].fields
.delivery_mode
;
194 u8 vector
= ioapic
->redirtbl
[irq
].fields
.vector
;
195 u8 trig_mode
= ioapic
->redirtbl
[irq
].fields
.trig_mode
;
197 struct kvm_lapic
*target
;
198 struct kvm_vcpu
*vcpu
;
201 ioapic_debug("dest=%x dest_mode=%x delivery_mode=%x "
202 "vector=%x trig_mode=%x\n",
203 dest
, dest_mode
, delivery_mode
, vector
, trig_mode
);
205 deliver_bitmask
= ioapic_get_delivery_bitmask(ioapic
, dest
, dest_mode
);
206 if (!deliver_bitmask
) {
207 ioapic_debug("no target on destination\n");
211 switch (delivery_mode
) {
212 case dest_LowestPrio
:
214 kvm_apic_round_robin(ioapic
->kvm
, vector
, deliver_bitmask
);
216 ioapic_inj_irq(ioapic
, target
, vector
,
217 trig_mode
, delivery_mode
);
219 ioapic_debug("null round robin: "
220 "mask=%x vector=%x delivery_mode=%x\n",
221 deliver_bitmask
, vector
, dest_LowestPrio
);
224 for (vcpu_id
= 0; deliver_bitmask
!= 0; vcpu_id
++) {
225 if (!(deliver_bitmask
& (1 << vcpu_id
)))
227 deliver_bitmask
&= ~(1 << vcpu_id
);
228 vcpu
= ioapic
->kvm
->vcpus
[vcpu_id
];
231 ioapic_inj_irq(ioapic
, target
, vector
,
232 trig_mode
, delivery_mode
);
239 printk(KERN_WARNING
"Unsupported delivery mode %d\n",
245 void kvm_ioapic_set_irq(struct kvm_ioapic
*ioapic
, int irq
, int level
)
247 u32 old_irr
= ioapic
->irr
;
249 union ioapic_redir_entry entry
;
251 if (irq
>= 0 && irq
< IOAPIC_NUM_PINS
) {
252 entry
= ioapic
->redirtbl
[irq
];
253 level
^= entry
.fields
.polarity
;
255 ioapic
->irr
&= ~mask
;
258 if ((!entry
.fields
.trig_mode
&& old_irr
!= ioapic
->irr
)
259 || !entry
.fields
.remote_irr
)
260 ioapic_service(ioapic
, irq
);
265 static int get_eoi_gsi(struct kvm_ioapic
*ioapic
, int vector
)
269 for (i
= 0; i
< IOAPIC_NUM_PINS
; i
++)
270 if (ioapic
->redirtbl
[i
].fields
.vector
== vector
)
275 void kvm_ioapic_update_eoi(struct kvm
*kvm
, int vector
)
277 struct kvm_ioapic
*ioapic
= kvm
->vioapic
;
278 union ioapic_redir_entry
*ent
;
281 gsi
= get_eoi_gsi(ioapic
, vector
);
283 printk(KERN_WARNING
"Can't find redir item for %d EOI\n",
288 ent
= &ioapic
->redirtbl
[gsi
];
289 ASSERT(ent
->fields
.trig_mode
== IOAPIC_LEVEL_TRIG
);
291 ent
->fields
.remote_irr
= 0;
292 if (!ent
->fields
.mask
&& (ioapic
->irr
& (1 << gsi
)))
293 ioapic_deliver(ioapic
, gsi
);
296 static int ioapic_in_range(struct kvm_io_device
*this, gpa_t addr
)
298 struct kvm_ioapic
*ioapic
= (struct kvm_ioapic
*)this->private;
300 return ((addr
>= ioapic
->base_address
&&
301 (addr
< ioapic
->base_address
+ IOAPIC_MEM_LENGTH
)));
304 static void ioapic_mmio_read(struct kvm_io_device
*this, gpa_t addr
, int len
,
307 struct kvm_ioapic
*ioapic
= (struct kvm_ioapic
*)this->private;
310 ioapic_debug("addr %lx\n", (unsigned long)addr
);
311 ASSERT(!(addr
& 0xf)); /* check alignment */
315 case IOAPIC_REG_SELECT
:
316 result
= ioapic
->ioregsel
;
319 case IOAPIC_REG_WINDOW
:
320 result
= ioapic_read_indirect(ioapic
, addr
, len
);
329 *(u64
*) val
= result
;
334 memcpy(val
, (char *)&result
, len
);
337 printk(KERN_WARNING
"ioapic: wrong length %d\n", len
);
341 static void ioapic_mmio_write(struct kvm_io_device
*this, gpa_t addr
, int len
,
344 struct kvm_ioapic
*ioapic
= (struct kvm_ioapic
*)this->private;
347 ioapic_debug("ioapic_mmio_write addr=%p len=%d val=%p\n",
348 (void*)addr
, len
, val
);
349 ASSERT(!(addr
& 0xf)); /* check alignment */
350 if (len
== 4 || len
== 8)
353 printk(KERN_WARNING
"ioapic: Unsupported size %d\n", len
);
359 case IOAPIC_REG_SELECT
:
360 ioapic
->ioregsel
= data
;
363 case IOAPIC_REG_WINDOW
:
364 ioapic_write_indirect(ioapic
, data
);
372 int kvm_ioapic_init(struct kvm
*kvm
)
374 struct kvm_ioapic
*ioapic
;
377 ioapic
= kzalloc(sizeof(struct kvm_ioapic
), GFP_KERNEL
);
380 kvm
->vioapic
= ioapic
;
381 for (i
= 0; i
< IOAPIC_NUM_PINS
; i
++)
382 ioapic
->redirtbl
[i
].fields
.mask
= 1;
383 ioapic
->base_address
= IOAPIC_DEFAULT_BASE_ADDRESS
;
384 ioapic
->dev
.read
= ioapic_mmio_read
;
385 ioapic
->dev
.write
= ioapic_mmio_write
;
386 ioapic
->dev
.in_range
= ioapic_in_range
;
387 ioapic
->dev
.private = ioapic
;
389 kvm_io_bus_register_dev(&kvm
->mmio_bus
, &ioapic
->dev
);