drivers/media/dvb/bt8xx/dst_common.h

   1 /*
   2         Frontend-driver for TwinHan DST Frontend
   3
   4         Copyright (C) 2003 Jamie Honan
   5         Copyright (C) 2004, 2005 Manu Abraham (manu@kromtek.com)
   6
   7         This program is free software; you can redistribute it and/or modify
   8         it under the terms of the GNU General Public License as published by
   9         the Free Software Foundation; either version 2 of the License, or
  10         (at your option) any later version.
  11
  12         This program is distributed in the hope that it will be useful,
  13         but WITHOUT ANY WARRANTY; without even the implied warranty of
  14         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15         GNU General Public License for more details.
  16
  17         You should have received a copy of the GNU General Public License
  18         along with this program; if not, write to the Free Software
  19         Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20 */
  21
  22 #ifndef DST_COMMON_H
  23 #define DST_COMMON_H
  24
  25 #include <linux/dvb/frontend.h>
  26 #include <linux/device.h>
  27 #include "bt878.h"
  28
  29 #include "dst_ca.h"
  30
  31
  32 #define NO_DELAY                0
  33 #define LONG_DELAY              1
  34 #define DEVICE_INIT             2
  35
  36 #define DELAY                   1
  37
  38 #define DST_TYPE_IS_SAT         0
  39 #define DST_TYPE_IS_TERR        1
  40 #define DST_TYPE_IS_CABLE       2
  41 #define DST_TYPE_IS_ATSC        3
  42
  43 #define DST_TYPE_HAS_NEWTUNE    1
  44 #define DST_TYPE_HAS_TS204      2
  45 #define DST_TYPE_HAS_SYMDIV     4
  46 #define DST_TYPE_HAS_FW_1       8
  47 #define DST_TYPE_HAS_FW_2       16
  48 #define DST_TYPE_HAS_FW_3       32
  49 #define DST_TYPE_HAS_FW_BUILD   64
  50 #define DST_TYPE_HAS_OBS_REGS   128
  51 #define DST_TYPE_HAS_INC_COUNT  256
  52
  53 /*      Card capability list    */
  54
  55 #define DST_TYPE_HAS_MAC        1
  56 #define DST_TYPE_HAS_DISEQC3    2
  57 #define DST_TYPE_HAS_DISEQC4    4
  58 #define DST_TYPE_HAS_DISEQC5    8
  59 #define DST_TYPE_HAS_MOTO       16
  60 #define DST_TYPE_HAS_CA         32
  61 #define DST_TYPE_HAS_ANALOG     64      /*      Analog inputs   */
  62 #define DST_TYPE_HAS_SESSION    128
  63
  64
  65 #define RDC_8820_PIO_0_DISABLE  0
  66 #define RDC_8820_PIO_0_ENABLE   1
  67 #define RDC_8820_INT            2
  68 #define RDC_8820_RESET          4
  69
  70 /*      DST Communication       */
  71 #define GET_REPLY               1
  72 #define NO_REPLY                0
  73
  74 #define GET_ACK                 1
  75 #define FIXED_COMM              8
  76
  77 #define ACK                     0xff
  78
  79 struct dst_state {
  80
  81         struct i2c_adapter* i2c;
  82
  83         struct bt878* bt;
  84
  85         struct dvb_frontend_ops ops;
  86
  87         /* configuration settings */
  88         const struct dst_config* config;
  89
  90         struct dvb_frontend frontend;
  91
  92         /* private ASIC data */
  93         u8 tx_tuna[10];
  94         u8 rx_tuna[10];
  95         u8 rxbuffer[10];
  96         u8 diseq_flags;
  97         u8 dst_type;
  98         u32 type_flags;
  99         u32 frequency;          /* intermediate frequency in kHz for QPSK */
 100         fe_spectral_inversion_t inversion;
 101         u32 symbol_rate;        /* symbol rate in Symbols per second */
 102         fe_code_rate_t fec;
 103         fe_sec_voltage_t voltage;
 104         fe_sec_tone_mode_t tone;
 105         u32 decode_freq;
 106         u8 decode_lock;
 107         u16 decode_strength;
 108         u16 decode_snr;
 109         unsigned long cur_jiff;
 110         u8 k22;
 111         fe_bandwidth_t bandwidth;
 112         u32 dst_hw_cap;
 113         u8 dst_fw_version;
 114         fe_sec_mini_cmd_t minicmd;
 115         fe_modulation_t modulation;
 116         u8 messages[256];
 117 };
 118
 119 struct dst_types {
 120         char *device_id;
 121         int offset;
 122         u8 dst_type;
 123         u32 type_flags;
 124         u32 dst_feature;
 125 };
 126
 127
 128
 129 struct dst_config
 130 {
 131         /* the ASIC i2c address */
 132         u8 demod_address;
 133 };
 134
 135
 136 int rdc_reset_state(struct dst_state *state);
 137 int rdc_8820_reset(struct dst_state *state);
 138
 139 int dst_wait_dst_ready(struct dst_state *state, u8 delay_mode);
 140 int dst_pio_enable(struct dst_state *state);
 141 int dst_pio_disable(struct dst_state *state);
 142 int dst_error_recovery(struct dst_state* state);
 143 int dst_error_bailout(struct dst_state *state);
 144 int dst_comm_init(struct dst_state* state);
 145
 146 int write_dst(struct dst_state *state, u8 * data, u8 len);
 147 int read_dst(struct dst_state *state, u8 * ret, u8 len);
 148 u8 dst_check_sum(u8 * buf, u32 len);
 149 struct dst_state* dst_attach(struct dst_state* state, struct dvb_adapter *dvb_adapter);
 150 int dst_ca_attach(struct dst_state *state, struct dvb_adapter *dvb_adapter);
 151 int dst_gpio_outb(struct dst_state* state, u32 mask, u32 enbb, u32 outhigh, int delay);
 152
 153 int dst_command(struct dst_state* state, u8 * data, u8 len);
 154
 155
 156 #endif // DST_COMMON_H