drivers/media/dvb/frontends/or51132.c

   1 /*
   2  *    Support for OR51132 (pcHDTV HD-3000) - VSB/QAM
   3  *
   4  *    Copyright (C) 2005 Kirk Lapray <kirk_lapray@bigfoot.com>
   5  *
   6  *    Based on code from Jack Kelliher (kelliher@xmission.com)
   7  *                           Copyright (C) 2002 & pcHDTV, inc.
   8  *
   9  *    This program is free software; you can redistribute it and/or modify
  10  *    it under the terms of the GNU General Public License as published by
  11  *    the Free Software Foundation; either version 2 of the License, or
  12  *    (at your option) any later version.
  13  *
  14  *    This program is distributed in the hope that it will be useful,
  15  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *    GNU General Public License for more details.
  18  *
  19  *    You should have received a copy of the GNU General Public License
  20  *    along with this program; if not, write to the Free Software
  21  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22  *
  23 */
  24
  25 /*
  26  * This driver needs two external firmware files. Please copy
  27  * "dvb-fe-or51132-vsb.fw" and "dvb-fe-or51132-qam.fw" to
  28  * /usr/lib/hotplug/firmware/ or /lib/firmware/
  29  * (depending on configuration of firmware hotplug).
  30  */
  31 #define OR51132_VSB_FIRMWARE "dvb-fe-or51132-vsb.fw"
  32 #define OR51132_QAM_FIRMWARE "dvb-fe-or51132-qam.fw"
  33
  34 #include <linux/kernel.h>
  35 #include <linux/module.h>
  36 #include <linux/moduleparam.h>
  37 #include <linux/init.h>
  38 #include <linux/delay.h>
  39 #include <linux/string.h>
  40 #include <linux/slab.h>
  41 #include <asm/byteorder.h>
  42
  43 #include "dvb_frontend.h"
  44 #include "dvb-pll.h"
  45 #include "or51132.h"
  46
  47 static int debug;
  48 #define dprintk(args...) \
  49         do { \
  50                 if (debug) printk(KERN_DEBUG "or51132: " args); \
  51         } while (0)
  52
  53
  54 struct or51132_state
  55 {
  56         struct i2c_adapter* i2c;
  57         struct dvb_frontend_ops ops;
  58
  59         /* Configuration settings */
  60         const struct or51132_config* config;
  61
  62         struct dvb_frontend frontend;
  63
  64         /* Demodulator private data */
  65         fe_modulation_t current_modulation;
  66
  67         /* Tuner private data */
  68         u32 current_frequency;
  69 };
  70
  71 static int i2c_writebytes (struct or51132_state* state, u8 reg, u8 *buf, int len)
  72 {
  73         int err;
  74         struct i2c_msg msg;
  75         msg.addr  = reg;
  76         msg.flags = 0;
  77         msg.len   = len;
  78         msg.buf   = buf;
  79
  80         if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
  81                 printk(KERN_WARNING "or51132: i2c_writebytes error (addr %02x, err == %i)\n", reg, err);
  82                 return -EREMOTEIO;
  83         }
  84
  85         return 0;
  86 }
  87
  88 static u8 i2c_readbytes (struct or51132_state* state, u8 reg, u8* buf, int len)
  89 {
  90         int err;
  91         struct i2c_msg msg;
  92         msg.addr   = reg;
  93         msg.flags = I2C_M_RD;
  94         msg.len = len;
  95         msg.buf = buf;
  96
  97         if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
  98                 printk(KERN_WARNING "or51132: i2c_readbytes error (addr %02x, err == %i)\n", reg, err);
  99                 return -EREMOTEIO;
 100         }
 101
 102         return 0;
 103 }
 104
 105 static int or51132_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
 106 {
 107         struct or51132_state* state = fe->demodulator_priv;
 108         static u8 run_buf[] = {0x7F,0x01};
 109         u8 rec_buf[8];
 110         u8 cmd_buf[3];
 111         u32 firmwareAsize, firmwareBsize;
 112         int i,ret;
 113
 114         dprintk("Firmware is %Zd bytes\n",fw->size);
 115
 116         /* Get size of firmware A and B */
 117         firmwareAsize = le32_to_cpu(*((u32*)fw->data));
 118         dprintk("FirmwareA is %i bytes\n",firmwareAsize);
 119         firmwareBsize = le32_to_cpu(*((u32*)(fw->data+4)));
 120         dprintk("FirmwareB is %i bytes\n",firmwareBsize);
 121
 122         /* Upload firmware */
 123         if ((ret = i2c_writebytes(state,state->config->demod_address,
 124                                  &fw->data[8],firmwareAsize))) {
 125                 printk(KERN_WARNING "or51132: load_firmware error 1\n");
 126                 return ret;
 127         }
 128         msleep(1); /* 1ms */
 129         if ((ret = i2c_writebytes(state,state->config->demod_address,
 130                                  &fw->data[8+firmwareAsize],firmwareBsize))) {
 131                 printk(KERN_WARNING "or51132: load_firmware error 2\n");
 132                 return ret;
 133         }
 134         msleep(1); /* 1ms */
 135
 136         if ((ret = i2c_writebytes(state,state->config->demod_address,
 137                                  run_buf,2))) {
 138                 printk(KERN_WARNING "or51132: load_firmware error 3\n");
 139                 return ret;
 140         }
 141
 142         /* Wait at least 5 msec */
 143         msleep(20); /* 10ms */
 144
 145         if ((ret = i2c_writebytes(state,state->config->demod_address,
 146                                  run_buf,2))) {
 147                 printk(KERN_WARNING "or51132: load_firmware error 4\n");
 148                 return ret;
 149         }
 150
 151         /* 50ms for operation to begin */
 152         msleep(50);
 153
 154         /* Read back ucode version to besure we loaded correctly and are really up and running */
 155         /* Get uCode version */
 156         cmd_buf[0] = 0x10;
 157         cmd_buf[1] = 0x10;
 158         cmd_buf[2] = 0x00;
 159         msleep(20); /* 20ms */
 160         if ((ret = i2c_writebytes(state,state->config->demod_address,
 161                                  cmd_buf,3))) {
 162                 printk(KERN_WARNING "or51132: load_firmware error a\n");
 163                 return ret;
 164         }
 165
 166         cmd_buf[0] = 0x04;
 167         cmd_buf[1] = 0x17;
 168         msleep(20); /* 20ms */
 169         if ((ret = i2c_writebytes(state,state->config->demod_address,
 170                                  cmd_buf,2))) {
 171                 printk(KERN_WARNING "or51132: load_firmware error b\n");
 172                 return ret;
 173         }
 174
 175         cmd_buf[0] = 0x00;
 176         cmd_buf[1] = 0x00;
 177         msleep(20); /* 20ms */
 178         if ((ret = i2c_writebytes(state,state->config->demod_address,
 179                                  cmd_buf,2))) {
 180                 printk(KERN_WARNING "or51132: load_firmware error c\n");
 181                 return ret;
 182         }
 183
 184         for(i=0;i<4;i++) {
 185                 msleep(20); /* 20ms */
 186                 /* One apon a time, this command might have had something
 187                    to do with getting the firmware version, but it's
 188                    not used anymore:
 189                    {0x04,0x00,0x30,0x00,i+1} */
 190                 /* Read 8 bytes, two bytes at a time */
 191                 if ((ret = i2c_readbytes(state,state->config->demod_address,
 192                                         &rec_buf[i*2],2))) {
 193                         printk(KERN_WARNING
 194                                "or51132: load_firmware error d - %d\n",i);
 195                         return ret;
 196                 }
 197         }
 198
 199         printk(KERN_WARNING
 200                "or51132: Version: %02X%02X%02X%02X-%02X%02X%02X%02X (%02X%01X-%01X-%02X%01X-%01X)\n",
 201                rec_buf[1],rec_buf[0],rec_buf[3],rec_buf[2],
 202                rec_buf[5],rec_buf[4],rec_buf[7],rec_buf[6],
 203                rec_buf[3],rec_buf[2]>>4,rec_buf[2]&0x0f,
 204                rec_buf[5],rec_buf[4]>>4,rec_buf[4]&0x0f);
 205
 206         cmd_buf[0] = 0x10;
 207         cmd_buf[1] = 0x00;
 208         cmd_buf[2] = 0x00;
 209         msleep(20); /* 20ms */
 210         if ((ret = i2c_writebytes(state,state->config->demod_address,
 211                                  cmd_buf,3))) {
 212                 printk(KERN_WARNING "or51132: load_firmware error e\n");
 213                 return ret;
 214         }
 215         return 0;
 216 };
 217
 218 static int or51132_init(struct dvb_frontend* fe)
 219 {
 220         return 0;
 221 }
 222
 223 static int or51132_read_ber(struct dvb_frontend* fe, u32* ber)
 224 {
 225         *ber = 0;
 226         return 0;
 227 }
 228
 229 static int or51132_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
 230 {
 231         *ucblocks = 0;
 232         return 0;
 233 }
 234
 235 static int or51132_sleep(struct dvb_frontend* fe)
 236 {
 237         return 0;
 238 }
 239
 240 static int or51132_setmode(struct dvb_frontend* fe)
 241 {
 242         struct or51132_state* state = fe->demodulator_priv;
 243         unsigned char cmd_buf[4];
 244
 245         dprintk("setmode %d\n",(int)state->current_modulation);
 246         /* set operation mode in Receiver 1 register; */
 247         cmd_buf[0] = 0x04;
 248         cmd_buf[1] = 0x01;
 249         switch (state->current_modulation) {
 250         case QAM_256:
 251         case QAM_64:
 252         case QAM_AUTO:
 253                 /* Auto-deinterleave; MPEG ser, MPEG2tr, phase noise-high*/
 254                 cmd_buf[2] = 0x5F;
 255                 break;
 256         case VSB_8:
 257                 /* Auto CH, Auto NTSC rej, MPEGser, MPEG2tr, phase noise-high*/
 258                 cmd_buf[2] = 0x50;
 259                 break;
 260         default:
 261                 printk("setmode:Modulation set to unsupported value\n");
 262         };
 263         cmd_buf[3] = 0x00;
 264         if (i2c_writebytes(state,state->config->demod_address,
 265                            cmd_buf,3)) {
 266                 printk(KERN_WARNING "or51132: set_mode error 1\n");
 267                 return -1;
 268         }
 269         dprintk("or51132: set #1 to %02x\n", cmd_buf[2]);
 270
 271         /* Set operation mode in Receiver 6 register */
 272         cmd_buf[0] = 0x1C;
 273         switch (state->current_modulation) {
 274         case QAM_AUTO:
 275                 /* REC MODE Normal Carrier Lock */
 276                 cmd_buf[1] = 0x00;
 277                 /* Channel MODE Auto QAM64/256 */
 278                 cmd_buf[2] = 0x4f;
 279                 break;
 280         case QAM_256:
 281                 /* REC MODE Normal Carrier Lock */
 282                 cmd_buf[1] = 0x00;
 283                 /* Channel MODE QAM256 */
 284                 cmd_buf[2] = 0x45;
 285                 break;
 286         case QAM_64:
 287                 /* REC MODE Normal Carrier Lock */
 288                 cmd_buf[1] = 0x00;
 289                 /* Channel MODE QAM64 */
 290                 cmd_buf[2] = 0x43;
 291                 break;
 292         case VSB_8:
 293                  /* REC MODE inv IF spectrum, Normal */
 294                 cmd_buf[1] = 0x03;
 295                 /* Channel MODE ATSC/VSB8 */
 296                 cmd_buf[2] = 0x06;
 297                 break;
 298         default:
 299                 printk("setmode: Modulation set to unsupported value\n");
 300         };
 301         cmd_buf[3] = 0x00;
 302         msleep(20); /* 20ms */
 303         if (i2c_writebytes(state,state->config->demod_address,
 304                            cmd_buf,3)) {
 305                 printk(KERN_WARNING "or51132: set_mode error 2\n");
 306                 return -1;
 307         }
 308         dprintk("or51132: set #6 to 0x%02x%02x\n", cmd_buf[1], cmd_buf[2]);
 309
 310         return 0;
 311 }
 312
 313 static int or51132_set_parameters(struct dvb_frontend* fe,
 314                                   struct dvb_frontend_parameters *param)
 315 {
 316         int ret;
 317         u8 buf[4];
 318         struct or51132_state* state = fe->demodulator_priv;
 319         const struct firmware *fw;
 320
 321         /* Change only if we are actually changing the modulation */
 322         if (state->current_modulation != param->u.vsb.modulation) {
 323                 switch(param->u.vsb.modulation) {
 324                 case VSB_8:
 325                         dprintk("set_parameters VSB MODE\n");
 326                         printk("or51132: Waiting for firmware upload(%s)...\n",
 327                                OR51132_VSB_FIRMWARE);
 328                         ret = request_firmware(&fw, OR51132_VSB_FIRMWARE,
 329                                                &state->i2c->dev);
 330                         if (ret){
 331                                 printk(KERN_WARNING "or51132: No firmware up"
 332                                        "loaded(timeout or file not found?)\n");
 333                                 return ret;
 334                         }
 335                         /* Set non-punctured clock for VSB */
 336                         state->config->set_ts_params(fe, 0);
 337                         break;
 338                 case QAM_AUTO:
 339                 case QAM_64:
 340                 case QAM_256:
 341                         dprintk("set_parameters QAM MODE\n");
 342                         printk("or51132: Waiting for firmware upload(%s)...\n",
 343                                OR51132_QAM_FIRMWARE);
 344                         ret = request_firmware(&fw, OR51132_QAM_FIRMWARE,
 345                                                &state->i2c->dev);
 346                         if (ret){
 347                                 printk(KERN_WARNING "or51132: No firmware up"
 348                                        "loaded(timeout or file not found?)\n");
 349                                 return ret;
 350                         }
 351                         /* Set punctured clock for QAM */
 352                         state->config->set_ts_params(fe, 1);
 353                         break;
 354                 default:
 355                         printk("or51132:Modulation type(%d) UNSUPPORTED\n",
 356                                param->u.vsb.modulation);
 357                         return -1;
 358                 };
 359                 ret = or51132_load_firmware(fe, fw);
 360                 release_firmware(fw);
 361                 if (ret) {
 362                         printk(KERN_WARNING "or51132: Writing firmware to "
 363                                "device failed!\n");
 364                         return ret;
 365                 }
 366                 printk("or51132: Firmware upload complete.\n");
 367
 368                 state->current_modulation = param->u.vsb.modulation;
 369                 or51132_setmode(fe);
 370         }
 371
 372         dvb_pll_configure(state->config->pll_desc, buf,
 373                           param->frequency, 0);
 374         dprintk("set_parameters tuner bytes: 0x%02x 0x%02x "
 375                 "0x%02x 0x%02x\n",buf[0],buf[1],buf[2],buf[3]);
 376         if (i2c_writebytes(state, state->config->pll_address ,buf, 4))
 377                 printk(KERN_WARNING "or51132: set_parameters error "
 378                        "writing to tuner\n");
 379
 380         /* Set to current mode */
 381         or51132_setmode(fe);
 382
 383         /* Update current frequency */
 384         state->current_frequency = param->frequency;
 385         return 0;
 386 }
 387
 388 static int or51132_read_status(struct dvb_frontend* fe, fe_status_t* status)
 389 {
 390         struct or51132_state* state = fe->demodulator_priv;
 391         unsigned char rec_buf[2];
 392         unsigned char snd_buf[2];
 393         *status = 0;
 394
 395         /* Receiver Status */
 396         snd_buf[0]=0x04;
 397         snd_buf[1]=0x00;
 398         msleep(30); /* 30ms */
 399         if (i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
 400                 printk(KERN_WARNING "or51132: read_status write error\n");
 401                 return -1;
 402         }
 403         msleep(30); /* 30ms */
 404         if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
 405                 printk(KERN_WARNING "or51132: read_status read error\n");
 406                 return -1;
 407         }
 408         dprintk("read_status %x %x\n",rec_buf[0],rec_buf[1]);
 409
 410         if (rec_buf[1] & 0x01) { /* Receiver Lock */
 411                 *status |= FE_HAS_SIGNAL;
 412                 *status |= FE_HAS_CARRIER;
 413                 *status |= FE_HAS_VITERBI;
 414                 *status |= FE_HAS_SYNC;
 415                 *status |= FE_HAS_LOCK;
 416         }
 417         return 0;
 418 }
 419
 420 /* log10-1 table at .5 increments from 1 to 100.5 */
 421 static unsigned int i100x20log10[] = {
 422      0,  352,  602,  795,  954, 1088, 1204, 1306, 1397, 1480,
 423   1556, 1625, 1690, 1750, 1806, 1858, 1908, 1955, 2000, 2042,
 424   2082, 2121, 2158, 2193, 2227, 2260, 2292, 2322, 2352, 2380,
 425   2408, 2434, 2460, 2486, 2510, 2534, 2557, 2580, 2602, 2623,
 426   2644, 2664, 2684, 2704, 2723, 2742, 2760, 2778, 2795, 2813,
 427   2829, 2846, 2862, 2878, 2894, 2909, 2924, 2939, 2954, 2968,
 428   2982, 2996, 3010, 3023, 3037, 3050, 3062, 3075, 3088, 3100,
 429   3112, 3124, 3136, 3148, 3159, 3170, 3182, 3193, 3204, 3214,
 430   3225, 3236, 3246, 3256, 3266, 3276, 3286, 3296, 3306, 3316,
 431   3325, 3334, 3344, 3353, 3362, 3371, 3380, 3389, 3397, 3406,
 432   3415, 3423, 3432, 3440, 3448, 3456, 3464, 3472, 3480, 3488,
 433   3496, 3504, 3511, 3519, 3526, 3534, 3541, 3549, 3556, 3563,
 434   3570, 3577, 3584, 3591, 3598, 3605, 3612, 3619, 3625, 3632,
 435   3639, 3645, 3652, 3658, 3665, 3671, 3677, 3683, 3690, 3696,
 436   3702, 3708, 3714, 3720, 3726, 3732, 3738, 3744, 3750, 3755,
 437   3761, 3767, 3772, 3778, 3784, 3789, 3795, 3800, 3806, 3811,
 438   3816, 3822, 3827, 3832, 3838, 3843, 3848, 3853, 3858, 3863,
 439   3868, 3874, 3879, 3884, 3888, 3893, 3898, 3903, 3908, 3913,
 440   3918, 3922, 3927, 3932, 3936, 3941, 3946, 3950, 3955, 3960,
 441   3964, 3969, 3973, 3978, 3982, 3986, 3991, 3995, 4000, 4004,
 442 };
 443
 444 static unsigned int denom[] = {1,1,100,1000,10000,100000,1000000,10000000,100000000};
 445
 446 static unsigned int i20Log10(unsigned short val)
 447 {
 448         unsigned int rntval = 100;
 449         unsigned int tmp = val;
 450         unsigned int exp = 1;
 451
 452         while(tmp > 100) {tmp /= 100; exp++;}
 453
 454         val = (2 * val)/denom[exp];
 455         if (exp > 1) rntval = 2000*exp;
 456
 457         rntval += i100x20log10[val];
 458         return rntval;
 459 }
 460
 461 static int or51132_read_signal_strength(struct dvb_frontend* fe, u16* strength)
 462 {
 463         struct or51132_state* state = fe->demodulator_priv;
 464         unsigned char rec_buf[2];
 465         unsigned char snd_buf[2];
 466         u8 rcvr_stat;
 467         u16 snr_equ;
 468         u32 signal_strength;
 469         int usK;
 470
 471         snd_buf[0]=0x04;
 472         snd_buf[1]=0x02; /* SNR after Equalizer */
 473         msleep(30); /* 30ms */
 474         if (i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
 475                 printk(KERN_WARNING "or51132: read_status write error\n");
 476                 return -1;
 477         }
 478         msleep(30); /* 30ms */
 479         if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
 480                 printk(KERN_WARNING "or51132: read_status read error\n");
 481                 return -1;
 482         }
 483         snr_equ = rec_buf[0] | (rec_buf[1] << 8);
 484         dprintk("read_signal_strength snr_equ %x %x (%i)\n",rec_buf[0],rec_buf[1],snr_equ);
 485
 486         /* Receiver Status */
 487         snd_buf[0]=0x04;
 488         snd_buf[1]=0x00;
 489         msleep(30); /* 30ms */
 490         if (i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
 491                 printk(KERN_WARNING "or51132: read_signal_strength read_status write error\n");
 492                 return -1;
 493         }
 494         msleep(30); /* 30ms */
 495         if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
 496                 printk(KERN_WARNING "or51132: read_signal_strength read_status read error\n");
 497                 return -1;
 498         }
 499         dprintk("read_signal_strength read_status %x %x\n",rec_buf[0],rec_buf[1]);
 500         rcvr_stat = rec_buf[1];
 501         usK = (rcvr_stat & 0x10) ? 3 : 0;
 502
 503         /* The value reported back from the frontend will be FFFF=100% 0000=0% */
 504         signal_strength = (((8952 - i20Log10(snr_equ) - usK*100)/3+5)*65535)/1000;
 505         if (signal_strength > 0xffff)
 506                 *strength = 0xffff;
 507         else
 508                 *strength = signal_strength;
 509         dprintk("read_signal_strength %i\n",*strength);
 510
 511         return 0;
 512 }
 513
 514 static int or51132_read_snr(struct dvb_frontend* fe, u16* snr)
 515 {
 516         struct or51132_state* state = fe->demodulator_priv;
 517         unsigned char rec_buf[2];
 518         unsigned char snd_buf[2];
 519         u16 snr_equ;
 520
 521         snd_buf[0]=0x04;
 522         snd_buf[1]=0x02; /* SNR after Equalizer */
 523         msleep(30); /* 30ms */
 524         if (i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
 525                 printk(KERN_WARNING "or51132: read_snr write error\n");
 526                 return -1;
 527         }
 528         msleep(30); /* 30ms */
 529         if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
 530                 printk(KERN_WARNING "or51132: read_snr dvr read error\n");
 531                 return -1;
 532         }
 533         snr_equ = rec_buf[0] | (rec_buf[1] << 8);
 534         dprintk("read_snr snr_equ %x %x (%i)\n",rec_buf[0],rec_buf[1],snr_equ);
 535
 536         *snr = 0xFFFF - snr_equ;
 537         dprintk("read_snr %i\n",*snr);
 538
 539         return 0;
 540 }
 541
 542 static int or51132_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fe_tune_settings)
 543 {
 544         fe_tune_settings->min_delay_ms = 500;
 545         fe_tune_settings->step_size = 0;
 546         fe_tune_settings->max_drift = 0;
 547
 548         return 0;
 549 }
 550
 551 static void or51132_release(struct dvb_frontend* fe)
 552 {
 553         struct or51132_state* state = fe->demodulator_priv;
 554         kfree(state);
 555 }
 556
 557 static struct dvb_frontend_ops or51132_ops;
 558
 559 struct dvb_frontend* or51132_attach(const struct or51132_config* config,
 560                                     struct i2c_adapter* i2c)
 561 {
 562         struct or51132_state* state = NULL;
 563
 564         /* Allocate memory for the internal state */
 565         state = kmalloc(sizeof(struct or51132_state), GFP_KERNEL);
 566         if (state == NULL)
 567                 goto error;
 568
 569         /* Setup the state */
 570         state->config = config;
 571         state->i2c = i2c;
 572         memcpy(&state->ops, &or51132_ops, sizeof(struct dvb_frontend_ops));
 573         state->current_frequency = -1;
 574         state->current_modulation = -1;
 575
 576         /* Create dvb_frontend */
 577         state->frontend.ops = &state->ops;
 578         state->frontend.demodulator_priv = state;
 579         return &state->frontend;
 580
 581 error:
 582         kfree(state);
 583         return NULL;
 584 }
 585
 586 static struct dvb_frontend_ops or51132_ops = {
 587
 588         .info = {
 589                 .name                   = "Oren OR51132 VSB/QAM Frontend",
 590                 .type                   = FE_ATSC,
 591                 .frequency_min          = 44000000,
 592                 .frequency_max          = 958000000,
 593                 .frequency_stepsize     = 166666,
 594                 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
 595                         FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
 596                         FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_QAM_AUTO |
 597                         FE_CAN_8VSB
 598         },
 599
 600         .release = or51132_release,
 601
 602         .init = or51132_init,
 603         .sleep = or51132_sleep,
 604
 605         .set_frontend = or51132_set_parameters,
 606         .get_tune_settings = or51132_get_tune_settings,
 607
 608         .read_status = or51132_read_status,
 609         .read_ber = or51132_read_ber,
 610         .read_signal_strength = or51132_read_signal_strength,
 611         .read_snr = or51132_read_snr,
 612         .read_ucblocks = or51132_read_ucblocks,
 613 };
 614
 615 module_param(debug, int, 0644);
 616 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
 617
 618 MODULE_DESCRIPTION("OR51132 ATSC [pcHDTV HD-3000] (8VSB & ITU J83 AnnexB FEC QAM64/256) Demodulator Driver");
 619 MODULE_AUTHOR("Kirk Lapray");
 620 MODULE_LICENSE("GPL");
 621
 622 EXPORT_SYMBOL(or51132_attach);
 623
 624 /*
 625  * Local variables:
 626  * c-basic-offset: 8
 627  * End:
 628  */