2 Conexant cx24120/cx24118 - DVBS/S2 Satellite demod/tuner driver
4 Copyright (C) 2008 Patrick Boettcher <pb@linuxtv.org>
5 Copyright (C) 2009 Sergey Tyurin <forum.free-x.de>
6 Updated 2012 by Jannis Achstetter <jannis_achstetter@web.de>
7 Copyright (C) 2015 Jemma Denson <jdenson@gmail.com>
9 Refactored & simplified driver
10 Updated to work with delivery system supplied by DVBv5
11 Add frequency, fec & pilot to get_frontend
13 Cards supported: Technisat Skystar S2
15 This program is free software; you can redistribute it and/or modify
16 it under the terms of the GNU General Public License as published by
17 the Free Software Foundation; either version 2 of the License, or
18 (at your option) any later version.
20 This program is distributed in the hope that it will be useful,
21 but WITHOUT ANY WARRANTY; without even the implied warranty of
22 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 GNU General Public License for more details.
26 #include <linux/slab.h>
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/moduleparam.h>
30 #include <linux/init.h>
31 #include <linux/firmware.h>
32 #include "dvb_frontend.h"
35 #define CX24120_SEARCH_RANGE_KHZ 5000
36 #define CX24120_FIRMWARE "dvb-fe-cx24120-1.20.58.2.fw"
38 /* cx24120 i2c registers */
39 #define CX24120_REG_CMD_START 0x00 /* write cmd_id */
40 #define CX24120_REG_CMD_ARGS 0x01 /* write command arguments */
41 #define CX24120_REG_CMD_END 0x1f /* write 0x01 for end */
43 #define CX24120_REG_MAILBOX 0x33
44 #define CX24120_REG_FREQ3 0x34 /* frequency */
45 #define CX24120_REG_FREQ2 0x35
46 #define CX24120_REG_FREQ1 0x36
48 #define CX24120_REG_FECMODE 0x39 /* FEC status */
49 #define CX24120_REG_STATUS 0x3a /* Tuner status */
50 #define CX24120_REG_SIGSTR_H 0x3a /* Signal strength high */
51 #define CX24120_REG_SIGSTR_L 0x3b /* Signal strength low byte */
52 #define CX24120_REG_QUALITY_H 0x40 /* SNR high byte */
53 #define CX24120_REG_QUALITY_L 0x41 /* SNR low byte */
55 #define CX24120_REG_BER_HH 0x47 /* BER high byte of high word */
56 #define CX24120_REG_BER_HL 0x48 /* BER low byte of high word */
57 #define CX24120_REG_BER_LH 0x49 /* BER high byte of low word */
58 #define CX24120_REG_BER_LL 0x4a /* BER low byte of low word */
60 #define CX24120_REG_UCB_H 0x50 /* UCB high byte */
61 #define CX24120_REG_UCB_L 0x51 /* UCB low byte */
63 #define CX24120_REG_CLKDIV 0xe6
64 #define CX24120_REG_RATEDIV 0xf0
66 #define CX24120_REG_REVISION 0xff /* Chip revision (ro) */
68 /* Command messages */
69 enum command_message_id
{
70 CMD_VCO_SET
= 0x10, /* cmd.len = 12; */
71 CMD_TUNEREQUEST
= 0x11, /* cmd.len = 15; */
73 CMD_MPEG_ONOFF
= 0x13, /* cmd.len = 4; */
74 CMD_MPEG_INIT
= 0x14, /* cmd.len = 7; */
75 CMD_BANDWIDTH
= 0x15, /* cmd.len = 12; */
76 CMD_CLOCK_READ
= 0x16, /* read clock */
77 CMD_CLOCK_SET
= 0x17, /* cmd.len = 10; */
79 CMD_DISEQC_MSG1
= 0x20, /* cmd.len = 11; */
80 CMD_DISEQC_MSG2
= 0x21, /* cmd.len = d->msg_len + 6; */
81 CMD_SETVOLTAGE
= 0x22, /* cmd.len = 2; */
82 CMD_SETTONE
= 0x23, /* cmd.len = 4; */
83 CMD_DISEQC_BURST
= 0x24, /* cmd.len not used !!! */
85 CMD_READ_SNR
= 0x1a, /* Read signal strength */
86 CMD_START_TUNER
= 0x1b, /* ??? */
90 CMD_TUNER_INIT
= 0x3c, /* cmd.len = 0x03; */
93 #define CX24120_MAX_CMD_LEN 30
96 #define CX24120_PILOT_OFF 0x00
97 #define CX24120_PILOT_ON 0x40
98 #define CX24120_PILOT_AUTO 0x80
101 #define CX24120_HAS_SIGNAL 0x01
102 #define CX24120_HAS_CARRIER 0x02
103 #define CX24120_HAS_VITERBI 0x04
104 #define CX24120_HAS_LOCK 0x08
105 #define CX24120_HAS_UNK1 0x10
106 #define CX24120_HAS_UNK2 0x20
107 #define CX24120_STATUS_MASK 0x0f
108 #define CX24120_SIGNAL_MASK 0xc0
110 #define info(args...) pr_info("cx24120: " args)
111 #define err(args...) pr_err("cx24120: ### ERROR: " args)
113 /* The Demod/Tuner can't easily provide these, we cache them */
114 struct cx24120_tuning
{
117 fe_spectral_inversion_t inversion
;
120 fe_delivery_system_t delsys
;
121 fe_modulation_t modulation
;
134 struct cx24120_state
{
135 struct i2c_adapter
*i2c
;
136 const struct cx24120_config
*config
;
137 struct dvb_frontend frontend
;
143 /* current and next tuning parameters */
144 struct cx24120_tuning dcur
;
145 struct cx24120_tuning dnxt
;
148 /* Command message to firmware */
152 u8 arg
[CX24120_MAX_CMD_LEN
];
155 /* Read single register */
156 static int cx24120_readreg(struct cx24120_state
*state
, u8 reg
)
160 struct i2c_msg msg
[] = {
161 { .addr
= state
->config
->i2c_addr
,
166 .addr
= state
->config
->i2c_addr
,
173 ret
= i2c_transfer(state
->i2c
, msg
, 2);
175 err("Read error: reg=0x%02x, ret=%i)\n", reg
, ret
);
179 dev_dbg(&state
->i2c
->dev
, "%s: reg=0x%02x; data=0x%02x\n",
185 /* Write single register */
186 static int cx24120_writereg(struct cx24120_state
*state
, u8 reg
, u8 data
)
188 u8 buf
[] = { reg
, data
};
189 struct i2c_msg msg
= {
190 .addr
= state
->config
->i2c_addr
,
197 ret
= i2c_transfer(state
->i2c
, &msg
, 1);
199 err("Write error: i2c_write error(err == %i, 0x%02x: 0x%02x)\n",
204 dev_dbg(&state
->i2c
->dev
, "%s: reg=0x%02x; data=0x%02x\n",
205 __func__
, reg
, data
);
210 /* Write multiple registers in chunks of i2c_wr_max-sized buffers */
211 static int cx24120_writeregs(struct cx24120_state
*state
,
212 u8 reg
, const u8
*values
, u16 len
, u8 incr
)
215 u16 max
= state
->config
->i2c_wr_max
> 0 ?
216 state
->config
->i2c_wr_max
:
219 struct i2c_msg msg
= {
220 .addr
= state
->config
->i2c_addr
,
224 msg
.buf
= kmalloc(max
+ 1, GFP_KERNEL
);
230 msg
.len
= len
> max
? max
: len
;
231 memcpy(&msg
.buf
[1], values
, msg
.len
);
233 len
-= msg
.len
; /* data length revers counter */
234 values
+= msg
.len
; /* incr data pointer */
238 msg
.len
++; /* don't forget the addr byte */
240 ret
= i2c_transfer(state
->i2c
, &msg
, 1);
242 err("i2c_write error(err == %i, 0x%02x)\n", ret
, reg
);
246 dev_dbg(&state
->i2c
->dev
,
247 "%s: reg=0x%02x; data=%*ph\n",
248 __func__
, reg
, msg
.len
, msg
.buf
+ 1);
258 static struct dvb_frontend_ops cx24120_ops
;
260 struct dvb_frontend
*cx24120_attach(const struct cx24120_config
*config
,
261 struct i2c_adapter
*i2c
)
263 struct cx24120_state
*state
;
266 info("Conexant cx24120/cx24118 - DVBS/S2 Satellite demod/tuner\n");
267 state
= kzalloc(sizeof(*state
), GFP_KERNEL
);
269 err("Unable to allocate memory for cx24120_state\n");
273 /* setup the state */
274 state
->config
= config
;
277 /* check if the demod is present and has proper type */
278 demod_rev
= cx24120_readreg(state
, CX24120_REG_REVISION
);
281 info("Demod cx24120 rev. 0x07 detected.\n");
284 info("Demod cx24120 rev. 0x05 detected.\n");
287 err("Unsupported demod revision: 0x%x detected.\n", demod_rev
);
291 /* create dvb_frontend */
292 state
->cold_init
= 0;
293 memcpy(&state
->frontend
.ops
, &cx24120_ops
,
294 sizeof(struct dvb_frontend_ops
));
295 state
->frontend
.demodulator_priv
= state
;
297 info("Conexant cx24120/cx24118 attached.\n");
298 return &state
->frontend
;
304 EXPORT_SYMBOL(cx24120_attach
);
306 static int cx24120_test_rom(struct cx24120_state
*state
)
310 err
= cx24120_readreg(state
, 0xfd);
312 ret
= cx24120_readreg(state
, 0xdf) & 0xfe;
313 err
= cx24120_writereg(state
, 0xdf, ret
);
318 static int cx24120_read_snr(struct dvb_frontend
*fe
, u16
*snr
)
320 struct cx24120_state
*state
= fe
->demodulator_priv
;
322 *snr
= (cx24120_readreg(state
, CX24120_REG_QUALITY_H
) << 8) |
323 (cx24120_readreg(state
, CX24120_REG_QUALITY_L
));
324 dev_dbg(&state
->i2c
->dev
, "%s: read SNR index = %d\n", __func__
, *snr
);
329 static int cx24120_read_ber(struct dvb_frontend
*fe
, u32
*ber
)
331 struct cx24120_state
*state
= fe
->demodulator_priv
;
333 *ber
= (cx24120_readreg(state
, CX24120_REG_BER_HH
) << 24) |
334 (cx24120_readreg(state
, CX24120_REG_BER_HL
) << 16) |
335 (cx24120_readreg(state
, CX24120_REG_BER_LH
) << 8) |
336 cx24120_readreg(state
, CX24120_REG_BER_LL
);
337 dev_dbg(&state
->i2c
->dev
, "%s: read BER index = %d\n", __func__
, *ber
);
342 static int cx24120_msg_mpeg_output_global_config(struct cx24120_state
*state
,
345 /* Check if we're running a command that needs to disable mpeg out */
346 static void cx24120_check_cmd(struct cx24120_state
*state
, u8 id
)
349 case CMD_TUNEREQUEST
:
351 case CMD_DISEQC_MSG1
:
352 case CMD_DISEQC_MSG2
:
355 cx24120_msg_mpeg_output_global_config(state
, 0);
356 /* Old driver would do a msleep(100) here */
362 /* Send a message to the firmware */
363 static int cx24120_message_send(struct cx24120_state
*state
,
364 struct cx24120_cmd
*cmd
)
368 if (state
->mpeg_enabled
) {
369 /* Disable mpeg out on certain commands */
370 cx24120_check_cmd(state
, cmd
->id
);
373 ret
= cx24120_writereg(state
, CX24120_REG_CMD_START
, cmd
->id
);
374 ret
= cx24120_writeregs(state
, CX24120_REG_CMD_ARGS
, &cmd
->arg
[0],
376 ret
= cx24120_writereg(state
, CX24120_REG_CMD_END
, 0x01);
379 while (cx24120_readreg(state
, CX24120_REG_CMD_END
)) {
383 err("Error sending message to firmware\n");
387 dev_dbg(&state
->i2c
->dev
, "%s: Successfully send message 0x%02x\n",
393 /* Send a message and fill arg[] with the results */
394 static int cx24120_message_sendrcv(struct cx24120_state
*state
,
395 struct cx24120_cmd
*cmd
, u8 numreg
)
399 if (numreg
> CX24120_MAX_CMD_LEN
) {
400 err("Too many registers to read. cmd->reg = %d", numreg
);
404 ret
= cx24120_message_send(state
, cmd
);
411 /* Read numreg registers starting from register cmd->len */
412 for (i
= 0; i
< numreg
; i
++)
413 cmd
->arg
[i
] = cx24120_readreg(state
, (cmd
->len
+ i
+ 1));
418 static int cx24120_read_signal_strength(struct dvb_frontend
*fe
,
419 u16
*signal_strength
)
421 struct cx24120_state
*state
= fe
->demodulator_priv
;
422 struct cx24120_cmd cmd
;
423 int ret
, sigstr_h
, sigstr_l
;
425 cmd
.id
= CMD_READ_SNR
;
429 ret
= cx24120_message_send(state
, &cmd
);
431 err("error reading signal strength\n");
436 sigstr_h
= (cx24120_readreg(state
, CX24120_REG_SIGSTR_H
) >> 6) << 8;
437 sigstr_l
= cx24120_readreg(state
, CX24120_REG_SIGSTR_L
);
438 dev_dbg(&state
->i2c
->dev
, "%s: Signal strength from firmware= 0x%x\n",
439 __func__
, (sigstr_h
| sigstr_l
));
442 *signal_strength
= ((sigstr_h
| sigstr_l
) << 5) & 0x0000ffff;
443 dev_dbg(&state
->i2c
->dev
, "%s: Signal strength= 0x%x\n",
444 __func__
, *signal_strength
);
449 static int cx24120_msg_mpeg_output_global_config(struct cx24120_state
*state
,
452 struct cx24120_cmd cmd
;
455 cmd
.id
= CMD_MPEG_ONOFF
;
459 cmd
.arg
[2] = enable
? 0 : (u8
)(-1);
462 ret
= cx24120_message_send(state
, &cmd
);
464 dev_dbg(&state
->i2c
->dev
,
465 "%s: Failed to set MPEG output to %s\n",
466 __func__
, enable
? "enabled" : "disabled");
470 state
->mpeg_enabled
= enable
;
471 dev_dbg(&state
->i2c
->dev
, "%s: MPEG output %s\n",
472 __func__
, enable
? "enabled" : "disabled");
477 static int cx24120_msg_mpeg_output_config(struct cx24120_state
*state
, u8 seq
)
479 struct cx24120_cmd cmd
;
480 struct cx24120_initial_mpeg_config i
=
481 state
->config
->initial_mpeg_config
;
483 cmd
.id
= CMD_MPEG_INIT
;
485 cmd
.arg
[0] = seq
; /* sequental number - can be 0,1,2 */
486 cmd
.arg
[1] = ((i
.x1
& 0x01) << 1) | ((i
.x1
>> 1) & 0x01);
489 cmd
.arg
[4] = ((i
.x2
>> 1) & 0x01);
490 cmd
.arg
[5] = (i
.x2
& 0xf0) | (i
.x3
& 0x0f);
493 return cx24120_message_send(state
, &cmd
);
496 static int cx24120_diseqc_send_burst(struct dvb_frontend
*fe
,
497 fe_sec_mini_cmd_t burst
)
499 struct cx24120_state
*state
= fe
->demodulator_priv
;
500 struct cx24120_cmd cmd
;
502 /* Yes, cmd.len is set to zero. The old driver
503 * didn't specify any len, but also had a
504 * memset 0 before every use of the cmd struct
505 * which would have set it to zero.
506 * This quite probably needs looking into.
508 cmd
.id
= CMD_DISEQC_BURST
;
514 dev_dbg(&state
->i2c
->dev
, "%s: burst sent.\n", __func__
);
516 return cx24120_message_send(state
, &cmd
);
519 static int cx24120_set_tone(struct dvb_frontend
*fe
, fe_sec_tone_mode_t tone
)
521 struct cx24120_state
*state
= fe
->demodulator_priv
;
522 struct cx24120_cmd cmd
;
524 dev_dbg(&state
->i2c
->dev
, "%s(%d)\n", __func__
, tone
);
526 if ((tone
!= SEC_TONE_ON
) && (tone
!= SEC_TONE_OFF
)) {
527 err("Invalid tone=%d\n", tone
);
531 cmd
.id
= CMD_SETTONE
;
536 cmd
.arg
[3] = (tone
== SEC_TONE_ON
) ? 0x01 : 0x00;
538 return cx24120_message_send(state
, &cmd
);
541 static int cx24120_set_voltage(struct dvb_frontend
*fe
,
542 fe_sec_voltage_t voltage
)
544 struct cx24120_state
*state
= fe
->demodulator_priv
;
545 struct cx24120_cmd cmd
;
547 dev_dbg(&state
->i2c
->dev
, "%s(%d)\n", __func__
, voltage
);
549 cmd
.id
= CMD_SETVOLTAGE
;
552 cmd
.arg
[1] = (voltage
== SEC_VOLTAGE_18
) ? 0x01 : 0x00;
554 return cx24120_message_send(state
, &cmd
);
557 static int cx24120_send_diseqc_msg(struct dvb_frontend
*fe
,
558 struct dvb_diseqc_master_cmd
*d
)
560 struct cx24120_state
*state
= fe
->demodulator_priv
;
561 struct cx24120_cmd cmd
;
564 dev_dbg(&state
->i2c
->dev
, "%s()\n", __func__
);
566 cmd
.id
= CMD_DISEQC_MSG1
;
580 if (cx24120_message_send(state
, &cmd
)) {
581 err("send 1st message(0x%x) failed\n", cmd
.id
);
585 cmd
.id
= CMD_DISEQC_MSG2
;
586 cmd
.len
= d
->msg_len
+ 6;
592 cmd
.arg
[5] = d
->msg_len
;
594 memcpy(&cmd
.arg
[6], &d
->msg
, d
->msg_len
);
596 if (cx24120_message_send(state
, &cmd
)) {
597 err("send 2nd message(0x%x) failed\n", cmd
.id
);
603 if (!(cx24120_readreg(state
, 0x93) & 0x01)) {
604 dev_dbg(&state
->i2c
->dev
,
605 "%s: diseqc sequence sent success\n",
611 } while (back_count
);
613 err("Too long waiting for diseqc.\n");
617 static void cx24120_set_clock_ratios(struct dvb_frontend
*fe
);
619 /* Read current tuning status */
620 static int cx24120_read_status(struct dvb_frontend
*fe
, fe_status_t
*status
)
622 struct cx24120_state
*state
= fe
->demodulator_priv
;
625 lock
= cx24120_readreg(state
, CX24120_REG_STATUS
);
627 dev_dbg(&state
->i2c
->dev
, "%s() status = 0x%02x\n",
632 if (lock
& CX24120_HAS_SIGNAL
)
633 *status
= FE_HAS_SIGNAL
;
634 if (lock
& CX24120_HAS_CARRIER
)
635 *status
|= FE_HAS_CARRIER
;
636 if (lock
& CX24120_HAS_VITERBI
)
637 *status
|= FE_HAS_VITERBI
| FE_HAS_SYNC
;
638 if (lock
& CX24120_HAS_LOCK
)
639 *status
|= FE_HAS_LOCK
;
641 /* TODO: is FE_HAS_SYNC in the right place?
642 * Other cx241xx drivers have this slightly
645 /* Set the clock once tuned in */
646 if (state
->need_clock_set
&& *status
& FE_HAS_LOCK
) {
647 /* Set clock ratios */
648 cx24120_set_clock_ratios(fe
);
650 /* Old driver would do a msleep(200) here */
652 /* Renable mpeg output */
653 if (!state
->mpeg_enabled
)
654 cx24120_msg_mpeg_output_global_config(state
, 1);
656 state
->need_clock_set
= 0;
662 /* FEC & modulation lookup table
663 * Used for decoding the REG_FECMODE register
666 static struct cx24120_modfec
{
667 fe_delivery_system_t delsys
;
671 } modfec_lookup_table
[] = {
672 /*delsys mod fec val */
673 { SYS_DVBS
, QPSK
, FEC_1_2
, 0x01 },
674 { SYS_DVBS
, QPSK
, FEC_2_3
, 0x02 },
675 { SYS_DVBS
, QPSK
, FEC_3_4
, 0x03 },
676 { SYS_DVBS
, QPSK
, FEC_4_5
, 0x04 },
677 { SYS_DVBS
, QPSK
, FEC_5_6
, 0x05 },
678 { SYS_DVBS
, QPSK
, FEC_6_7
, 0x06 },
679 { SYS_DVBS
, QPSK
, FEC_7_8
, 0x07 },
681 { SYS_DVBS2
, QPSK
, FEC_1_2
, 0x04 },
682 { SYS_DVBS2
, QPSK
, FEC_3_5
, 0x05 },
683 { SYS_DVBS2
, QPSK
, FEC_2_3
, 0x06 },
684 { SYS_DVBS2
, QPSK
, FEC_3_4
, 0x07 },
685 { SYS_DVBS2
, QPSK
, FEC_4_5
, 0x08 },
686 { SYS_DVBS2
, QPSK
, FEC_5_6
, 0x09 },
687 { SYS_DVBS2
, QPSK
, FEC_8_9
, 0x0a },
688 { SYS_DVBS2
, QPSK
, FEC_9_10
, 0x0b },
690 { SYS_DVBS2
, PSK_8
, FEC_3_5
, 0x0c },
691 { SYS_DVBS2
, PSK_8
, FEC_2_3
, 0x0d },
692 { SYS_DVBS2
, PSK_8
, FEC_3_4
, 0x0e },
693 { SYS_DVBS2
, PSK_8
, FEC_5_6
, 0x0f },
694 { SYS_DVBS2
, PSK_8
, FEC_8_9
, 0x10 },
695 { SYS_DVBS2
, PSK_8
, FEC_9_10
, 0x11 },
698 /* Retrieve current fec, modulation & pilot values */
699 static int cx24120_get_fec(struct dvb_frontend
*fe
)
701 struct dtv_frontend_properties
*c
= &fe
->dtv_property_cache
;
702 struct cx24120_state
*state
= fe
->demodulator_priv
;
707 dev_dbg(&state
->i2c
->dev
, "%s()\n", __func__
);
709 ret
= cx24120_readreg(state
, CX24120_REG_FECMODE
);
710 fec
= ret
& 0x3f; /* Lower 6 bits */
712 dev_dbg(&state
->i2c
->dev
, "%s: Get FEC: %d\n", __func__
, fec
);
714 for (idx
= 0; idx
< ARRAY_SIZE(modfec_lookup_table
); idx
++) {
715 if (modfec_lookup_table
[idx
].delsys
!= state
->dcur
.delsys
)
717 if (modfec_lookup_table
[idx
].val
!= fec
)
723 if (idx
>= ARRAY_SIZE(modfec_lookup_table
)) {
724 dev_dbg(&state
->i2c
->dev
, "%s: Couldn't find fec!\n",
729 /* save values back to cache */
730 c
->modulation
= modfec_lookup_table
[idx
].mod
;
731 c
->fec_inner
= modfec_lookup_table
[idx
].fec
;
732 c
->pilot
= (ret
& 0x80) ? PILOT_ON
: PILOT_OFF
;
734 dev_dbg(&state
->i2c
->dev
,
735 "%s: mod(%d), fec(%d), pilot(%d)\n",
737 c
->modulation
, c
->fec_inner
, c
->pilot
);
742 /* Clock ratios lookup table
744 * Values obtained from much larger table in old driver
745 * which had numerous entries which would never match.
747 * There's probably some way of calculating these but I
748 * can't determine the pattern
750 static struct cx24120_clock_ratios_table
{
751 fe_delivery_system_t delsys
;
758 } clock_ratios_table
[] = {
759 /*delsys pilot mod fec m_rat n_rat rate */
760 { SYS_DVBS2
, PILOT_OFF
, QPSK
, FEC_1_2
, 273088, 254505, 274 },
761 { SYS_DVBS2
, PILOT_OFF
, QPSK
, FEC_3_5
, 17272, 13395, 330 },
762 { SYS_DVBS2
, PILOT_OFF
, QPSK
, FEC_2_3
, 24344, 16967, 367 },
763 { SYS_DVBS2
, PILOT_OFF
, QPSK
, FEC_3_4
, 410788, 254505, 413 },
764 { SYS_DVBS2
, PILOT_OFF
, QPSK
, FEC_4_5
, 438328, 254505, 440 },
765 { SYS_DVBS2
, PILOT_OFF
, QPSK
, FEC_5_6
, 30464, 16967, 459 },
766 { SYS_DVBS2
, PILOT_OFF
, QPSK
, FEC_8_9
, 487832, 254505, 490 },
767 { SYS_DVBS2
, PILOT_OFF
, QPSK
, FEC_9_10
, 493952, 254505, 496 },
768 { SYS_DVBS2
, PILOT_OFF
, PSK_8
, FEC_3_5
, 328168, 169905, 494 },
769 { SYS_DVBS2
, PILOT_OFF
, PSK_8
, FEC_2_3
, 24344, 11327, 550 },
770 { SYS_DVBS2
, PILOT_OFF
, PSK_8
, FEC_3_4
, 410788, 169905, 618 },
771 { SYS_DVBS2
, PILOT_OFF
, PSK_8
, FEC_5_6
, 30464, 11327, 688 },
772 { SYS_DVBS2
, PILOT_OFF
, PSK_8
, FEC_8_9
, 487832, 169905, 735 },
773 { SYS_DVBS2
, PILOT_OFF
, PSK_8
, FEC_9_10
, 493952, 169905, 744 },
774 { SYS_DVBS2
, PILOT_ON
, QPSK
, FEC_1_2
, 273088, 260709, 268 },
775 { SYS_DVBS2
, PILOT_ON
, QPSK
, FEC_3_5
, 328168, 260709, 322 },
776 { SYS_DVBS2
, PILOT_ON
, QPSK
, FEC_2_3
, 121720, 86903, 358 },
777 { SYS_DVBS2
, PILOT_ON
, QPSK
, FEC_3_4
, 410788, 260709, 403 },
778 { SYS_DVBS2
, PILOT_ON
, QPSK
, FEC_4_5
, 438328, 260709, 430 },
779 { SYS_DVBS2
, PILOT_ON
, QPSK
, FEC_5_6
, 152320, 86903, 448 },
780 { SYS_DVBS2
, PILOT_ON
, QPSK
, FEC_8_9
, 487832, 260709, 479 },
781 { SYS_DVBS2
, PILOT_ON
, QPSK
, FEC_9_10
, 493952, 260709, 485 },
782 { SYS_DVBS2
, PILOT_ON
, PSK_8
, FEC_3_5
, 328168, 173853, 483 },
783 { SYS_DVBS2
, PILOT_ON
, PSK_8
, FEC_2_3
, 121720, 57951, 537 },
784 { SYS_DVBS2
, PILOT_ON
, PSK_8
, FEC_3_4
, 410788, 173853, 604 },
785 { SYS_DVBS2
, PILOT_ON
, PSK_8
, FEC_5_6
, 152320, 57951, 672 },
786 { SYS_DVBS2
, PILOT_ON
, PSK_8
, FEC_8_9
, 487832, 173853, 718 },
787 { SYS_DVBS2
, PILOT_ON
, PSK_8
, FEC_9_10
, 493952, 173853, 727 },
788 { SYS_DVBS
, PILOT_OFF
, QPSK
, FEC_1_2
, 152592, 152592, 256 },
789 { SYS_DVBS
, PILOT_OFF
, QPSK
, FEC_2_3
, 305184, 228888, 341 },
790 { SYS_DVBS
, PILOT_OFF
, QPSK
, FEC_3_4
, 457776, 305184, 384 },
791 { SYS_DVBS
, PILOT_OFF
, QPSK
, FEC_5_6
, 762960, 457776, 427 },
792 { SYS_DVBS
, PILOT_OFF
, QPSK
, FEC_7_8
, 1068144, 610368, 448 },
795 /* Set clock ratio from lookup table */
796 static void cx24120_set_clock_ratios(struct dvb_frontend
*fe
)
798 struct dtv_frontend_properties
*c
= &fe
->dtv_property_cache
;
799 struct cx24120_state
*state
= fe
->demodulator_priv
;
800 struct cx24120_cmd cmd
;
803 /* Find fec, modulation, pilot */
804 ret
= cx24120_get_fec(fe
);
808 /* Find the clock ratios in the lookup table */
809 for (idx
= 0; idx
< ARRAY_SIZE(clock_ratios_table
); idx
++) {
810 if (clock_ratios_table
[idx
].delsys
!= state
->dcur
.delsys
)
812 if (clock_ratios_table
[idx
].mod
!= c
->modulation
)
814 if (clock_ratios_table
[idx
].fec
!= c
->fec_inner
)
816 if (clock_ratios_table
[idx
].pilot
!= c
->pilot
)
822 if (idx
>= ARRAY_SIZE(clock_ratios_table
)) {
823 info("Clock ratio not found - data reception in danger\n");
827 /* Read current values? */
828 cmd
.id
= CMD_CLOCK_READ
;
831 ret
= cx24120_message_sendrcv(state
, &cmd
, 6);
834 /* in cmd[0]-[5] - result */
836 dev_dbg(&state
->i2c
->dev
,
837 "%s: m=%d, n=%d; idx: %d m=%d, n=%d, rate=%d\n",
839 cmd
.arg
[2] | (cmd
.arg
[1] << 8) | (cmd
.arg
[0] << 16),
840 cmd
.arg
[5] | (cmd
.arg
[4] << 8) | (cmd
.arg
[3] << 16),
842 clock_ratios_table
[idx
].m_rat
,
843 clock_ratios_table
[idx
].n_rat
,
844 clock_ratios_table
[idx
].rate
);
847 cmd
.id
= CMD_CLOCK_SET
;
851 cmd
.arg
[2] = (clock_ratios_table
[idx
].m_rat
>> 16) & 0xff;
852 cmd
.arg
[3] = (clock_ratios_table
[idx
].m_rat
>> 8) & 0xff;
853 cmd
.arg
[4] = (clock_ratios_table
[idx
].m_rat
>> 0) & 0xff;
854 cmd
.arg
[5] = (clock_ratios_table
[idx
].n_rat
>> 16) & 0xff;
855 cmd
.arg
[6] = (clock_ratios_table
[idx
].n_rat
>> 8) & 0xff;
856 cmd
.arg
[7] = (clock_ratios_table
[idx
].n_rat
>> 0) & 0xff;
857 cmd
.arg
[8] = (clock_ratios_table
[idx
].rate
>> 8) & 0xff;
858 cmd
.arg
[9] = (clock_ratios_table
[idx
].rate
>> 0) & 0xff;
860 cx24120_message_send(state
, &cmd
);
863 /* Set inversion value */
864 static int cx24120_set_inversion(struct cx24120_state
*state
,
865 fe_spectral_inversion_t inversion
)
867 dev_dbg(&state
->i2c
->dev
, "%s(%d)\n", __func__
, inversion
);
871 state
->dnxt
.inversion_val
= 0x00;
874 state
->dnxt
.inversion_val
= 0x04;
877 state
->dnxt
.inversion_val
= 0x0c;
883 state
->dnxt
.inversion
= inversion
;
889 * FEC lookup table for tuning Some DVB-S2 val's have been found by
890 * trial and error. Sofar it seems to match up with the contents of
891 * the REG_FECMODE after tuning The rest will probably be the same but
892 * would need testing. Anything not in the table will run with
893 * FEC_AUTO and take a while longer to tune in ( c.500ms instead of
896 static struct cx24120_modfec_table
{
897 fe_delivery_system_t delsys
;
902 /*delsys mod fec val */
903 { SYS_DVBS
, QPSK
, FEC_1_2
, 0x2e },
904 { SYS_DVBS
, QPSK
, FEC_2_3
, 0x2f },
905 { SYS_DVBS
, QPSK
, FEC_3_4
, 0x30 },
906 { SYS_DVBS
, QPSK
, FEC_5_6
, 0x31 },
907 { SYS_DVBS
, QPSK
, FEC_6_7
, 0x32 },
908 { SYS_DVBS
, QPSK
, FEC_7_8
, 0x33 },
910 { SYS_DVBS2
, QPSK
, FEC_3_4
, 0x07 },
912 { SYS_DVBS2
, PSK_8
, FEC_2_3
, 0x0d },
913 { SYS_DVBS2
, PSK_8
, FEC_3_4
, 0x0e },
916 /* Set fec_val & fec_mask values from delsys, modulation & fec */
917 static int cx24120_set_fec(struct cx24120_state
*state
, fe_modulation_t mod
,
922 dev_dbg(&state
->i2c
->dev
, "%s(0x%02x,0x%02x)\n", __func__
, mod
, fec
);
924 state
->dnxt
.fec
= fec
;
926 /* Lookup fec_val from modfec table */
927 for (idx
= 0; idx
< ARRAY_SIZE(modfec_table
); idx
++) {
928 if (modfec_table
[idx
].delsys
!= state
->dnxt
.delsys
)
930 if (modfec_table
[idx
].mod
!= mod
)
932 if (modfec_table
[idx
].fec
!= fec
)
936 state
->dnxt
.fec_mask
= 0x00;
937 state
->dnxt
.fec_val
= modfec_table
[idx
].val
;
941 if (state
->dnxt
.delsys
== SYS_DVBS2
) {
942 /* DVBS2 auto is 0x00/0x00 */
943 state
->dnxt
.fec_mask
= 0x00;
944 state
->dnxt
.fec_val
= 0x00;
946 /* Set DVB-S to auto */
947 state
->dnxt
.fec_val
= 0x2e;
948 state
->dnxt
.fec_mask
= 0xac;
955 static int cx24120_set_pilot(struct cx24120_state
*state
, fe_pilot_t pilot
)
957 dev_dbg(&state
->i2c
->dev
, "%s(%d)\n", __func__
, pilot
);
959 /* Pilot only valid in DVBS2 */
960 if (state
->dnxt
.delsys
!= SYS_DVBS2
) {
961 state
->dnxt
.pilot_val
= CX24120_PILOT_OFF
;
967 state
->dnxt
.pilot_val
= CX24120_PILOT_OFF
;
970 state
->dnxt
.pilot_val
= CX24120_PILOT_ON
;
974 state
->dnxt
.pilot_val
= CX24120_PILOT_AUTO
;
980 /* Set symbol rate */
981 static int cx24120_set_symbolrate(struct cx24120_state
*state
, u32 rate
)
983 dev_dbg(&state
->i2c
->dev
, "%s(%d)\n",
986 state
->dnxt
.symbol_rate
= rate
;
988 /* Check symbol rate */
989 if (rate
> 31000000) {
990 state
->dnxt
.clkdiv
= (-(rate
< 31000001) & 3) + 2;
991 state
->dnxt
.ratediv
= (-(rate
< 31000001) & 6) + 4;
993 state
->dnxt
.clkdiv
= 3;
994 state
->dnxt
.ratediv
= 6;
1000 /* Overwrite the current tuning params, we are about to tune */
1001 static void cx24120_clone_params(struct dvb_frontend
*fe
)
1003 struct cx24120_state
*state
= fe
->demodulator_priv
;
1005 state
->dcur
= state
->dnxt
;
1008 static int cx24120_set_frontend(struct dvb_frontend
*fe
)
1010 struct dtv_frontend_properties
*c
= &fe
->dtv_property_cache
;
1011 struct cx24120_state
*state
= fe
->demodulator_priv
;
1012 struct cx24120_cmd cmd
;
1015 switch (c
->delivery_system
) {
1017 dev_dbg(&state
->i2c
->dev
, "%s() DVB-S2\n",
1021 dev_dbg(&state
->i2c
->dev
, "%s() DVB-S\n",
1025 dev_dbg(&state
->i2c
->dev
,
1026 "%s() Delivery system(%d) not supported\n",
1027 __func__
, c
->delivery_system
);
1032 state
->dnxt
.delsys
= c
->delivery_system
;
1033 state
->dnxt
.modulation
= c
->modulation
;
1034 state
->dnxt
.frequency
= c
->frequency
;
1035 state
->dnxt
.pilot
= c
->pilot
;
1037 ret
= cx24120_set_inversion(state
, c
->inversion
);
1041 ret
= cx24120_set_fec(state
, c
->modulation
, c
->fec_inner
);
1045 ret
= cx24120_set_pilot(state
, c
->pilot
);
1049 ret
= cx24120_set_symbolrate(state
, c
->symbol_rate
);
1053 /* discard the 'current' tuning parameters and prepare to tune */
1054 cx24120_clone_params(fe
);
1056 dev_dbg(&state
->i2c
->dev
,
1057 "%s: delsys = %d\n", __func__
, state
->dcur
.delsys
);
1058 dev_dbg(&state
->i2c
->dev
,
1059 "%s: modulation = %d\n", __func__
, state
->dcur
.modulation
);
1060 dev_dbg(&state
->i2c
->dev
,
1061 "%s: frequency = %d\n", __func__
, state
->dcur
.frequency
);
1062 dev_dbg(&state
->i2c
->dev
,
1063 "%s: pilot = %d (val = 0x%02x)\n", __func__
,
1064 state
->dcur
.pilot
, state
->dcur
.pilot_val
);
1065 dev_dbg(&state
->i2c
->dev
,
1066 "%s: symbol_rate = %d (clkdiv/ratediv = 0x%02x/0x%02x)\n",
1067 __func__
, state
->dcur
.symbol_rate
,
1068 state
->dcur
.clkdiv
, state
->dcur
.ratediv
);
1069 dev_dbg(&state
->i2c
->dev
,
1070 "%s: FEC = %d (mask/val = 0x%02x/0x%02x)\n", __func__
,
1071 state
->dcur
.fec
, state
->dcur
.fec_mask
, state
->dcur
.fec_val
);
1072 dev_dbg(&state
->i2c
->dev
,
1073 "%s: Inversion = %d (val = 0x%02x)\n", __func__
,
1074 state
->dcur
.inversion
, state
->dcur
.inversion_val
);
1076 /* Flag that clock needs to be set after tune */
1077 state
->need_clock_set
= 1;
1080 cmd
.id
= CMD_TUNEREQUEST
;
1083 cmd
.arg
[1] = (state
->dcur
.frequency
& 0xff0000) >> 16;
1084 cmd
.arg
[2] = (state
->dcur
.frequency
& 0x00ff00) >> 8;
1085 cmd
.arg
[3] = (state
->dcur
.frequency
& 0x0000ff);
1086 cmd
.arg
[4] = ((state
->dcur
.symbol_rate
/ 1000) & 0xff00) >> 8;
1087 cmd
.arg
[5] = ((state
->dcur
.symbol_rate
/ 1000) & 0x00ff);
1088 cmd
.arg
[6] = state
->dcur
.inversion
;
1089 cmd
.arg
[7] = state
->dcur
.fec_val
| state
->dcur
.pilot_val
;
1090 cmd
.arg
[8] = CX24120_SEARCH_RANGE_KHZ
>> 8;
1091 cmd
.arg
[9] = CX24120_SEARCH_RANGE_KHZ
& 0xff;
1092 cmd
.arg
[10] = 0; /* maybe rolloff? */
1093 cmd
.arg
[11] = state
->dcur
.fec_mask
;
1094 cmd
.arg
[12] = state
->dcur
.ratediv
;
1095 cmd
.arg
[13] = state
->dcur
.clkdiv
;
1098 /* Send tune command */
1099 ret
= cx24120_message_send(state
, &cmd
);
1103 /* Write symbol rate values */
1104 ret
= cx24120_writereg(state
, CX24120_REG_CLKDIV
, state
->dcur
.clkdiv
);
1105 ret
= cx24120_readreg(state
, CX24120_REG_RATEDIV
);
1107 ret
|= state
->dcur
.ratediv
;
1108 ret
= cx24120_writereg(state
, CX24120_REG_RATEDIV
, ret
);
1113 /* Calculate vco from config */
1114 static u64
cx24120_calculate_vco(struct cx24120_state
*state
)
1117 u64 inv_vco
, res
, xxyyzz
;
1118 u32 xtal_khz
= state
->config
->xtal_khz
;
1120 xxyyzz
= 0x400000000ULL
;
1121 vco
= xtal_khz
* 10 * 4;
1122 inv_vco
= xxyyzz
/ vco
;
1125 if (inv_vco
> xtal_khz
* 10 * 2)
1128 dev_dbg(&state
->i2c
->dev
,
1129 "%s: xtal=%d, vco=%d, inv_vco=%lld, res=%lld\n",
1130 __func__
, xtal_khz
, vco
, inv_vco
, res
);
1135 int cx24120_init(struct dvb_frontend
*fe
)
1137 const struct firmware
*fw
;
1138 struct cx24120_state
*state
= fe
->demodulator_priv
;
1139 struct cx24120_cmd cmd
;
1140 u8 ret
, ret_EA
, reg1
;
1145 unsigned char vers
[4];
1147 if (state
->cold_init
)
1151 ret
= cx24120_writereg(state
, 0xea, 0x00);
1152 ret
= cx24120_test_rom(state
);
1153 ret
= cx24120_readreg(state
, 0xfb) & 0xfe;
1154 ret
= cx24120_writereg(state
, 0xfb, ret
);
1155 ret
= cx24120_readreg(state
, 0xfc) & 0xfe;
1156 ret
= cx24120_writereg(state
, 0xfc, ret
);
1157 ret
= cx24120_writereg(state
, 0xc3, 0x04);
1158 ret
= cx24120_writereg(state
, 0xc4, 0x04);
1159 ret
= cx24120_writereg(state
, 0xce, 0x00);
1160 ret
= cx24120_writereg(state
, 0xcf, 0x00);
1161 ret_EA
= cx24120_readreg(state
, 0xea) & 0xfe;
1162 ret
= cx24120_writereg(state
, 0xea, ret_EA
);
1163 ret
= cx24120_writereg(state
, 0xeb, 0x0c);
1164 ret
= cx24120_writereg(state
, 0xec, 0x06);
1165 ret
= cx24120_writereg(state
, 0xed, 0x05);
1166 ret
= cx24120_writereg(state
, 0xee, 0x03);
1167 ret
= cx24120_writereg(state
, 0xef, 0x05);
1168 ret
= cx24120_writereg(state
, 0xf3, 0x03);
1169 ret
= cx24120_writereg(state
, 0xf4, 0x44);
1171 for (reg1
= 0xf0; reg1
< 0xf3; reg1
++) {
1172 cx24120_writereg(state
, reg1
, 0x04);
1173 cx24120_writereg(state
, reg1
- 10, 0x02);
1176 ret
= cx24120_writereg(state
, 0xea, (ret_EA
| 0x01));
1177 for (reg1
= 0xc5; reg1
< 0xcb; reg1
+= 2) {
1178 ret
= cx24120_writereg(state
, reg1
, 0x00);
1179 ret
= cx24120_writereg(state
, reg1
+ 1, 0x00);
1182 ret
= cx24120_writereg(state
, 0xe4, 0x03);
1183 ret
= cx24120_writereg(state
, 0xeb, 0x0a);
1185 dev_dbg(&state
->i2c
->dev
,
1186 "%s: Requesting firmware (%s) to download...\n",
1187 __func__
, CX24120_FIRMWARE
);
1189 ret
= state
->config
->request_firmware(fe
, &fw
, CX24120_FIRMWARE
);
1191 err("Could not load firmware (%s): %d\n", CX24120_FIRMWARE
,
1196 dev_dbg(&state
->i2c
->dev
,
1197 "%s: Firmware found, size %d bytes (%02x %02x .. %02x %02x)\n",
1199 (int)fw
->size
, /* firmware_size in bytes */
1200 fw
->data
[0], /* fw 1st byte */
1201 fw
->data
[1], /* fw 2d byte */
1202 fw
->data
[fw
->size
- 2], /* fw before last byte */
1203 fw
->data
[fw
->size
- 1]); /* fw last byte */
1205 ret
= cx24120_test_rom(state
);
1206 ret
= cx24120_readreg(state
, 0xfb) & 0xfe;
1207 ret
= cx24120_writereg(state
, 0xfb, ret
);
1208 ret
= cx24120_writereg(state
, 0xe0, 0x76);
1209 ret
= cx24120_writereg(state
, 0xf7, 0x81);
1210 ret
= cx24120_writereg(state
, 0xf8, 0x00);
1211 ret
= cx24120_writereg(state
, 0xf9, 0x00);
1212 ret
= cx24120_writeregs(state
, 0xfa, fw
->data
, (fw
->size
- 1), 0x00);
1213 ret
= cx24120_writereg(state
, 0xf7, 0xc0);
1214 ret
= cx24120_writereg(state
, 0xe0, 0x00);
1215 ret
= (fw
->size
- 2) & 0x00ff;
1216 ret
= cx24120_writereg(state
, 0xf8, ret
);
1217 ret
= ((fw
->size
- 2) >> 8) & 0x00ff;
1218 ret
= cx24120_writereg(state
, 0xf9, ret
);
1219 ret
= cx24120_writereg(state
, 0xf7, 0x00);
1220 ret
= cx24120_writereg(state
, 0xdc, 0x00);
1221 ret
= cx24120_writereg(state
, 0xdc, 0x07);
1224 /* Check final byte matches final byte of firmware */
1225 ret
= cx24120_readreg(state
, 0xe1);
1226 if (ret
== fw
->data
[fw
->size
- 1]) {
1227 dev_dbg(&state
->i2c
->dev
,
1228 "%s: Firmware uploaded successfully\n",
1232 err("Firmware upload failed. Last byte returned=0x%x\n", ret
);
1233 reset_result
= -EREMOTEIO
;
1235 ret
= cx24120_writereg(state
, 0xdc, 0x00);
1236 release_firmware(fw
);
1237 if (reset_result
!= 0)
1238 return reset_result
;
1241 cmd
.id
= CMD_START_TUNER
;
1247 if (cx24120_message_send(state
, &cmd
) != 0) {
1248 err("Error tuner start! :(\n");
1253 inv_vco
= cx24120_calculate_vco(state
);
1255 cmd
.id
= CMD_VCO_SET
;
1260 cmd
.arg
[3] = (inv_vco
>> 8) & 0xff;
1261 cmd
.arg
[4] = (inv_vco
) & 0xff;
1270 if (cx24120_message_send(state
, &cmd
)) {
1271 err("Error set VCO! :(\n");
1276 cmd
.id
= CMD_BANDWIDTH
;
1291 if (cx24120_message_send(state
, &cmd
)) {
1292 err("Error set bandwidth!\n");
1296 ret
= cx24120_readreg(state
, 0xba);
1298 dev_dbg(&state
->i2c
->dev
, "%s: Reset-readreg 0xba: %x\n",
1300 err("Error initialising tuner!\n");
1304 dev_dbg(&state
->i2c
->dev
, "%s: Tuner initialised correctly.\n",
1307 /* Initialise mpeg outputs */
1308 ret
= cx24120_writereg(state
, 0xeb, 0x0a);
1309 if (cx24120_msg_mpeg_output_global_config(state
, 0) ||
1310 cx24120_msg_mpeg_output_config(state
, 0) ||
1311 cx24120_msg_mpeg_output_config(state
, 1) ||
1312 cx24120_msg_mpeg_output_config(state
, 2)) {
1313 err("Error initialising mpeg output. :(\n");
1318 cmd
.id
= CMD_TUNER_INIT
;
1323 if (cx24120_message_send(state
, &cmd
)) {
1324 err("Error sending final init message. :(\n");
1328 /* Firmware CMD 35: Get firmware version */
1329 cmd
.id
= CMD_FWVERSION
;
1331 for (i
= 0; i
< 4; i
++) {
1333 ret
= cx24120_message_send(state
, &cmd
);
1336 vers
[i
] = cx24120_readreg(state
, CX24120_REG_MAILBOX
);
1338 info("FW version %i.%i.%i.%i\n", vers
[0], vers
[1], vers
[2], vers
[3]);
1340 state
->cold_init
= 1;
1344 static int cx24120_tune(struct dvb_frontend
*fe
, bool re_tune
,
1345 unsigned int mode_flags
, unsigned int *delay
,
1346 fe_status_t
*status
)
1348 struct cx24120_state
*state
= fe
->demodulator_priv
;
1351 dev_dbg(&state
->i2c
->dev
, "%s(%d)\n", __func__
, re_tune
);
1353 /* TODO: Do we need to set delay? */
1356 ret
= cx24120_set_frontend(fe
);
1361 return cx24120_read_status(fe
, status
);
1364 static int cx24120_get_algo(struct dvb_frontend
*fe
)
1366 return DVBFE_ALGO_HW
;
1369 static int cx24120_sleep(struct dvb_frontend
*fe
)
1374 static int cx24120_get_frontend(struct dvb_frontend
*fe
)
1376 struct dtv_frontend_properties
*c
= &fe
->dtv_property_cache
;
1377 struct cx24120_state
*state
= fe
->demodulator_priv
;
1378 u8 freq1
, freq2
, freq3
;
1381 dev_dbg(&state
->i2c
->dev
, "%s()", __func__
);
1383 /* don't return empty data if we're not tuned in */
1384 cx24120_read_status(fe
, &status
);
1385 if ((status
& FE_HAS_LOCK
) == 0)
1389 freq1
= cx24120_readreg(state
, CX24120_REG_FREQ1
);
1390 freq2
= cx24120_readreg(state
, CX24120_REG_FREQ2
);
1391 freq3
= cx24120_readreg(state
, CX24120_REG_FREQ3
);
1392 c
->frequency
= (freq3
<< 16) | (freq2
<< 8) | freq1
;
1393 dev_dbg(&state
->i2c
->dev
, "%s frequency = %d\n", __func__
,
1396 /* Get modulation, fec, pilot */
1397 cx24120_get_fec(fe
);
1402 static void cx24120_release(struct dvb_frontend
*fe
)
1404 struct cx24120_state
*state
= fe
->demodulator_priv
;
1406 dev_dbg(&state
->i2c
->dev
, "%s: Clear state structure\n", __func__
);
1410 static int cx24120_read_ucblocks(struct dvb_frontend
*fe
, u32
*ucblocks
)
1412 struct cx24120_state
*state
= fe
->demodulator_priv
;
1414 *ucblocks
= (cx24120_readreg(state
, CX24120_REG_UCB_H
) << 8) |
1415 cx24120_readreg(state
, CX24120_REG_UCB_L
);
1417 dev_dbg(&state
->i2c
->dev
, "%s: Blocks = %d\n", __func__
, *ucblocks
);
1421 static struct dvb_frontend_ops cx24120_ops
= {
1422 .delsys
= { SYS_DVBS
, SYS_DVBS2
},
1424 .name
= "Conexant CX24120/CX24118",
1425 .frequency_min
= 950000,
1426 .frequency_max
= 2150000,
1427 .frequency_stepsize
= 1011, /* kHz for QPSK frontends */
1428 .frequency_tolerance
= 5000,
1429 .symbol_rate_min
= 1000000,
1430 .symbol_rate_max
= 45000000,
1431 .caps
= FE_CAN_INVERSION_AUTO
|
1432 FE_CAN_FEC_1_2
| FE_CAN_FEC_2_3
| FE_CAN_FEC_3_4
|
1433 FE_CAN_FEC_4_5
| FE_CAN_FEC_5_6
| FE_CAN_FEC_6_7
|
1434 FE_CAN_FEC_7_8
| FE_CAN_FEC_AUTO
|
1435 FE_CAN_2G_MODULATION
|
1436 FE_CAN_QPSK
| FE_CAN_RECOVER
1438 .release
= cx24120_release
,
1440 .init
= cx24120_init
,
1441 .sleep
= cx24120_sleep
,
1443 .tune
= cx24120_tune
,
1444 .get_frontend_algo
= cx24120_get_algo
,
1445 .set_frontend
= cx24120_set_frontend
,
1447 .get_frontend
= cx24120_get_frontend
,
1448 .read_status
= cx24120_read_status
,
1449 .read_ber
= cx24120_read_ber
,
1450 .read_signal_strength
= cx24120_read_signal_strength
,
1451 .read_snr
= cx24120_read_snr
,
1452 .read_ucblocks
= cx24120_read_ucblocks
,
1454 .diseqc_send_master_cmd
= cx24120_send_diseqc_msg
,
1456 .diseqc_send_burst
= cx24120_diseqc_send_burst
,
1457 .set_tone
= cx24120_set_tone
,
1458 .set_voltage
= cx24120_set_voltage
,
1461 MODULE_DESCRIPTION("DVB Frontend module for Conexant CX24120/CX24118 hardware");
1462 MODULE_AUTHOR("Jemma Denson");
1463 MODULE_LICENSE("GPL");