drivers/media/dvb-frontends/m88ds3103.c

   1 /*
   2  * Montage M88DS3103 demodulator driver
   3  *
   4  * Copyright (C) 2013 Antti Palosaari <crope@iki.fi>
   5  *
   6  *    This program is free software; you can redistribute it and/or modify
   7  *    it under the terms of the GNU General Public License as published by
   8  *    the Free Software Foundation; either version 2 of the License, or
   9  *    (at your option) any later version.
  10  *
  11  *    This program is distributed in the hope that it will be useful,
  12  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *    GNU General Public License for more details.
  15  */
  16
  17 #include "m88ds3103_priv.h"
  18
  19 static struct dvb_frontend_ops m88ds3103_ops;
  20
  21 /* write multiple registers */
  22 static int m88ds3103_wr_regs(struct m88ds3103_priv *priv,
  23                 u8 reg, const u8 *val, int len)
  24 {
  25 #define MAX_WR_LEN 32
  26 #define MAX_WR_XFER_LEN (MAX_WR_LEN + 1)
  27         int ret;
  28         u8 buf[MAX_WR_XFER_LEN];
  29         struct i2c_msg msg[1] = {
  30                 {
  31                         .addr = priv->cfg->i2c_addr,
  32                         .flags = 0,
  33                         .len = 1 + len,
  34                         .buf = buf,
  35                 }
  36         };
  37
  38         if (WARN_ON(len > MAX_WR_LEN))
  39                 return -EINVAL;
  40
  41         buf[0] = reg;
  42         memcpy(&buf[1], val, len);
  43
  44         mutex_lock(&priv->i2c_mutex);
  45         ret = i2c_transfer(priv->i2c, msg, 1);
  46         mutex_unlock(&priv->i2c_mutex);
  47         if (ret == 1) {
  48                 ret = 0;
  49         } else {
  50                 dev_warn(&priv->i2c->dev,
  51                                 "%s: i2c wr failed=%d reg=%02x len=%d\n",
  52                                 KBUILD_MODNAME, ret, reg, len);
  53                 ret = -EREMOTEIO;
  54         }
  55
  56         return ret;
  57 }
  58
  59 /* read multiple registers */
  60 static int m88ds3103_rd_regs(struct m88ds3103_priv *priv,
  61                 u8 reg, u8 *val, int len)
  62 {
  63 #define MAX_RD_LEN 3
  64 #define MAX_RD_XFER_LEN (MAX_RD_LEN)
  65         int ret;
  66         u8 buf[MAX_RD_XFER_LEN];
  67         struct i2c_msg msg[2] = {
  68                 {
  69                         .addr = priv->cfg->i2c_addr,
  70                         .flags = 0,
  71                         .len = 1,
  72                         .buf = &reg,
  73                 }, {
  74                         .addr = priv->cfg->i2c_addr,
  75                         .flags = I2C_M_RD,
  76                         .len = len,
  77                         .buf = buf,
  78                 }
  79         };
  80
  81         if (WARN_ON(len > MAX_RD_LEN))
  82                 return -EINVAL;
  83
  84         mutex_lock(&priv->i2c_mutex);
  85         ret = i2c_transfer(priv->i2c, msg, 2);
  86         mutex_unlock(&priv->i2c_mutex);
  87         if (ret == 2) {
  88                 memcpy(val, buf, len);
  89                 ret = 0;
  90         } else {
  91                 dev_warn(&priv->i2c->dev,
  92                                 "%s: i2c rd failed=%d reg=%02x len=%d\n",
  93                                 KBUILD_MODNAME, ret, reg, len);
  94                 ret = -EREMOTEIO;
  95         }
  96
  97         return ret;
  98 }
  99
 100 /* write single register */
 101 static int m88ds3103_wr_reg(struct m88ds3103_priv *priv, u8 reg, u8 val)
 102 {
 103         return m88ds3103_wr_regs(priv, reg, &val, 1);
 104 }
 105
 106 /* read single register */
 107 static int m88ds3103_rd_reg(struct m88ds3103_priv *priv, u8 reg, u8 *val)
 108 {
 109         return m88ds3103_rd_regs(priv, reg, val, 1);
 110 }
 111
 112 /* write single register with mask */
 113 static int m88ds3103_wr_reg_mask(struct m88ds3103_priv *priv,
 114                 u8 reg, u8 val, u8 mask)
 115 {
 116         int ret;
 117         u8 u8tmp;
 118
 119         /* no need for read if whole reg is written */
 120         if (mask != 0xff) {
 121                 ret = m88ds3103_rd_regs(priv, reg, &u8tmp, 1);
 122                 if (ret)
 123                         return ret;
 124
 125                 val &= mask;
 126                 u8tmp &= ~mask;
 127                 val |= u8tmp;
 128         }
 129
 130         return m88ds3103_wr_regs(priv, reg, &val, 1);
 131 }
 132
 133 /* read single register with mask */
 134 static int m88ds3103_rd_reg_mask(struct m88ds3103_priv *priv,
 135                 u8 reg, u8 *val, u8 mask)
 136 {
 137         int ret, i;
 138         u8 u8tmp;
 139
 140         ret = m88ds3103_rd_regs(priv, reg, &u8tmp, 1);
 141         if (ret)
 142                 return ret;
 143
 144         u8tmp &= mask;
 145
 146         /* find position of the first bit */
 147         for (i = 0; i < 8; i++) {
 148                 if ((mask >> i) & 0x01)
 149                         break;
 150         }
 151         *val = u8tmp >> i;
 152
 153         return 0;
 154 }
 155
 156 /* write reg val table using reg addr auto increment */
 157 static int m88ds3103_wr_reg_val_tab(struct m88ds3103_priv *priv,
 158                 const struct m88ds3103_reg_val *tab, int tab_len)
 159 {
 160         int ret, i, j;
 161         u8 buf[83];
 162
 163         dev_dbg(&priv->i2c->dev, "%s: tab_len=%d\n", __func__, tab_len);
 164
 165         if (tab_len > 83) {
 166                 ret = -EINVAL;
 167                 goto err;
 168         }
 169
 170         for (i = 0, j = 0; i < tab_len; i++, j++) {
 171                 buf[j] = tab[i].val;
 172
 173                 if (i == tab_len - 1 || tab[i].reg != tab[i + 1].reg - 1 ||
 174                                 !((j + 1) % (priv->cfg->i2c_wr_max - 1))) {
 175                         ret = m88ds3103_wr_regs(priv, tab[i].reg - j, buf, j + 1);
 176                         if (ret)
 177                                 goto err;
 178
 179                         j = -1;
 180                 }
 181         }
 182
 183         return 0;
 184 err:
 185         dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
 186         return ret;
 187 }
 188
 189 static int m88ds3103_read_status(struct dvb_frontend *fe, fe_status_t *status)
 190 {
 191         struct m88ds3103_priv *priv = fe->demodulator_priv;
 192         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 193         int ret;
 194         u8 u8tmp;
 195
 196         *status = 0;
 197
 198         if (!priv->warm) {
 199                 ret = -EAGAIN;
 200                 goto err;
 201         }
 202
 203         switch (c->delivery_system) {
 204         case SYS_DVBS:
 205                 ret = m88ds3103_rd_reg_mask(priv, 0xd1, &u8tmp, 0x07);
 206                 if (ret)
 207                         goto err;
 208
 209                 if (u8tmp == 0x07)
 210                         *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
 211                                         FE_HAS_VITERBI | FE_HAS_SYNC |
 212                                         FE_HAS_LOCK;
 213                 break;
 214         case SYS_DVBS2:
 215                 ret = m88ds3103_rd_reg_mask(priv, 0x0d, &u8tmp, 0x8f);
 216                 if (ret)
 217                         goto err;
 218
 219                 if (u8tmp == 0x8f)
 220                         *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
 221                                         FE_HAS_VITERBI | FE_HAS_SYNC |
 222                                         FE_HAS_LOCK;
 223                 break;
 224         default:
 225                 dev_dbg(&priv->i2c->dev, "%s: invalid delivery_system\n",
 226                                 __func__);
 227                 ret = -EINVAL;
 228                 goto err;
 229         }
 230
 231         priv->fe_status = *status;
 232
 233         dev_dbg(&priv->i2c->dev, "%s: lock=%02x status=%02x\n",
 234                         __func__, u8tmp, *status);
 235
 236         return 0;
 237 err:
 238         dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
 239         return ret;
 240 }
 241
 242 static int m88ds3103_set_frontend(struct dvb_frontend *fe)
 243 {
 244         struct m88ds3103_priv *priv = fe->demodulator_priv;
 245         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 246         int ret, len;
 247         const struct m88ds3103_reg_val *init;
 248         u8 u8tmp, u8tmp1, u8tmp2;
 249         u8 buf[2];
 250         u16 u16tmp, divide_ratio;
 251         u32 tuner_frequency, target_mclk;
 252         s32 s32tmp;
 253
 254         dev_dbg(&priv->i2c->dev,
 255                         "%s: delivery_system=%d modulation=%d frequency=%d symbol_rate=%d inversion=%d pilot=%d rolloff=%d\n",
 256                         __func__, c->delivery_system,
 257                         c->modulation, c->frequency, c->symbol_rate,
 258                         c->inversion, c->pilot, c->rolloff);
 259
 260         if (!priv->warm) {
 261                 ret = -EAGAIN;
 262                 goto err;
 263         }
 264
 265         /* program tuner */
 266         if (fe->ops.tuner_ops.set_params) {
 267                 ret = fe->ops.tuner_ops.set_params(fe);
 268                 if (ret)
 269                         goto err;
 270         }
 271
 272         if (fe->ops.tuner_ops.get_frequency) {
 273                 ret = fe->ops.tuner_ops.get_frequency(fe, &tuner_frequency);
 274                 if (ret)
 275                         goto err;
 276         } else {
 277                 /*
 278                  * Use nominal target frequency as tuner driver does not provide
 279                  * actual frequency used. Carrier offset calculation is not
 280                  * valid.
 281                  */
 282                 tuner_frequency = c->frequency;
 283         }
 284
 285         /* reset */
 286         ret = m88ds3103_wr_reg(priv, 0x07, 0x80);
 287         if (ret)
 288                 goto err;
 289
 290         ret = m88ds3103_wr_reg(priv, 0x07, 0x00);
 291         if (ret)
 292                 goto err;
 293
 294         ret = m88ds3103_wr_reg(priv, 0xb2, 0x01);
 295         if (ret)
 296                 goto err;
 297
 298         ret = m88ds3103_wr_reg(priv, 0x00, 0x01);
 299         if (ret)
 300                 goto err;
 301
 302         switch (c->delivery_system) {
 303         case SYS_DVBS:
 304                 len = ARRAY_SIZE(m88ds3103_dvbs_init_reg_vals);
 305                 init = m88ds3103_dvbs_init_reg_vals;
 306                 target_mclk = 96000;
 307                 break;
 308         case SYS_DVBS2:
 309                 len = ARRAY_SIZE(m88ds3103_dvbs2_init_reg_vals);
 310                 init = m88ds3103_dvbs2_init_reg_vals;
 311
 312                 switch (priv->cfg->ts_mode) {
 313                 case M88DS3103_TS_SERIAL:
 314                 case M88DS3103_TS_SERIAL_D7:
 315                         if (c->symbol_rate < 18000000)
 316                                 target_mclk = 96000;
 317                         else
 318                                 target_mclk = 144000;
 319                         break;
 320                 case M88DS3103_TS_PARALLEL:
 321                 case M88DS3103_TS_CI:
 322                         if (c->symbol_rate < 18000000)
 323                                 target_mclk = 96000;
 324                         else if (c->symbol_rate < 28000000)
 325                                 target_mclk = 144000;
 326                         else
 327                                 target_mclk = 192000;
 328                         break;
 329                 default:
 330                         dev_dbg(&priv->i2c->dev, "%s: invalid ts_mode\n",
 331                                         __func__);
 332                         ret = -EINVAL;
 333                         goto err;
 334                 }
 335                 break;
 336         default:
 337                 dev_dbg(&priv->i2c->dev, "%s: invalid delivery_system\n",
 338                                 __func__);
 339                 ret = -EINVAL;
 340                 goto err;
 341         }
 342
 343         /* program init table */
 344         if (c->delivery_system != priv->delivery_system) {
 345                 ret = m88ds3103_wr_reg_val_tab(priv, init, len);
 346                 if (ret)
 347                         goto err;
 348         }
 349
 350         u8tmp1 = 0; /* silence compiler warning */
 351         switch (priv->cfg->ts_mode) {
 352         case M88DS3103_TS_SERIAL:
 353                 u8tmp1 = 0x00;
 354                 u8tmp = 0x06;
 355                 break;
 356         case M88DS3103_TS_SERIAL_D7:
 357                 u8tmp1 = 0x20;
 358                 u8tmp = 0x06;
 359                 break;
 360         case M88DS3103_TS_PARALLEL:
 361                 u8tmp = 0x02;
 362                 break;
 363         case M88DS3103_TS_CI:
 364                 u8tmp = 0x03;
 365                 break;
 366         default:
 367                 dev_dbg(&priv->i2c->dev, "%s: invalid ts_mode\n", __func__);
 368                 ret = -EINVAL;
 369                 goto err;
 370         }
 371
 372         if (priv->cfg->ts_clk_pol)
 373                 u8tmp |= 0x40;
 374
 375         /* TS mode */
 376         ret = m88ds3103_wr_reg(priv, 0xfd, u8tmp);
 377         if (ret)
 378                 goto err;
 379
 380         switch (priv->cfg->ts_mode) {
 381         case M88DS3103_TS_SERIAL:
 382         case M88DS3103_TS_SERIAL_D7:
 383                 ret = m88ds3103_wr_reg_mask(priv, 0x29, u8tmp1, 0x20);
 384                 if (ret)
 385                         goto err;
 386         }
 387
 388         if (priv->cfg->ts_clk) {
 389                 divide_ratio = DIV_ROUND_UP(target_mclk, priv->cfg->ts_clk);
 390                 u8tmp1 = divide_ratio / 2;
 391                 u8tmp2 = DIV_ROUND_UP(divide_ratio, 2);
 392         } else {
 393                 divide_ratio = 0;
 394                 u8tmp1 = 0;
 395                 u8tmp2 = 0;
 396         }
 397
 398         dev_dbg(&priv->i2c->dev,
 399                         "%s: target_mclk=%d ts_clk=%d divide_ratio=%d\n",
 400                         __func__, target_mclk, priv->cfg->ts_clk, divide_ratio);
 401
 402         u8tmp1--;
 403         u8tmp2--;
 404         /* u8tmp1[5:2] => fe[3:0], u8tmp1[1:0] => ea[7:6] */
 405         u8tmp1 &= 0x3f;
 406         /* u8tmp2[5:0] => ea[5:0] */
 407         u8tmp2 &= 0x3f;
 408
 409         ret = m88ds3103_rd_reg(priv, 0xfe, &u8tmp);
 410         if (ret)
 411                 goto err;
 412
 413         u8tmp = ((u8tmp  & 0xf0) << 0) | u8tmp1 >> 2;
 414         ret = m88ds3103_wr_reg(priv, 0xfe, u8tmp);
 415         if (ret)
 416                 goto err;
 417
 418         u8tmp = ((u8tmp1 & 0x03) << 6) | u8tmp2 >> 0;
 419         ret = m88ds3103_wr_reg(priv, 0xea, u8tmp);
 420         if (ret)
 421                 goto err;
 422
 423         switch (target_mclk) {
 424         case 96000:
 425                 u8tmp1 = 0x02; /* 0b10 */
 426                 u8tmp2 = 0x01; /* 0b01 */
 427                 break;
 428         case 144000:
 429                 u8tmp1 = 0x00; /* 0b00 */
 430                 u8tmp2 = 0x01; /* 0b01 */
 431                 break;
 432         case 192000:
 433                 u8tmp1 = 0x03; /* 0b11 */
 434                 u8tmp2 = 0x00; /* 0b00 */
 435                 break;
 436         }
 437
 438         ret = m88ds3103_wr_reg_mask(priv, 0x22, u8tmp1 << 6, 0xc0);
 439         if (ret)
 440                 goto err;
 441
 442         ret = m88ds3103_wr_reg_mask(priv, 0x24, u8tmp2 << 6, 0xc0);
 443         if (ret)
 444                 goto err;
 445
 446         if (c->symbol_rate <= 3000000)
 447                 u8tmp = 0x20;
 448         else if (c->symbol_rate <= 10000000)
 449                 u8tmp = 0x10;
 450         else
 451                 u8tmp = 0x06;
 452
 453         ret = m88ds3103_wr_reg(priv, 0xc3, 0x08);
 454         if (ret)
 455                 goto err;
 456
 457         ret = m88ds3103_wr_reg(priv, 0xc8, u8tmp);
 458         if (ret)
 459                 goto err;
 460
 461         ret = m88ds3103_wr_reg(priv, 0xc4, 0x08);
 462         if (ret)
 463                 goto err;
 464
 465         ret = m88ds3103_wr_reg(priv, 0xc7, 0x00);
 466         if (ret)
 467                 goto err;
 468
 469         u16tmp = DIV_ROUND_CLOSEST((c->symbol_rate / 1000) << 15, M88DS3103_MCLK_KHZ / 2);
 470         buf[0] = (u16tmp >> 0) & 0xff;
 471         buf[1] = (u16tmp >> 8) & 0xff;
 472         ret = m88ds3103_wr_regs(priv, 0x61, buf, 2);
 473         if (ret)
 474                 goto err;
 475
 476         ret = m88ds3103_wr_reg_mask(priv, 0x4d, priv->cfg->spec_inv << 1, 0x02);
 477         if (ret)
 478                 goto err;
 479
 480         ret = m88ds3103_wr_reg_mask(priv, 0x30, priv->cfg->agc_inv << 4, 0x10);
 481         if (ret)
 482                 goto err;
 483
 484         ret = m88ds3103_wr_reg(priv, 0x33, priv->cfg->agc);
 485         if (ret)
 486                 goto err;
 487
 488         dev_dbg(&priv->i2c->dev, "%s: carrier offset=%d\n", __func__,
 489                         (tuner_frequency - c->frequency));
 490
 491         s32tmp = 0x10000 * (tuner_frequency - c->frequency);
 492         s32tmp = DIV_ROUND_CLOSEST(s32tmp, M88DS3103_MCLK_KHZ);
 493         if (s32tmp < 0)
 494                 s32tmp += 0x10000;
 495
 496         buf[0] = (s32tmp >> 0) & 0xff;
 497         buf[1] = (s32tmp >> 8) & 0xff;
 498         ret = m88ds3103_wr_regs(priv, 0x5e, buf, 2);
 499         if (ret)
 500                 goto err;
 501
 502         ret = m88ds3103_wr_reg(priv, 0x00, 0x00);
 503         if (ret)
 504                 goto err;
 505
 506         ret = m88ds3103_wr_reg(priv, 0xb2, 0x00);
 507         if (ret)
 508                 goto err;
 509
 510         priv->delivery_system = c->delivery_system;
 511
 512         return 0;
 513 err:
 514         dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
 515         return ret;
 516 }
 517
 518 static int m88ds3103_init(struct dvb_frontend *fe)
 519 {
 520         struct m88ds3103_priv *priv = fe->demodulator_priv;
 521         int ret, len, remaining;
 522         const struct firmware *fw = NULL;
 523         u8 *fw_file = M88DS3103_FIRMWARE;
 524         u8 u8tmp;
 525
 526         dev_dbg(&priv->i2c->dev, "%s:\n", __func__);
 527
 528         /* set cold state by default */
 529         priv->warm = false;
 530
 531         /* wake up device from sleep */
 532         ret = m88ds3103_wr_reg_mask(priv, 0x08, 0x01, 0x01);
 533         if (ret)
 534                 goto err;
 535
 536         ret = m88ds3103_wr_reg_mask(priv, 0x04, 0x00, 0x01);
 537         if (ret)
 538                 goto err;
 539
 540         ret = m88ds3103_wr_reg_mask(priv, 0x23, 0x00, 0x10);
 541         if (ret)
 542                 goto err;
 543
 544         /* reset */
 545         ret = m88ds3103_wr_reg(priv, 0x07, 0x60);
 546         if (ret)
 547                 goto err;
 548
 549         ret = m88ds3103_wr_reg(priv, 0x07, 0x00);
 550         if (ret)
 551                 goto err;
 552
 553         /* firmware status */
 554         ret = m88ds3103_rd_reg(priv, 0xb9, &u8tmp);
 555         if (ret)
 556                 goto err;
 557
 558         dev_dbg(&priv->i2c->dev, "%s: firmware=%02x\n", __func__, u8tmp);
 559
 560         if (u8tmp)
 561                 goto skip_fw_download;
 562
 563         /* cold state - try to download firmware */
 564         dev_info(&priv->i2c->dev, "%s: found a '%s' in cold state\n",
 565                         KBUILD_MODNAME, m88ds3103_ops.info.name);
 566
 567         /* request the firmware, this will block and timeout */
 568         ret = request_firmware(&fw, fw_file, priv->i2c->dev.parent);
 569         if (ret) {
 570                 dev_err(&priv->i2c->dev, "%s: firmare file '%s' not found\n",
 571                                 KBUILD_MODNAME, fw_file);
 572                 goto err;
 573         }
 574
 575         dev_info(&priv->i2c->dev, "%s: downloading firmware from file '%s'\n",
 576                         KBUILD_MODNAME, fw_file);
 577
 578         ret = m88ds3103_wr_reg(priv, 0xb2, 0x01);
 579         if (ret)
 580                 goto err;
 581
 582         for (remaining = fw->size; remaining > 0;
 583                         remaining -= (priv->cfg->i2c_wr_max - 1)) {
 584                 len = remaining;
 585                 if (len > (priv->cfg->i2c_wr_max - 1))
 586                         len = (priv->cfg->i2c_wr_max - 1);
 587
 588                 ret = m88ds3103_wr_regs(priv, 0xb0,
 589                                 &fw->data[fw->size - remaining], len);
 590                 if (ret) {
 591                         dev_err(&priv->i2c->dev,
 592                                         "%s: firmware download failed=%d\n",
 593                                         KBUILD_MODNAME, ret);
 594                         goto err;
 595                 }
 596         }
 597
 598         ret = m88ds3103_wr_reg(priv, 0xb2, 0x00);
 599         if (ret)
 600                 goto err;
 601
 602         release_firmware(fw);
 603         fw = NULL;
 604
 605         ret = m88ds3103_rd_reg(priv, 0xb9, &u8tmp);
 606         if (ret)
 607                 goto err;
 608
 609         if (!u8tmp) {
 610                 dev_info(&priv->i2c->dev, "%s: firmware did not run\n",
 611                                 KBUILD_MODNAME);
 612                 ret = -EFAULT;
 613                 goto err;
 614         }
 615
 616         dev_info(&priv->i2c->dev, "%s: found a '%s' in warm state\n",
 617                         KBUILD_MODNAME, m88ds3103_ops.info.name);
 618         dev_info(&priv->i2c->dev, "%s: firmware version %X.%X\n",
 619                         KBUILD_MODNAME, (u8tmp >> 4) & 0xf, (u8tmp >> 0 & 0xf));
 620
 621 skip_fw_download:
 622         /* warm state */
 623         priv->warm = true;
 624
 625         return 0;
 626 err:
 627         if (fw)
 628                 release_firmware(fw);
 629
 630         dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
 631         return ret;
 632 }
 633
 634 static int m88ds3103_sleep(struct dvb_frontend *fe)
 635 {
 636         struct m88ds3103_priv *priv = fe->demodulator_priv;
 637         int ret;
 638
 639         dev_dbg(&priv->i2c->dev, "%s:\n", __func__);
 640
 641         priv->delivery_system = SYS_UNDEFINED;
 642
 643         /* TS Hi-Z */
 644         ret = m88ds3103_wr_reg_mask(priv, 0x27, 0x00, 0x01);
 645         if (ret)
 646                 goto err;
 647
 648         /* sleep */
 649         ret = m88ds3103_wr_reg_mask(priv, 0x08, 0x00, 0x01);
 650         if (ret)
 651                 goto err;
 652
 653         ret = m88ds3103_wr_reg_mask(priv, 0x04, 0x01, 0x01);
 654         if (ret)
 655                 goto err;
 656
 657         ret = m88ds3103_wr_reg_mask(priv, 0x23, 0x10, 0x10);
 658         if (ret)
 659                 goto err;
 660
 661         return 0;
 662 err:
 663         dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
 664         return ret;
 665 }
 666
 667 static int m88ds3103_get_frontend(struct dvb_frontend *fe)
 668 {
 669         struct m88ds3103_priv *priv = fe->demodulator_priv;
 670         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 671         int ret;
 672         u8 buf[3];
 673
 674         dev_dbg(&priv->i2c->dev, "%s:\n", __func__);
 675
 676         if (!priv->warm || !(priv->fe_status & FE_HAS_LOCK)) {
 677                 ret = -EAGAIN;
 678                 goto err;
 679         }
 680
 681         switch (c->delivery_system) {
 682         case SYS_DVBS:
 683                 ret = m88ds3103_rd_reg(priv, 0xe0, &buf[0]);
 684                 if (ret)
 685                         goto err;
 686
 687                 ret = m88ds3103_rd_reg(priv, 0xe6, &buf[1]);
 688                 if (ret)
 689                         goto err;
 690
 691                 switch ((buf[0] >> 2) & 0x01) {
 692                 case 0:
 693                         c->inversion = INVERSION_OFF;
 694                         break;
 695                 case 1:
 696                         c->inversion = INVERSION_ON;
 697                         break;
 698                 }
 699
 700                 switch ((buf[1] >> 5) & 0x07) {
 701                 case 0:
 702                         c->fec_inner = FEC_7_8;
 703                         break;
 704                 case 1:
 705                         c->fec_inner = FEC_5_6;
 706                         break;
 707                 case 2:
 708                         c->fec_inner = FEC_3_4;
 709                         break;
 710                 case 3:
 711                         c->fec_inner = FEC_2_3;
 712                         break;
 713                 case 4:
 714                         c->fec_inner = FEC_1_2;
 715                         break;
 716                 default:
 717                         dev_dbg(&priv->i2c->dev, "%s: invalid fec_inner\n",
 718                                         __func__);
 719                 }
 720
 721                 c->modulation = QPSK;
 722
 723                 break;
 724         case SYS_DVBS2:
 725                 ret = m88ds3103_rd_reg(priv, 0x7e, &buf[0]);
 726                 if (ret)
 727                         goto err;
 728
 729                 ret = m88ds3103_rd_reg(priv, 0x89, &buf[1]);
 730                 if (ret)
 731                         goto err;
 732
 733                 ret = m88ds3103_rd_reg(priv, 0xf2, &buf[2]);
 734                 if (ret)
 735                         goto err;
 736
 737                 switch ((buf[0] >> 0) & 0x0f) {
 738                 case 2:
 739                         c->fec_inner = FEC_2_5;
 740                         break;
 741                 case 3:
 742                         c->fec_inner = FEC_1_2;
 743                         break;
 744                 case 4:
 745                         c->fec_inner = FEC_3_5;
 746                         break;
 747                 case 5:
 748                         c->fec_inner = FEC_2_3;
 749                         break;
 750                 case 6:
 751                         c->fec_inner = FEC_3_4;
 752                         break;
 753                 case 7:
 754                         c->fec_inner = FEC_4_5;
 755                         break;
 756                 case 8:
 757                         c->fec_inner = FEC_5_6;
 758                         break;
 759                 case 9:
 760                         c->fec_inner = FEC_8_9;
 761                         break;
 762                 case 10:
 763                         c->fec_inner = FEC_9_10;
 764                         break;
 765                 default:
 766                         dev_dbg(&priv->i2c->dev, "%s: invalid fec_inner\n",
 767                                         __func__);
 768                 }
 769
 770                 switch ((buf[0] >> 5) & 0x01) {
 771                 case 0:
 772                         c->pilot = PILOT_OFF;
 773                         break;
 774                 case 1:
 775                         c->pilot = PILOT_ON;
 776                         break;
 777                 }
 778
 779                 switch ((buf[0] >> 6) & 0x07) {
 780                 case 0:
 781                         c->modulation = QPSK;
 782                         break;
 783                 case 1:
 784                         c->modulation = PSK_8;
 785                         break;
 786                 case 2:
 787                         c->modulation = APSK_16;
 788                         break;
 789                 case 3:
 790                         c->modulation = APSK_32;
 791                         break;
 792                 default:
 793                         dev_dbg(&priv->i2c->dev, "%s: invalid modulation\n",
 794                                         __func__);
 795                 }
 796
 797                 switch ((buf[1] >> 7) & 0x01) {
 798                 case 0:
 799                         c->inversion = INVERSION_OFF;
 800                         break;
 801                 case 1:
 802                         c->inversion = INVERSION_ON;
 803                         break;
 804                 }
 805
 806                 switch ((buf[2] >> 0) & 0x03) {
 807                 case 0:
 808                         c->rolloff = ROLLOFF_35;
 809                         break;
 810                 case 1:
 811                         c->rolloff = ROLLOFF_25;
 812                         break;
 813                 case 2:
 814                         c->rolloff = ROLLOFF_20;
 815                         break;
 816                 default:
 817                         dev_dbg(&priv->i2c->dev, "%s: invalid rolloff\n",
 818                                         __func__);
 819                 }
 820                 break;
 821         default:
 822                 dev_dbg(&priv->i2c->dev, "%s: invalid delivery_system\n",
 823                                 __func__);
 824                 ret = -EINVAL;
 825                 goto err;
 826         }
 827
 828         ret = m88ds3103_rd_regs(priv, 0x6d, buf, 2);
 829         if (ret)
 830                 goto err;
 831
 832         c->symbol_rate = 1ull * ((buf[1] << 8) | (buf[0] << 0)) *
 833                         M88DS3103_MCLK_KHZ * 1000 / 0x10000;
 834
 835         return 0;
 836 err:
 837         dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
 838         return ret;
 839 }
 840
 841 static int m88ds3103_read_snr(struct dvb_frontend *fe, u16 *snr)
 842 {
 843         struct m88ds3103_priv *priv = fe->demodulator_priv;
 844         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 845         int ret, i, tmp;
 846         u8 buf[3];
 847         u16 noise, signal;
 848         u32 noise_tot, signal_tot;
 849
 850         dev_dbg(&priv->i2c->dev, "%s:\n", __func__);
 851         /* reports SNR in resolution of 0.1 dB */
 852
 853         /* more iterations for more accurate estimation */
 854         #define M88DS3103_SNR_ITERATIONS 3
 855
 856         switch (c->delivery_system) {
 857         case SYS_DVBS:
 858                 tmp = 0;
 859
 860                 for (i = 0; i < M88DS3103_SNR_ITERATIONS; i++) {
 861                         ret = m88ds3103_rd_reg(priv, 0xff, &buf[0]);
 862                         if (ret)
 863                                 goto err;
 864
 865                         tmp += buf[0];
 866                 }
 867
 868                 /* use of one register limits max value to 15 dB */
 869                 /* SNR(X) dB = 10 * ln(X) / ln(10) dB */
 870                 tmp = DIV_ROUND_CLOSEST(tmp, 8 * M88DS3103_SNR_ITERATIONS);
 871                 if (tmp)
 872                         *snr = div_u64((u64) 100 * intlog2(tmp), intlog2(10));
 873                 else
 874                         *snr = 0;
 875                 break;
 876         case SYS_DVBS2:
 877                 noise_tot = 0;
 878                 signal_tot = 0;
 879
 880                 for (i = 0; i < M88DS3103_SNR_ITERATIONS; i++) {
 881                         ret = m88ds3103_rd_regs(priv, 0x8c, buf, 3);
 882                         if (ret)
 883                                 goto err;
 884
 885                         noise = buf[1] << 6;    /* [13:6] */
 886                         noise |= buf[0] & 0x3f; /*  [5:0] */
 887                         noise >>= 2;
 888                         signal = buf[2] * buf[2];
 889                         signal >>= 1;
 890
 891                         noise_tot += noise;
 892                         signal_tot += signal;
 893                 }
 894
 895                 noise = noise_tot / M88DS3103_SNR_ITERATIONS;
 896                 signal = signal_tot / M88DS3103_SNR_ITERATIONS;
 897
 898                 /* SNR(X) dB = 10 * log10(X) dB */
 899                 if (signal > noise) {
 900                         tmp = signal / noise;
 901                         *snr = div_u64((u64) 100 * intlog10(tmp), (1 << 24));
 902                 } else {
 903                         *snr = 0;
 904                 }
 905                 break;
 906         default:
 907                 dev_dbg(&priv->i2c->dev, "%s: invalid delivery_system\n",
 908                                 __func__);
 909                 ret = -EINVAL;
 910                 goto err;
 911         }
 912
 913         return 0;
 914 err:
 915         dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
 916         return ret;
 917 }
 918
 919 static int m88ds3103_read_ber(struct dvb_frontend *fe, u32 *ber)
 920 {
 921         struct m88ds3103_priv *priv = fe->demodulator_priv;
 922         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 923         int ret;
 924         unsigned int utmp;
 925         u8 buf[3], u8tmp;
 926
 927         dev_dbg(&priv->i2c->dev, "%s:\n", __func__);
 928
 929         switch (c->delivery_system) {
 930         case SYS_DVBS:
 931                 ret = m88ds3103_wr_reg(priv, 0xf9, 0x04);
 932                 if (ret)
 933                         goto err;
 934
 935                 ret = m88ds3103_rd_reg(priv, 0xf8, &u8tmp);
 936                 if (ret)
 937                         goto err;
 938
 939                 if (!(u8tmp & 0x10)) {
 940                         u8tmp |= 0x10;
 941
 942                         ret = m88ds3103_rd_regs(priv, 0xf6, buf, 2);
 943                         if (ret)
 944                                 goto err;
 945
 946                         priv->ber = (buf[1] << 8) | (buf[0] << 0);
 947
 948                         /* restart counters */
 949                         ret = m88ds3103_wr_reg(priv, 0xf8, u8tmp);
 950                         if (ret)
 951                                 goto err;
 952                 }
 953                 break;
 954         case SYS_DVBS2:
 955                 ret = m88ds3103_rd_regs(priv, 0xd5, buf, 3);
 956                 if (ret)
 957                         goto err;
 958
 959                 utmp = (buf[2] << 16) | (buf[1] << 8) | (buf[0] << 0);
 960
 961                 if (utmp > 3000) {
 962                         ret = m88ds3103_rd_regs(priv, 0xf7, buf, 2);
 963                         if (ret)
 964                                 goto err;
 965
 966                         priv->ber = (buf[1] << 8) | (buf[0] << 0);
 967
 968                         /* restart counters */
 969                         ret = m88ds3103_wr_reg(priv, 0xd1, 0x01);
 970                         if (ret)
 971                                 goto err;
 972
 973                         ret = m88ds3103_wr_reg(priv, 0xf9, 0x01);
 974                         if (ret)
 975                                 goto err;
 976
 977                         ret = m88ds3103_wr_reg(priv, 0xf9, 0x00);
 978                         if (ret)
 979                                 goto err;
 980
 981                         ret = m88ds3103_wr_reg(priv, 0xd1, 0x00);
 982                         if (ret)
 983                                 goto err;
 984                 }
 985                 break;
 986         default:
 987                 dev_dbg(&priv->i2c->dev, "%s: invalid delivery_system\n",
 988                                 __func__);
 989                 ret = -EINVAL;
 990                 goto err;
 991         }
 992
 993         *ber = priv->ber;
 994
 995         return 0;
 996 err:
 997         dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
 998         return ret;
 999 }
1000
1001 static int m88ds3103_set_tone(struct dvb_frontend *fe,
1002         fe_sec_tone_mode_t fe_sec_tone_mode)
1003 {
1004         struct m88ds3103_priv *priv = fe->demodulator_priv;
1005         int ret;
1006         u8 u8tmp, tone, reg_a1_mask;
1007
1008         dev_dbg(&priv->i2c->dev, "%s: fe_sec_tone_mode=%d\n", __func__,
1009                         fe_sec_tone_mode);
1010
1011         if (!priv->warm) {
1012                 ret = -EAGAIN;
1013                 goto err;
1014         }
1015
1016         switch (fe_sec_tone_mode) {
1017         case SEC_TONE_ON:
1018                 tone = 0;
1019                 reg_a1_mask = 0x47;
1020                 break;
1021         case SEC_TONE_OFF:
1022                 tone = 1;
1023                 reg_a1_mask = 0x00;
1024                 break;
1025         default:
1026                 dev_dbg(&priv->i2c->dev, "%s: invalid fe_sec_tone_mode\n",
1027                                 __func__);
1028                 ret = -EINVAL;
1029                 goto err;
1030         }
1031
1032         u8tmp = tone << 7 | priv->cfg->envelope_mode << 5;
1033         ret = m88ds3103_wr_reg_mask(priv, 0xa2, u8tmp, 0xe0);
1034         if (ret)
1035                 goto err;
1036
1037         u8tmp = 1 << 2;
1038         ret = m88ds3103_wr_reg_mask(priv, 0xa1, u8tmp, reg_a1_mask);
1039         if (ret)
1040                 goto err;
1041
1042         return 0;
1043 err:
1044         dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
1045         return ret;
1046 }
1047
1048 static int m88ds3103_set_voltage(struct dvb_frontend *fe,
1049         fe_sec_voltage_t fe_sec_voltage)
1050 {
1051         struct m88ds3103_priv *priv = fe->demodulator_priv;
1052         int ret;
1053         u8 u8tmp;
1054         bool voltage_sel, voltage_dis;
1055
1056         dev_dbg(&priv->i2c->dev, "%s: fe_sec_voltage=%d\n", __func__,
1057                         fe_sec_voltage);
1058
1059         if (!priv->warm) {
1060                 ret = -EAGAIN;
1061                 goto err;
1062         }
1063
1064         switch (fe_sec_voltage) {
1065         case SEC_VOLTAGE_18:
1066                 voltage_sel = true;
1067                 voltage_dis = false;
1068                 break;
1069         case SEC_VOLTAGE_13:
1070                 voltage_sel = false;
1071                 voltage_dis = false;
1072                 break;
1073         case SEC_VOLTAGE_OFF:
1074                 voltage_sel = false;
1075                 voltage_dis = true;
1076                 break;
1077         default:
1078                 dev_dbg(&priv->i2c->dev, "%s: invalid fe_sec_voltage\n",
1079                                 __func__);
1080                 ret = -EINVAL;
1081                 goto err;
1082         }
1083
1084         /* output pin polarity */
1085         voltage_sel ^= priv->cfg->lnb_hv_pol;
1086         voltage_dis ^= priv->cfg->lnb_en_pol;
1087
1088         u8tmp = voltage_dis << 1 | voltage_sel << 0;
1089         ret = m88ds3103_wr_reg_mask(priv, 0xa2, u8tmp, 0x03);
1090         if (ret)
1091                 goto err;
1092
1093         return 0;
1094 err:
1095         dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
1096         return ret;
1097 }
1098
1099 static int m88ds3103_diseqc_send_master_cmd(struct dvb_frontend *fe,
1100                 struct dvb_diseqc_master_cmd *diseqc_cmd)
1101 {
1102         struct m88ds3103_priv *priv = fe->demodulator_priv;
1103         int ret, i;
1104         u8 u8tmp;
1105
1106         dev_dbg(&priv->i2c->dev, "%s: msg=%*ph\n", __func__,
1107                         diseqc_cmd->msg_len, diseqc_cmd->msg);
1108
1109         if (!priv->warm) {
1110                 ret = -EAGAIN;
1111                 goto err;
1112         }
1113
1114         if (diseqc_cmd->msg_len < 3 || diseqc_cmd->msg_len > 6) {
1115                 ret = -EINVAL;
1116                 goto err;
1117         }
1118
1119         u8tmp = priv->cfg->envelope_mode << 5;
1120         ret = m88ds3103_wr_reg_mask(priv, 0xa2, u8tmp, 0xe0);
1121         if (ret)
1122                 goto err;
1123
1124         ret = m88ds3103_wr_regs(priv, 0xa3, diseqc_cmd->msg,
1125                         diseqc_cmd->msg_len);
1126         if (ret)
1127                 goto err;
1128
1129         ret = m88ds3103_wr_reg(priv, 0xa1,
1130                         (diseqc_cmd->msg_len - 1) << 3 | 0x07);
1131         if (ret)
1132                 goto err;
1133
1134         /* DiSEqC message typical period is 54 ms */
1135         usleep_range(40000, 60000);
1136
1137         /* wait DiSEqC TX ready */
1138         for (i = 20, u8tmp = 1; i && u8tmp; i--) {
1139                 usleep_range(5000, 10000);
1140
1141                 ret = m88ds3103_rd_reg_mask(priv, 0xa1, &u8tmp, 0x40);
1142                 if (ret)
1143                         goto err;
1144         }
1145
1146         dev_dbg(&priv->i2c->dev, "%s: loop=%d\n", __func__, i);
1147
1148         if (i == 0) {
1149                 dev_dbg(&priv->i2c->dev, "%s: diseqc tx timeout\n", __func__);
1150
1151                 ret = m88ds3103_wr_reg_mask(priv, 0xa1, 0x40, 0xc0);
1152                 if (ret)
1153                         goto err;
1154         }
1155
1156         ret = m88ds3103_wr_reg_mask(priv, 0xa2, 0x80, 0xc0);
1157         if (ret)
1158                 goto err;
1159
1160         if (i == 0) {
1161                 ret = -ETIMEDOUT;
1162                 goto err;
1163         }
1164
1165         return 0;
1166 err:
1167         dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
1168         return ret;
1169 }
1170
1171 static int m88ds3103_diseqc_send_burst(struct dvb_frontend *fe,
1172         fe_sec_mini_cmd_t fe_sec_mini_cmd)
1173 {
1174         struct m88ds3103_priv *priv = fe->demodulator_priv;
1175         int ret, i;
1176         u8 u8tmp, burst;
1177
1178         dev_dbg(&priv->i2c->dev, "%s: fe_sec_mini_cmd=%d\n", __func__,
1179                         fe_sec_mini_cmd);
1180
1181         if (!priv->warm) {
1182                 ret = -EAGAIN;
1183                 goto err;
1184         }
1185
1186         u8tmp = priv->cfg->envelope_mode << 5;
1187         ret = m88ds3103_wr_reg_mask(priv, 0xa2, u8tmp, 0xe0);
1188         if (ret)
1189                 goto err;
1190
1191         switch (fe_sec_mini_cmd) {
1192         case SEC_MINI_A:
1193                 burst = 0x02;
1194                 break;
1195         case SEC_MINI_B:
1196                 burst = 0x01;
1197                 break;
1198         default:
1199                 dev_dbg(&priv->i2c->dev, "%s: invalid fe_sec_mini_cmd\n",
1200                                 __func__);
1201                 ret = -EINVAL;
1202                 goto err;
1203         }
1204
1205         ret = m88ds3103_wr_reg(priv, 0xa1, burst);
1206         if (ret)
1207                 goto err;
1208
1209         /* DiSEqC ToneBurst period is 12.5 ms */
1210         usleep_range(11000, 20000);
1211
1212         /* wait DiSEqC TX ready */
1213         for (i = 5, u8tmp = 1; i && u8tmp; i--) {
1214                 usleep_range(800, 2000);
1215
1216                 ret = m88ds3103_rd_reg_mask(priv, 0xa1, &u8tmp, 0x40);
1217                 if (ret)
1218                         goto err;
1219         }
1220
1221         dev_dbg(&priv->i2c->dev, "%s: loop=%d\n", __func__, i);
1222
1223         ret = m88ds3103_wr_reg_mask(priv, 0xa2, 0x80, 0xc0);
1224         if (ret)
1225                 goto err;
1226
1227         if (i == 0) {
1228                 dev_dbg(&priv->i2c->dev, "%s: diseqc tx timeout\n", __func__);
1229                 ret = -ETIMEDOUT;
1230                 goto err;
1231         }
1232
1233         return 0;
1234 err:
1235         dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
1236         return ret;
1237 }
1238
1239 static int m88ds3103_get_tune_settings(struct dvb_frontend *fe,
1240         struct dvb_frontend_tune_settings *s)
1241 {
1242         s->min_delay_ms = 3000;
1243
1244         return 0;
1245 }
1246
1247 static void m88ds3103_release(struct dvb_frontend *fe)
1248 {
1249         struct m88ds3103_priv *priv = fe->demodulator_priv;
1250
1251         i2c_del_mux_adapter(priv->i2c_adapter);
1252         kfree(priv);
1253 }
1254
1255 static int m88ds3103_select(struct i2c_adapter *adap, void *mux_priv, u32 chan)
1256 {
1257         struct m88ds3103_priv *priv = mux_priv;
1258         int ret;
1259         struct i2c_msg gate_open_msg[1] = {
1260                 {
1261                         .addr = priv->cfg->i2c_addr,
1262                         .flags = 0,
1263                         .len = 2,
1264                         .buf = "\x03\x11",
1265                 }
1266         };
1267
1268         mutex_lock(&priv->i2c_mutex);
1269
1270         /* open tuner I2C repeater for 1 xfer, closes automatically */
1271         ret = __i2c_transfer(priv->i2c, gate_open_msg, 1);
1272         if (ret != 1) {
1273                 dev_warn(&priv->i2c->dev, "%s: i2c wr failed=%d\n",
1274                                 KBUILD_MODNAME, ret);
1275                 if (ret >= 0)
1276                         ret = -EREMOTEIO;
1277
1278                 return ret;
1279         }
1280
1281         return 0;
1282 }
1283
1284 static int m88ds3103_deselect(struct i2c_adapter *adap, void *mux_priv,
1285                 u32 chan)
1286 {
1287         struct m88ds3103_priv *priv = mux_priv;
1288
1289         mutex_unlock(&priv->i2c_mutex);
1290
1291         return 0;
1292 }
1293
1294 struct dvb_frontend *m88ds3103_attach(const struct m88ds3103_config *cfg,
1295                 struct i2c_adapter *i2c, struct i2c_adapter **tuner_i2c_adapter)
1296 {
1297         int ret;
1298         struct m88ds3103_priv *priv;
1299         u8 chip_id, u8tmp;
1300
1301         /* allocate memory for the internal priv */
1302         priv = kzalloc(sizeof(*priv), GFP_KERNEL);
1303         if (!priv) {
1304                 ret = -ENOMEM;
1305                 dev_err(&i2c->dev, "%s: kzalloc() failed\n", KBUILD_MODNAME);
1306                 goto err;
1307         }
1308
1309         priv->cfg = cfg;
1310         priv->i2c = i2c;
1311         mutex_init(&priv->i2c_mutex);
1312
1313         ret = m88ds3103_rd_reg(priv, 0x01, &chip_id);
1314         if (ret)
1315                 goto err;
1316
1317         dev_dbg(&priv->i2c->dev, "%s: chip_id=%02x\n", __func__, chip_id);
1318
1319         switch (chip_id) {
1320         case 0xd0:
1321                 break;
1322         default:
1323                 goto err;
1324         }
1325
1326         switch (priv->cfg->clock_out) {
1327         case M88DS3103_CLOCK_OUT_DISABLED:
1328                 u8tmp = 0x80;
1329                 break;
1330         case M88DS3103_CLOCK_OUT_ENABLED:
1331                 u8tmp = 0x00;
1332                 break;
1333         case M88DS3103_CLOCK_OUT_ENABLED_DIV2:
1334                 u8tmp = 0x10;
1335                 break;
1336         default:
1337                 goto err;
1338         }
1339
1340         ret = m88ds3103_wr_reg(priv, 0x29, u8tmp);
1341         if (ret)
1342                 goto err;
1343
1344         /* sleep */
1345         ret = m88ds3103_wr_reg_mask(priv, 0x08, 0x00, 0x01);
1346         if (ret)
1347                 goto err;
1348
1349         ret = m88ds3103_wr_reg_mask(priv, 0x04, 0x01, 0x01);
1350         if (ret)
1351                 goto err;
1352
1353         ret = m88ds3103_wr_reg_mask(priv, 0x23, 0x10, 0x10);
1354         if (ret)
1355                 goto err;
1356
1357         /* create mux i2c adapter for tuner */
1358         priv->i2c_adapter = i2c_add_mux_adapter(i2c, &i2c->dev, priv, 0, 0, 0,
1359                         m88ds3103_select, m88ds3103_deselect);
1360         if (priv->i2c_adapter == NULL)
1361                 goto err;
1362
1363         *tuner_i2c_adapter = priv->i2c_adapter;
1364
1365         /* create dvb_frontend */
1366         memcpy(&priv->fe.ops, &m88ds3103_ops, sizeof(struct dvb_frontend_ops));
1367         priv->fe.demodulator_priv = priv;
1368
1369         return &priv->fe;
1370 err:
1371         dev_dbg(&i2c->dev, "%s: failed=%d\n", __func__, ret);
1372         kfree(priv);
1373         return NULL;
1374 }
1375 EXPORT_SYMBOL(m88ds3103_attach);
1376
1377 static struct dvb_frontend_ops m88ds3103_ops = {
1378         .delsys = { SYS_DVBS, SYS_DVBS2 },
1379         .info = {
1380                 .name = "Montage M88DS3103",
1381                 .frequency_min =  950000,
1382                 .frequency_max = 2150000,
1383                 .frequency_tolerance = 5000,
1384                 .symbol_rate_min =  1000000,
1385                 .symbol_rate_max = 45000000,
1386                 .caps = FE_CAN_INVERSION_AUTO |
1387                         FE_CAN_FEC_1_2 |
1388                         FE_CAN_FEC_2_3 |
1389                         FE_CAN_FEC_3_4 |
1390                         FE_CAN_FEC_4_5 |
1391                         FE_CAN_FEC_5_6 |
1392                         FE_CAN_FEC_6_7 |
1393                         FE_CAN_FEC_7_8 |
1394                         FE_CAN_FEC_8_9 |
1395                         FE_CAN_FEC_AUTO |
1396                         FE_CAN_QPSK |
1397                         FE_CAN_RECOVER |
1398                         FE_CAN_2G_MODULATION
1399         },
1400
1401         .release = m88ds3103_release,
1402
1403         .get_tune_settings = m88ds3103_get_tune_settings,
1404
1405         .init = m88ds3103_init,
1406         .sleep = m88ds3103_sleep,
1407
1408         .set_frontend = m88ds3103_set_frontend,
1409         .get_frontend = m88ds3103_get_frontend,
1410
1411         .read_status = m88ds3103_read_status,
1412         .read_snr = m88ds3103_read_snr,
1413         .read_ber = m88ds3103_read_ber,
1414
1415         .diseqc_send_master_cmd = m88ds3103_diseqc_send_master_cmd,
1416         .diseqc_send_burst = m88ds3103_diseqc_send_burst,
1417
1418         .set_tone = m88ds3103_set_tone,
1419         .set_voltage = m88ds3103_set_voltage,
1420 };
1421
1422 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
1423 MODULE_DESCRIPTION("Montage M88DS3103 DVB-S/S2 demodulator driver");
1424 MODULE_LICENSE("GPL");
1425 MODULE_FIRMWARE(M88DS3103_FIRMWARE);