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Merge branch 'usb-midi-fix-3.7' of git://git.alsa-project.org/alsa-kprivate into...
[deliverable/linux.git] / drivers / media / i2c / tvaudio.c
1 /*
2 * Driver for simple i2c audio chips.
3 *
4 * Copyright (c) 2000 Gerd Knorr
5 * based on code by:
6 * Eric Sandeen (eric_sandeen@bigfoot.com)
7 * Steve VanDeBogart (vandebo@uclink.berkeley.edu)
8 * Greg Alexander (galexand@acm.org)
9 *
10 * For the TDA9875 part:
11 * Copyright (c) 2000 Guillaume Delvit based on Gerd Knorr source
12 * and Eric Sandeen
13 *
14 * Copyright(c) 2005-2008 Mauro Carvalho Chehab
15 * - Some cleanups, code fixes, etc
16 * - Convert it to V4L2 API
17 *
18 * This code is placed under the terms of the GNU General Public License
19 *
20 * OPTIONS:
21 * debug - set to 1 if you'd like to see debug messages
22 *
23 */
24
25 #include <linux/module.h>
26 #include <linux/kernel.h>
27 #include <linux/sched.h>
28 #include <linux/string.h>
29 #include <linux/timer.h>
30 #include <linux/delay.h>
31 #include <linux/errno.h>
32 #include <linux/slab.h>
33 #include <linux/videodev2.h>
34 #include <linux/i2c.h>
35 #include <linux/init.h>
36 #include <linux/kthread.h>
37 #include <linux/freezer.h>
38
39 #include <media/tvaudio.h>
40 #include <media/v4l2-device.h>
41 #include <media/v4l2-chip-ident.h>
42
43 #include <media/i2c-addr.h>
44
45 /* ---------------------------------------------------------------------- */
46 /* insmod args */
47
48 static int debug; /* insmod parameter */
49 module_param(debug, int, 0644);
50
51 MODULE_DESCRIPTION("device driver for various i2c TV sound decoder / audiomux chips");
52 MODULE_AUTHOR("Eric Sandeen, Steve VanDeBogart, Greg Alexander, Gerd Knorr");
53 MODULE_LICENSE("GPL");
54
55 #define UNSET (-1U)
56
57 /* ---------------------------------------------------------------------- */
58 /* our structs */
59
60 #define MAXREGS 256
61
62 struct CHIPSTATE;
63 typedef int (*getvalue)(int);
64 typedef int (*checkit)(struct CHIPSTATE*);
65 typedef int (*initialize)(struct CHIPSTATE*);
66 typedef int (*getrxsubchans)(struct CHIPSTATE *);
67 typedef void (*setaudmode)(struct CHIPSTATE*, int mode);
68
69 /* i2c command */
70 typedef struct AUDIOCMD {
71 int count; /* # of bytes to send */
72 unsigned char bytes[MAXREGS+1]; /* addr, data, data, ... */
73 } audiocmd;
74
75 /* chip description */
76 struct CHIPDESC {
77 char *name; /* chip name */
78 int addr_lo, addr_hi; /* i2c address range */
79 int registers; /* # of registers */
80
81 int *insmodopt;
82 checkit checkit;
83 initialize initialize;
84 int flags;
85 #define CHIP_HAS_VOLUME 1
86 #define CHIP_HAS_BASSTREBLE 2
87 #define CHIP_HAS_INPUTSEL 4
88 #define CHIP_NEED_CHECKMODE 8
89
90 /* various i2c command sequences */
91 audiocmd init;
92
93 /* which register has which value */
94 int leftreg,rightreg,treblereg,bassreg;
95
96 /* initialize with (defaults to 65535/65535/32768/32768 */
97 int leftinit,rightinit,trebleinit,bassinit;
98
99 /* functions to convert the values (v4l -> chip) */
100 getvalue volfunc,treblefunc,bassfunc;
101
102 /* get/set mode */
103 getrxsubchans getrxsubchans;
104 setaudmode setaudmode;
105
106 /* input switch register + values for v4l inputs */
107 int inputreg;
108 int inputmap[4];
109 int inputmute;
110 int inputmask;
111 };
112
113 /* current state of the chip */
114 struct CHIPSTATE {
115 struct v4l2_subdev sd;
116
117 /* chip-specific description - should point to
118 an entry at CHIPDESC table */
119 struct CHIPDESC *desc;
120
121 /* shadow register set */
122 audiocmd shadow;
123
124 /* current settings */
125 __u16 left, right, treble, bass, muted;
126 int prevmode;
127 int radio;
128 int input;
129
130 /* thread */
131 struct task_struct *thread;
132 struct timer_list wt;
133 int audmode;
134 };
135
136 static inline struct CHIPSTATE *to_state(struct v4l2_subdev *sd)
137 {
138 return container_of(sd, struct CHIPSTATE, sd);
139 }
140
141
142 /* ---------------------------------------------------------------------- */
143 /* i2c I/O functions */
144
145 static int chip_write(struct CHIPSTATE *chip, int subaddr, int val)
146 {
147 struct v4l2_subdev *sd = &chip->sd;
148 struct i2c_client *c = v4l2_get_subdevdata(sd);
149 unsigned char buffer[2];
150
151 if (subaddr < 0) {
152 v4l2_dbg(1, debug, sd, "chip_write: 0x%x\n", val);
153 chip->shadow.bytes[1] = val;
154 buffer[0] = val;
155 if (1 != i2c_master_send(c, buffer, 1)) {
156 v4l2_warn(sd, "I/O error (write 0x%x)\n", val);
157 return -1;
158 }
159 } else {
160 if (subaddr + 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
161 v4l2_info(sd,
162 "Tried to access a non-existent register: %d\n",
163 subaddr);
164 return -EINVAL;
165 }
166
167 v4l2_dbg(1, debug, sd, "chip_write: reg%d=0x%x\n",
168 subaddr, val);
169 chip->shadow.bytes[subaddr+1] = val;
170 buffer[0] = subaddr;
171 buffer[1] = val;
172 if (2 != i2c_master_send(c, buffer, 2)) {
173 v4l2_warn(sd, "I/O error (write reg%d=0x%x)\n",
174 subaddr, val);
175 return -1;
176 }
177 }
178 return 0;
179 }
180
181 static int chip_write_masked(struct CHIPSTATE *chip,
182 int subaddr, int val, int mask)
183 {
184 struct v4l2_subdev *sd = &chip->sd;
185
186 if (mask != 0) {
187 if (subaddr < 0) {
188 val = (chip->shadow.bytes[1] & ~mask) | (val & mask);
189 } else {
190 if (subaddr + 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
191 v4l2_info(sd,
192 "Tried to access a non-existent register: %d\n",
193 subaddr);
194 return -EINVAL;
195 }
196
197 val = (chip->shadow.bytes[subaddr+1] & ~mask) | (val & mask);
198 }
199 }
200 return chip_write(chip, subaddr, val);
201 }
202
203 static int chip_read(struct CHIPSTATE *chip)
204 {
205 struct v4l2_subdev *sd = &chip->sd;
206 struct i2c_client *c = v4l2_get_subdevdata(sd);
207 unsigned char buffer;
208
209 if (1 != i2c_master_recv(c, &buffer, 1)) {
210 v4l2_warn(sd, "I/O error (read)\n");
211 return -1;
212 }
213 v4l2_dbg(1, debug, sd, "chip_read: 0x%x\n", buffer);
214 return buffer;
215 }
216
217 static int chip_read2(struct CHIPSTATE *chip, int subaddr)
218 {
219 struct v4l2_subdev *sd = &chip->sd;
220 struct i2c_client *c = v4l2_get_subdevdata(sd);
221 unsigned char write[1];
222 unsigned char read[1];
223 struct i2c_msg msgs[2] = {
224 {
225 .addr = c->addr,
226 .len = 1,
227 .buf = write
228 },
229 {
230 .addr = c->addr,
231 .flags = I2C_M_RD,
232 .len = 1,
233 .buf = read
234 }
235 };
236
237 write[0] = subaddr;
238
239 if (2 != i2c_transfer(c->adapter, msgs, 2)) {
240 v4l2_warn(sd, "I/O error (read2)\n");
241 return -1;
242 }
243 v4l2_dbg(1, debug, sd, "chip_read2: reg%d=0x%x\n",
244 subaddr, read[0]);
245 return read[0];
246 }
247
248 static int chip_cmd(struct CHIPSTATE *chip, char *name, audiocmd *cmd)
249 {
250 struct v4l2_subdev *sd = &chip->sd;
251 struct i2c_client *c = v4l2_get_subdevdata(sd);
252 int i;
253
254 if (0 == cmd->count)
255 return 0;
256
257 if (cmd->count + cmd->bytes[0] - 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
258 v4l2_info(sd,
259 "Tried to access a non-existent register range: %d to %d\n",
260 cmd->bytes[0] + 1, cmd->bytes[0] + cmd->count - 1);
261 return -EINVAL;
262 }
263
264 /* FIXME: it seems that the shadow bytes are wrong bellow !*/
265
266 /* update our shadow register set; print bytes if (debug > 0) */
267 v4l2_dbg(1, debug, sd, "chip_cmd(%s): reg=%d, data:",
268 name, cmd->bytes[0]);
269 for (i = 1; i < cmd->count; i++) {
270 if (debug)
271 printk(KERN_CONT " 0x%x", cmd->bytes[i]);
272 chip->shadow.bytes[i+cmd->bytes[0]] = cmd->bytes[i];
273 }
274 if (debug)
275 printk(KERN_CONT "\n");
276
277 /* send data to the chip */
278 if (cmd->count != i2c_master_send(c, cmd->bytes, cmd->count)) {
279 v4l2_warn(sd, "I/O error (%s)\n", name);
280 return -1;
281 }
282 return 0;
283 }
284
285 /* ---------------------------------------------------------------------- */
286 /* kernel thread for doing i2c stuff asyncronly
287 * right now it is used only to check the audio mode (mono/stereo/whatever)
288 * some time after switching to another TV channel, then turn on stereo
289 * if available, ...
290 */
291
292 static void chip_thread_wake(unsigned long data)
293 {
294 struct CHIPSTATE *chip = (struct CHIPSTATE*)data;
295 wake_up_process(chip->thread);
296 }
297
298 static int chip_thread(void *data)
299 {
300 struct CHIPSTATE *chip = data;
301 struct CHIPDESC *desc = chip->desc;
302 struct v4l2_subdev *sd = &chip->sd;
303 int mode, selected;
304
305 v4l2_dbg(1, debug, sd, "thread started\n");
306 set_freezable();
307 for (;;) {
308 set_current_state(TASK_INTERRUPTIBLE);
309 if (!kthread_should_stop())
310 schedule();
311 set_current_state(TASK_RUNNING);
312 try_to_freeze();
313 if (kthread_should_stop())
314 break;
315 v4l2_dbg(1, debug, sd, "thread wakeup\n");
316
317 /* don't do anything for radio */
318 if (chip->radio)
319 continue;
320
321 /* have a look what's going on */
322 mode = desc->getrxsubchans(chip);
323 if (mode == chip->prevmode)
324 continue;
325
326 /* chip detected a new audio mode - set it */
327 v4l2_dbg(1, debug, sd, "thread checkmode\n");
328
329 chip->prevmode = mode;
330
331 selected = V4L2_TUNER_MODE_MONO;
332 switch (chip->audmode) {
333 case V4L2_TUNER_MODE_MONO:
334 if (mode & V4L2_TUNER_SUB_LANG1)
335 selected = V4L2_TUNER_MODE_LANG1;
336 break;
337 case V4L2_TUNER_MODE_STEREO:
338 case V4L2_TUNER_MODE_LANG1:
339 if (mode & V4L2_TUNER_SUB_LANG1)
340 selected = V4L2_TUNER_MODE_LANG1;
341 else if (mode & V4L2_TUNER_SUB_STEREO)
342 selected = V4L2_TUNER_MODE_STEREO;
343 break;
344 case V4L2_TUNER_MODE_LANG2:
345 if (mode & V4L2_TUNER_SUB_LANG2)
346 selected = V4L2_TUNER_MODE_LANG2;
347 else if (mode & V4L2_TUNER_SUB_STEREO)
348 selected = V4L2_TUNER_MODE_STEREO;
349 break;
350 case V4L2_TUNER_MODE_LANG1_LANG2:
351 if (mode & V4L2_TUNER_SUB_LANG2)
352 selected = V4L2_TUNER_MODE_LANG1_LANG2;
353 else if (mode & V4L2_TUNER_SUB_STEREO)
354 selected = V4L2_TUNER_MODE_STEREO;
355 }
356 desc->setaudmode(chip, selected);
357
358 /* schedule next check */
359 mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000));
360 }
361
362 v4l2_dbg(1, debug, sd, "thread exiting\n");
363 return 0;
364 }
365
366 /* ---------------------------------------------------------------------- */
367 /* audio chip descriptions - defines+functions for tda9840 */
368
369 #define TDA9840_SW 0x00
370 #define TDA9840_LVADJ 0x02
371 #define TDA9840_STADJ 0x03
372 #define TDA9840_TEST 0x04
373
374 #define TDA9840_MONO 0x10
375 #define TDA9840_STEREO 0x2a
376 #define TDA9840_DUALA 0x12
377 #define TDA9840_DUALB 0x1e
378 #define TDA9840_DUALAB 0x1a
379 #define TDA9840_DUALBA 0x16
380 #define TDA9840_EXTERNAL 0x7a
381
382 #define TDA9840_DS_DUAL 0x20 /* Dual sound identified */
383 #define TDA9840_ST_STEREO 0x40 /* Stereo sound identified */
384 #define TDA9840_PONRES 0x80 /* Power-on reset detected if = 1 */
385
386 #define TDA9840_TEST_INT1SN 0x1 /* Integration time 0.5s when set */
387 #define TDA9840_TEST_INTFU 0x02 /* Disables integrator function */
388
389 static int tda9840_getrxsubchans(struct CHIPSTATE *chip)
390 {
391 struct v4l2_subdev *sd = &chip->sd;
392 int val, mode;
393
394 val = chip_read(chip);
395 mode = V4L2_TUNER_SUB_MONO;
396 if (val & TDA9840_DS_DUAL)
397 mode |= V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
398 if (val & TDA9840_ST_STEREO)
399 mode = V4L2_TUNER_SUB_STEREO;
400
401 v4l2_dbg(1, debug, sd,
402 "tda9840_getrxsubchans(): raw chip read: %d, return: %d\n",
403 val, mode);
404 return mode;
405 }
406
407 static void tda9840_setaudmode(struct CHIPSTATE *chip, int mode)
408 {
409 int update = 1;
410 int t = chip->shadow.bytes[TDA9840_SW + 1] & ~0x7e;
411
412 switch (mode) {
413 case V4L2_TUNER_MODE_MONO:
414 t |= TDA9840_MONO;
415 break;
416 case V4L2_TUNER_MODE_STEREO:
417 t |= TDA9840_STEREO;
418 break;
419 case V4L2_TUNER_MODE_LANG1:
420 t |= TDA9840_DUALA;
421 break;
422 case V4L2_TUNER_MODE_LANG2:
423 t |= TDA9840_DUALB;
424 break;
425 case V4L2_TUNER_MODE_LANG1_LANG2:
426 t |= TDA9840_DUALAB;
427 break;
428 default:
429 update = 0;
430 }
431
432 if (update)
433 chip_write(chip, TDA9840_SW, t);
434 }
435
436 static int tda9840_checkit(struct CHIPSTATE *chip)
437 {
438 int rc;
439 rc = chip_read(chip);
440 /* lower 5 bits should be 0 */
441 return ((rc & 0x1f) == 0) ? 1 : 0;
442 }
443
444 /* ---------------------------------------------------------------------- */
445 /* audio chip descriptions - defines+functions for tda985x */
446
447 /* subaddresses for TDA9855 */
448 #define TDA9855_VR 0x00 /* Volume, right */
449 #define TDA9855_VL 0x01 /* Volume, left */
450 #define TDA9855_BA 0x02 /* Bass */
451 #define TDA9855_TR 0x03 /* Treble */
452 #define TDA9855_SW 0x04 /* Subwoofer - not connected on DTV2000 */
453
454 /* subaddresses for TDA9850 */
455 #define TDA9850_C4 0x04 /* Control 1 for TDA9850 */
456
457 /* subaddesses for both chips */
458 #define TDA985x_C5 0x05 /* Control 2 for TDA9850, Control 1 for TDA9855 */
459 #define TDA985x_C6 0x06 /* Control 3 for TDA9850, Control 2 for TDA9855 */
460 #define TDA985x_C7 0x07 /* Control 4 for TDA9850, Control 3 for TDA9855 */
461 #define TDA985x_A1 0x08 /* Alignment 1 for both chips */
462 #define TDA985x_A2 0x09 /* Alignment 2 for both chips */
463 #define TDA985x_A3 0x0a /* Alignment 3 for both chips */
464
465 /* Masks for bits in TDA9855 subaddresses */
466 /* 0x00 - VR in TDA9855 */
467 /* 0x01 - VL in TDA9855 */
468 /* lower 7 bits control gain from -71dB (0x28) to 16dB (0x7f)
469 * in 1dB steps - mute is 0x27 */
470
471
472 /* 0x02 - BA in TDA9855 */
473 /* lower 5 bits control bass gain from -12dB (0x06) to 16.5dB (0x19)
474 * in .5dB steps - 0 is 0x0E */
475
476
477 /* 0x03 - TR in TDA9855 */
478 /* 4 bits << 1 control treble gain from -12dB (0x3) to 12dB (0xb)
479 * in 3dB steps - 0 is 0x7 */
480
481 /* Masks for bits in both chips' subaddresses */
482 /* 0x04 - SW in TDA9855, C4/Control 1 in TDA9850 */
483 /* Unique to TDA9855: */
484 /* 4 bits << 2 control subwoofer/surround gain from -14db (0x1) to 14db (0xf)
485 * in 3dB steps - mute is 0x0 */
486
487 /* Unique to TDA9850: */
488 /* lower 4 bits control stereo noise threshold, over which stereo turns off
489 * set to values of 0x00 through 0x0f for Ster1 through Ster16 */
490
491
492 /* 0x05 - C5 - Control 1 in TDA9855 , Control 2 in TDA9850*/
493 /* Unique to TDA9855: */
494 #define TDA9855_MUTE 1<<7 /* GMU, Mute at outputs */
495 #define TDA9855_AVL 1<<6 /* AVL, Automatic Volume Level */
496 #define TDA9855_LOUD 1<<5 /* Loudness, 1==off */
497 #define TDA9855_SUR 1<<3 /* Surround / Subwoofer 1==.5(L-R) 0==.5(L+R) */
498 /* Bits 0 to 3 select various combinations
499 * of line in and line out, only the
500 * interesting ones are defined */
501 #define TDA9855_EXT 1<<2 /* Selects inputs LIR and LIL. Pins 41 & 12 */
502 #define TDA9855_INT 0 /* Selects inputs LOR and LOL. (internal) */
503
504 /* Unique to TDA9850: */
505 /* lower 4 bits contol SAP noise threshold, over which SAP turns off
506 * set to values of 0x00 through 0x0f for SAP1 through SAP16 */
507
508
509 /* 0x06 - C6 - Control 2 in TDA9855, Control 3 in TDA9850 */
510 /* Common to TDA9855 and TDA9850: */
511 #define TDA985x_SAP 3<<6 /* Selects SAP output, mute if not received */
512 #define TDA985x_MONOSAP 2<<6 /* Selects Mono on left, SAP on right */
513 #define TDA985x_STEREO 1<<6 /* Selects Stereo ouput, mono if not received */
514 #define TDA985x_MONO 0 /* Forces Mono output */
515 #define TDA985x_LMU 1<<3 /* Mute (LOR/LOL for 9855, OUTL/OUTR for 9850) */
516
517 /* Unique to TDA9855: */
518 #define TDA9855_TZCM 1<<5 /* If set, don't mute till zero crossing */
519 #define TDA9855_VZCM 1<<4 /* If set, don't change volume till zero crossing*/
520 #define TDA9855_LINEAR 0 /* Linear Stereo */
521 #define TDA9855_PSEUDO 1 /* Pseudo Stereo */
522 #define TDA9855_SPAT_30 2 /* Spatial Stereo, 30% anti-phase crosstalk */
523 #define TDA9855_SPAT_50 3 /* Spatial Stereo, 52% anti-phase crosstalk */
524 #define TDA9855_E_MONO 7 /* Forced mono - mono select elseware, so useless*/
525
526 /* 0x07 - C7 - Control 3 in TDA9855, Control 4 in TDA9850 */
527 /* Common to both TDA9855 and TDA9850: */
528 /* lower 4 bits control input gain from -3.5dB (0x0) to 4dB (0xF)
529 * in .5dB steps - 0dB is 0x7 */
530
531 /* 0x08, 0x09 - A1 and A2 (read/write) */
532 /* Common to both TDA9855 and TDA9850: */
533 /* lower 5 bites are wideband and spectral expander alignment
534 * from 0x00 to 0x1f - nominal at 0x0f and 0x10 (read/write) */
535 #define TDA985x_STP 1<<5 /* Stereo Pilot/detect (read-only) */
536 #define TDA985x_SAPP 1<<6 /* SAP Pilot/detect (read-only) */
537 #define TDA985x_STS 1<<7 /* Stereo trigger 1= <35mV 0= <30mV (write-only)*/
538
539 /* 0x0a - A3 */
540 /* Common to both TDA9855 and TDA9850: */
541 /* lower 3 bits control timing current for alignment: -30% (0x0), -20% (0x1),
542 * -10% (0x2), nominal (0x3), +10% (0x6), +20% (0x5), +30% (0x4) */
543 #define TDA985x_ADJ 1<<7 /* Stereo adjust on/off (wideband and spectral */
544
545 static int tda9855_volume(int val) { return val/0x2e8+0x27; }
546 static int tda9855_bass(int val) { return val/0xccc+0x06; }
547 static int tda9855_treble(int val) { return (val/0x1c71+0x3)<<1; }
548
549 static int tda985x_getrxsubchans(struct CHIPSTATE *chip)
550 {
551 int mode, val;
552
553 /* Add mono mode regardless of SAP and stereo */
554 /* Allows forced mono */
555 mode = V4L2_TUNER_SUB_MONO;
556 val = chip_read(chip);
557 if (val & TDA985x_STP)
558 mode = V4L2_TUNER_SUB_STEREO;
559 if (val & TDA985x_SAPP)
560 mode |= V4L2_TUNER_SUB_SAP;
561 return mode;
562 }
563
564 static void tda985x_setaudmode(struct CHIPSTATE *chip, int mode)
565 {
566 int update = 1;
567 int c6 = chip->shadow.bytes[TDA985x_C6+1] & 0x3f;
568
569 switch (mode) {
570 case V4L2_TUNER_MODE_MONO:
571 c6 |= TDA985x_MONO;
572 break;
573 case V4L2_TUNER_MODE_STEREO:
574 case V4L2_TUNER_MODE_LANG1:
575 c6 |= TDA985x_STEREO;
576 break;
577 case V4L2_TUNER_MODE_SAP:
578 c6 |= TDA985x_SAP;
579 break;
580 case V4L2_TUNER_MODE_LANG1_LANG2:
581 c6 |= TDA985x_MONOSAP;
582 break;
583 default:
584 update = 0;
585 }
586 if (update)
587 chip_write(chip,TDA985x_C6,c6);
588 }
589
590
591 /* ---------------------------------------------------------------------- */
592 /* audio chip descriptions - defines+functions for tda9873h */
593
594 /* Subaddresses for TDA9873H */
595
596 #define TDA9873_SW 0x00 /* Switching */
597 #define TDA9873_AD 0x01 /* Adjust */
598 #define TDA9873_PT 0x02 /* Port */
599
600 /* Subaddress 0x00: Switching Data
601 * B7..B0:
602 *
603 * B1, B0: Input source selection
604 * 0, 0 internal
605 * 1, 0 external stereo
606 * 0, 1 external mono
607 */
608 #define TDA9873_INP_MASK 3
609 #define TDA9873_INTERNAL 0
610 #define TDA9873_EXT_STEREO 2
611 #define TDA9873_EXT_MONO 1
612
613 /* B3, B2: output signal select
614 * B4 : transmission mode
615 * 0, 0, 1 Mono
616 * 1, 0, 0 Stereo
617 * 1, 1, 1 Stereo (reversed channel)
618 * 0, 0, 0 Dual AB
619 * 0, 0, 1 Dual AA
620 * 0, 1, 0 Dual BB
621 * 0, 1, 1 Dual BA
622 */
623
624 #define TDA9873_TR_MASK (7 << 2)
625 #define TDA9873_TR_MONO 4
626 #define TDA9873_TR_STEREO 1 << 4
627 #define TDA9873_TR_REVERSE ((1 << 3) | (1 << 2))
628 #define TDA9873_TR_DUALA 1 << 2
629 #define TDA9873_TR_DUALB 1 << 3
630 #define TDA9873_TR_DUALAB 0
631
632 /* output level controls
633 * B5: output level switch (0 = reduced gain, 1 = normal gain)
634 * B6: mute (1 = muted)
635 * B7: auto-mute (1 = auto-mute enabled)
636 */
637
638 #define TDA9873_GAIN_NORMAL 1 << 5
639 #define TDA9873_MUTE 1 << 6
640 #define TDA9873_AUTOMUTE 1 << 7
641
642 /* Subaddress 0x01: Adjust/standard */
643
644 /* Lower 4 bits (C3..C0) control stereo adjustment on R channel (-0.6 - +0.7 dB)
645 * Recommended value is +0 dB
646 */
647
648 #define TDA9873_STEREO_ADJ 0x06 /* 0dB gain */
649
650 /* Bits C6..C4 control FM stantard
651 * C6, C5, C4
652 * 0, 0, 0 B/G (PAL FM)
653 * 0, 0, 1 M
654 * 0, 1, 0 D/K(1)
655 * 0, 1, 1 D/K(2)
656 * 1, 0, 0 D/K(3)
657 * 1, 0, 1 I
658 */
659 #define TDA9873_BG 0
660 #define TDA9873_M 1
661 #define TDA9873_DK1 2
662 #define TDA9873_DK2 3
663 #define TDA9873_DK3 4
664 #define TDA9873_I 5
665
666 /* C7 controls identification response time (1=fast/0=normal)
667 */
668 #define TDA9873_IDR_NORM 0
669 #define TDA9873_IDR_FAST 1 << 7
670
671
672 /* Subaddress 0x02: Port data */
673
674 /* E1, E0 free programmable ports P1/P2
675 0, 0 both ports low
676 0, 1 P1 high
677 1, 0 P2 high
678 1, 1 both ports high
679 */
680
681 #define TDA9873_PORTS 3
682
683 /* E2: test port */
684 #define TDA9873_TST_PORT 1 << 2
685
686 /* E5..E3 control mono output channel (together with transmission mode bit B4)
687 *
688 * E5 E4 E3 B4 OUTM
689 * 0 0 0 0 mono
690 * 0 0 1 0 DUAL B
691 * 0 1 0 1 mono (from stereo decoder)
692 */
693 #define TDA9873_MOUT_MONO 0
694 #define TDA9873_MOUT_FMONO 0
695 #define TDA9873_MOUT_DUALA 0
696 #define TDA9873_MOUT_DUALB 1 << 3
697 #define TDA9873_MOUT_ST 1 << 4
698 #define TDA9873_MOUT_EXTM ((1 << 4) | (1 << 3))
699 #define TDA9873_MOUT_EXTL 1 << 5
700 #define TDA9873_MOUT_EXTR ((1 << 5) | (1 << 3))
701 #define TDA9873_MOUT_EXTLR ((1 << 5) | (1 << 4))
702 #define TDA9873_MOUT_MUTE ((1 << 5) | (1 << 4) | (1 << 3))
703
704 /* Status bits: (chip read) */
705 #define TDA9873_PONR 0 /* Power-on reset detected if = 1 */
706 #define TDA9873_STEREO 2 /* Stereo sound is identified */
707 #define TDA9873_DUAL 4 /* Dual sound is identified */
708
709 static int tda9873_getrxsubchans(struct CHIPSTATE *chip)
710 {
711 struct v4l2_subdev *sd = &chip->sd;
712 int val,mode;
713
714 val = chip_read(chip);
715 mode = V4L2_TUNER_SUB_MONO;
716 if (val & TDA9873_STEREO)
717 mode = V4L2_TUNER_SUB_STEREO;
718 if (val & TDA9873_DUAL)
719 mode |= V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
720 v4l2_dbg(1, debug, sd,
721 "tda9873_getrxsubchans(): raw chip read: %d, return: %d\n",
722 val, mode);
723 return mode;
724 }
725
726 static void tda9873_setaudmode(struct CHIPSTATE *chip, int mode)
727 {
728 struct v4l2_subdev *sd = &chip->sd;
729 int sw_data = chip->shadow.bytes[TDA9873_SW+1] & ~ TDA9873_TR_MASK;
730 /* int adj_data = chip->shadow.bytes[TDA9873_AD+1] ; */
731
732 if ((sw_data & TDA9873_INP_MASK) != TDA9873_INTERNAL) {
733 v4l2_dbg(1, debug, sd,
734 "tda9873_setaudmode(): external input\n");
735 return;
736 }
737
738 v4l2_dbg(1, debug, sd,
739 "tda9873_setaudmode(): chip->shadow.bytes[%d] = %d\n",
740 TDA9873_SW+1, chip->shadow.bytes[TDA9873_SW+1]);
741 v4l2_dbg(1, debug, sd, "tda9873_setaudmode(): sw_data = %d\n",
742 sw_data);
743
744 switch (mode) {
745 case V4L2_TUNER_MODE_MONO:
746 sw_data |= TDA9873_TR_MONO;
747 break;
748 case V4L2_TUNER_MODE_STEREO:
749 sw_data |= TDA9873_TR_STEREO;
750 break;
751 case V4L2_TUNER_MODE_LANG1:
752 sw_data |= TDA9873_TR_DUALA;
753 break;
754 case V4L2_TUNER_MODE_LANG2:
755 sw_data |= TDA9873_TR_DUALB;
756 break;
757 case V4L2_TUNER_MODE_LANG1_LANG2:
758 sw_data |= TDA9873_TR_DUALAB;
759 break;
760 default:
761 return;
762 }
763
764 chip_write(chip, TDA9873_SW, sw_data);
765 v4l2_dbg(1, debug, sd,
766 "tda9873_setaudmode(): req. mode %d; chip_write: %d\n",
767 mode, sw_data);
768 }
769
770 static int tda9873_checkit(struct CHIPSTATE *chip)
771 {
772 int rc;
773
774 if (-1 == (rc = chip_read2(chip,254)))
775 return 0;
776 return (rc & ~0x1f) == 0x80;
777 }
778
779
780 /* ---------------------------------------------------------------------- */
781 /* audio chip description - defines+functions for tda9874h and tda9874a */
782 /* Dariusz Kowalewski <darekk@automex.pl> */
783
784 /* Subaddresses for TDA9874H and TDA9874A (slave rx) */
785 #define TDA9874A_AGCGR 0x00 /* AGC gain */
786 #define TDA9874A_GCONR 0x01 /* general config */
787 #define TDA9874A_MSR 0x02 /* monitor select */
788 #define TDA9874A_C1FRA 0x03 /* carrier 1 freq. */
789 #define TDA9874A_C1FRB 0x04 /* carrier 1 freq. */
790 #define TDA9874A_C1FRC 0x05 /* carrier 1 freq. */
791 #define TDA9874A_C2FRA 0x06 /* carrier 2 freq. */
792 #define TDA9874A_C2FRB 0x07 /* carrier 2 freq. */
793 #define TDA9874A_C2FRC 0x08 /* carrier 2 freq. */
794 #define TDA9874A_DCR 0x09 /* demodulator config */
795 #define TDA9874A_FMER 0x0a /* FM de-emphasis */
796 #define TDA9874A_FMMR 0x0b /* FM dematrix */
797 #define TDA9874A_C1OLAR 0x0c /* ch.1 output level adj. */
798 #define TDA9874A_C2OLAR 0x0d /* ch.2 output level adj. */
799 #define TDA9874A_NCONR 0x0e /* NICAM config */
800 #define TDA9874A_NOLAR 0x0f /* NICAM output level adj. */
801 #define TDA9874A_NLELR 0x10 /* NICAM lower error limit */
802 #define TDA9874A_NUELR 0x11 /* NICAM upper error limit */
803 #define TDA9874A_AMCONR 0x12 /* audio mute control */
804 #define TDA9874A_SDACOSR 0x13 /* stereo DAC output select */
805 #define TDA9874A_AOSR 0x14 /* analog output select */
806 #define TDA9874A_DAICONR 0x15 /* digital audio interface config */
807 #define TDA9874A_I2SOSR 0x16 /* I2S-bus output select */
808 #define TDA9874A_I2SOLAR 0x17 /* I2S-bus output level adj. */
809 #define TDA9874A_MDACOSR 0x18 /* mono DAC output select (tda9874a) */
810 #define TDA9874A_ESP 0xFF /* easy standard progr. (tda9874a) */
811
812 /* Subaddresses for TDA9874H and TDA9874A (slave tx) */
813 #define TDA9874A_DSR 0x00 /* device status */
814 #define TDA9874A_NSR 0x01 /* NICAM status */
815 #define TDA9874A_NECR 0x02 /* NICAM error count */
816 #define TDA9874A_DR1 0x03 /* add. data LSB */
817 #define TDA9874A_DR2 0x04 /* add. data MSB */
818 #define TDA9874A_LLRA 0x05 /* monitor level read-out LSB */
819 #define TDA9874A_LLRB 0x06 /* monitor level read-out MSB */
820 #define TDA9874A_SIFLR 0x07 /* SIF level */
821 #define TDA9874A_TR2 252 /* test reg. 2 */
822 #define TDA9874A_TR1 253 /* test reg. 1 */
823 #define TDA9874A_DIC 254 /* device id. code */
824 #define TDA9874A_SIC 255 /* software id. code */
825
826
827 static int tda9874a_mode = 1; /* 0: A2, 1: NICAM */
828 static int tda9874a_GCONR = 0xc0; /* default config. input pin: SIFSEL=0 */
829 static int tda9874a_NCONR = 0x01; /* default NICAM config.: AMSEL=0,AMUTE=1 */
830 static int tda9874a_ESP = 0x07; /* default standard: NICAM D/K */
831 static int tda9874a_dic = -1; /* device id. code */
832
833 /* insmod options for tda9874a */
834 static unsigned int tda9874a_SIF = UNSET;
835 static unsigned int tda9874a_AMSEL = UNSET;
836 static unsigned int tda9874a_STD = UNSET;
837 module_param(tda9874a_SIF, int, 0444);
838 module_param(tda9874a_AMSEL, int, 0444);
839 module_param(tda9874a_STD, int, 0444);
840
841 /*
842 * initialization table for tda9874 decoder:
843 * - carrier 1 freq. registers (3 bytes)
844 * - carrier 2 freq. registers (3 bytes)
845 * - demudulator config register
846 * - FM de-emphasis register (slow identification mode)
847 * Note: frequency registers must be written in single i2c transfer.
848 */
849 static struct tda9874a_MODES {
850 char *name;
851 audiocmd cmd;
852 } tda9874a_modelist[9] = {
853 { "A2, B/G", /* default */
854 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x77,0xA0,0x00, 0x00,0x00 }} },
855 { "A2, M (Korea)",
856 { 9, { TDA9874A_C1FRA, 0x5D,0xC0,0x00, 0x62,0x6A,0xAA, 0x20,0x22 }} },
857 { "A2, D/K (1)",
858 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x82,0x60,0x00, 0x00,0x00 }} },
859 { "A2, D/K (2)",
860 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x8C,0x75,0x55, 0x00,0x00 }} },
861 { "A2, D/K (3)",
862 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x77,0xA0,0x00, 0x00,0x00 }} },
863 { "NICAM, I",
864 { 9, { TDA9874A_C1FRA, 0x7D,0x00,0x00, 0x88,0x8A,0xAA, 0x08,0x33 }} },
865 { "NICAM, B/G",
866 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x79,0xEA,0xAA, 0x08,0x33 }} },
867 { "NICAM, D/K",
868 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x08,0x33 }} },
869 { "NICAM, L",
870 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x09,0x33 }} }
871 };
872
873 static int tda9874a_setup(struct CHIPSTATE *chip)
874 {
875 struct v4l2_subdev *sd = &chip->sd;
876
877 chip_write(chip, TDA9874A_AGCGR, 0x00); /* 0 dB */
878 chip_write(chip, TDA9874A_GCONR, tda9874a_GCONR);
879 chip_write(chip, TDA9874A_MSR, (tda9874a_mode) ? 0x03:0x02);
880 if(tda9874a_dic == 0x11) {
881 chip_write(chip, TDA9874A_FMMR, 0x80);
882 } else { /* dic == 0x07 */
883 chip_cmd(chip,"tda9874_modelist",&tda9874a_modelist[tda9874a_STD].cmd);
884 chip_write(chip, TDA9874A_FMMR, 0x00);
885 }
886 chip_write(chip, TDA9874A_C1OLAR, 0x00); /* 0 dB */
887 chip_write(chip, TDA9874A_C2OLAR, 0x00); /* 0 dB */
888 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
889 chip_write(chip, TDA9874A_NOLAR, 0x00); /* 0 dB */
890 /* Note: If signal quality is poor you may want to change NICAM */
891 /* error limit registers (NLELR and NUELR) to some greater values. */
892 /* Then the sound would remain stereo, but won't be so clear. */
893 chip_write(chip, TDA9874A_NLELR, 0x14); /* default */
894 chip_write(chip, TDA9874A_NUELR, 0x50); /* default */
895
896 if(tda9874a_dic == 0x11) {
897 chip_write(chip, TDA9874A_AMCONR, 0xf9);
898 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
899 chip_write(chip, TDA9874A_AOSR, 0x80);
900 chip_write(chip, TDA9874A_MDACOSR, (tda9874a_mode) ? 0x82:0x80);
901 chip_write(chip, TDA9874A_ESP, tda9874a_ESP);
902 } else { /* dic == 0x07 */
903 chip_write(chip, TDA9874A_AMCONR, 0xfb);
904 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
905 chip_write(chip, TDA9874A_AOSR, 0x00); /* or 0x10 */
906 }
907 v4l2_dbg(1, debug, sd, "tda9874a_setup(): %s [0x%02X].\n",
908 tda9874a_modelist[tda9874a_STD].name,tda9874a_STD);
909 return 1;
910 }
911
912 static int tda9874a_getrxsubchans(struct CHIPSTATE *chip)
913 {
914 struct v4l2_subdev *sd = &chip->sd;
915 int dsr,nsr,mode;
916 int necr; /* just for debugging */
917
918 mode = V4L2_TUNER_SUB_MONO;
919
920 if(-1 == (dsr = chip_read2(chip,TDA9874A_DSR)))
921 return mode;
922 if(-1 == (nsr = chip_read2(chip,TDA9874A_NSR)))
923 return mode;
924 if(-1 == (necr = chip_read2(chip,TDA9874A_NECR)))
925 return mode;
926
927 /* need to store dsr/nsr somewhere */
928 chip->shadow.bytes[MAXREGS-2] = dsr;
929 chip->shadow.bytes[MAXREGS-1] = nsr;
930
931 if(tda9874a_mode) {
932 /* Note: DSR.RSSF and DSR.AMSTAT bits are also checked.
933 * If NICAM auto-muting is enabled, DSR.AMSTAT=1 indicates
934 * that sound has (temporarily) switched from NICAM to
935 * mono FM (or AM) on 1st sound carrier due to high NICAM bit
936 * error count. So in fact there is no stereo in this case :-(
937 * But changing the mode to V4L2_TUNER_MODE_MONO would switch
938 * external 4052 multiplexer in audio_hook().
939 */
940 if(nsr & 0x02) /* NSR.S/MB=1 */
941 mode = V4L2_TUNER_SUB_STEREO;
942 if(nsr & 0x01) /* NSR.D/SB=1 */
943 mode |= V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
944 } else {
945 if(dsr & 0x02) /* DSR.IDSTE=1 */
946 mode = V4L2_TUNER_SUB_STEREO;
947 if(dsr & 0x04) /* DSR.IDDUA=1 */
948 mode |= V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
949 }
950
951 v4l2_dbg(1, debug, sd,
952 "tda9874a_getrxsubchans(): DSR=0x%X, NSR=0x%X, NECR=0x%X, return: %d.\n",
953 dsr, nsr, necr, mode);
954 return mode;
955 }
956
957 static void tda9874a_setaudmode(struct CHIPSTATE *chip, int mode)
958 {
959 struct v4l2_subdev *sd = &chip->sd;
960
961 /* Disable/enable NICAM auto-muting (based on DSR.RSSF status bit). */
962 /* If auto-muting is disabled, we can hear a signal of degrading quality. */
963 if (tda9874a_mode) {
964 if(chip->shadow.bytes[MAXREGS-2] & 0x20) /* DSR.RSSF=1 */
965 tda9874a_NCONR &= 0xfe; /* enable */
966 else
967 tda9874a_NCONR |= 0x01; /* disable */
968 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
969 }
970
971 /* Note: TDA9874A supports automatic FM dematrixing (FMMR register)
972 * and has auto-select function for audio output (AOSR register).
973 * Old TDA9874H doesn't support these features.
974 * TDA9874A also has additional mono output pin (OUTM), which
975 * on same (all?) tv-cards is not used, anyway (as well as MONOIN).
976 */
977 if(tda9874a_dic == 0x11) {
978 int aosr = 0x80;
979 int mdacosr = (tda9874a_mode) ? 0x82:0x80;
980
981 switch(mode) {
982 case V4L2_TUNER_MODE_MONO:
983 case V4L2_TUNER_MODE_STEREO:
984 break;
985 case V4L2_TUNER_MODE_LANG1:
986 aosr = 0x80; /* auto-select, dual A/A */
987 mdacosr = (tda9874a_mode) ? 0x82:0x80;
988 break;
989 case V4L2_TUNER_MODE_LANG2:
990 aosr = 0xa0; /* auto-select, dual B/B */
991 mdacosr = (tda9874a_mode) ? 0x83:0x81;
992 break;
993 case V4L2_TUNER_MODE_LANG1_LANG2:
994 aosr = 0x00; /* always route L to L and R to R */
995 mdacosr = (tda9874a_mode) ? 0x82:0x80;
996 break;
997 default:
998 return;
999 }
1000 chip_write(chip, TDA9874A_AOSR, aosr);
1001 chip_write(chip, TDA9874A_MDACOSR, mdacosr);
1002
1003 v4l2_dbg(1, debug, sd,
1004 "tda9874a_setaudmode(): req. mode %d; AOSR=0x%X, MDACOSR=0x%X.\n",
1005 mode, aosr, mdacosr);
1006
1007 } else { /* dic == 0x07 */
1008 int fmmr,aosr;
1009
1010 switch(mode) {
1011 case V4L2_TUNER_MODE_MONO:
1012 fmmr = 0x00; /* mono */
1013 aosr = 0x10; /* A/A */
1014 break;
1015 case V4L2_TUNER_MODE_STEREO:
1016 if(tda9874a_mode) {
1017 fmmr = 0x00;
1018 aosr = 0x00; /* handled by NICAM auto-mute */
1019 } else {
1020 fmmr = (tda9874a_ESP == 1) ? 0x05 : 0x04; /* stereo */
1021 aosr = 0x00;
1022 }
1023 break;
1024 case V4L2_TUNER_MODE_LANG1:
1025 fmmr = 0x02; /* dual */
1026 aosr = 0x10; /* dual A/A */
1027 break;
1028 case V4L2_TUNER_MODE_LANG2:
1029 fmmr = 0x02; /* dual */
1030 aosr = 0x20; /* dual B/B */
1031 break;
1032 case V4L2_TUNER_MODE_LANG1_LANG2:
1033 fmmr = 0x02; /* dual */
1034 aosr = 0x00; /* dual A/B */
1035 break;
1036 default:
1037 return;
1038 }
1039 chip_write(chip, TDA9874A_FMMR, fmmr);
1040 chip_write(chip, TDA9874A_AOSR, aosr);
1041
1042 v4l2_dbg(1, debug, sd,
1043 "tda9874a_setaudmode(): req. mode %d; FMMR=0x%X, AOSR=0x%X.\n",
1044 mode, fmmr, aosr);
1045 }
1046 }
1047
1048 static int tda9874a_checkit(struct CHIPSTATE *chip)
1049 {
1050 struct v4l2_subdev *sd = &chip->sd;
1051 int dic,sic; /* device id. and software id. codes */
1052
1053 if(-1 == (dic = chip_read2(chip,TDA9874A_DIC)))
1054 return 0;
1055 if(-1 == (sic = chip_read2(chip,TDA9874A_SIC)))
1056 return 0;
1057
1058 v4l2_dbg(1, debug, sd, "tda9874a_checkit(): DIC=0x%X, SIC=0x%X.\n", dic, sic);
1059
1060 if((dic == 0x11)||(dic == 0x07)) {
1061 v4l2_info(sd, "found tda9874%s.\n", (dic == 0x11) ? "a" : "h");
1062 tda9874a_dic = dic; /* remember device id. */
1063 return 1;
1064 }
1065 return 0; /* not found */
1066 }
1067
1068 static int tda9874a_initialize(struct CHIPSTATE *chip)
1069 {
1070 if (tda9874a_SIF > 2)
1071 tda9874a_SIF = 1;
1072 if (tda9874a_STD >= ARRAY_SIZE(tda9874a_modelist))
1073 tda9874a_STD = 0;
1074 if(tda9874a_AMSEL > 1)
1075 tda9874a_AMSEL = 0;
1076
1077 if(tda9874a_SIF == 1)
1078 tda9874a_GCONR = 0xc0; /* sound IF input 1 */
1079 else
1080 tda9874a_GCONR = 0xc1; /* sound IF input 2 */
1081
1082 tda9874a_ESP = tda9874a_STD;
1083 tda9874a_mode = (tda9874a_STD < 5) ? 0 : 1;
1084
1085 if(tda9874a_AMSEL == 0)
1086 tda9874a_NCONR = 0x01; /* auto-mute: analog mono input */
1087 else
1088 tda9874a_NCONR = 0x05; /* auto-mute: 1st carrier FM or AM */
1089
1090 tda9874a_setup(chip);
1091 return 0;
1092 }
1093
1094 /* ---------------------------------------------------------------------- */
1095 /* audio chip description - defines+functions for tda9875 */
1096 /* The TDA9875 is made by Philips Semiconductor
1097 * http://www.semiconductors.philips.com
1098 * TDA9875: I2C-bus controlled DSP audio processor, FM demodulator
1099 *
1100 */
1101
1102 /* subaddresses for TDA9875 */
1103 #define TDA9875_MUT 0x12 /*General mute (value --> 0b11001100*/
1104 #define TDA9875_CFG 0x01 /* Config register (value --> 0b00000000 */
1105 #define TDA9875_DACOS 0x13 /*DAC i/o select (ADC) 0b0000100*/
1106 #define TDA9875_LOSR 0x16 /*Line output select regirter 0b0100 0001*/
1107
1108 #define TDA9875_CH1V 0x0c /*Channel 1 volume (mute)*/
1109 #define TDA9875_CH2V 0x0d /*Channel 2 volume (mute)*/
1110 #define TDA9875_SC1 0x14 /*SCART 1 in (mono)*/
1111 #define TDA9875_SC2 0x15 /*SCART 2 in (mono)*/
1112
1113 #define TDA9875_ADCIS 0x17 /*ADC input select (mono) 0b0110 000*/
1114 #define TDA9875_AER 0x19 /*Audio effect (AVL+Pseudo) 0b0000 0110*/
1115 #define TDA9875_MCS 0x18 /*Main channel select (DAC) 0b0000100*/
1116 #define TDA9875_MVL 0x1a /* Main volume gauche */
1117 #define TDA9875_MVR 0x1b /* Main volume droite */
1118 #define TDA9875_MBA 0x1d /* Main Basse */
1119 #define TDA9875_MTR 0x1e /* Main treble */
1120 #define TDA9875_ACS 0x1f /* Auxiliary channel select (FM) 0b0000000*/
1121 #define TDA9875_AVL 0x20 /* Auxiliary volume gauche */
1122 #define TDA9875_AVR 0x21 /* Auxiliary volume droite */
1123 #define TDA9875_ABA 0x22 /* Auxiliary Basse */
1124 #define TDA9875_ATR 0x23 /* Auxiliary treble */
1125
1126 #define TDA9875_MSR 0x02 /* Monitor select register */
1127 #define TDA9875_C1MSB 0x03 /* Carrier 1 (FM) frequency register MSB */
1128 #define TDA9875_C1MIB 0x04 /* Carrier 1 (FM) frequency register (16-8]b */
1129 #define TDA9875_C1LSB 0x05 /* Carrier 1 (FM) frequency register LSB */
1130 #define TDA9875_C2MSB 0x06 /* Carrier 2 (nicam) frequency register MSB */
1131 #define TDA9875_C2MIB 0x07 /* Carrier 2 (nicam) frequency register (16-8]b */
1132 #define TDA9875_C2LSB 0x08 /* Carrier 2 (nicam) frequency register LSB */
1133 #define TDA9875_DCR 0x09 /* Demodulateur configuration regirter*/
1134 #define TDA9875_DEEM 0x0a /* FM de-emphasis regirter*/
1135 #define TDA9875_FMAT 0x0b /* FM Matrix regirter*/
1136
1137 /* values */
1138 #define TDA9875_MUTE_ON 0xff /* general mute */
1139 #define TDA9875_MUTE_OFF 0xcc /* general no mute */
1140
1141 static int tda9875_initialize(struct CHIPSTATE *chip)
1142 {
1143 chip_write(chip, TDA9875_CFG, 0xd0); /*reg de config 0 (reset)*/
1144 chip_write(chip, TDA9875_MSR, 0x03); /* Monitor 0b00000XXX*/
1145 chip_write(chip, TDA9875_C1MSB, 0x00); /*Car1(FM) MSB XMHz*/
1146 chip_write(chip, TDA9875_C1MIB, 0x00); /*Car1(FM) MIB XMHz*/
1147 chip_write(chip, TDA9875_C1LSB, 0x00); /*Car1(FM) LSB XMHz*/
1148 chip_write(chip, TDA9875_C2MSB, 0x00); /*Car2(NICAM) MSB XMHz*/
1149 chip_write(chip, TDA9875_C2MIB, 0x00); /*Car2(NICAM) MIB XMHz*/
1150 chip_write(chip, TDA9875_C2LSB, 0x00); /*Car2(NICAM) LSB XMHz*/
1151 chip_write(chip, TDA9875_DCR, 0x00); /*Demod config 0x00*/
1152 chip_write(chip, TDA9875_DEEM, 0x44); /*DE-Emph 0b0100 0100*/
1153 chip_write(chip, TDA9875_FMAT, 0x00); /*FM Matrix reg 0x00*/
1154 chip_write(chip, TDA9875_SC1, 0x00); /* SCART 1 (SC1)*/
1155 chip_write(chip, TDA9875_SC2, 0x01); /* SCART 2 (sc2)*/
1156
1157 chip_write(chip, TDA9875_CH1V, 0x10); /* Channel volume 1 mute*/
1158 chip_write(chip, TDA9875_CH2V, 0x10); /* Channel volume 2 mute */
1159 chip_write(chip, TDA9875_DACOS, 0x02); /* sig DAC i/o(in:nicam)*/
1160 chip_write(chip, TDA9875_ADCIS, 0x6f); /* sig ADC input(in:mono)*/
1161 chip_write(chip, TDA9875_LOSR, 0x00); /* line out (in:mono)*/
1162 chip_write(chip, TDA9875_AER, 0x00); /*06 Effect (AVL+PSEUDO) */
1163 chip_write(chip, TDA9875_MCS, 0x44); /* Main ch select (DAC) */
1164 chip_write(chip, TDA9875_MVL, 0x03); /* Vol Main left 10dB */
1165 chip_write(chip, TDA9875_MVR, 0x03); /* Vol Main right 10dB*/
1166 chip_write(chip, TDA9875_MBA, 0x00); /* Main Bass Main 0dB*/
1167 chip_write(chip, TDA9875_MTR, 0x00); /* Main Treble Main 0dB*/
1168 chip_write(chip, TDA9875_ACS, 0x44); /* Aux chan select (dac)*/
1169 chip_write(chip, TDA9875_AVL, 0x00); /* Vol Aux left 0dB*/
1170 chip_write(chip, TDA9875_AVR, 0x00); /* Vol Aux right 0dB*/
1171 chip_write(chip, TDA9875_ABA, 0x00); /* Aux Bass Main 0dB*/
1172 chip_write(chip, TDA9875_ATR, 0x00); /* Aux Aigus Main 0dB*/
1173
1174 chip_write(chip, TDA9875_MUT, 0xcc); /* General mute */
1175 return 0;
1176 }
1177
1178 static int tda9875_volume(int val) { return (unsigned char)(val / 602 - 84); }
1179 static int tda9875_bass(int val) { return (unsigned char)(max(-12, val / 2115 - 15)); }
1180 static int tda9875_treble(int val) { return (unsigned char)(val / 2622 - 12); }
1181
1182 /* ----------------------------------------------------------------------- */
1183
1184
1185 /* *********************** *
1186 * i2c interface functions *
1187 * *********************** */
1188
1189 static int tda9875_checkit(struct CHIPSTATE *chip)
1190 {
1191 struct v4l2_subdev *sd = &chip->sd;
1192 int dic, rev;
1193
1194 dic = chip_read2(chip, 254);
1195 rev = chip_read2(chip, 255);
1196
1197 if (dic == 0 || dic == 2) { /* tda9875 and tda9875A */
1198 v4l2_info(sd, "found tda9875%s rev. %d.\n",
1199 dic == 0 ? "" : "A", rev);
1200 return 1;
1201 }
1202 return 0;
1203 }
1204
1205 /* ---------------------------------------------------------------------- */
1206 /* audio chip descriptions - defines+functions for tea6420 */
1207
1208 #define TEA6300_VL 0x00 /* volume left */
1209 #define TEA6300_VR 0x01 /* volume right */
1210 #define TEA6300_BA 0x02 /* bass */
1211 #define TEA6300_TR 0x03 /* treble */
1212 #define TEA6300_FA 0x04 /* fader control */
1213 #define TEA6300_S 0x05 /* switch register */
1214 /* values for those registers: */
1215 #define TEA6300_S_SA 0x01 /* stereo A input */
1216 #define TEA6300_S_SB 0x02 /* stereo B */
1217 #define TEA6300_S_SC 0x04 /* stereo C */
1218 #define TEA6300_S_GMU 0x80 /* general mute */
1219
1220 #define TEA6320_V 0x00 /* volume (0-5)/loudness off (6)/zero crossing mute(7) */
1221 #define TEA6320_FFR 0x01 /* fader front right (0-5) */
1222 #define TEA6320_FFL 0x02 /* fader front left (0-5) */
1223 #define TEA6320_FRR 0x03 /* fader rear right (0-5) */
1224 #define TEA6320_FRL 0x04 /* fader rear left (0-5) */
1225 #define TEA6320_BA 0x05 /* bass (0-4) */
1226 #define TEA6320_TR 0x06 /* treble (0-4) */
1227 #define TEA6320_S 0x07 /* switch register */
1228 /* values for those registers: */
1229 #define TEA6320_S_SA 0x07 /* stereo A input */
1230 #define TEA6320_S_SB 0x06 /* stereo B */
1231 #define TEA6320_S_SC 0x05 /* stereo C */
1232 #define TEA6320_S_SD 0x04 /* stereo D */
1233 #define TEA6320_S_GMU 0x80 /* general mute */
1234
1235 #define TEA6420_S_SA 0x00 /* stereo A input */
1236 #define TEA6420_S_SB 0x01 /* stereo B */
1237 #define TEA6420_S_SC 0x02 /* stereo C */
1238 #define TEA6420_S_SD 0x03 /* stereo D */
1239 #define TEA6420_S_SE 0x04 /* stereo E */
1240 #define TEA6420_S_GMU 0x05 /* general mute */
1241
1242 static int tea6300_shift10(int val) { return val >> 10; }
1243 static int tea6300_shift12(int val) { return val >> 12; }
1244
1245 /* Assumes 16bit input (values 0x3f to 0x0c are unique, values less than */
1246 /* 0x0c mirror those immediately higher) */
1247 static int tea6320_volume(int val) { return (val / (65535/(63-12)) + 12) & 0x3f; }
1248 static int tea6320_shift11(int val) { return val >> 11; }
1249 static int tea6320_initialize(struct CHIPSTATE * chip)
1250 {
1251 chip_write(chip, TEA6320_FFR, 0x3f);
1252 chip_write(chip, TEA6320_FFL, 0x3f);
1253 chip_write(chip, TEA6320_FRR, 0x3f);
1254 chip_write(chip, TEA6320_FRL, 0x3f);
1255
1256 return 0;
1257 }
1258
1259
1260 /* ---------------------------------------------------------------------- */
1261 /* audio chip descriptions - defines+functions for tda8425 */
1262
1263 #define TDA8425_VL 0x00 /* volume left */
1264 #define TDA8425_VR 0x01 /* volume right */
1265 #define TDA8425_BA 0x02 /* bass */
1266 #define TDA8425_TR 0x03 /* treble */
1267 #define TDA8425_S1 0x08 /* switch functions */
1268 /* values for those registers: */
1269 #define TDA8425_S1_OFF 0xEE /* audio off (mute on) */
1270 #define TDA8425_S1_CH1 0xCE /* audio channel 1 (mute off) - "linear stereo" mode */
1271 #define TDA8425_S1_CH2 0xCF /* audio channel 2 (mute off) - "linear stereo" mode */
1272 #define TDA8425_S1_MU 0x20 /* mute bit */
1273 #define TDA8425_S1_STEREO 0x18 /* stereo bits */
1274 #define TDA8425_S1_STEREO_SPATIAL 0x18 /* spatial stereo */
1275 #define TDA8425_S1_STEREO_LINEAR 0x08 /* linear stereo */
1276 #define TDA8425_S1_STEREO_PSEUDO 0x10 /* pseudo stereo */
1277 #define TDA8425_S1_STEREO_MONO 0x00 /* forced mono */
1278 #define TDA8425_S1_ML 0x06 /* language selector */
1279 #define TDA8425_S1_ML_SOUND_A 0x02 /* sound a */
1280 #define TDA8425_S1_ML_SOUND_B 0x04 /* sound b */
1281 #define TDA8425_S1_ML_STEREO 0x06 /* stereo */
1282 #define TDA8425_S1_IS 0x01 /* channel selector */
1283
1284
1285 static int tda8425_shift10(int val) { return (val >> 10) | 0xc0; }
1286 static int tda8425_shift12(int val) { return (val >> 12) | 0xf0; }
1287
1288 static void tda8425_setaudmode(struct CHIPSTATE *chip, int mode)
1289 {
1290 int s1 = chip->shadow.bytes[TDA8425_S1+1] & 0xe1;
1291
1292 switch (mode) {
1293 case V4L2_TUNER_MODE_LANG1:
1294 s1 |= TDA8425_S1_ML_SOUND_A;
1295 s1 |= TDA8425_S1_STEREO_PSEUDO;
1296 break;
1297 case V4L2_TUNER_MODE_LANG2:
1298 s1 |= TDA8425_S1_ML_SOUND_B;
1299 s1 |= TDA8425_S1_STEREO_PSEUDO;
1300 break;
1301 case V4L2_TUNER_MODE_LANG1_LANG2:
1302 s1 |= TDA8425_S1_ML_STEREO;
1303 s1 |= TDA8425_S1_STEREO_LINEAR;
1304 break;
1305 case V4L2_TUNER_MODE_MONO:
1306 s1 |= TDA8425_S1_ML_STEREO;
1307 s1 |= TDA8425_S1_STEREO_MONO;
1308 break;
1309 case V4L2_TUNER_MODE_STEREO:
1310 s1 |= TDA8425_S1_ML_STEREO;
1311 s1 |= TDA8425_S1_STEREO_SPATIAL;
1312 break;
1313 default:
1314 return;
1315 }
1316 chip_write(chip,TDA8425_S1,s1);
1317 }
1318
1319
1320 /* ---------------------------------------------------------------------- */
1321 /* audio chip descriptions - defines+functions for pic16c54 (PV951) */
1322
1323 /* the registers of 16C54, I2C sub address. */
1324 #define PIC16C54_REG_KEY_CODE 0x01 /* Not use. */
1325 #define PIC16C54_REG_MISC 0x02
1326
1327 /* bit definition of the RESET register, I2C data. */
1328 #define PIC16C54_MISC_RESET_REMOTE_CTL 0x01 /* bit 0, Reset to receive the key */
1329 /* code of remote controller */
1330 #define PIC16C54_MISC_MTS_MAIN 0x02 /* bit 1 */
1331 #define PIC16C54_MISC_MTS_SAP 0x04 /* bit 2 */
1332 #define PIC16C54_MISC_MTS_BOTH 0x08 /* bit 3 */
1333 #define PIC16C54_MISC_SND_MUTE 0x10 /* bit 4, Mute Audio(Line-in and Tuner) */
1334 #define PIC16C54_MISC_SND_NOTMUTE 0x20 /* bit 5 */
1335 #define PIC16C54_MISC_SWITCH_TUNER 0x40 /* bit 6 , Switch to Line-in */
1336 #define PIC16C54_MISC_SWITCH_LINE 0x80 /* bit 7 , Switch to Tuner */
1337
1338 /* ---------------------------------------------------------------------- */
1339 /* audio chip descriptions - defines+functions for TA8874Z */
1340
1341 /* write 1st byte */
1342 #define TA8874Z_LED_STE 0x80
1343 #define TA8874Z_LED_BIL 0x40
1344 #define TA8874Z_LED_EXT 0x20
1345 #define TA8874Z_MONO_SET 0x10
1346 #define TA8874Z_MUTE 0x08
1347 #define TA8874Z_F_MONO 0x04
1348 #define TA8874Z_MODE_SUB 0x02
1349 #define TA8874Z_MODE_MAIN 0x01
1350
1351 /* write 2nd byte */
1352 /*#define TA8874Z_TI 0x80 */ /* test mode */
1353 #define TA8874Z_SEPARATION 0x3f
1354 #define TA8874Z_SEPARATION_DEFAULT 0x10
1355
1356 /* read */
1357 #define TA8874Z_B1 0x80
1358 #define TA8874Z_B0 0x40
1359 #define TA8874Z_CHAG_FLAG 0x20
1360
1361 /*
1362 * B1 B0
1363 * mono L H
1364 * stereo L L
1365 * BIL H L
1366 */
1367 static int ta8874z_getrxsubchans(struct CHIPSTATE *chip)
1368 {
1369 int val, mode;
1370
1371 val = chip_read(chip);
1372 mode = V4L2_TUNER_SUB_MONO;
1373 if (val & TA8874Z_B1){
1374 mode |= V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
1375 }else if (!(val & TA8874Z_B0)){
1376 mode = V4L2_TUNER_SUB_STEREO;
1377 }
1378 /* v4l2_dbg(1, debug, &chip->sd,
1379 "ta8874z_getrxsubchans(): raw chip read: 0x%02x, return: 0x%02x\n",
1380 val, mode); */
1381 return mode;
1382 }
1383
1384 static audiocmd ta8874z_stereo = { 2, {0, TA8874Z_SEPARATION_DEFAULT}};
1385 static audiocmd ta8874z_mono = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}};
1386 static audiocmd ta8874z_main = {2, { 0, TA8874Z_SEPARATION_DEFAULT}};
1387 static audiocmd ta8874z_sub = {2, { TA8874Z_MODE_SUB, TA8874Z_SEPARATION_DEFAULT}};
1388 static audiocmd ta8874z_both = {2, { TA8874Z_MODE_MAIN | TA8874Z_MODE_SUB, TA8874Z_SEPARATION_DEFAULT}};
1389
1390 static void ta8874z_setaudmode(struct CHIPSTATE *chip, int mode)
1391 {
1392 struct v4l2_subdev *sd = &chip->sd;
1393 int update = 1;
1394 audiocmd *t = NULL;
1395
1396 v4l2_dbg(1, debug, sd, "ta8874z_setaudmode(): mode: 0x%02x\n", mode);
1397
1398 switch(mode){
1399 case V4L2_TUNER_MODE_MONO:
1400 t = &ta8874z_mono;
1401 break;
1402 case V4L2_TUNER_MODE_STEREO:
1403 t = &ta8874z_stereo;
1404 break;
1405 case V4L2_TUNER_MODE_LANG1:
1406 t = &ta8874z_main;
1407 break;
1408 case V4L2_TUNER_MODE_LANG2:
1409 t = &ta8874z_sub;
1410 break;
1411 case V4L2_TUNER_MODE_LANG1_LANG2:
1412 t = &ta8874z_both;
1413 break;
1414 default:
1415 update = 0;
1416 }
1417
1418 if(update)
1419 chip_cmd(chip, "TA8874Z", t);
1420 }
1421
1422 static int ta8874z_checkit(struct CHIPSTATE *chip)
1423 {
1424 int rc;
1425 rc = chip_read(chip);
1426 return ((rc & 0x1f) == 0x1f) ? 1 : 0;
1427 }
1428
1429 /* ---------------------------------------------------------------------- */
1430 /* audio chip descriptions - struct CHIPDESC */
1431
1432 /* insmod options to enable/disable individual audio chips */
1433 static int tda8425 = 1;
1434 static int tda9840 = 1;
1435 static int tda9850 = 1;
1436 static int tda9855 = 1;
1437 static int tda9873 = 1;
1438 static int tda9874a = 1;
1439 static int tda9875 = 1;
1440 static int tea6300; /* default 0 - address clash with msp34xx */
1441 static int tea6320; /* default 0 - address clash with msp34xx */
1442 static int tea6420 = 1;
1443 static int pic16c54 = 1;
1444 static int ta8874z; /* default 0 - address clash with tda9840 */
1445
1446 module_param(tda8425, int, 0444);
1447 module_param(tda9840, int, 0444);
1448 module_param(tda9850, int, 0444);
1449 module_param(tda9855, int, 0444);
1450 module_param(tda9873, int, 0444);
1451 module_param(tda9874a, int, 0444);
1452 module_param(tda9875, int, 0444);
1453 module_param(tea6300, int, 0444);
1454 module_param(tea6320, int, 0444);
1455 module_param(tea6420, int, 0444);
1456 module_param(pic16c54, int, 0444);
1457 module_param(ta8874z, int, 0444);
1458
1459 static struct CHIPDESC chiplist[] = {
1460 {
1461 .name = "tda9840",
1462 .insmodopt = &tda9840,
1463 .addr_lo = I2C_ADDR_TDA9840 >> 1,
1464 .addr_hi = I2C_ADDR_TDA9840 >> 1,
1465 .registers = 5,
1466 .flags = CHIP_NEED_CHECKMODE,
1467
1468 /* callbacks */
1469 .checkit = tda9840_checkit,
1470 .getrxsubchans = tda9840_getrxsubchans,
1471 .setaudmode = tda9840_setaudmode,
1472
1473 .init = { 2, { TDA9840_TEST, TDA9840_TEST_INT1SN
1474 /* ,TDA9840_SW, TDA9840_MONO */} }
1475 },
1476 {
1477 .name = "tda9873h",
1478 .insmodopt = &tda9873,
1479 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1480 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1481 .registers = 3,
1482 .flags = CHIP_HAS_INPUTSEL | CHIP_NEED_CHECKMODE,
1483
1484 /* callbacks */
1485 .checkit = tda9873_checkit,
1486 .getrxsubchans = tda9873_getrxsubchans,
1487 .setaudmode = tda9873_setaudmode,
1488
1489 .init = { 4, { TDA9873_SW, 0xa4, 0x06, 0x03 } },
1490 .inputreg = TDA9873_SW,
1491 .inputmute = TDA9873_MUTE | TDA9873_AUTOMUTE,
1492 .inputmap = {0xa0, 0xa2, 0xa0, 0xa0},
1493 .inputmask = TDA9873_INP_MASK|TDA9873_MUTE|TDA9873_AUTOMUTE,
1494
1495 },
1496 {
1497 .name = "tda9874h/a",
1498 .insmodopt = &tda9874a,
1499 .addr_lo = I2C_ADDR_TDA9874 >> 1,
1500 .addr_hi = I2C_ADDR_TDA9874 >> 1,
1501 .flags = CHIP_NEED_CHECKMODE,
1502
1503 /* callbacks */
1504 .initialize = tda9874a_initialize,
1505 .checkit = tda9874a_checkit,
1506 .getrxsubchans = tda9874a_getrxsubchans,
1507 .setaudmode = tda9874a_setaudmode,
1508 },
1509 {
1510 .name = "tda9875",
1511 .insmodopt = &tda9875,
1512 .addr_lo = I2C_ADDR_TDA9875 >> 1,
1513 .addr_hi = I2C_ADDR_TDA9875 >> 1,
1514 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE,
1515
1516 /* callbacks */
1517 .initialize = tda9875_initialize,
1518 .checkit = tda9875_checkit,
1519 .volfunc = tda9875_volume,
1520 .bassfunc = tda9875_bass,
1521 .treblefunc = tda9875_treble,
1522 .leftreg = TDA9875_MVL,
1523 .rightreg = TDA9875_MVR,
1524 .bassreg = TDA9875_MBA,
1525 .treblereg = TDA9875_MTR,
1526 .leftinit = 58880,
1527 .rightinit = 58880,
1528 },
1529 {
1530 .name = "tda9850",
1531 .insmodopt = &tda9850,
1532 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1533 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1534 .registers = 11,
1535
1536 .getrxsubchans = tda985x_getrxsubchans,
1537 .setaudmode = tda985x_setaudmode,
1538
1539 .init = { 8, { TDA9850_C4, 0x08, 0x08, TDA985x_STEREO, 0x07, 0x10, 0x10, 0x03 } }
1540 },
1541 {
1542 .name = "tda9855",
1543 .insmodopt = &tda9855,
1544 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1545 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1546 .registers = 11,
1547 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE,
1548
1549 .leftreg = TDA9855_VL,
1550 .rightreg = TDA9855_VR,
1551 .bassreg = TDA9855_BA,
1552 .treblereg = TDA9855_TR,
1553
1554 /* callbacks */
1555 .volfunc = tda9855_volume,
1556 .bassfunc = tda9855_bass,
1557 .treblefunc = tda9855_treble,
1558 .getrxsubchans = tda985x_getrxsubchans,
1559 .setaudmode = tda985x_setaudmode,
1560
1561 .init = { 12, { 0, 0x6f, 0x6f, 0x0e, 0x07<<1, 0x8<<2,
1562 TDA9855_MUTE | TDA9855_AVL | TDA9855_LOUD | TDA9855_INT,
1563 TDA985x_STEREO | TDA9855_LINEAR | TDA9855_TZCM | TDA9855_VZCM,
1564 0x07, 0x10, 0x10, 0x03 }}
1565 },
1566 {
1567 .name = "tea6300",
1568 .insmodopt = &tea6300,
1569 .addr_lo = I2C_ADDR_TEA6300 >> 1,
1570 .addr_hi = I2C_ADDR_TEA6300 >> 1,
1571 .registers = 6,
1572 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1573
1574 .leftreg = TEA6300_VR,
1575 .rightreg = TEA6300_VL,
1576 .bassreg = TEA6300_BA,
1577 .treblereg = TEA6300_TR,
1578
1579 /* callbacks */
1580 .volfunc = tea6300_shift10,
1581 .bassfunc = tea6300_shift12,
1582 .treblefunc = tea6300_shift12,
1583
1584 .inputreg = TEA6300_S,
1585 .inputmap = { TEA6300_S_SA, TEA6300_S_SB, TEA6300_S_SC },
1586 .inputmute = TEA6300_S_GMU,
1587 },
1588 {
1589 .name = "tea6320",
1590 .insmodopt = &tea6320,
1591 .addr_lo = I2C_ADDR_TEA6300 >> 1,
1592 .addr_hi = I2C_ADDR_TEA6300 >> 1,
1593 .registers = 8,
1594 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1595
1596 .leftreg = TEA6320_V,
1597 .rightreg = TEA6320_V,
1598 .bassreg = TEA6320_BA,
1599 .treblereg = TEA6320_TR,
1600
1601 /* callbacks */
1602 .initialize = tea6320_initialize,
1603 .volfunc = tea6320_volume,
1604 .bassfunc = tea6320_shift11,
1605 .treblefunc = tea6320_shift11,
1606
1607 .inputreg = TEA6320_S,
1608 .inputmap = { TEA6320_S_SA, TEA6420_S_SB, TEA6300_S_SC, TEA6320_S_SD },
1609 .inputmute = TEA6300_S_GMU,
1610 },
1611 {
1612 .name = "tea6420",
1613 .insmodopt = &tea6420,
1614 .addr_lo = I2C_ADDR_TEA6420 >> 1,
1615 .addr_hi = I2C_ADDR_TEA6420 >> 1,
1616 .registers = 1,
1617 .flags = CHIP_HAS_INPUTSEL,
1618
1619 .inputreg = -1,
1620 .inputmap = { TEA6420_S_SA, TEA6420_S_SB, TEA6420_S_SC },
1621 .inputmute = TEA6300_S_GMU,
1622 },
1623 {
1624 .name = "tda8425",
1625 .insmodopt = &tda8425,
1626 .addr_lo = I2C_ADDR_TDA8425 >> 1,
1627 .addr_hi = I2C_ADDR_TDA8425 >> 1,
1628 .registers = 9,
1629 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1630
1631 .leftreg = TDA8425_VL,
1632 .rightreg = TDA8425_VR,
1633 .bassreg = TDA8425_BA,
1634 .treblereg = TDA8425_TR,
1635
1636 /* callbacks */
1637 .volfunc = tda8425_shift10,
1638 .bassfunc = tda8425_shift12,
1639 .treblefunc = tda8425_shift12,
1640 .setaudmode = tda8425_setaudmode,
1641
1642 .inputreg = TDA8425_S1,
1643 .inputmap = { TDA8425_S1_CH1, TDA8425_S1_CH1, TDA8425_S1_CH1 },
1644 .inputmute = TDA8425_S1_OFF,
1645
1646 },
1647 {
1648 .name = "pic16c54 (PV951)",
1649 .insmodopt = &pic16c54,
1650 .addr_lo = I2C_ADDR_PIC16C54 >> 1,
1651 .addr_hi = I2C_ADDR_PIC16C54>> 1,
1652 .registers = 2,
1653 .flags = CHIP_HAS_INPUTSEL,
1654
1655 .inputreg = PIC16C54_REG_MISC,
1656 .inputmap = {PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_TUNER,
1657 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1658 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1659 PIC16C54_MISC_SND_MUTE},
1660 .inputmute = PIC16C54_MISC_SND_MUTE,
1661 },
1662 {
1663 .name = "ta8874z",
1664 .checkit = ta8874z_checkit,
1665 .insmodopt = &ta8874z,
1666 .addr_lo = I2C_ADDR_TDA9840 >> 1,
1667 .addr_hi = I2C_ADDR_TDA9840 >> 1,
1668 .registers = 2,
1669
1670 /* callbacks */
1671 .getrxsubchans = ta8874z_getrxsubchans,
1672 .setaudmode = ta8874z_setaudmode,
1673
1674 .init = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}},
1675 },
1676 { .name = NULL } /* EOF */
1677 };
1678
1679
1680 /* ---------------------------------------------------------------------- */
1681
1682 static int tvaudio_g_ctrl(struct v4l2_subdev *sd,
1683 struct v4l2_control *ctrl)
1684 {
1685 struct CHIPSTATE *chip = to_state(sd);
1686 struct CHIPDESC *desc = chip->desc;
1687
1688 switch (ctrl->id) {
1689 case V4L2_CID_AUDIO_MUTE:
1690 if (!(desc->flags & CHIP_HAS_INPUTSEL))
1691 break;
1692 ctrl->value=chip->muted;
1693 return 0;
1694 case V4L2_CID_AUDIO_VOLUME:
1695 if (!(desc->flags & CHIP_HAS_VOLUME))
1696 break;
1697 ctrl->value = max(chip->left,chip->right);
1698 return 0;
1699 case V4L2_CID_AUDIO_BALANCE:
1700 {
1701 int volume;
1702 if (!(desc->flags & CHIP_HAS_VOLUME))
1703 break;
1704 volume = max(chip->left,chip->right);
1705 if (volume)
1706 ctrl->value=(32768*min(chip->left,chip->right))/volume;
1707 else
1708 ctrl->value=32768;
1709 return 0;
1710 }
1711 case V4L2_CID_AUDIO_BASS:
1712 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
1713 break;
1714 ctrl->value = chip->bass;
1715 return 0;
1716 case V4L2_CID_AUDIO_TREBLE:
1717 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
1718 break;
1719 ctrl->value = chip->treble;
1720 return 0;
1721 }
1722 return -EINVAL;
1723 }
1724
1725 static int tvaudio_s_ctrl(struct v4l2_subdev *sd,
1726 struct v4l2_control *ctrl)
1727 {
1728 struct CHIPSTATE *chip = to_state(sd);
1729 struct CHIPDESC *desc = chip->desc;
1730
1731 switch (ctrl->id) {
1732 case V4L2_CID_AUDIO_MUTE:
1733 if (!(desc->flags & CHIP_HAS_INPUTSEL))
1734 break;
1735
1736 if (ctrl->value < 0 || ctrl->value >= 2)
1737 return -ERANGE;
1738 chip->muted = ctrl->value;
1739 if (chip->muted)
1740 chip_write_masked(chip,desc->inputreg,desc->inputmute,desc->inputmask);
1741 else
1742 chip_write_masked(chip,desc->inputreg,
1743 desc->inputmap[chip->input],desc->inputmask);
1744 return 0;
1745 case V4L2_CID_AUDIO_VOLUME:
1746 {
1747 int volume,balance;
1748
1749 if (!(desc->flags & CHIP_HAS_VOLUME))
1750 break;
1751
1752 volume = max(chip->left,chip->right);
1753 if (volume)
1754 balance=(32768*min(chip->left,chip->right))/volume;
1755 else
1756 balance=32768;
1757
1758 volume=ctrl->value;
1759 chip->left = (min(65536 - balance,32768) * volume) / 32768;
1760 chip->right = (min(balance,volume *(__u16)32768)) / 32768;
1761
1762 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1763 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1764
1765 return 0;
1766 }
1767 case V4L2_CID_AUDIO_BALANCE:
1768 {
1769 int volume, balance;
1770
1771 if (!(desc->flags & CHIP_HAS_VOLUME))
1772 break;
1773
1774 volume = max(chip->left, chip->right);
1775 balance = ctrl->value;
1776 chip->left = (min(65536 - balance, 32768) * volume) / 32768;
1777 chip->right = (min(balance, volume * (__u16)32768)) / 32768;
1778
1779 chip_write(chip, desc->leftreg, desc->volfunc(chip->left));
1780 chip_write(chip, desc->rightreg, desc->volfunc(chip->right));
1781
1782 return 0;
1783 }
1784 case V4L2_CID_AUDIO_BASS:
1785 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
1786 break;
1787 chip->bass = ctrl->value;
1788 chip_write(chip,desc->bassreg,desc->bassfunc(chip->bass));
1789
1790 return 0;
1791 case V4L2_CID_AUDIO_TREBLE:
1792 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
1793 break;
1794 chip->treble = ctrl->value;
1795 chip_write(chip,desc->treblereg,desc->treblefunc(chip->treble));
1796
1797 return 0;
1798 }
1799 return -EINVAL;
1800 }
1801
1802
1803 /* ---------------------------------------------------------------------- */
1804 /* video4linux interface */
1805
1806 static int tvaudio_s_radio(struct v4l2_subdev *sd)
1807 {
1808 struct CHIPSTATE *chip = to_state(sd);
1809
1810 chip->radio = 1;
1811 /* del_timer(&chip->wt); */
1812 return 0;
1813 }
1814
1815 static int tvaudio_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
1816 {
1817 struct CHIPSTATE *chip = to_state(sd);
1818 struct CHIPDESC *desc = chip->desc;
1819
1820 switch (qc->id) {
1821 case V4L2_CID_AUDIO_MUTE:
1822 if (desc->flags & CHIP_HAS_INPUTSEL)
1823 return v4l2_ctrl_query_fill(qc, 0, 1, 1, 0);
1824 break;
1825 case V4L2_CID_AUDIO_VOLUME:
1826 if (desc->flags & CHIP_HAS_VOLUME)
1827 return v4l2_ctrl_query_fill(qc, 0, 65535, 65535 / 100, 58880);
1828 break;
1829 case V4L2_CID_AUDIO_BALANCE:
1830 if (desc->flags & CHIP_HAS_VOLUME)
1831 return v4l2_ctrl_query_fill(qc, 0, 65535, 65535 / 100, 32768);
1832 break;
1833 case V4L2_CID_AUDIO_BASS:
1834 case V4L2_CID_AUDIO_TREBLE:
1835 if (desc->flags & CHIP_HAS_BASSTREBLE)
1836 return v4l2_ctrl_query_fill(qc, 0, 65535, 65535 / 100, 32768);
1837 break;
1838 default:
1839 break;
1840 }
1841 return -EINVAL;
1842 }
1843
1844 static int tvaudio_s_routing(struct v4l2_subdev *sd,
1845 u32 input, u32 output, u32 config)
1846 {
1847 struct CHIPSTATE *chip = to_state(sd);
1848 struct CHIPDESC *desc = chip->desc;
1849
1850 if (!(desc->flags & CHIP_HAS_INPUTSEL))
1851 return 0;
1852 if (input >= 4)
1853 return -EINVAL;
1854 /* There are four inputs: tuner, radio, extern and intern. */
1855 chip->input = input;
1856 if (chip->muted)
1857 return 0;
1858 chip_write_masked(chip, desc->inputreg,
1859 desc->inputmap[chip->input], desc->inputmask);
1860 return 0;
1861 }
1862
1863 static int tvaudio_s_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
1864 {
1865 struct CHIPSTATE *chip = to_state(sd);
1866 struct CHIPDESC *desc = chip->desc;
1867
1868 if (!desc->setaudmode)
1869 return 0;
1870 if (chip->radio)
1871 return 0;
1872
1873 switch (vt->audmode) {
1874 case V4L2_TUNER_MODE_MONO:
1875 case V4L2_TUNER_MODE_STEREO:
1876 case V4L2_TUNER_MODE_LANG1:
1877 case V4L2_TUNER_MODE_LANG2:
1878 case V4L2_TUNER_MODE_LANG1_LANG2:
1879 break;
1880 default:
1881 return -EINVAL;
1882 }
1883 chip->audmode = vt->audmode;
1884
1885 if (chip->thread)
1886 wake_up_process(chip->thread);
1887 else
1888 desc->setaudmode(chip, vt->audmode);
1889
1890 return 0;
1891 }
1892
1893 static int tvaudio_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
1894 {
1895 struct CHIPSTATE *chip = to_state(sd);
1896 struct CHIPDESC *desc = chip->desc;
1897
1898 if (!desc->getrxsubchans)
1899 return 0;
1900 if (chip->radio)
1901 return 0;
1902
1903 vt->audmode = chip->audmode;
1904 vt->rxsubchans = desc->getrxsubchans(chip);
1905 vt->capability = V4L2_TUNER_CAP_STEREO |
1906 V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
1907
1908 return 0;
1909 }
1910
1911 static int tvaudio_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
1912 {
1913 struct CHIPSTATE *chip = to_state(sd);
1914
1915 chip->radio = 0;
1916 return 0;
1917 }
1918
1919 static int tvaudio_s_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *freq)
1920 {
1921 struct CHIPSTATE *chip = to_state(sd);
1922 struct CHIPDESC *desc = chip->desc;
1923
1924 /* For chips that provide getrxsubchans and setaudmode, and doesn't
1925 automatically follows the stereo carrier, a kthread is
1926 created to set the audio standard. In this case, when then
1927 the video channel is changed, tvaudio starts on MONO mode.
1928 After waiting for 2 seconds, the kernel thread is called,
1929 to follow whatever audio standard is pointed by the
1930 audio carrier.
1931 */
1932 if (chip->thread) {
1933 desc->setaudmode(chip, V4L2_TUNER_MODE_MONO);
1934 chip->prevmode = -1; /* reset previous mode */
1935 mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000));
1936 }
1937 return 0;
1938 }
1939
1940 static int tvaudio_g_chip_ident(struct v4l2_subdev *sd, struct v4l2_dbg_chip_ident *chip)
1941 {
1942 struct i2c_client *client = v4l2_get_subdevdata(sd);
1943
1944 return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_TVAUDIO, 0);
1945 }
1946
1947 /* ----------------------------------------------------------------------- */
1948
1949 static const struct v4l2_subdev_core_ops tvaudio_core_ops = {
1950 .g_chip_ident = tvaudio_g_chip_ident,
1951 .queryctrl = tvaudio_queryctrl,
1952 .g_ctrl = tvaudio_g_ctrl,
1953 .s_ctrl = tvaudio_s_ctrl,
1954 .s_std = tvaudio_s_std,
1955 };
1956
1957 static const struct v4l2_subdev_tuner_ops tvaudio_tuner_ops = {
1958 .s_radio = tvaudio_s_radio,
1959 .s_frequency = tvaudio_s_frequency,
1960 .s_tuner = tvaudio_s_tuner,
1961 .g_tuner = tvaudio_g_tuner,
1962 };
1963
1964 static const struct v4l2_subdev_audio_ops tvaudio_audio_ops = {
1965 .s_routing = tvaudio_s_routing,
1966 };
1967
1968 static const struct v4l2_subdev_ops tvaudio_ops = {
1969 .core = &tvaudio_core_ops,
1970 .tuner = &tvaudio_tuner_ops,
1971 .audio = &tvaudio_audio_ops,
1972 };
1973
1974 /* ----------------------------------------------------------------------- */
1975
1976
1977 /* i2c registration */
1978
1979 static int tvaudio_probe(struct i2c_client *client, const struct i2c_device_id *id)
1980 {
1981 struct CHIPSTATE *chip;
1982 struct CHIPDESC *desc;
1983 struct v4l2_subdev *sd;
1984
1985 if (debug) {
1986 printk(KERN_INFO "tvaudio: TV audio decoder + audio/video mux driver\n");
1987 printk(KERN_INFO "tvaudio: known chips: ");
1988 for (desc = chiplist; desc->name != NULL; desc++)
1989 printk("%s%s", (desc == chiplist) ? "" : ", ", desc->name);
1990 printk("\n");
1991 }
1992
1993 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1994 if (!chip)
1995 return -ENOMEM;
1996 sd = &chip->sd;
1997 v4l2_i2c_subdev_init(sd, client, &tvaudio_ops);
1998
1999 /* find description for the chip */
2000 v4l2_dbg(1, debug, sd, "chip found @ 0x%x\n", client->addr<<1);
2001 for (desc = chiplist; desc->name != NULL; desc++) {
2002 if (0 == *(desc->insmodopt))
2003 continue;
2004 if (client->addr < desc->addr_lo ||
2005 client->addr > desc->addr_hi)
2006 continue;
2007 if (desc->checkit && !desc->checkit(chip))
2008 continue;
2009 break;
2010 }
2011 if (desc->name == NULL) {
2012 v4l2_dbg(1, debug, sd, "no matching chip description found\n");
2013 kfree(chip);
2014 return -EIO;
2015 }
2016 v4l2_info(sd, "%s found @ 0x%x (%s)\n", desc->name, client->addr<<1, client->adapter->name);
2017 if (desc->flags) {
2018 v4l2_dbg(1, debug, sd, "matches:%s%s%s.\n",
2019 (desc->flags & CHIP_HAS_VOLUME) ? " volume" : "",
2020 (desc->flags & CHIP_HAS_BASSTREBLE) ? " bass/treble" : "",
2021 (desc->flags & CHIP_HAS_INPUTSEL) ? " audiomux" : "");
2022 }
2023
2024 /* fill required data structures */
2025 if (!id)
2026 strlcpy(client->name, desc->name, I2C_NAME_SIZE);
2027 chip->desc = desc;
2028 chip->shadow.count = desc->registers+1;
2029 chip->prevmode = -1;
2030 chip->audmode = V4L2_TUNER_MODE_LANG1;
2031
2032 /* initialization */
2033 if (desc->initialize != NULL)
2034 desc->initialize(chip);
2035 else
2036 chip_cmd(chip, "init", &desc->init);
2037
2038 if (desc->flags & CHIP_HAS_VOLUME) {
2039 if (!desc->volfunc) {
2040 /* This shouldn't be happen. Warn user, but keep working
2041 without volume controls
2042 */
2043 v4l2_info(sd, "volume callback undefined!\n");
2044 desc->flags &= ~CHIP_HAS_VOLUME;
2045 } else {
2046 chip->left = desc->leftinit ? desc->leftinit : 65535;
2047 chip->right = desc->rightinit ? desc->rightinit : 65535;
2048 chip_write(chip, desc->leftreg,
2049 desc->volfunc(chip->left));
2050 chip_write(chip, desc->rightreg,
2051 desc->volfunc(chip->right));
2052 }
2053 }
2054 if (desc->flags & CHIP_HAS_BASSTREBLE) {
2055 if (!desc->bassfunc || !desc->treblefunc) {
2056 /* This shouldn't be happen. Warn user, but keep working
2057 without bass/treble controls
2058 */
2059 v4l2_info(sd, "bass/treble callbacks undefined!\n");
2060 desc->flags &= ~CHIP_HAS_BASSTREBLE;
2061 } else {
2062 chip->treble = desc->trebleinit ?
2063 desc->trebleinit : 32768;
2064 chip->bass = desc->bassinit ?
2065 desc->bassinit : 32768;
2066 chip_write(chip, desc->bassreg,
2067 desc->bassfunc(chip->bass));
2068 chip_write(chip, desc->treblereg,
2069 desc->treblefunc(chip->treble));
2070 }
2071 }
2072
2073 chip->thread = NULL;
2074 init_timer(&chip->wt);
2075 if (desc->flags & CHIP_NEED_CHECKMODE) {
2076 if (!desc->getrxsubchans || !desc->setaudmode) {
2077 /* This shouldn't be happen. Warn user, but keep working
2078 without kthread
2079 */
2080 v4l2_info(sd, "set/get mode callbacks undefined!\n");
2081 return 0;
2082 }
2083 /* start async thread */
2084 chip->wt.function = chip_thread_wake;
2085 chip->wt.data = (unsigned long)chip;
2086 chip->thread = kthread_run(chip_thread, chip, client->name);
2087 if (IS_ERR(chip->thread)) {
2088 v4l2_warn(sd, "failed to create kthread\n");
2089 chip->thread = NULL;
2090 }
2091 }
2092 return 0;
2093 }
2094
2095 static int tvaudio_remove(struct i2c_client *client)
2096 {
2097 struct v4l2_subdev *sd = i2c_get_clientdata(client);
2098 struct CHIPSTATE *chip = to_state(sd);
2099
2100 del_timer_sync(&chip->wt);
2101 if (chip->thread) {
2102 /* shutdown async thread */
2103 kthread_stop(chip->thread);
2104 chip->thread = NULL;
2105 }
2106
2107 v4l2_device_unregister_subdev(sd);
2108 kfree(chip);
2109 return 0;
2110 }
2111
2112 /* This driver supports many devices and the idea is to let the driver
2113 detect which device is present. So rather than listing all supported
2114 devices here, we pretend to support a single, fake device type. */
2115 static const struct i2c_device_id tvaudio_id[] = {
2116 { "tvaudio", 0 },
2117 { }
2118 };
2119 MODULE_DEVICE_TABLE(i2c, tvaudio_id);
2120
2121 static struct i2c_driver tvaudio_driver = {
2122 .driver = {
2123 .owner = THIS_MODULE,
2124 .name = "tvaudio",
2125 },
2126 .probe = tvaudio_probe,
2127 .remove = tvaudio_remove,
2128 .id_table = tvaudio_id,
2129 };
2130
2131 module_i2c_driver(tvaudio_driver);
Linux kernel - Deliverables
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