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537377b43083e154857db03c2bf930a3e86f73a4
[deliverable/linux.git] / drivers / media / platform / omap3isp / isp.c
1 /*
2 * isp.c
3 *
4 * TI OMAP3 ISP - Core
5 *
6 * Copyright (C) 2006-2010 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments, Inc.
8 *
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * Sakari Ailus <sakari.ailus@iki.fi>
11 *
12 * Contributors:
13 * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
14 * Sakari Ailus <sakari.ailus@iki.fi>
15 * David Cohen <dacohen@gmail.com>
16 * Stanimir Varbanov <svarbanov@mm-sol.com>
17 * Vimarsh Zutshi <vimarsh.zutshi@gmail.com>
18 * Tuukka Toivonen <tuukkat76@gmail.com>
19 * Sergio Aguirre <saaguirre@ti.com>
20 * Antti Koskipaa <akoskipa@gmail.com>
21 * Ivan T. Ivanov <iivanov@mm-sol.com>
22 * RaniSuneela <r-m@ti.com>
23 * Atanas Filipov <afilipov@mm-sol.com>
24 * Gjorgji Rosikopulos <grosikopulos@mm-sol.com>
25 * Hiroshi DOYU <hiroshi.doyu@nokia.com>
26 * Nayden Kanchev <nkanchev@mm-sol.com>
27 * Phil Carmody <ext-phil.2.carmody@nokia.com>
28 * Artem Bityutskiy <artem.bityutskiy@nokia.com>
29 * Dominic Curran <dcurran@ti.com>
30 * Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi>
31 * Pallavi Kulkarni <p-kulkarni@ti.com>
32 * Vaibhav Hiremath <hvaibhav@ti.com>
33 * Mohit Jalori <mjalori@ti.com>
34 * Sameer Venkatraman <sameerv@ti.com>
35 * Senthilvadivu Guruswamy <svadivu@ti.com>
36 * Thara Gopinath <thara@ti.com>
37 * Toni Leinonen <toni.leinonen@nokia.com>
38 * Troy Laramy <t-laramy@ti.com>
39 *
40 * This program is free software; you can redistribute it and/or modify
41 * it under the terms of the GNU General Public License version 2 as
42 * published by the Free Software Foundation.
43 */
44
45 #include <asm/cacheflush.h>
46
47 #include <linux/clk.h>
48 #include <linux/clkdev.h>
49 #include <linux/delay.h>
50 #include <linux/device.h>
51 #include <linux/dma-mapping.h>
52 #include <linux/i2c.h>
53 #include <linux/interrupt.h>
54 #include <linux/module.h>
55 #include <linux/omap-iommu.h>
56 #include <linux/platform_device.h>
57 #include <linux/regulator/consumer.h>
58 #include <linux/slab.h>
59 #include <linux/sched.h>
60 #include <linux/vmalloc.h>
61
62 #include <asm/dma-iommu.h>
63
64 #include <media/v4l2-common.h>
65 #include <media/v4l2-device.h>
66
67 #include "isp.h"
68 #include "ispreg.h"
69 #include "ispccdc.h"
70 #include "isppreview.h"
71 #include "ispresizer.h"
72 #include "ispcsi2.h"
73 #include "ispccp2.h"
74 #include "isph3a.h"
75 #include "isphist.h"
76
77 static unsigned int autoidle;
78 module_param(autoidle, int, 0444);
79 MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support");
80
81 static void isp_save_ctx(struct isp_device *isp);
82
83 static void isp_restore_ctx(struct isp_device *isp);
84
85 static const struct isp_res_mapping isp_res_maps[] = {
86 {
87 .isp_rev = ISP_REVISION_2_0,
88 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
89 1 << OMAP3_ISP_IOMEM_CCP2 |
90 1 << OMAP3_ISP_IOMEM_CCDC |
91 1 << OMAP3_ISP_IOMEM_HIST |
92 1 << OMAP3_ISP_IOMEM_H3A |
93 1 << OMAP3_ISP_IOMEM_PREV |
94 1 << OMAP3_ISP_IOMEM_RESZ |
95 1 << OMAP3_ISP_IOMEM_SBL |
96 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
97 1 << OMAP3_ISP_IOMEM_CSIPHY2 |
98 1 << OMAP3_ISP_IOMEM_343X_CONTROL_CSIRXFE,
99 },
100 {
101 .isp_rev = ISP_REVISION_15_0,
102 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
103 1 << OMAP3_ISP_IOMEM_CCP2 |
104 1 << OMAP3_ISP_IOMEM_CCDC |
105 1 << OMAP3_ISP_IOMEM_HIST |
106 1 << OMAP3_ISP_IOMEM_H3A |
107 1 << OMAP3_ISP_IOMEM_PREV |
108 1 << OMAP3_ISP_IOMEM_RESZ |
109 1 << OMAP3_ISP_IOMEM_SBL |
110 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
111 1 << OMAP3_ISP_IOMEM_CSIPHY2 |
112 1 << OMAP3_ISP_IOMEM_CSI2A_REGS2 |
113 1 << OMAP3_ISP_IOMEM_CSI2C_REGS1 |
114 1 << OMAP3_ISP_IOMEM_CSIPHY1 |
115 1 << OMAP3_ISP_IOMEM_CSI2C_REGS2 |
116 1 << OMAP3_ISP_IOMEM_3630_CONTROL_CAMERA_PHY_CTRL,
117 },
118 };
119
120 /* Structure for saving/restoring ISP module registers */
121 static struct isp_reg isp_reg_list[] = {
122 {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0},
123 {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0},
124 {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0},
125 {0, ISP_TOK_TERM, 0}
126 };
127
128 /*
129 * omap3isp_flush - Post pending L3 bus writes by doing a register readback
130 * @isp: OMAP3 ISP device
131 *
132 * In order to force posting of pending writes, we need to write and
133 * readback the same register, in this case the revision register.
134 *
135 * See this link for reference:
136 * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
137 */
138 void omap3isp_flush(struct isp_device *isp)
139 {
140 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
141 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
142 }
143
144 /* -----------------------------------------------------------------------------
145 * XCLK
146 */
147
148 #define to_isp_xclk(_hw) container_of(_hw, struct isp_xclk, hw)
149
150 static void isp_xclk_update(struct isp_xclk *xclk, u32 divider)
151 {
152 switch (xclk->id) {
153 case ISP_XCLK_A:
154 isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
155 ISPTCTRL_CTRL_DIVA_MASK,
156 divider << ISPTCTRL_CTRL_DIVA_SHIFT);
157 break;
158 case ISP_XCLK_B:
159 isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
160 ISPTCTRL_CTRL_DIVB_MASK,
161 divider << ISPTCTRL_CTRL_DIVB_SHIFT);
162 break;
163 }
164 }
165
166 static int isp_xclk_prepare(struct clk_hw *hw)
167 {
168 struct isp_xclk *xclk = to_isp_xclk(hw);
169
170 omap3isp_get(xclk->isp);
171
172 return 0;
173 }
174
175 static void isp_xclk_unprepare(struct clk_hw *hw)
176 {
177 struct isp_xclk *xclk = to_isp_xclk(hw);
178
179 omap3isp_put(xclk->isp);
180 }
181
182 static int isp_xclk_enable(struct clk_hw *hw)
183 {
184 struct isp_xclk *xclk = to_isp_xclk(hw);
185 unsigned long flags;
186
187 spin_lock_irqsave(&xclk->lock, flags);
188 isp_xclk_update(xclk, xclk->divider);
189 xclk->enabled = true;
190 spin_unlock_irqrestore(&xclk->lock, flags);
191
192 return 0;
193 }
194
195 static void isp_xclk_disable(struct clk_hw *hw)
196 {
197 struct isp_xclk *xclk = to_isp_xclk(hw);
198 unsigned long flags;
199
200 spin_lock_irqsave(&xclk->lock, flags);
201 isp_xclk_update(xclk, 0);
202 xclk->enabled = false;
203 spin_unlock_irqrestore(&xclk->lock, flags);
204 }
205
206 static unsigned long isp_xclk_recalc_rate(struct clk_hw *hw,
207 unsigned long parent_rate)
208 {
209 struct isp_xclk *xclk = to_isp_xclk(hw);
210
211 return parent_rate / xclk->divider;
212 }
213
214 static u32 isp_xclk_calc_divider(unsigned long *rate, unsigned long parent_rate)
215 {
216 u32 divider;
217
218 if (*rate >= parent_rate) {
219 *rate = parent_rate;
220 return ISPTCTRL_CTRL_DIV_BYPASS;
221 }
222
223 if (*rate == 0)
224 *rate = 1;
225
226 divider = DIV_ROUND_CLOSEST(parent_rate, *rate);
227 if (divider >= ISPTCTRL_CTRL_DIV_BYPASS)
228 divider = ISPTCTRL_CTRL_DIV_BYPASS - 1;
229
230 *rate = parent_rate / divider;
231 return divider;
232 }
233
234 static long isp_xclk_round_rate(struct clk_hw *hw, unsigned long rate,
235 unsigned long *parent_rate)
236 {
237 isp_xclk_calc_divider(&rate, *parent_rate);
238 return rate;
239 }
240
241 static int isp_xclk_set_rate(struct clk_hw *hw, unsigned long rate,
242 unsigned long parent_rate)
243 {
244 struct isp_xclk *xclk = to_isp_xclk(hw);
245 unsigned long flags;
246 u32 divider;
247
248 divider = isp_xclk_calc_divider(&rate, parent_rate);
249
250 spin_lock_irqsave(&xclk->lock, flags);
251
252 xclk->divider = divider;
253 if (xclk->enabled)
254 isp_xclk_update(xclk, divider);
255
256 spin_unlock_irqrestore(&xclk->lock, flags);
257
258 dev_dbg(xclk->isp->dev, "%s: cam_xclk%c set to %lu Hz (div %u)\n",
259 __func__, xclk->id == ISP_XCLK_A ? 'a' : 'b', rate, divider);
260 return 0;
261 }
262
263 static const struct clk_ops isp_xclk_ops = {
264 .prepare = isp_xclk_prepare,
265 .unprepare = isp_xclk_unprepare,
266 .enable = isp_xclk_enable,
267 .disable = isp_xclk_disable,
268 .recalc_rate = isp_xclk_recalc_rate,
269 .round_rate = isp_xclk_round_rate,
270 .set_rate = isp_xclk_set_rate,
271 };
272
273 static const char *isp_xclk_parent_name = "cam_mclk";
274
275 static const struct clk_init_data isp_xclk_init_data = {
276 .name = "cam_xclk",
277 .ops = &isp_xclk_ops,
278 .parent_names = &isp_xclk_parent_name,
279 .num_parents = 1,
280 };
281
282 static struct clk *isp_xclk_src_get(struct of_phandle_args *clkspec, void *data)
283 {
284 unsigned int idx = clkspec->args[0];
285 struct isp_device *isp = data;
286
287 if (idx >= ARRAY_SIZE(isp->xclks))
288 return ERR_PTR(-ENOENT);
289
290 return isp->xclks[idx].clk;
291 }
292
293 static int isp_xclk_init(struct isp_device *isp)
294 {
295 struct isp_platform_data *pdata = isp->pdata;
296 struct device_node *np = isp->dev->of_node;
297 struct clk_init_data init;
298 unsigned int i;
299
300 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i)
301 isp->xclks[i].clk = ERR_PTR(-EINVAL);
302
303 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
304 struct isp_xclk *xclk = &isp->xclks[i];
305
306 xclk->isp = isp;
307 xclk->id = i == 0 ? ISP_XCLK_A : ISP_XCLK_B;
308 xclk->divider = 1;
309 spin_lock_init(&xclk->lock);
310
311 init.name = i == 0 ? "cam_xclka" : "cam_xclkb";
312 init.ops = &isp_xclk_ops;
313 init.parent_names = &isp_xclk_parent_name;
314 init.num_parents = 1;
315
316 xclk->hw.init = &init;
317 /*
318 * The first argument is NULL in order to avoid circular
319 * reference, as this driver takes reference on the
320 * sensor subdevice modules and the sensors would take
321 * reference on this module through clk_get().
322 */
323 xclk->clk = clk_register(NULL, &xclk->hw);
324 if (IS_ERR(xclk->clk))
325 return PTR_ERR(xclk->clk);
326
327 /* When instantiated from DT we don't need to register clock
328 * aliases.
329 */
330 if (np)
331 continue;
332
333 if (!pdata || (pdata->xclks[i].con_id == NULL &&
334 pdata->xclks[i].dev_id == NULL))
335 continue;
336
337 xclk->lookup = kzalloc(sizeof(*xclk->lookup), GFP_KERNEL);
338 if (xclk->lookup == NULL)
339 return -ENOMEM;
340
341 xclk->lookup->con_id = pdata->xclks[i].con_id;
342 xclk->lookup->dev_id = pdata->xclks[i].dev_id;
343 xclk->lookup->clk = xclk->clk;
344
345 clkdev_add(xclk->lookup);
346 }
347
348 if (np)
349 of_clk_add_provider(np, isp_xclk_src_get, isp);
350
351 return 0;
352 }
353
354 static void isp_xclk_cleanup(struct isp_device *isp)
355 {
356 struct device_node *np = isp->dev->of_node;
357 unsigned int i;
358
359 if (np)
360 of_clk_del_provider(np);
361
362 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
363 struct isp_xclk *xclk = &isp->xclks[i];
364
365 if (!IS_ERR(xclk->clk))
366 clk_unregister(xclk->clk);
367
368 if (xclk->lookup)
369 clkdev_drop(xclk->lookup);
370 }
371 }
372
373 /* -----------------------------------------------------------------------------
374 * Interrupts
375 */
376
377 /*
378 * isp_enable_interrupts - Enable ISP interrupts.
379 * @isp: OMAP3 ISP device
380 */
381 static void isp_enable_interrupts(struct isp_device *isp)
382 {
383 static const u32 irq = IRQ0ENABLE_CSIA_IRQ
384 | IRQ0ENABLE_CSIB_IRQ
385 | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ
386 | IRQ0ENABLE_CCDC_LSC_DONE_IRQ
387 | IRQ0ENABLE_CCDC_VD0_IRQ
388 | IRQ0ENABLE_CCDC_VD1_IRQ
389 | IRQ0ENABLE_HS_VS_IRQ
390 | IRQ0ENABLE_HIST_DONE_IRQ
391 | IRQ0ENABLE_H3A_AWB_DONE_IRQ
392 | IRQ0ENABLE_H3A_AF_DONE_IRQ
393 | IRQ0ENABLE_PRV_DONE_IRQ
394 | IRQ0ENABLE_RSZ_DONE_IRQ;
395
396 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
397 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
398 }
399
400 /*
401 * isp_disable_interrupts - Disable ISP interrupts.
402 * @isp: OMAP3 ISP device
403 */
404 static void isp_disable_interrupts(struct isp_device *isp)
405 {
406 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
407 }
408
409 /*
410 * isp_core_init - ISP core settings
411 * @isp: OMAP3 ISP device
412 * @idle: Consider idle state.
413 *
414 * Set the power settings for the ISP and SBL bus and configure the HS/VS
415 * interrupt source.
416 *
417 * We need to configure the HS/VS interrupt source before interrupts get
418 * enabled, as the sensor might be free-running and the ISP default setting
419 * (HS edge) would put an unnecessary burden on the CPU.
420 */
421 static void isp_core_init(struct isp_device *isp, int idle)
422 {
423 isp_reg_writel(isp,
424 ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY :
425 ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) <<
426 ISP_SYSCONFIG_MIDLEMODE_SHIFT) |
427 ((isp->revision == ISP_REVISION_15_0) ?
428 ISP_SYSCONFIG_AUTOIDLE : 0),
429 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
430
431 isp_reg_writel(isp,
432 (isp->autoidle ? ISPCTRL_SBL_AUTOIDLE : 0) |
433 ISPCTRL_SYNC_DETECT_VSRISE,
434 OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
435 }
436
437 /*
438 * Configure the bridge and lane shifter. Valid inputs are
439 *
440 * CCDC_INPUT_PARALLEL: Parallel interface
441 * CCDC_INPUT_CSI2A: CSI2a receiver
442 * CCDC_INPUT_CCP2B: CCP2b receiver
443 * CCDC_INPUT_CSI2C: CSI2c receiver
444 *
445 * The bridge and lane shifter are configured according to the selected input
446 * and the ISP platform data.
447 */
448 void omap3isp_configure_bridge(struct isp_device *isp,
449 enum ccdc_input_entity input,
450 const struct isp_parallel_platform_data *pdata,
451 unsigned int shift, unsigned int bridge)
452 {
453 u32 ispctrl_val;
454
455 ispctrl_val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
456 ispctrl_val &= ~ISPCTRL_SHIFT_MASK;
457 ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV;
458 ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK;
459 ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK;
460 ispctrl_val |= bridge;
461
462 switch (input) {
463 case CCDC_INPUT_PARALLEL:
464 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
465 ispctrl_val |= pdata->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
466 shift += pdata->data_lane_shift * 2;
467 break;
468
469 case CCDC_INPUT_CSI2A:
470 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA;
471 break;
472
473 case CCDC_INPUT_CCP2B:
474 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB;
475 break;
476
477 case CCDC_INPUT_CSI2C:
478 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC;
479 break;
480
481 default:
482 return;
483 }
484
485 ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK;
486
487 isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
488 }
489
490 void omap3isp_hist_dma_done(struct isp_device *isp)
491 {
492 if (omap3isp_ccdc_busy(&isp->isp_ccdc) ||
493 omap3isp_stat_pcr_busy(&isp->isp_hist)) {
494 /* Histogram cannot be enabled in this frame anymore */
495 atomic_set(&isp->isp_hist.buf_err, 1);
496 dev_dbg(isp->dev, "hist: Out of synchronization with "
497 "CCDC. Ignoring next buffer.\n");
498 }
499 }
500
501 static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus)
502 {
503 static const char *name[] = {
504 "CSIA_IRQ",
505 "res1",
506 "res2",
507 "CSIB_LCM_IRQ",
508 "CSIB_IRQ",
509 "res5",
510 "res6",
511 "res7",
512 "CCDC_VD0_IRQ",
513 "CCDC_VD1_IRQ",
514 "CCDC_VD2_IRQ",
515 "CCDC_ERR_IRQ",
516 "H3A_AF_DONE_IRQ",
517 "H3A_AWB_DONE_IRQ",
518 "res14",
519 "res15",
520 "HIST_DONE_IRQ",
521 "CCDC_LSC_DONE",
522 "CCDC_LSC_PREFETCH_COMPLETED",
523 "CCDC_LSC_PREFETCH_ERROR",
524 "PRV_DONE_IRQ",
525 "CBUFF_IRQ",
526 "res22",
527 "res23",
528 "RSZ_DONE_IRQ",
529 "OVF_IRQ",
530 "res26",
531 "res27",
532 "MMU_ERR_IRQ",
533 "OCP_ERR_IRQ",
534 "SEC_ERR_IRQ",
535 "HS_VS_IRQ",
536 };
537 int i;
538
539 dev_dbg(isp->dev, "ISP IRQ: ");
540
541 for (i = 0; i < ARRAY_SIZE(name); i++) {
542 if ((1 << i) & irqstatus)
543 printk(KERN_CONT "%s ", name[i]);
544 }
545 printk(KERN_CONT "\n");
546 }
547
548 static void isp_isr_sbl(struct isp_device *isp)
549 {
550 struct device *dev = isp->dev;
551 struct isp_pipeline *pipe;
552 u32 sbl_pcr;
553
554 /*
555 * Handle shared buffer logic overflows for video buffers.
556 * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored.
557 */
558 sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
559 isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
560 sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF;
561
562 if (sbl_pcr)
563 dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr);
564
565 if (sbl_pcr & ISPSBL_PCR_CSIB_WBL_OVF) {
566 pipe = to_isp_pipeline(&isp->isp_ccp2.subdev.entity);
567 if (pipe != NULL)
568 pipe->error = true;
569 }
570
571 if (sbl_pcr & ISPSBL_PCR_CSIA_WBL_OVF) {
572 pipe = to_isp_pipeline(&isp->isp_csi2a.subdev.entity);
573 if (pipe != NULL)
574 pipe->error = true;
575 }
576
577 if (sbl_pcr & ISPSBL_PCR_CCDC_WBL_OVF) {
578 pipe = to_isp_pipeline(&isp->isp_ccdc.subdev.entity);
579 if (pipe != NULL)
580 pipe->error = true;
581 }
582
583 if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) {
584 pipe = to_isp_pipeline(&isp->isp_prev.subdev.entity);
585 if (pipe != NULL)
586 pipe->error = true;
587 }
588
589 if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF
590 | ISPSBL_PCR_RSZ2_WBL_OVF
591 | ISPSBL_PCR_RSZ3_WBL_OVF
592 | ISPSBL_PCR_RSZ4_WBL_OVF)) {
593 pipe = to_isp_pipeline(&isp->isp_res.subdev.entity);
594 if (pipe != NULL)
595 pipe->error = true;
596 }
597
598 if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF)
599 omap3isp_stat_sbl_overflow(&isp->isp_af);
600
601 if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF)
602 omap3isp_stat_sbl_overflow(&isp->isp_aewb);
603 }
604
605 /*
606 * isp_isr - Interrupt Service Routine for Camera ISP module.
607 * @irq: Not used currently.
608 * @_isp: Pointer to the OMAP3 ISP device
609 *
610 * Handles the corresponding callback if plugged in.
611 */
612 static irqreturn_t isp_isr(int irq, void *_isp)
613 {
614 static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ |
615 IRQ0STATUS_CCDC_LSC_DONE_IRQ |
616 IRQ0STATUS_CCDC_VD0_IRQ |
617 IRQ0STATUS_CCDC_VD1_IRQ |
618 IRQ0STATUS_HS_VS_IRQ;
619 struct isp_device *isp = _isp;
620 u32 irqstatus;
621
622 irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
623 isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
624
625 isp_isr_sbl(isp);
626
627 if (irqstatus & IRQ0STATUS_CSIA_IRQ)
628 omap3isp_csi2_isr(&isp->isp_csi2a);
629
630 if (irqstatus & IRQ0STATUS_CSIB_IRQ)
631 omap3isp_ccp2_isr(&isp->isp_ccp2);
632
633 if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
634 if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
635 omap3isp_preview_isr_frame_sync(&isp->isp_prev);
636 if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
637 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
638 omap3isp_stat_isr_frame_sync(&isp->isp_aewb);
639 omap3isp_stat_isr_frame_sync(&isp->isp_af);
640 omap3isp_stat_isr_frame_sync(&isp->isp_hist);
641 }
642
643 if (irqstatus & ccdc_events)
644 omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events);
645
646 if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) {
647 if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER)
648 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
649 omap3isp_preview_isr(&isp->isp_prev);
650 }
651
652 if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ)
653 omap3isp_resizer_isr(&isp->isp_res);
654
655 if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ)
656 omap3isp_stat_isr(&isp->isp_aewb);
657
658 if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ)
659 omap3isp_stat_isr(&isp->isp_af);
660
661 if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ)
662 omap3isp_stat_isr(&isp->isp_hist);
663
664 omap3isp_flush(isp);
665
666 #if defined(DEBUG) && defined(ISP_ISR_DEBUG)
667 isp_isr_dbg(isp, irqstatus);
668 #endif
669
670 return IRQ_HANDLED;
671 }
672
673 /* -----------------------------------------------------------------------------
674 * Pipeline power management
675 *
676 * Entities must be powered up when part of a pipeline that contains at least
677 * one open video device node.
678 *
679 * To achieve this use the entity use_count field to track the number of users.
680 * For entities corresponding to video device nodes the use_count field stores
681 * the users count of the node. For entities corresponding to subdevs the
682 * use_count field stores the total number of users of all video device nodes
683 * in the pipeline.
684 *
685 * The omap3isp_pipeline_pm_use() function must be called in the open() and
686 * close() handlers of video device nodes. It increments or decrements the use
687 * count of all subdev entities in the pipeline.
688 *
689 * To react to link management on powered pipelines, the link setup notification
690 * callback updates the use count of all entities in the source and sink sides
691 * of the link.
692 */
693
694 /*
695 * isp_pipeline_pm_use_count - Count the number of users of a pipeline
696 * @entity: The entity
697 *
698 * Return the total number of users of all video device nodes in the pipeline.
699 */
700 static int isp_pipeline_pm_use_count(struct media_entity *entity)
701 {
702 struct media_entity_graph graph;
703 int use = 0;
704
705 media_entity_graph_walk_start(&graph, entity);
706
707 while ((entity = media_entity_graph_walk_next(&graph))) {
708 if (media_entity_type(entity) == MEDIA_ENT_T_DEVNODE)
709 use += entity->use_count;
710 }
711
712 return use;
713 }
714
715 /*
716 * isp_pipeline_pm_power_one - Apply power change to an entity
717 * @entity: The entity
718 * @change: Use count change
719 *
720 * Change the entity use count by @change. If the entity is a subdev update its
721 * power state by calling the core::s_power operation when the use count goes
722 * from 0 to != 0 or from != 0 to 0.
723 *
724 * Return 0 on success or a negative error code on failure.
725 */
726 static int isp_pipeline_pm_power_one(struct media_entity *entity, int change)
727 {
728 struct v4l2_subdev *subdev;
729 int ret;
730
731 subdev = media_entity_type(entity) == MEDIA_ENT_T_V4L2_SUBDEV
732 ? media_entity_to_v4l2_subdev(entity) : NULL;
733
734 if (entity->use_count == 0 && change > 0 && subdev != NULL) {
735 ret = v4l2_subdev_call(subdev, core, s_power, 1);
736 if (ret < 0 && ret != -ENOIOCTLCMD)
737 return ret;
738 }
739
740 entity->use_count += change;
741 WARN_ON(entity->use_count < 0);
742
743 if (entity->use_count == 0 && change < 0 && subdev != NULL)
744 v4l2_subdev_call(subdev, core, s_power, 0);
745
746 return 0;
747 }
748
749 /*
750 * isp_pipeline_pm_power - Apply power change to all entities in a pipeline
751 * @entity: The entity
752 * @change: Use count change
753 *
754 * Walk the pipeline to update the use count and the power state of all non-node
755 * entities.
756 *
757 * Return 0 on success or a negative error code on failure.
758 */
759 static int isp_pipeline_pm_power(struct media_entity *entity, int change)
760 {
761 struct media_entity_graph graph;
762 struct media_entity *first = entity;
763 int ret = 0;
764
765 if (!change)
766 return 0;
767
768 media_entity_graph_walk_start(&graph, entity);
769
770 while (!ret && (entity = media_entity_graph_walk_next(&graph)))
771 if (media_entity_type(entity) != MEDIA_ENT_T_DEVNODE)
772 ret = isp_pipeline_pm_power_one(entity, change);
773
774 if (!ret)
775 return 0;
776
777 media_entity_graph_walk_start(&graph, first);
778
779 while ((first = media_entity_graph_walk_next(&graph))
780 && first != entity)
781 if (media_entity_type(first) != MEDIA_ENT_T_DEVNODE)
782 isp_pipeline_pm_power_one(first, -change);
783
784 return ret;
785 }
786
787 /*
788 * omap3isp_pipeline_pm_use - Update the use count of an entity
789 * @entity: The entity
790 * @use: Use (1) or stop using (0) the entity
791 *
792 * Update the use count of all entities in the pipeline and power entities on or
793 * off accordingly.
794 *
795 * Return 0 on success or a negative error code on failure. Powering entities
796 * off is assumed to never fail. No failure can occur when the use parameter is
797 * set to 0.
798 */
799 int omap3isp_pipeline_pm_use(struct media_entity *entity, int use)
800 {
801 int change = use ? 1 : -1;
802 int ret;
803
804 mutex_lock(&entity->parent->graph_mutex);
805
806 /* Apply use count to node. */
807 entity->use_count += change;
808 WARN_ON(entity->use_count < 0);
809
810 /* Apply power change to connected non-nodes. */
811 ret = isp_pipeline_pm_power(entity, change);
812 if (ret < 0)
813 entity->use_count -= change;
814
815 mutex_unlock(&entity->parent->graph_mutex);
816
817 return ret;
818 }
819
820 /*
821 * isp_pipeline_link_notify - Link management notification callback
822 * @link: The link
823 * @flags: New link flags that will be applied
824 * @notification: The link's state change notification type (MEDIA_DEV_NOTIFY_*)
825 *
826 * React to link management on powered pipelines by updating the use count of
827 * all entities in the source and sink sides of the link. Entities are powered
828 * on or off accordingly.
829 *
830 * Return 0 on success or a negative error code on failure. Powering entities
831 * off is assumed to never fail. This function will not fail for disconnection
832 * events.
833 */
834 static int isp_pipeline_link_notify(struct media_link *link, u32 flags,
835 unsigned int notification)
836 {
837 struct media_entity *source = link->source->entity;
838 struct media_entity *sink = link->sink->entity;
839 int source_use = isp_pipeline_pm_use_count(source);
840 int sink_use = isp_pipeline_pm_use_count(sink);
841 int ret;
842
843 if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH &&
844 !(link->flags & MEDIA_LNK_FL_ENABLED)) {
845 /* Powering off entities is assumed to never fail. */
846 isp_pipeline_pm_power(source, -sink_use);
847 isp_pipeline_pm_power(sink, -source_use);
848 return 0;
849 }
850
851 if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH &&
852 (flags & MEDIA_LNK_FL_ENABLED)) {
853
854 ret = isp_pipeline_pm_power(source, sink_use);
855 if (ret < 0)
856 return ret;
857
858 ret = isp_pipeline_pm_power(sink, source_use);
859 if (ret < 0)
860 isp_pipeline_pm_power(source, -sink_use);
861
862 return ret;
863 }
864
865 return 0;
866 }
867
868 /* -----------------------------------------------------------------------------
869 * Pipeline stream management
870 */
871
872 /*
873 * isp_pipeline_enable - Enable streaming on a pipeline
874 * @pipe: ISP pipeline
875 * @mode: Stream mode (single shot or continuous)
876 *
877 * Walk the entities chain starting at the pipeline output video node and start
878 * all modules in the chain in the given mode.
879 *
880 * Return 0 if successful, or the return value of the failed video::s_stream
881 * operation otherwise.
882 */
883 static int isp_pipeline_enable(struct isp_pipeline *pipe,
884 enum isp_pipeline_stream_state mode)
885 {
886 struct isp_device *isp = pipe->output->isp;
887 struct media_entity *entity;
888 struct media_pad *pad;
889 struct v4l2_subdev *subdev;
890 unsigned long flags;
891 int ret;
892
893 /* Refuse to start streaming if an entity included in the pipeline has
894 * crashed. This check must be performed before the loop below to avoid
895 * starting entities if the pipeline won't start anyway (those entities
896 * would then likely fail to stop, making the problem worse).
897 */
898 if (pipe->entities & isp->crashed)
899 return -EIO;
900
901 spin_lock_irqsave(&pipe->lock, flags);
902 pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);
903 spin_unlock_irqrestore(&pipe->lock, flags);
904
905 pipe->do_propagation = false;
906
907 entity = &pipe->output->video.entity;
908 while (1) {
909 pad = &entity->pads[0];
910 if (!(pad->flags & MEDIA_PAD_FL_SINK))
911 break;
912
913 pad = media_entity_remote_pad(pad);
914 if (pad == NULL ||
915 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
916 break;
917
918 entity = pad->entity;
919 subdev = media_entity_to_v4l2_subdev(entity);
920
921 ret = v4l2_subdev_call(subdev, video, s_stream, mode);
922 if (ret < 0 && ret != -ENOIOCTLCMD)
923 return ret;
924
925 if (subdev == &isp->isp_ccdc.subdev) {
926 v4l2_subdev_call(&isp->isp_aewb.subdev, video,
927 s_stream, mode);
928 v4l2_subdev_call(&isp->isp_af.subdev, video,
929 s_stream, mode);
930 v4l2_subdev_call(&isp->isp_hist.subdev, video,
931 s_stream, mode);
932 pipe->do_propagation = true;
933 }
934 }
935
936 return 0;
937 }
938
939 static int isp_pipeline_wait_resizer(struct isp_device *isp)
940 {
941 return omap3isp_resizer_busy(&isp->isp_res);
942 }
943
944 static int isp_pipeline_wait_preview(struct isp_device *isp)
945 {
946 return omap3isp_preview_busy(&isp->isp_prev);
947 }
948
949 static int isp_pipeline_wait_ccdc(struct isp_device *isp)
950 {
951 return omap3isp_stat_busy(&isp->isp_af)
952 || omap3isp_stat_busy(&isp->isp_aewb)
953 || omap3isp_stat_busy(&isp->isp_hist)
954 || omap3isp_ccdc_busy(&isp->isp_ccdc);
955 }
956
957 #define ISP_STOP_TIMEOUT msecs_to_jiffies(1000)
958
959 static int isp_pipeline_wait(struct isp_device *isp,
960 int(*busy)(struct isp_device *isp))
961 {
962 unsigned long timeout = jiffies + ISP_STOP_TIMEOUT;
963
964 while (!time_after(jiffies, timeout)) {
965 if (!busy(isp))
966 return 0;
967 }
968
969 return 1;
970 }
971
972 /*
973 * isp_pipeline_disable - Disable streaming on a pipeline
974 * @pipe: ISP pipeline
975 *
976 * Walk the entities chain starting at the pipeline output video node and stop
977 * all modules in the chain. Wait synchronously for the modules to be stopped if
978 * necessary.
979 *
980 * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module
981 * can't be stopped (in which case a software reset of the ISP is probably
982 * necessary).
983 */
984 static int isp_pipeline_disable(struct isp_pipeline *pipe)
985 {
986 struct isp_device *isp = pipe->output->isp;
987 struct media_entity *entity;
988 struct media_pad *pad;
989 struct v4l2_subdev *subdev;
990 int failure = 0;
991 int ret;
992
993 /*
994 * We need to stop all the modules after CCDC first or they'll
995 * never stop since they may not get a full frame from CCDC.
996 */
997 entity = &pipe->output->video.entity;
998 while (1) {
999 pad = &entity->pads[0];
1000 if (!(pad->flags & MEDIA_PAD_FL_SINK))
1001 break;
1002
1003 pad = media_entity_remote_pad(pad);
1004 if (pad == NULL ||
1005 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
1006 break;
1007
1008 entity = pad->entity;
1009 subdev = media_entity_to_v4l2_subdev(entity);
1010
1011 if (subdev == &isp->isp_ccdc.subdev) {
1012 v4l2_subdev_call(&isp->isp_aewb.subdev,
1013 video, s_stream, 0);
1014 v4l2_subdev_call(&isp->isp_af.subdev,
1015 video, s_stream, 0);
1016 v4l2_subdev_call(&isp->isp_hist.subdev,
1017 video, s_stream, 0);
1018 }
1019
1020 ret = v4l2_subdev_call(subdev, video, s_stream, 0);
1021
1022 if (subdev == &isp->isp_res.subdev)
1023 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_resizer);
1024 else if (subdev == &isp->isp_prev.subdev)
1025 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_preview);
1026 else if (subdev == &isp->isp_ccdc.subdev)
1027 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_ccdc);
1028
1029 /* Handle stop failures. An entity that fails to stop can
1030 * usually just be restarted. Flag the stop failure nonetheless
1031 * to trigger an ISP reset the next time the device is released,
1032 * just in case.
1033 *
1034 * The preview engine is a special case. A failure to stop can
1035 * mean a hardware crash. When that happens the preview engine
1036 * won't respond to read/write operations on the L4 bus anymore,
1037 * resulting in a bus fault and a kernel oops next time it gets
1038 * accessed. Mark it as crashed to prevent pipelines including
1039 * it from being started.
1040 */
1041 if (ret) {
1042 dev_info(isp->dev, "Unable to stop %s\n", subdev->name);
1043 isp->stop_failure = true;
1044 if (subdev == &isp->isp_prev.subdev)
1045 isp->crashed |= 1U << subdev->entity.id;
1046 failure = -ETIMEDOUT;
1047 }
1048 }
1049
1050 return failure;
1051 }
1052
1053 /*
1054 * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline
1055 * @pipe: ISP pipeline
1056 * @state: Stream state (stopped, single shot or continuous)
1057 *
1058 * Set the pipeline to the given stream state. Pipelines can be started in
1059 * single-shot or continuous mode.
1060 *
1061 * Return 0 if successful, or the return value of the failed video::s_stream
1062 * operation otherwise. The pipeline state is not updated when the operation
1063 * fails, except when stopping the pipeline.
1064 */
1065 int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
1066 enum isp_pipeline_stream_state state)
1067 {
1068 int ret;
1069
1070 if (state == ISP_PIPELINE_STREAM_STOPPED)
1071 ret = isp_pipeline_disable(pipe);
1072 else
1073 ret = isp_pipeline_enable(pipe, state);
1074
1075 if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED)
1076 pipe->stream_state = state;
1077
1078 return ret;
1079 }
1080
1081 /*
1082 * omap3isp_pipeline_cancel_stream - Cancel stream on a pipeline
1083 * @pipe: ISP pipeline
1084 *
1085 * Cancelling a stream mark all buffers on all video nodes in the pipeline as
1086 * erroneous and makes sure no new buffer can be queued. This function is called
1087 * when a fatal error that prevents any further operation on the pipeline
1088 * occurs.
1089 */
1090 void omap3isp_pipeline_cancel_stream(struct isp_pipeline *pipe)
1091 {
1092 if (pipe->input)
1093 omap3isp_video_cancel_stream(pipe->input);
1094 if (pipe->output)
1095 omap3isp_video_cancel_stream(pipe->output);
1096 }
1097
1098 /*
1099 * isp_pipeline_resume - Resume streaming on a pipeline
1100 * @pipe: ISP pipeline
1101 *
1102 * Resume video output and input and re-enable pipeline.
1103 */
1104 static void isp_pipeline_resume(struct isp_pipeline *pipe)
1105 {
1106 int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT;
1107
1108 omap3isp_video_resume(pipe->output, !singleshot);
1109 if (singleshot)
1110 omap3isp_video_resume(pipe->input, 0);
1111 isp_pipeline_enable(pipe, pipe->stream_state);
1112 }
1113
1114 /*
1115 * isp_pipeline_suspend - Suspend streaming on a pipeline
1116 * @pipe: ISP pipeline
1117 *
1118 * Suspend pipeline.
1119 */
1120 static void isp_pipeline_suspend(struct isp_pipeline *pipe)
1121 {
1122 isp_pipeline_disable(pipe);
1123 }
1124
1125 /*
1126 * isp_pipeline_is_last - Verify if entity has an enabled link to the output
1127 * video node
1128 * @me: ISP module's media entity
1129 *
1130 * Returns 1 if the entity has an enabled link to the output video node or 0
1131 * otherwise. It's true only while pipeline can have no more than one output
1132 * node.
1133 */
1134 static int isp_pipeline_is_last(struct media_entity *me)
1135 {
1136 struct isp_pipeline *pipe;
1137 struct media_pad *pad;
1138
1139 if (!me->pipe)
1140 return 0;
1141 pipe = to_isp_pipeline(me);
1142 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED)
1143 return 0;
1144 pad = media_entity_remote_pad(&pipe->output->pad);
1145 return pad->entity == me;
1146 }
1147
1148 /*
1149 * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module
1150 * @me: ISP module's media entity
1151 *
1152 * Suspend the whole pipeline if module's entity has an enabled link to the
1153 * output video node. It works only while pipeline can have no more than one
1154 * output node.
1155 */
1156 static void isp_suspend_module_pipeline(struct media_entity *me)
1157 {
1158 if (isp_pipeline_is_last(me))
1159 isp_pipeline_suspend(to_isp_pipeline(me));
1160 }
1161
1162 /*
1163 * isp_resume_module_pipeline - Resume pipeline to which belongs the module
1164 * @me: ISP module's media entity
1165 *
1166 * Resume the whole pipeline if module's entity has an enabled link to the
1167 * output video node. It works only while pipeline can have no more than one
1168 * output node.
1169 */
1170 static void isp_resume_module_pipeline(struct media_entity *me)
1171 {
1172 if (isp_pipeline_is_last(me))
1173 isp_pipeline_resume(to_isp_pipeline(me));
1174 }
1175
1176 /*
1177 * isp_suspend_modules - Suspend ISP submodules.
1178 * @isp: OMAP3 ISP device
1179 *
1180 * Returns 0 if suspend left in idle state all the submodules properly,
1181 * or returns 1 if a general Reset is required to suspend the submodules.
1182 */
1183 static int isp_suspend_modules(struct isp_device *isp)
1184 {
1185 unsigned long timeout;
1186
1187 omap3isp_stat_suspend(&isp->isp_aewb);
1188 omap3isp_stat_suspend(&isp->isp_af);
1189 omap3isp_stat_suspend(&isp->isp_hist);
1190 isp_suspend_module_pipeline(&isp->isp_res.subdev.entity);
1191 isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity);
1192 isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity);
1193 isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity);
1194 isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity);
1195
1196 timeout = jiffies + ISP_STOP_TIMEOUT;
1197 while (omap3isp_stat_busy(&isp->isp_af)
1198 || omap3isp_stat_busy(&isp->isp_aewb)
1199 || omap3isp_stat_busy(&isp->isp_hist)
1200 || omap3isp_preview_busy(&isp->isp_prev)
1201 || omap3isp_resizer_busy(&isp->isp_res)
1202 || omap3isp_ccdc_busy(&isp->isp_ccdc)) {
1203 if (time_after(jiffies, timeout)) {
1204 dev_info(isp->dev, "can't stop modules.\n");
1205 return 1;
1206 }
1207 msleep(1);
1208 }
1209
1210 return 0;
1211 }
1212
1213 /*
1214 * isp_resume_modules - Resume ISP submodules.
1215 * @isp: OMAP3 ISP device
1216 */
1217 static void isp_resume_modules(struct isp_device *isp)
1218 {
1219 omap3isp_stat_resume(&isp->isp_aewb);
1220 omap3isp_stat_resume(&isp->isp_af);
1221 omap3isp_stat_resume(&isp->isp_hist);
1222 isp_resume_module_pipeline(&isp->isp_res.subdev.entity);
1223 isp_resume_module_pipeline(&isp->isp_prev.subdev.entity);
1224 isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity);
1225 isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity);
1226 isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity);
1227 }
1228
1229 /*
1230 * isp_reset - Reset ISP with a timeout wait for idle.
1231 * @isp: OMAP3 ISP device
1232 */
1233 static int isp_reset(struct isp_device *isp)
1234 {
1235 unsigned long timeout = 0;
1236
1237 isp_reg_writel(isp,
1238 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG)
1239 | ISP_SYSCONFIG_SOFTRESET,
1240 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
1241 while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN,
1242 ISP_SYSSTATUS) & 0x1)) {
1243 if (timeout++ > 10000) {
1244 dev_alert(isp->dev, "cannot reset ISP\n");
1245 return -ETIMEDOUT;
1246 }
1247 udelay(1);
1248 }
1249
1250 isp->stop_failure = false;
1251 isp->crashed = 0;
1252 return 0;
1253 }
1254
1255 /*
1256 * isp_save_context - Saves the values of the ISP module registers.
1257 * @isp: OMAP3 ISP device
1258 * @reg_list: Structure containing pairs of register address and value to
1259 * modify on OMAP.
1260 */
1261 static void
1262 isp_save_context(struct isp_device *isp, struct isp_reg *reg_list)
1263 {
1264 struct isp_reg *next = reg_list;
1265
1266 for (; next->reg != ISP_TOK_TERM; next++)
1267 next->val = isp_reg_readl(isp, next->mmio_range, next->reg);
1268 }
1269
1270 /*
1271 * isp_restore_context - Restores the values of the ISP module registers.
1272 * @isp: OMAP3 ISP device
1273 * @reg_list: Structure containing pairs of register address and value to
1274 * modify on OMAP.
1275 */
1276 static void
1277 isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list)
1278 {
1279 struct isp_reg *next = reg_list;
1280
1281 for (; next->reg != ISP_TOK_TERM; next++)
1282 isp_reg_writel(isp, next->val, next->mmio_range, next->reg);
1283 }
1284
1285 /*
1286 * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1287 * @isp: OMAP3 ISP device
1288 *
1289 * Routine for saving the context of each module in the ISP.
1290 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1291 */
1292 static void isp_save_ctx(struct isp_device *isp)
1293 {
1294 isp_save_context(isp, isp_reg_list);
1295 omap_iommu_save_ctx(isp->dev);
1296 }
1297
1298 /*
1299 * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1300 * @isp: OMAP3 ISP device
1301 *
1302 * Routine for restoring the context of each module in the ISP.
1303 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1304 */
1305 static void isp_restore_ctx(struct isp_device *isp)
1306 {
1307 isp_restore_context(isp, isp_reg_list);
1308 omap_iommu_restore_ctx(isp->dev);
1309 omap3isp_ccdc_restore_context(isp);
1310 omap3isp_preview_restore_context(isp);
1311 }
1312
1313 /* -----------------------------------------------------------------------------
1314 * SBL resources management
1315 */
1316 #define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \
1317 OMAP3_ISP_SBL_CCDC_LSC_READ | \
1318 OMAP3_ISP_SBL_PREVIEW_READ | \
1319 OMAP3_ISP_SBL_RESIZER_READ)
1320 #define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \
1321 OMAP3_ISP_SBL_CSI2A_WRITE | \
1322 OMAP3_ISP_SBL_CSI2C_WRITE | \
1323 OMAP3_ISP_SBL_CCDC_WRITE | \
1324 OMAP3_ISP_SBL_PREVIEW_WRITE)
1325
1326 void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res)
1327 {
1328 u32 sbl = 0;
1329
1330 isp->sbl_resources |= res;
1331
1332 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)
1333 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1334
1335 if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)
1336 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1337
1338 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)
1339 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1340
1341 if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)
1342 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1343
1344 if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE)
1345 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1346
1347 if (isp->sbl_resources & OMAP3_ISP_SBL_READ)
1348 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1349
1350 isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1351 }
1352
1353 void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res)
1354 {
1355 u32 sbl = 0;
1356
1357 isp->sbl_resources &= ~res;
1358
1359 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ))
1360 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1361
1362 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ))
1363 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1364
1365 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE))
1366 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1367
1368 if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE))
1369 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1370
1371 if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE))
1372 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1373
1374 if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ))
1375 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1376
1377 isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1378 }
1379
1380 /*
1381 * isp_module_sync_idle - Helper to sync module with its idle state
1382 * @me: ISP submodule's media entity
1383 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1384 * @stopping: flag which tells module wants to stop
1385 *
1386 * This function checks if ISP submodule needs to wait for next interrupt. If
1387 * yes, makes the caller to sleep while waiting for such event.
1388 */
1389 int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait,
1390 atomic_t *stopping)
1391 {
1392 struct isp_pipeline *pipe = to_isp_pipeline(me);
1393
1394 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED ||
1395 (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1396 !isp_pipeline_ready(pipe)))
1397 return 0;
1398
1399 /*
1400 * atomic_set() doesn't include memory barrier on ARM platform for SMP
1401 * scenario. We'll call it here to avoid race conditions.
1402 */
1403 atomic_set(stopping, 1);
1404 smp_mb();
1405
1406 /*
1407 * If module is the last one, it's writing to memory. In this case,
1408 * it's necessary to check if the module is already paused due to
1409 * DMA queue underrun or if it has to wait for next interrupt to be
1410 * idle.
1411 * If it isn't the last one, the function won't sleep but *stopping
1412 * will still be set to warn next submodule caller's interrupt the
1413 * module wants to be idle.
1414 */
1415 if (isp_pipeline_is_last(me)) {
1416 struct isp_video *video = pipe->output;
1417 unsigned long flags;
1418 spin_lock_irqsave(&video->irqlock, flags);
1419 if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
1420 spin_unlock_irqrestore(&video->irqlock, flags);
1421 atomic_set(stopping, 0);
1422 smp_mb();
1423 return 0;
1424 }
1425 spin_unlock_irqrestore(&video->irqlock, flags);
1426 if (!wait_event_timeout(*wait, !atomic_read(stopping),
1427 msecs_to_jiffies(1000))) {
1428 atomic_set(stopping, 0);
1429 smp_mb();
1430 return -ETIMEDOUT;
1431 }
1432 }
1433
1434 return 0;
1435 }
1436
1437 /*
1438 * omap3isp_module_sync_is_stopping - Helper to verify if module was stopping
1439 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1440 * @stopping: flag which tells module wants to stop
1441 *
1442 * This function checks if ISP submodule was stopping. In case of yes, it
1443 * notices the caller by setting stopping to 0 and waking up the wait queue.
1444 * Returns 1 if it was stopping or 0 otherwise.
1445 */
1446 int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait,
1447 atomic_t *stopping)
1448 {
1449 if (atomic_cmpxchg(stopping, 1, 0)) {
1450 wake_up(wait);
1451 return 1;
1452 }
1453
1454 return 0;
1455 }
1456
1457 /* --------------------------------------------------------------------------
1458 * Clock management
1459 */
1460
1461 #define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \
1462 ISPCTRL_HIST_CLK_EN | \
1463 ISPCTRL_RSZ_CLK_EN | \
1464 (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \
1465 (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN))
1466
1467 static void __isp_subclk_update(struct isp_device *isp)
1468 {
1469 u32 clk = 0;
1470
1471 /* AEWB and AF share the same clock. */
1472 if (isp->subclk_resources &
1473 (OMAP3_ISP_SUBCLK_AEWB | OMAP3_ISP_SUBCLK_AF))
1474 clk |= ISPCTRL_H3A_CLK_EN;
1475
1476 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)
1477 clk |= ISPCTRL_HIST_CLK_EN;
1478
1479 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER)
1480 clk |= ISPCTRL_RSZ_CLK_EN;
1481
1482 /* NOTE: For CCDC & Preview submodules, we need to affect internal
1483 * RAM as well.
1484 */
1485 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC)
1486 clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN;
1487
1488 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW)
1489 clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN;
1490
1491 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
1492 ISPCTRL_CLKS_MASK, clk);
1493 }
1494
1495 void omap3isp_subclk_enable(struct isp_device *isp,
1496 enum isp_subclk_resource res)
1497 {
1498 isp->subclk_resources |= res;
1499
1500 __isp_subclk_update(isp);
1501 }
1502
1503 void omap3isp_subclk_disable(struct isp_device *isp,
1504 enum isp_subclk_resource res)
1505 {
1506 isp->subclk_resources &= ~res;
1507
1508 __isp_subclk_update(isp);
1509 }
1510
1511 /*
1512 * isp_enable_clocks - Enable ISP clocks
1513 * @isp: OMAP3 ISP device
1514 *
1515 * Return 0 if successful, or clk_prepare_enable return value if any of them
1516 * fails.
1517 */
1518 static int isp_enable_clocks(struct isp_device *isp)
1519 {
1520 int r;
1521 unsigned long rate;
1522
1523 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_ICK]);
1524 if (r) {
1525 dev_err(isp->dev, "failed to enable cam_ick clock\n");
1526 goto out_clk_enable_ick;
1527 }
1528 r = clk_set_rate(isp->clock[ISP_CLK_CAM_MCLK], CM_CAM_MCLK_HZ);
1529 if (r) {
1530 dev_err(isp->dev, "clk_set_rate for cam_mclk failed\n");
1531 goto out_clk_enable_mclk;
1532 }
1533 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_MCLK]);
1534 if (r) {
1535 dev_err(isp->dev, "failed to enable cam_mclk clock\n");
1536 goto out_clk_enable_mclk;
1537 }
1538 rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
1539 if (rate != CM_CAM_MCLK_HZ)
1540 dev_warn(isp->dev, "unexpected cam_mclk rate:\n"
1541 " expected : %d\n"
1542 " actual : %ld\n", CM_CAM_MCLK_HZ, rate);
1543 r = clk_prepare_enable(isp->clock[ISP_CLK_CSI2_FCK]);
1544 if (r) {
1545 dev_err(isp->dev, "failed to enable csi2_fck clock\n");
1546 goto out_clk_enable_csi2_fclk;
1547 }
1548 return 0;
1549
1550 out_clk_enable_csi2_fclk:
1551 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
1552 out_clk_enable_mclk:
1553 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
1554 out_clk_enable_ick:
1555 return r;
1556 }
1557
1558 /*
1559 * isp_disable_clocks - Disable ISP clocks
1560 * @isp: OMAP3 ISP device
1561 */
1562 static void isp_disable_clocks(struct isp_device *isp)
1563 {
1564 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
1565 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
1566 clk_disable_unprepare(isp->clock[ISP_CLK_CSI2_FCK]);
1567 }
1568
1569 static const char *isp_clocks[] = {
1570 "cam_ick",
1571 "cam_mclk",
1572 "csi2_96m_fck",
1573 "l3_ick",
1574 };
1575
1576 static int isp_get_clocks(struct isp_device *isp)
1577 {
1578 struct clk *clk;
1579 unsigned int i;
1580
1581 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
1582 clk = devm_clk_get(isp->dev, isp_clocks[i]);
1583 if (IS_ERR(clk)) {
1584 dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]);
1585 return PTR_ERR(clk);
1586 }
1587
1588 isp->clock[i] = clk;
1589 }
1590
1591 return 0;
1592 }
1593
1594 /*
1595 * omap3isp_get - Acquire the ISP resource.
1596 *
1597 * Initializes the clocks for the first acquire.
1598 *
1599 * Increment the reference count on the ISP. If the first reference is taken,
1600 * enable clocks and power-up all submodules.
1601 *
1602 * Return a pointer to the ISP device structure, or NULL if an error occurred.
1603 */
1604 static struct isp_device *__omap3isp_get(struct isp_device *isp, bool irq)
1605 {
1606 struct isp_device *__isp = isp;
1607
1608 if (isp == NULL)
1609 return NULL;
1610
1611 mutex_lock(&isp->isp_mutex);
1612 if (isp->ref_count > 0)
1613 goto out;
1614
1615 if (isp_enable_clocks(isp) < 0) {
1616 __isp = NULL;
1617 goto out;
1618 }
1619
1620 /* We don't want to restore context before saving it! */
1621 if (isp->has_context)
1622 isp_restore_ctx(isp);
1623
1624 if (irq)
1625 isp_enable_interrupts(isp);
1626
1627 out:
1628 if (__isp != NULL)
1629 isp->ref_count++;
1630 mutex_unlock(&isp->isp_mutex);
1631
1632 return __isp;
1633 }
1634
1635 struct isp_device *omap3isp_get(struct isp_device *isp)
1636 {
1637 return __omap3isp_get(isp, true);
1638 }
1639
1640 /*
1641 * omap3isp_put - Release the ISP
1642 *
1643 * Decrement the reference count on the ISP. If the last reference is released,
1644 * power-down all submodules, disable clocks and free temporary buffers.
1645 */
1646 static void __omap3isp_put(struct isp_device *isp, bool save_ctx)
1647 {
1648 if (isp == NULL)
1649 return;
1650
1651 mutex_lock(&isp->isp_mutex);
1652 BUG_ON(isp->ref_count == 0);
1653 if (--isp->ref_count == 0) {
1654 isp_disable_interrupts(isp);
1655 if (save_ctx) {
1656 isp_save_ctx(isp);
1657 isp->has_context = 1;
1658 }
1659 /* Reset the ISP if an entity has failed to stop. This is the
1660 * only way to recover from such conditions.
1661 */
1662 if (isp->crashed || isp->stop_failure)
1663 isp_reset(isp);
1664 isp_disable_clocks(isp);
1665 }
1666 mutex_unlock(&isp->isp_mutex);
1667 }
1668
1669 void omap3isp_put(struct isp_device *isp)
1670 {
1671 __omap3isp_put(isp, true);
1672 }
1673
1674 /* --------------------------------------------------------------------------
1675 * Platform device driver
1676 */
1677
1678 /*
1679 * omap3isp_print_status - Prints the values of the ISP Control Module registers
1680 * @isp: OMAP3 ISP device
1681 */
1682 #define ISP_PRINT_REGISTER(isp, name)\
1683 dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \
1684 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name))
1685 #define SBL_PRINT_REGISTER(isp, name)\
1686 dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \
1687 isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name))
1688
1689 void omap3isp_print_status(struct isp_device *isp)
1690 {
1691 dev_dbg(isp->dev, "-------------ISP Register dump--------------\n");
1692
1693 ISP_PRINT_REGISTER(isp, SYSCONFIG);
1694 ISP_PRINT_REGISTER(isp, SYSSTATUS);
1695 ISP_PRINT_REGISTER(isp, IRQ0ENABLE);
1696 ISP_PRINT_REGISTER(isp, IRQ0STATUS);
1697 ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH);
1698 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY);
1699 ISP_PRINT_REGISTER(isp, CTRL);
1700 ISP_PRINT_REGISTER(isp, TCTRL_CTRL);
1701 ISP_PRINT_REGISTER(isp, TCTRL_FRAME);
1702 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY);
1703 ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY);
1704 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY);
1705 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH);
1706 ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH);
1707 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH);
1708
1709 SBL_PRINT_REGISTER(isp, PCR);
1710 SBL_PRINT_REGISTER(isp, SDR_REQ_EXP);
1711
1712 dev_dbg(isp->dev, "--------------------------------------------\n");
1713 }
1714
1715 #ifdef CONFIG_PM
1716
1717 /*
1718 * Power management support.
1719 *
1720 * As the ISP can't properly handle an input video stream interruption on a non
1721 * frame boundary, the ISP pipelines need to be stopped before sensors get
1722 * suspended. However, as suspending the sensors can require a running clock,
1723 * which can be provided by the ISP, the ISP can't be completely suspended
1724 * before the sensor.
1725 *
1726 * To solve this problem power management support is split into prepare/complete
1727 * and suspend/resume operations. The pipelines are stopped in prepare() and the
1728 * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
1729 * resume(), and the the pipelines are restarted in complete().
1730 *
1731 * TODO: PM dependencies between the ISP and sensors are not modelled explicitly
1732 * yet.
1733 */
1734 static int isp_pm_prepare(struct device *dev)
1735 {
1736 struct isp_device *isp = dev_get_drvdata(dev);
1737 int reset;
1738
1739 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1740
1741 if (isp->ref_count == 0)
1742 return 0;
1743
1744 reset = isp_suspend_modules(isp);
1745 isp_disable_interrupts(isp);
1746 isp_save_ctx(isp);
1747 if (reset)
1748 isp_reset(isp);
1749
1750 return 0;
1751 }
1752
1753 static int isp_pm_suspend(struct device *dev)
1754 {
1755 struct isp_device *isp = dev_get_drvdata(dev);
1756
1757 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1758
1759 if (isp->ref_count)
1760 isp_disable_clocks(isp);
1761
1762 return 0;
1763 }
1764
1765 static int isp_pm_resume(struct device *dev)
1766 {
1767 struct isp_device *isp = dev_get_drvdata(dev);
1768
1769 if (isp->ref_count == 0)
1770 return 0;
1771
1772 return isp_enable_clocks(isp);
1773 }
1774
1775 static void isp_pm_complete(struct device *dev)
1776 {
1777 struct isp_device *isp = dev_get_drvdata(dev);
1778
1779 if (isp->ref_count == 0)
1780 return;
1781
1782 isp_restore_ctx(isp);
1783 isp_enable_interrupts(isp);
1784 isp_resume_modules(isp);
1785 }
1786
1787 #else
1788
1789 #define isp_pm_prepare NULL
1790 #define isp_pm_suspend NULL
1791 #define isp_pm_resume NULL
1792 #define isp_pm_complete NULL
1793
1794 #endif /* CONFIG_PM */
1795
1796 static void isp_unregister_entities(struct isp_device *isp)
1797 {
1798 omap3isp_csi2_unregister_entities(&isp->isp_csi2a);
1799 omap3isp_ccp2_unregister_entities(&isp->isp_ccp2);
1800 omap3isp_ccdc_unregister_entities(&isp->isp_ccdc);
1801 omap3isp_preview_unregister_entities(&isp->isp_prev);
1802 omap3isp_resizer_unregister_entities(&isp->isp_res);
1803 omap3isp_stat_unregister_entities(&isp->isp_aewb);
1804 omap3isp_stat_unregister_entities(&isp->isp_af);
1805 omap3isp_stat_unregister_entities(&isp->isp_hist);
1806
1807 v4l2_device_unregister(&isp->v4l2_dev);
1808 media_device_unregister(&isp->media_dev);
1809 }
1810
1811 /*
1812 * isp_register_subdev_group - Register a group of subdevices
1813 * @isp: OMAP3 ISP device
1814 * @board_info: I2C subdevs board information array
1815 *
1816 * Register all I2C subdevices in the board_info array. The array must be
1817 * terminated by a NULL entry, and the first entry must be the sensor.
1818 *
1819 * Return a pointer to the sensor media entity if it has been successfully
1820 * registered, or NULL otherwise.
1821 */
1822 static struct v4l2_subdev *
1823 isp_register_subdev_group(struct isp_device *isp,
1824 struct isp_subdev_i2c_board_info *board_info)
1825 {
1826 struct v4l2_subdev *sensor = NULL;
1827 unsigned int first;
1828
1829 if (board_info->board_info == NULL)
1830 return NULL;
1831
1832 for (first = 1; board_info->board_info; ++board_info, first = 0) {
1833 struct v4l2_subdev *subdev;
1834 struct i2c_adapter *adapter;
1835
1836 adapter = i2c_get_adapter(board_info->i2c_adapter_id);
1837 if (adapter == NULL) {
1838 dev_err(isp->dev, "%s: Unable to get I2C adapter %d for "
1839 "device %s\n", __func__,
1840 board_info->i2c_adapter_id,
1841 board_info->board_info->type);
1842 continue;
1843 }
1844
1845 subdev = v4l2_i2c_new_subdev_board(&isp->v4l2_dev, adapter,
1846 board_info->board_info, NULL);
1847 if (subdev == NULL) {
1848 dev_err(isp->dev, "%s: Unable to register subdev %s\n",
1849 __func__, board_info->board_info->type);
1850 continue;
1851 }
1852
1853 if (first)
1854 sensor = subdev;
1855 }
1856
1857 return sensor;
1858 }
1859
1860 static int isp_link_entity(
1861 struct isp_device *isp, struct media_entity *entity,
1862 enum isp_interface_type interface)
1863 {
1864 struct media_entity *input;
1865 unsigned int flags;
1866 unsigned int pad;
1867 unsigned int i;
1868
1869 /* Connect the sensor to the correct interface module.
1870 * Parallel sensors are connected directly to the CCDC, while
1871 * serial sensors are connected to the CSI2a, CCP2b or CSI2c
1872 * receiver through CSIPHY1 or CSIPHY2.
1873 */
1874 switch (interface) {
1875 case ISP_INTERFACE_PARALLEL:
1876 input = &isp->isp_ccdc.subdev.entity;
1877 pad = CCDC_PAD_SINK;
1878 flags = 0;
1879 break;
1880
1881 case ISP_INTERFACE_CSI2A_PHY2:
1882 input = &isp->isp_csi2a.subdev.entity;
1883 pad = CSI2_PAD_SINK;
1884 flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED;
1885 break;
1886
1887 case ISP_INTERFACE_CCP2B_PHY1:
1888 case ISP_INTERFACE_CCP2B_PHY2:
1889 input = &isp->isp_ccp2.subdev.entity;
1890 pad = CCP2_PAD_SINK;
1891 flags = 0;
1892 break;
1893
1894 case ISP_INTERFACE_CSI2C_PHY1:
1895 input = &isp->isp_csi2c.subdev.entity;
1896 pad = CSI2_PAD_SINK;
1897 flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED;
1898 break;
1899
1900 default:
1901 dev_err(isp->dev, "%s: invalid interface type %u\n", __func__,
1902 interface);
1903 return -EINVAL;
1904 }
1905
1906 /*
1907 * Not all interfaces are available on all revisions of the
1908 * ISP. The sub-devices of those interfaces aren't initialised
1909 * in such a case. Check this by ensuring the num_pads is
1910 * non-zero.
1911 */
1912 if (!input->num_pads) {
1913 dev_err(isp->dev, "%s: invalid input %u\n", entity->name,
1914 interface);
1915 return -EINVAL;
1916 }
1917
1918 for (i = 0; i < entity->num_pads; i++) {
1919 if (entity->pads[i].flags & MEDIA_PAD_FL_SOURCE)
1920 break;
1921 }
1922 if (i == entity->num_pads) {
1923 dev_err(isp->dev, "%s: no source pad in external entity\n",
1924 __func__);
1925 return -EINVAL;
1926 }
1927
1928 return media_entity_create_link(entity, i, input, pad, flags);
1929 }
1930
1931 static int isp_register_entities(struct isp_device *isp)
1932 {
1933 struct isp_platform_data *pdata = isp->pdata;
1934 struct isp_v4l2_subdevs_group *subdevs;
1935 int ret;
1936
1937 isp->media_dev.dev = isp->dev;
1938 strlcpy(isp->media_dev.model, "TI OMAP3 ISP",
1939 sizeof(isp->media_dev.model));
1940 isp->media_dev.hw_revision = isp->revision;
1941 isp->media_dev.link_notify = isp_pipeline_link_notify;
1942 ret = media_device_register(&isp->media_dev);
1943 if (ret < 0) {
1944 dev_err(isp->dev, "%s: Media device registration failed (%d)\n",
1945 __func__, ret);
1946 return ret;
1947 }
1948
1949 isp->v4l2_dev.mdev = &isp->media_dev;
1950 ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
1951 if (ret < 0) {
1952 dev_err(isp->dev, "%s: V4L2 device registration failed (%d)\n",
1953 __func__, ret);
1954 goto done;
1955 }
1956
1957 /* Register internal entities */
1958 ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev);
1959 if (ret < 0)
1960 goto done;
1961
1962 ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev);
1963 if (ret < 0)
1964 goto done;
1965
1966 ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev);
1967 if (ret < 0)
1968 goto done;
1969
1970 ret = omap3isp_preview_register_entities(&isp->isp_prev,
1971 &isp->v4l2_dev);
1972 if (ret < 0)
1973 goto done;
1974
1975 ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev);
1976 if (ret < 0)
1977 goto done;
1978
1979 ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev);
1980 if (ret < 0)
1981 goto done;
1982
1983 ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev);
1984 if (ret < 0)
1985 goto done;
1986
1987 ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev);
1988 if (ret < 0)
1989 goto done;
1990
1991 /* Register external entities */
1992 for (subdevs = pdata ? pdata->subdevs : NULL;
1993 subdevs && subdevs->subdevs; ++subdevs) {
1994 struct v4l2_subdev *sensor;
1995
1996 sensor = isp_register_subdev_group(isp, subdevs->subdevs);
1997 if (sensor == NULL)
1998 continue;
1999
2000 sensor->host_priv = subdevs;
2001
2002 ret = isp_link_entity(isp, &sensor->entity, subdevs->interface);
2003 if (ret < 0)
2004 goto done;
2005 }
2006
2007 ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
2008
2009 done:
2010 if (ret < 0)
2011 isp_unregister_entities(isp);
2012
2013 return ret;
2014 }
2015
2016 static void isp_cleanup_modules(struct isp_device *isp)
2017 {
2018 omap3isp_h3a_aewb_cleanup(isp);
2019 omap3isp_h3a_af_cleanup(isp);
2020 omap3isp_hist_cleanup(isp);
2021 omap3isp_resizer_cleanup(isp);
2022 omap3isp_preview_cleanup(isp);
2023 omap3isp_ccdc_cleanup(isp);
2024 omap3isp_ccp2_cleanup(isp);
2025 omap3isp_csi2_cleanup(isp);
2026 }
2027
2028 static int isp_initialize_modules(struct isp_device *isp)
2029 {
2030 int ret;
2031
2032 ret = omap3isp_csiphy_init(isp);
2033 if (ret < 0) {
2034 dev_err(isp->dev, "CSI PHY initialization failed\n");
2035 goto error_csiphy;
2036 }
2037
2038 ret = omap3isp_csi2_init(isp);
2039 if (ret < 0) {
2040 dev_err(isp->dev, "CSI2 initialization failed\n");
2041 goto error_csi2;
2042 }
2043
2044 ret = omap3isp_ccp2_init(isp);
2045 if (ret < 0) {
2046 dev_err(isp->dev, "CCP2 initialization failed\n");
2047 goto error_ccp2;
2048 }
2049
2050 ret = omap3isp_ccdc_init(isp);
2051 if (ret < 0) {
2052 dev_err(isp->dev, "CCDC initialization failed\n");
2053 goto error_ccdc;
2054 }
2055
2056 ret = omap3isp_preview_init(isp);
2057 if (ret < 0) {
2058 dev_err(isp->dev, "Preview initialization failed\n");
2059 goto error_preview;
2060 }
2061
2062 ret = omap3isp_resizer_init(isp);
2063 if (ret < 0) {
2064 dev_err(isp->dev, "Resizer initialization failed\n");
2065 goto error_resizer;
2066 }
2067
2068 ret = omap3isp_hist_init(isp);
2069 if (ret < 0) {
2070 dev_err(isp->dev, "Histogram initialization failed\n");
2071 goto error_hist;
2072 }
2073
2074 ret = omap3isp_h3a_aewb_init(isp);
2075 if (ret < 0) {
2076 dev_err(isp->dev, "H3A AEWB initialization failed\n");
2077 goto error_h3a_aewb;
2078 }
2079
2080 ret = omap3isp_h3a_af_init(isp);
2081 if (ret < 0) {
2082 dev_err(isp->dev, "H3A AF initialization failed\n");
2083 goto error_h3a_af;
2084 }
2085
2086 /* Connect the submodules. */
2087 ret = media_entity_create_link(
2088 &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
2089 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
2090 if (ret < 0)
2091 goto error_link;
2092
2093 ret = media_entity_create_link(
2094 &isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE,
2095 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
2096 if (ret < 0)
2097 goto error_link;
2098
2099 ret = media_entity_create_link(
2100 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2101 &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
2102 if (ret < 0)
2103 goto error_link;
2104
2105 ret = media_entity_create_link(
2106 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
2107 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
2108 if (ret < 0)
2109 goto error_link;
2110
2111 ret = media_entity_create_link(
2112 &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
2113 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
2114 if (ret < 0)
2115 goto error_link;
2116
2117 ret = media_entity_create_link(
2118 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2119 &isp->isp_aewb.subdev.entity, 0,
2120 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
2121 if (ret < 0)
2122 goto error_link;
2123
2124 ret = media_entity_create_link(
2125 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2126 &isp->isp_af.subdev.entity, 0,
2127 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
2128 if (ret < 0)
2129 goto error_link;
2130
2131 ret = media_entity_create_link(
2132 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2133 &isp->isp_hist.subdev.entity, 0,
2134 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
2135 if (ret < 0)
2136 goto error_link;
2137
2138 return 0;
2139
2140 error_link:
2141 omap3isp_h3a_af_cleanup(isp);
2142 error_h3a_af:
2143 omap3isp_h3a_aewb_cleanup(isp);
2144 error_h3a_aewb:
2145 omap3isp_hist_cleanup(isp);
2146 error_hist:
2147 omap3isp_resizer_cleanup(isp);
2148 error_resizer:
2149 omap3isp_preview_cleanup(isp);
2150 error_preview:
2151 omap3isp_ccdc_cleanup(isp);
2152 error_ccdc:
2153 omap3isp_ccp2_cleanup(isp);
2154 error_ccp2:
2155 omap3isp_csi2_cleanup(isp);
2156 error_csi2:
2157 error_csiphy:
2158 return ret;
2159 }
2160
2161 static void isp_detach_iommu(struct isp_device *isp)
2162 {
2163 arm_iommu_release_mapping(isp->mapping);
2164 isp->mapping = NULL;
2165 iommu_group_remove_device(isp->dev);
2166 }
2167
2168 static int isp_attach_iommu(struct isp_device *isp)
2169 {
2170 struct dma_iommu_mapping *mapping;
2171 struct iommu_group *group;
2172 int ret;
2173
2174 /* Create a device group and add the device to it. */
2175 group = iommu_group_alloc();
2176 if (IS_ERR(group)) {
2177 dev_err(isp->dev, "failed to allocate IOMMU group\n");
2178 return PTR_ERR(group);
2179 }
2180
2181 ret = iommu_group_add_device(group, isp->dev);
2182 iommu_group_put(group);
2183
2184 if (ret < 0) {
2185 dev_err(isp->dev, "failed to add device to IPMMU group\n");
2186 return ret;
2187 }
2188
2189 /*
2190 * Create the ARM mapping, used by the ARM DMA mapping core to allocate
2191 * VAs. This will allocate a corresponding IOMMU domain.
2192 */
2193 mapping = arm_iommu_create_mapping(&platform_bus_type, SZ_1G, SZ_2G);
2194 if (IS_ERR(mapping)) {
2195 dev_err(isp->dev, "failed to create ARM IOMMU mapping\n");
2196 ret = PTR_ERR(mapping);
2197 goto error;
2198 }
2199
2200 isp->mapping = mapping;
2201
2202 /* Attach the ARM VA mapping to the device. */
2203 ret = arm_iommu_attach_device(isp->dev, mapping);
2204 if (ret < 0) {
2205 dev_err(isp->dev, "failed to attach device to VA mapping\n");
2206 goto error;
2207 }
2208
2209 return 0;
2210
2211 error:
2212 isp_detach_iommu(isp);
2213 return ret;
2214 }
2215
2216 /*
2217 * isp_remove - Remove ISP platform device
2218 * @pdev: Pointer to ISP platform device
2219 *
2220 * Always returns 0.
2221 */
2222 static int isp_remove(struct platform_device *pdev)
2223 {
2224 struct isp_device *isp = platform_get_drvdata(pdev);
2225
2226 isp_unregister_entities(isp);
2227 isp_cleanup_modules(isp);
2228 isp_xclk_cleanup(isp);
2229
2230 __omap3isp_get(isp, false);
2231 isp_detach_iommu(isp);
2232 __omap3isp_put(isp, false);
2233
2234 return 0;
2235 }
2236
2237 static int isp_map_mem_resource(struct platform_device *pdev,
2238 struct isp_device *isp,
2239 enum isp_mem_resources res)
2240 {
2241 struct resource *mem;
2242
2243 /* request the mem region for the camera registers */
2244
2245 mem = platform_get_resource(pdev, IORESOURCE_MEM, res);
2246
2247 /* map the region */
2248 isp->mmio_base[res] = devm_ioremap_resource(isp->dev, mem);
2249 if (IS_ERR(isp->mmio_base[res]))
2250 return PTR_ERR(isp->mmio_base[res]);
2251
2252 isp->mmio_base_phys[res] = mem->start;
2253
2254 return 0;
2255 }
2256
2257 /*
2258 * isp_probe - Probe ISP platform device
2259 * @pdev: Pointer to ISP platform device
2260 *
2261 * Returns 0 if successful,
2262 * -ENOMEM if no memory available,
2263 * -ENODEV if no platform device resources found
2264 * or no space for remapping registers,
2265 * -EINVAL if couldn't install ISR,
2266 * or clk_get return error value.
2267 */
2268 static int isp_probe(struct platform_device *pdev)
2269 {
2270 struct isp_platform_data *pdata = pdev->dev.platform_data;
2271 struct isp_device *isp;
2272 int ret;
2273 int i, m;
2274
2275 isp = devm_kzalloc(&pdev->dev, sizeof(*isp), GFP_KERNEL);
2276 if (!isp) {
2277 dev_err(&pdev->dev, "could not allocate memory\n");
2278 return -ENOMEM;
2279 }
2280
2281 isp->autoidle = autoidle;
2282
2283 mutex_init(&isp->isp_mutex);
2284 spin_lock_init(&isp->stat_lock);
2285
2286 isp->dev = &pdev->dev;
2287 isp->pdata = pdata;
2288 isp->ref_count = 0;
2289
2290 ret = dma_coerce_mask_and_coherent(isp->dev, DMA_BIT_MASK(32));
2291 if (ret)
2292 goto error;
2293
2294 platform_set_drvdata(pdev, isp);
2295
2296 /* Regulators */
2297 isp->isp_csiphy1.vdd = devm_regulator_get(&pdev->dev, "VDD_CSIPHY1");
2298 isp->isp_csiphy2.vdd = devm_regulator_get(&pdev->dev, "VDD_CSIPHY2");
2299
2300 /* Clocks
2301 *
2302 * The ISP clock tree is revision-dependent. We thus need to enable ICLK
2303 * manually to read the revision before calling __omap3isp_get().
2304 */
2305 ret = isp_map_mem_resource(pdev, isp, OMAP3_ISP_IOMEM_MAIN);
2306 if (ret < 0)
2307 goto error;
2308
2309 ret = isp_get_clocks(isp);
2310 if (ret < 0)
2311 goto error;
2312
2313 ret = clk_enable(isp->clock[ISP_CLK_CAM_ICK]);
2314 if (ret < 0)
2315 goto error;
2316
2317 isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
2318 dev_info(isp->dev, "Revision %d.%d found\n",
2319 (isp->revision & 0xf0) >> 4, isp->revision & 0x0f);
2320
2321 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
2322
2323 if (__omap3isp_get(isp, false) == NULL) {
2324 ret = -ENODEV;
2325 goto error;
2326 }
2327
2328 ret = isp_reset(isp);
2329 if (ret < 0)
2330 goto error_isp;
2331
2332 ret = isp_xclk_init(isp);
2333 if (ret < 0)
2334 goto error_isp;
2335
2336 /* Memory resources */
2337 for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
2338 if (isp->revision == isp_res_maps[m].isp_rev)
2339 break;
2340
2341 if (m == ARRAY_SIZE(isp_res_maps)) {
2342 dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n",
2343 (isp->revision & 0xf0) >> 4, isp->revision & 0xf);
2344 ret = -ENODEV;
2345 goto error_isp;
2346 }
2347
2348 for (i = 1; i < OMAP3_ISP_IOMEM_LAST; i++) {
2349 if (isp_res_maps[m].map & 1 << i) {
2350 ret = isp_map_mem_resource(pdev, isp, i);
2351 if (ret)
2352 goto error_isp;
2353 }
2354 }
2355
2356 /* IOMMU */
2357 ret = isp_attach_iommu(isp);
2358 if (ret < 0) {
2359 dev_err(&pdev->dev, "unable to attach to IOMMU\n");
2360 goto error_isp;
2361 }
2362
2363 /* Interrupt */
2364 isp->irq_num = platform_get_irq(pdev, 0);
2365 if (isp->irq_num <= 0) {
2366 dev_err(isp->dev, "No IRQ resource\n");
2367 ret = -ENODEV;
2368 goto error_iommu;
2369 }
2370
2371 if (devm_request_irq(isp->dev, isp->irq_num, isp_isr, IRQF_SHARED,
2372 "OMAP3 ISP", isp)) {
2373 dev_err(isp->dev, "Unable to request IRQ\n");
2374 ret = -EINVAL;
2375 goto error_iommu;
2376 }
2377
2378 /* Entities */
2379 ret = isp_initialize_modules(isp);
2380 if (ret < 0)
2381 goto error_iommu;
2382
2383 ret = isp_register_entities(isp);
2384 if (ret < 0)
2385 goto error_modules;
2386
2387 isp_core_init(isp, 1);
2388 omap3isp_put(isp);
2389
2390 return 0;
2391
2392 error_modules:
2393 isp_cleanup_modules(isp);
2394 error_iommu:
2395 isp_detach_iommu(isp);
2396 error_isp:
2397 isp_xclk_cleanup(isp);
2398 __omap3isp_put(isp, false);
2399 error:
2400 mutex_destroy(&isp->isp_mutex);
2401
2402 return ret;
2403 }
2404
2405 static const struct dev_pm_ops omap3isp_pm_ops = {
2406 .prepare = isp_pm_prepare,
2407 .suspend = isp_pm_suspend,
2408 .resume = isp_pm_resume,
2409 .complete = isp_pm_complete,
2410 };
2411
2412 static struct platform_device_id omap3isp_id_table[] = {
2413 { "omap3isp", 0 },
2414 { },
2415 };
2416 MODULE_DEVICE_TABLE(platform, omap3isp_id_table);
2417
2418 static struct platform_driver omap3isp_driver = {
2419 .probe = isp_probe,
2420 .remove = isp_remove,
2421 .id_table = omap3isp_id_table,
2422 .driver = {
2423 .name = "omap3isp",
2424 .pm = &omap3isp_pm_ops,
2425 },
2426 };
2427
2428 module_platform_driver(omap3isp_driver);
2429
2430 MODULE_AUTHOR("Nokia Corporation");
2431 MODULE_DESCRIPTION("TI OMAP3 ISP driver");
2432 MODULE_LICENSE("GPL");
2433 MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION);
Linux kernel - Deliverables
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