V4L/DVB (11767): cx23885: Add preliminary support for the HVR1270
[deliverable/linux.git] / drivers / media / video / cx23885 / cx23885-cards.c
1 /*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22 #include <linux/init.h>
23 #include <linux/module.h>
24 #include <linux/pci.h>
25 #include <linux/delay.h>
26 #include <media/cx25840.h>
27
28 #include "cx23885.h"
29 #include "tuner-xc2028.h"
30 #include "netup-init.h"
31
32 /* ------------------------------------------------------------------ */
33 /* board config info */
34
35 struct cx23885_board cx23885_boards[] = {
36 [CX23885_BOARD_UNKNOWN] = {
37 .name = "UNKNOWN/GENERIC",
38 /* Ensure safe default for unknown boards */
39 .clk_freq = 0,
40 .input = {{
41 .type = CX23885_VMUX_COMPOSITE1,
42 .vmux = 0,
43 }, {
44 .type = CX23885_VMUX_COMPOSITE2,
45 .vmux = 1,
46 }, {
47 .type = CX23885_VMUX_COMPOSITE3,
48 .vmux = 2,
49 }, {
50 .type = CX23885_VMUX_COMPOSITE4,
51 .vmux = 3,
52 } },
53 },
54 [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
55 .name = "Hauppauge WinTV-HVR1800lp",
56 .portc = CX23885_MPEG_DVB,
57 .input = {{
58 .type = CX23885_VMUX_TELEVISION,
59 .vmux = 0,
60 .gpio0 = 0xff00,
61 }, {
62 .type = CX23885_VMUX_DEBUG,
63 .vmux = 0,
64 .gpio0 = 0xff01,
65 }, {
66 .type = CX23885_VMUX_COMPOSITE1,
67 .vmux = 1,
68 .gpio0 = 0xff02,
69 }, {
70 .type = CX23885_VMUX_SVIDEO,
71 .vmux = 2,
72 .gpio0 = 0xff02,
73 } },
74 },
75 [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
76 .name = "Hauppauge WinTV-HVR1800",
77 .porta = CX23885_ANALOG_VIDEO,
78 .portb = CX23885_MPEG_ENCODER,
79 .portc = CX23885_MPEG_DVB,
80 .tuner_type = TUNER_PHILIPS_TDA8290,
81 .tuner_addr = 0x42, /* 0x84 >> 1 */
82 .input = {{
83 .type = CX23885_VMUX_TELEVISION,
84 .vmux = CX25840_VIN7_CH3 |
85 CX25840_VIN5_CH2 |
86 CX25840_VIN2_CH1,
87 .gpio0 = 0,
88 }, {
89 .type = CX23885_VMUX_COMPOSITE1,
90 .vmux = CX25840_VIN7_CH3 |
91 CX25840_VIN4_CH2 |
92 CX25840_VIN6_CH1,
93 .gpio0 = 0,
94 }, {
95 .type = CX23885_VMUX_SVIDEO,
96 .vmux = CX25840_VIN7_CH3 |
97 CX25840_VIN4_CH2 |
98 CX25840_VIN8_CH1 |
99 CX25840_SVIDEO_ON,
100 .gpio0 = 0,
101 } },
102 },
103 [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
104 .name = "Hauppauge WinTV-HVR1250",
105 .portc = CX23885_MPEG_DVB,
106 .input = {{
107 .type = CX23885_VMUX_TELEVISION,
108 .vmux = 0,
109 .gpio0 = 0xff00,
110 }, {
111 .type = CX23885_VMUX_DEBUG,
112 .vmux = 0,
113 .gpio0 = 0xff01,
114 }, {
115 .type = CX23885_VMUX_COMPOSITE1,
116 .vmux = 1,
117 .gpio0 = 0xff02,
118 }, {
119 .type = CX23885_VMUX_SVIDEO,
120 .vmux = 2,
121 .gpio0 = 0xff02,
122 } },
123 },
124 [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
125 .name = "DViCO FusionHDTV5 Express",
126 .portb = CX23885_MPEG_DVB,
127 },
128 [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
129 .name = "Hauppauge WinTV-HVR1500Q",
130 .portc = CX23885_MPEG_DVB,
131 },
132 [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
133 .name = "Hauppauge WinTV-HVR1500",
134 .portc = CX23885_MPEG_DVB,
135 },
136 [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
137 .name = "Hauppauge WinTV-HVR1200",
138 .portc = CX23885_MPEG_DVB,
139 },
140 [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
141 .name = "Hauppauge WinTV-HVR1700",
142 .portc = CX23885_MPEG_DVB,
143 },
144 [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
145 .name = "Hauppauge WinTV-HVR1400",
146 .portc = CX23885_MPEG_DVB,
147 },
148 [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
149 .name = "DViCO FusionHDTV7 Dual Express",
150 .portb = CX23885_MPEG_DVB,
151 .portc = CX23885_MPEG_DVB,
152 },
153 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
154 .name = "DViCO FusionHDTV DVB-T Dual Express",
155 .portb = CX23885_MPEG_DVB,
156 .portc = CX23885_MPEG_DVB,
157 },
158 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
159 .name = "Leadtek Winfast PxDVR3200 H",
160 .portc = CX23885_MPEG_DVB,
161 },
162 [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
163 .name = "Compro VideoMate E650F",
164 .portc = CX23885_MPEG_DVB,
165 },
166 [CX23885_BOARD_TBS_6920] = {
167 .name = "TurboSight TBS 6920",
168 .portb = CX23885_MPEG_DVB,
169 },
170 [CX23885_BOARD_TEVII_S470] = {
171 .name = "TeVii S470",
172 .portb = CX23885_MPEG_DVB,
173 },
174 [CX23885_BOARD_DVBWORLD_2005] = {
175 .name = "DVBWorld DVB-S2 2005",
176 .portb = CX23885_MPEG_DVB,
177 },
178 [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
179 .cimax = 1,
180 .name = "NetUP Dual DVB-S2 CI",
181 .portb = CX23885_MPEG_DVB,
182 .portc = CX23885_MPEG_DVB,
183 },
184 [CX23885_BOARD_HAUPPAUGE_HVR1270] = {
185 .name = "Hauppauge WinTV-HVR1270",
186 },
187 };
188 const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
189
190 /* ------------------------------------------------------------------ */
191 /* PCI subsystem IDs */
192
193 struct cx23885_subid cx23885_subids[] = {
194 {
195 .subvendor = 0x0070,
196 .subdevice = 0x3400,
197 .card = CX23885_BOARD_UNKNOWN,
198 }, {
199 .subvendor = 0x0070,
200 .subdevice = 0x7600,
201 .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
202 }, {
203 .subvendor = 0x0070,
204 .subdevice = 0x7800,
205 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
206 }, {
207 .subvendor = 0x0070,
208 .subdevice = 0x7801,
209 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
210 }, {
211 .subvendor = 0x0070,
212 .subdevice = 0x7809,
213 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
214 }, {
215 .subvendor = 0x0070,
216 .subdevice = 0x7911,
217 .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
218 }, {
219 .subvendor = 0x18ac,
220 .subdevice = 0xd500,
221 .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
222 }, {
223 .subvendor = 0x0070,
224 .subdevice = 0x7790,
225 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
226 }, {
227 .subvendor = 0x0070,
228 .subdevice = 0x7797,
229 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
230 }, {
231 .subvendor = 0x0070,
232 .subdevice = 0x7710,
233 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
234 }, {
235 .subvendor = 0x0070,
236 .subdevice = 0x7717,
237 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
238 }, {
239 .subvendor = 0x0070,
240 .subdevice = 0x71d1,
241 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
242 }, {
243 .subvendor = 0x0070,
244 .subdevice = 0x71d3,
245 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
246 }, {
247 .subvendor = 0x0070,
248 .subdevice = 0x8101,
249 .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
250 }, {
251 .subvendor = 0x0070,
252 .subdevice = 0x8010,
253 .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
254 }, {
255 .subvendor = 0x18ac,
256 .subdevice = 0xd618,
257 .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
258 }, {
259 .subvendor = 0x18ac,
260 .subdevice = 0xdb78,
261 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
262 }, {
263 .subvendor = 0x107d,
264 .subdevice = 0x6681,
265 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
266 }, {
267 .subvendor = 0x185b,
268 .subdevice = 0xe800,
269 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
270 }, {
271 .subvendor = 0x6920,
272 .subdevice = 0x8888,
273 .card = CX23885_BOARD_TBS_6920,
274 }, {
275 .subvendor = 0xd470,
276 .subdevice = 0x9022,
277 .card = CX23885_BOARD_TEVII_S470,
278 }, {
279 .subvendor = 0x0001,
280 .subdevice = 0x2005,
281 .card = CX23885_BOARD_DVBWORLD_2005,
282 }, {
283 .subvendor = 0x1b55,
284 .subdevice = 0x2a2c,
285 .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
286 }, {
287 .subvendor = 0x0070,
288 .subdevice = 0x2211,
289 .card = CX23885_BOARD_HAUPPAUGE_HVR1270,
290 },
291 };
292 const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
293
294 void cx23885_card_list(struct cx23885_dev *dev)
295 {
296 int i;
297
298 if (0 == dev->pci->subsystem_vendor &&
299 0 == dev->pci->subsystem_device) {
300 printk(KERN_INFO
301 "%s: Board has no valid PCIe Subsystem ID and can't\n"
302 "%s: be autodetected. Pass card=<n> insmod option\n"
303 "%s: to workaround that. Redirect complaints to the\n"
304 "%s: vendor of the TV card. Best regards,\n"
305 "%s: -- tux\n",
306 dev->name, dev->name, dev->name, dev->name, dev->name);
307 } else {
308 printk(KERN_INFO
309 "%s: Your board isn't known (yet) to the driver.\n"
310 "%s: Try to pick one of the existing card configs via\n"
311 "%s: card=<n> insmod option. Updating to the latest\n"
312 "%s: version might help as well.\n",
313 dev->name, dev->name, dev->name, dev->name);
314 }
315 printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
316 dev->name);
317 for (i = 0; i < cx23885_bcount; i++)
318 printk(KERN_INFO "%s: card=%d -> %s\n",
319 dev->name, i, cx23885_boards[i].name);
320 }
321
322 static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
323 {
324 struct tveeprom tv;
325
326 tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
327 eeprom_data);
328
329 /* Make sure we support the board model */
330 switch (tv.model) {
331 case 71009:
332 /* WinTV-HVR1200 (PCIe, Retail, full height)
333 * DVB-T and basic analog */
334 case 71359:
335 /* WinTV-HVR1200 (PCIe, OEM, half height)
336 * DVB-T and basic analog */
337 case 71439:
338 /* WinTV-HVR1200 (PCIe, OEM, half height)
339 * DVB-T and basic analog */
340 case 71449:
341 /* WinTV-HVR1200 (PCIe, OEM, full height)
342 * DVB-T and basic analog */
343 case 71939:
344 /* WinTV-HVR1200 (PCIe, OEM, half height)
345 * DVB-T and basic analog */
346 case 71949:
347 /* WinTV-HVR1200 (PCIe, OEM, full height)
348 * DVB-T and basic analog */
349 case 71959:
350 /* WinTV-HVR1200 (PCIe, OEM, full height)
351 * DVB-T and basic analog */
352 case 71979:
353 /* WinTV-HVR1200 (PCIe, OEM, half height)
354 * DVB-T and basic analog */
355 case 71999:
356 /* WinTV-HVR1200 (PCIe, OEM, full height)
357 * DVB-T and basic analog */
358 case 76601:
359 /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
360 channel ATSC and MPEG2 HW Encoder */
361 case 77001:
362 /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
363 and Basic analog */
364 case 77011:
365 /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
366 and Basic analog */
367 case 77041:
368 /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
369 and Basic analog */
370 case 77051:
371 /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
372 and Basic analog */
373 case 78011:
374 /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
375 Dual channel ATSC and MPEG2 HW Encoder */
376 case 78501:
377 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
378 Dual channel ATSC and MPEG2 HW Encoder */
379 case 78521:
380 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
381 Dual channel ATSC and MPEG2 HW Encoder */
382 case 78531:
383 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
384 Dual channel ATSC and MPEG2 HW Encoder */
385 case 78631:
386 /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
387 Dual channel ATSC and MPEG2 HW Encoder */
388 case 79001:
389 /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
390 ATSC and Basic analog */
391 case 79101:
392 /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
393 ATSC and Basic analog */
394 case 79561:
395 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
396 ATSC and Basic analog */
397 case 79571:
398 /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
399 ATSC and Basic analog */
400 case 79671:
401 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
402 ATSC and Basic analog */
403 case 80019:
404 /* WinTV-HVR1400 (Express Card, Retail, IR,
405 * DVB-T and Basic analog */
406 case 81509:
407 /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
408 * DVB-T and MPEG2 HW Encoder */
409 case 81519:
410 /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
411 * DVB-T and MPEG2 HW Encoder */
412 break;
413 default:
414 printk(KERN_WARNING "%s: warning: unknown hauppauge model #%d\n",
415 dev->name, tv.model);
416 break;
417 }
418
419 printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
420 dev->name, tv.model);
421 }
422
423 int cx23885_tuner_callback(void *priv, int component, int command, int arg)
424 {
425 struct cx23885_tsport *port = priv;
426 struct cx23885_dev *dev = port->dev;
427 u32 bitmask = 0;
428
429 if (command == XC2028_RESET_CLK)
430 return 0;
431
432 if (command != 0) {
433 printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
434 __func__, command);
435 return -EINVAL;
436 }
437
438 switch (dev->board) {
439 case CX23885_BOARD_HAUPPAUGE_HVR1400:
440 case CX23885_BOARD_HAUPPAUGE_HVR1500:
441 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
442 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
443 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
444 /* Tuner Reset Command */
445 bitmask = 0x04;
446 break;
447 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
448 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
449 /* Two identical tuners on two different i2c buses,
450 * we need to reset the correct gpio. */
451 if (port->nr == 1)
452 bitmask = 0x01;
453 else if (port->nr == 2)
454 bitmask = 0x04;
455 break;
456 }
457
458 if (bitmask) {
459 /* Drive the tuner into reset and back out */
460 cx_clear(GP0_IO, bitmask);
461 mdelay(200);
462 cx_set(GP0_IO, bitmask);
463 }
464
465 return 0;
466 }
467
468 void cx23885_gpio_setup(struct cx23885_dev *dev)
469 {
470 switch (dev->board) {
471 case CX23885_BOARD_HAUPPAUGE_HVR1250:
472 /* GPIO-0 cx24227 demodulator reset */
473 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
474 break;
475 case CX23885_BOARD_HAUPPAUGE_HVR1500:
476 /* GPIO-0 cx24227 demodulator */
477 /* GPIO-2 xc3028 tuner */
478
479 /* Put the parts into reset */
480 cx_set(GP0_IO, 0x00050000);
481 cx_clear(GP0_IO, 0x00000005);
482 msleep(5);
483
484 /* Bring the parts out of reset */
485 cx_set(GP0_IO, 0x00050005);
486 break;
487 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
488 /* GPIO-0 cx24227 demodulator reset */
489 /* GPIO-2 xc5000 tuner reset */
490 cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
491 break;
492 case CX23885_BOARD_HAUPPAUGE_HVR1800:
493 /* GPIO-0 656_CLK */
494 /* GPIO-1 656_D0 */
495 /* GPIO-2 8295A Reset */
496 /* GPIO-3-10 cx23417 data0-7 */
497 /* GPIO-11-14 cx23417 addr0-3 */
498 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
499 /* GPIO-19 IR_RX */
500
501 /* CX23417 GPIO's */
502 /* EIO15 Zilog Reset */
503 /* EIO14 S5H1409/CX24227 Reset */
504
505 /* Force the TDA8295A into reset and back */
506 cx_set(GP0_IO, 0x00040004);
507 mdelay(20);
508 cx_clear(GP0_IO, 0x00000004);
509 mdelay(20);
510 cx_set(GP0_IO, 0x00040004);
511 mdelay(20);
512 break;
513 case CX23885_BOARD_HAUPPAUGE_HVR1200:
514 /* GPIO-0 tda10048 demodulator reset */
515 /* GPIO-2 tda18271 tuner reset */
516
517 /* Put the parts into reset and back */
518 cx_set(GP0_IO, 0x00050000);
519 mdelay(20);
520 cx_clear(GP0_IO, 0x00000005);
521 mdelay(20);
522 cx_set(GP0_IO, 0x00050005);
523 break;
524 case CX23885_BOARD_HAUPPAUGE_HVR1700:
525 /* GPIO-0 TDA10048 demodulator reset */
526 /* GPIO-2 TDA8295A Reset */
527 /* GPIO-3-10 cx23417 data0-7 */
528 /* GPIO-11-14 cx23417 addr0-3 */
529 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
530
531 /* The following GPIO's are on the interna AVCore (cx25840) */
532 /* GPIO-19 IR_RX */
533 /* GPIO-20 IR_TX 416/DVBT Select */
534 /* GPIO-21 IIS DAT */
535 /* GPIO-22 IIS WCLK */
536 /* GPIO-23 IIS BCLK */
537
538 /* Put the parts into reset and back */
539 cx_set(GP0_IO, 0x00050000);
540 mdelay(20);
541 cx_clear(GP0_IO, 0x00000005);
542 mdelay(20);
543 cx_set(GP0_IO, 0x00050005);
544 break;
545 case CX23885_BOARD_HAUPPAUGE_HVR1400:
546 /* GPIO-0 Dibcom7000p demodulator reset */
547 /* GPIO-2 xc3028L tuner reset */
548 /* GPIO-13 LED */
549
550 /* Put the parts into reset and back */
551 cx_set(GP0_IO, 0x00050000);
552 mdelay(20);
553 cx_clear(GP0_IO, 0x00000005);
554 mdelay(20);
555 cx_set(GP0_IO, 0x00050005);
556 break;
557 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
558 /* GPIO-0 xc5000 tuner reset i2c bus 0 */
559 /* GPIO-1 s5h1409 demod reset i2c bus 0 */
560 /* GPIO-2 xc5000 tuner reset i2c bus 1 */
561 /* GPIO-3 s5h1409 demod reset i2c bus 0 */
562
563 /* Put the parts into reset and back */
564 cx_set(GP0_IO, 0x000f0000);
565 mdelay(20);
566 cx_clear(GP0_IO, 0x0000000f);
567 mdelay(20);
568 cx_set(GP0_IO, 0x000f000f);
569 break;
570 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
571 /* GPIO-0 portb xc3028 reset */
572 /* GPIO-1 portb zl10353 reset */
573 /* GPIO-2 portc xc3028 reset */
574 /* GPIO-3 portc zl10353 reset */
575
576 /* Put the parts into reset and back */
577 cx_set(GP0_IO, 0x000f0000);
578 mdelay(20);
579 cx_clear(GP0_IO, 0x0000000f);
580 mdelay(20);
581 cx_set(GP0_IO, 0x000f000f);
582 break;
583 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
584 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
585 /* GPIO-2 xc3028 tuner reset */
586
587 /* The following GPIO's are on the internal AVCore (cx25840) */
588 /* GPIO-? zl10353 demod reset */
589
590 /* Put the parts into reset and back */
591 cx_set(GP0_IO, 0x00040000);
592 mdelay(20);
593 cx_clear(GP0_IO, 0x00000004);
594 mdelay(20);
595 cx_set(GP0_IO, 0x00040004);
596 break;
597 case CX23885_BOARD_TBS_6920:
598 case CX23885_BOARD_TEVII_S470:
599 cx_write(MC417_CTL, 0x00000036);
600 cx_write(MC417_OEN, 0x00001000);
601 cx_write(MC417_RWD, 0x00001800);
602 break;
603 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
604 /* GPIO-0 INTA from CiMax1
605 GPIO-1 INTB from CiMax2
606 GPIO-2 reset chips
607 GPIO-3 to GPIO-10 data/addr for CA
608 GPIO-11 ~CS0 to CiMax1
609 GPIO-12 ~CS1 to CiMax2
610 GPIO-13 ADL0 load LSB addr
611 GPIO-14 ADL1 load MSB addr
612 GPIO-15 ~RDY from CiMax
613 GPIO-17 ~RD to CiMax
614 GPIO-18 ~WR to CiMax
615 */
616 cx_set(GP0_IO, 0x00040000); /* GPIO as out */
617 /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
618 cx_clear(GP0_IO, 0x00030004);
619 mdelay(100);/* reset delay */
620 cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
621 cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
622 /* GPIO-15 IN as ~ACK, rest as OUT */
623 cx_write(MC417_OEN, 0x00001000);
624 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
625 cx_write(MC417_RWD, 0x0000c300);
626 /* enable irq */
627 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
628 break;
629 case CX23885_BOARD_HAUPPAUGE_HVR1270:
630 /* GPIO-6 I2C Gate which can isolate the 3305 from the bus */
631 /* GPIO-9 LG3305 reset */
632
633 /* Put the parts into reset and back */
634 cx23885_gpio_enable(dev, GPIO_9 | GPIO_6, 1);
635 cx23885_gpio_set(dev, GPIO_9 | GPIO_6);
636 cx23885_gpio_clear(dev, GPIO_9);
637 mdelay(20);
638 cx23885_gpio_set(dev, GPIO_9);
639 break;
640 }
641 }
642
643 int cx23885_ir_init(struct cx23885_dev *dev)
644 {
645 switch (dev->board) {
646 case CX23885_BOARD_HAUPPAUGE_HVR1250:
647 case CX23885_BOARD_HAUPPAUGE_HVR1500:
648 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
649 case CX23885_BOARD_HAUPPAUGE_HVR1800:
650 case CX23885_BOARD_HAUPPAUGE_HVR1200:
651 case CX23885_BOARD_HAUPPAUGE_HVR1400:
652 case CX23885_BOARD_HAUPPAUGE_HVR1270:
653 /* FIXME: Implement me */
654 break;
655 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
656 request_module("ir-kbd-i2c");
657 break;
658 }
659
660 return 0;
661 }
662
663 void cx23885_card_setup(struct cx23885_dev *dev)
664 {
665 struct cx23885_tsport *ts1 = &dev->ts1;
666 struct cx23885_tsport *ts2 = &dev->ts2;
667
668 static u8 eeprom[256];
669
670 if (dev->i2c_bus[0].i2c_rc == 0) {
671 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
672 tveeprom_read(&dev->i2c_bus[0].i2c_client,
673 eeprom, sizeof(eeprom));
674 }
675
676 switch (dev->board) {
677 case CX23885_BOARD_HAUPPAUGE_HVR1250:
678 case CX23885_BOARD_HAUPPAUGE_HVR1500:
679 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
680 case CX23885_BOARD_HAUPPAUGE_HVR1400:
681 if (dev->i2c_bus[0].i2c_rc == 0)
682 hauppauge_eeprom(dev, eeprom+0x80);
683 break;
684 case CX23885_BOARD_HAUPPAUGE_HVR1800:
685 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
686 case CX23885_BOARD_HAUPPAUGE_HVR1200:
687 case CX23885_BOARD_HAUPPAUGE_HVR1700:
688 case CX23885_BOARD_HAUPPAUGE_HVR1270:
689 if (dev->i2c_bus[0].i2c_rc == 0)
690 hauppauge_eeprom(dev, eeprom+0xc0);
691 break;
692 }
693
694 switch (dev->board) {
695 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
696 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
697 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
698 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
699 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
700 /* break omitted intentionally */
701 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
702 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
703 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
704 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
705 break;
706 case CX23885_BOARD_HAUPPAUGE_HVR1800:
707 /* Defaults for VID B - Analog encoder */
708 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
709 ts1->gen_ctrl_val = 0x10e;
710 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
711 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
712
713 /* APB_TSVALERR_POL (active low)*/
714 ts1->vld_misc_val = 0x2000;
715 ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
716
717 /* Defaults for VID C */
718 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
719 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
720 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
721 break;
722 case CX23885_BOARD_TEVII_S470:
723 case CX23885_BOARD_TBS_6920:
724 case CX23885_BOARD_DVBWORLD_2005:
725 ts1->gen_ctrl_val = 0x5; /* Parallel */
726 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
727 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
728 break;
729 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
730 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
731 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
732 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
733 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
734 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
735 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
736 break;
737 case CX23885_BOARD_HAUPPAUGE_HVR1250:
738 case CX23885_BOARD_HAUPPAUGE_HVR1500:
739 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
740 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
741 case CX23885_BOARD_HAUPPAUGE_HVR1200:
742 case CX23885_BOARD_HAUPPAUGE_HVR1700:
743 case CX23885_BOARD_HAUPPAUGE_HVR1400:
744 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
745 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
746 case CX23885_BOARD_HAUPPAUGE_HVR1270:
747 default:
748 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
749 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
750 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
751 }
752
753 /* Certain boards support analog, or require the avcore to be
754 * loaded, ensure this happens.
755 */
756 switch (dev->board) {
757 case CX23885_BOARD_HAUPPAUGE_HVR1800:
758 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
759 case CX23885_BOARD_HAUPPAUGE_HVR1700:
760 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
761 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
762 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
763 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
764 &dev->i2c_bus[2].i2c_adap,
765 "cx25840", "cx25840", 0x88 >> 1);
766 v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
767 break;
768 }
769
770 /* AUX-PLL 27MHz CLK */
771 switch (dev->board) {
772 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
773 netup_initialize(dev);
774 break;
775 }
776 }
777
778 /* ------------------------------------------------------------------ */
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