[media] cx23885: add support for Mygica X8507
[deliverable/linux.git] / drivers / media / video / cx23885 / cx23885.h
1 /*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22 #include <linux/pci.h>
23 #include <linux/i2c.h>
24 #include <linux/i2c-algo-bit.h>
25 #include <linux/kdev_t.h>
26 #include <linux/slab.h>
27
28 #include <media/v4l2-device.h>
29 #include <media/tuner.h>
30 #include <media/tveeprom.h>
31 #include <media/videobuf-dma-sg.h>
32 #include <media/videobuf-dvb.h>
33 #include <media/rc-core.h>
34
35 #include "btcx-risc.h"
36 #include "cx23885-reg.h"
37 #include "media/cx2341x.h"
38
39 #include <linux/mutex.h>
40
41 #define CX23885_VERSION "0.0.3"
42
43 #define UNSET (-1U)
44
45 #define CX23885_MAXBOARDS 8
46
47 /* Max number of inputs by card */
48 #define MAX_CX23885_INPUT 8
49 #define INPUT(nr) (&cx23885_boards[dev->board].input[nr])
50 #define RESOURCE_OVERLAY 1
51 #define RESOURCE_VIDEO 2
52 #define RESOURCE_VBI 4
53
54 #define BUFFER_TIMEOUT (HZ) /* 0.5 seconds */
55
56 #define CX23885_BOARD_NOAUTO UNSET
57 #define CX23885_BOARD_UNKNOWN 0
58 #define CX23885_BOARD_HAUPPAUGE_HVR1800lp 1
59 #define CX23885_BOARD_HAUPPAUGE_HVR1800 2
60 #define CX23885_BOARD_HAUPPAUGE_HVR1250 3
61 #define CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP 4
62 #define CX23885_BOARD_HAUPPAUGE_HVR1500Q 5
63 #define CX23885_BOARD_HAUPPAUGE_HVR1500 6
64 #define CX23885_BOARD_HAUPPAUGE_HVR1200 7
65 #define CX23885_BOARD_HAUPPAUGE_HVR1700 8
66 #define CX23885_BOARD_HAUPPAUGE_HVR1400 9
67 #define CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP 10
68 #define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP 11
69 #define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H 12
70 #define CX23885_BOARD_COMPRO_VIDEOMATE_E650F 13
71 #define CX23885_BOARD_TBS_6920 14
72 #define CX23885_BOARD_TEVII_S470 15
73 #define CX23885_BOARD_DVBWORLD_2005 16
74 #define CX23885_BOARD_NETUP_DUAL_DVBS2_CI 17
75 #define CX23885_BOARD_HAUPPAUGE_HVR1270 18
76 #define CX23885_BOARD_HAUPPAUGE_HVR1275 19
77 #define CX23885_BOARD_HAUPPAUGE_HVR1255 20
78 #define CX23885_BOARD_HAUPPAUGE_HVR1210 21
79 #define CX23885_BOARD_MYGICA_X8506 22
80 #define CX23885_BOARD_MAGICPRO_PROHDTVE2 23
81 #define CX23885_BOARD_HAUPPAUGE_HVR1850 24
82 #define CX23885_BOARD_COMPRO_VIDEOMATE_E800 25
83 #define CX23885_BOARD_HAUPPAUGE_HVR1290 26
84 #define CX23885_BOARD_MYGICA_X8558PRO 27
85 #define CX23885_BOARD_LEADTEK_WINFAST_PXTV1200 28
86 #define CX23885_BOARD_GOTVIEW_X5_3D_HYBRID 29
87 #define CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF 30
88 #define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000 31
89 #define CX23885_BOARD_MPX885 32
90 #define CX23885_BOARD_MYGICA_X8507 33
91
92 #define GPIO_0 0x00000001
93 #define GPIO_1 0x00000002
94 #define GPIO_2 0x00000004
95 #define GPIO_3 0x00000008
96 #define GPIO_4 0x00000010
97 #define GPIO_5 0x00000020
98 #define GPIO_6 0x00000040
99 #define GPIO_7 0x00000080
100 #define GPIO_8 0x00000100
101 #define GPIO_9 0x00000200
102 #define GPIO_10 0x00000400
103 #define GPIO_11 0x00000800
104 #define GPIO_12 0x00001000
105 #define GPIO_13 0x00002000
106 #define GPIO_14 0x00004000
107 #define GPIO_15 0x00008000
108
109 /* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM B/G/H/LC */
110 #define CX23885_NORMS (\
111 V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_443 | \
112 V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \
113 V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \
114 V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK)
115
116 struct cx23885_fmt {
117 char *name;
118 u32 fourcc; /* v4l2 format id */
119 int depth;
120 int flags;
121 u32 cxformat;
122 };
123
124 struct cx23885_ctrl {
125 struct v4l2_queryctrl v;
126 u32 off;
127 u32 reg;
128 u32 mask;
129 u32 shift;
130 };
131
132 struct cx23885_tvnorm {
133 char *name;
134 v4l2_std_id id;
135 u32 cxiformat;
136 u32 cxoformat;
137 };
138
139 struct cx23885_fh {
140 struct cx23885_dev *dev;
141 enum v4l2_buf_type type;
142 int radio;
143 u32 resources;
144
145 /* video overlay */
146 struct v4l2_window win;
147 struct v4l2_clip *clips;
148 unsigned int nclips;
149
150 /* video capture */
151 struct cx23885_fmt *fmt;
152 unsigned int width, height;
153
154 /* vbi capture */
155 struct videobuf_queue vidq;
156 struct videobuf_queue vbiq;
157
158 /* MPEG Encoder specifics ONLY */
159 struct videobuf_queue mpegq;
160 atomic_t v4l_reading;
161 };
162
163 enum cx23885_itype {
164 CX23885_VMUX_COMPOSITE1 = 1,
165 CX23885_VMUX_COMPOSITE2,
166 CX23885_VMUX_COMPOSITE3,
167 CX23885_VMUX_COMPOSITE4,
168 CX23885_VMUX_SVIDEO,
169 CX23885_VMUX_COMPONENT,
170 CX23885_VMUX_TELEVISION,
171 CX23885_VMUX_CABLE,
172 CX23885_VMUX_DVB,
173 CX23885_VMUX_DEBUG,
174 CX23885_RADIO,
175 };
176
177 enum cx23885_src_sel_type {
178 CX23885_SRC_SEL_EXT_656_VIDEO = 0,
179 CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO
180 };
181
182 /* buffer for one video frame */
183 struct cx23885_buffer {
184 /* common v4l buffer stuff -- must be first */
185 struct videobuf_buffer vb;
186
187 /* cx23885 specific */
188 unsigned int bpl;
189 struct btcx_riscmem risc;
190 struct cx23885_fmt *fmt;
191 u32 count;
192 };
193
194 struct cx23885_input {
195 enum cx23885_itype type;
196 unsigned int vmux;
197 unsigned int amux;
198 u32 gpio0, gpio1, gpio2, gpio3;
199 };
200
201 typedef enum {
202 CX23885_MPEG_UNDEFINED = 0,
203 CX23885_MPEG_DVB,
204 CX23885_ANALOG_VIDEO,
205 CX23885_MPEG_ENCODER,
206 } port_t;
207
208 struct cx23885_board {
209 char *name;
210 port_t porta, portb, portc;
211 int num_fds_portb, num_fds_portc;
212 unsigned int tuner_type;
213 unsigned int radio_type;
214 unsigned char tuner_addr;
215 unsigned char radio_addr;
216 unsigned int tuner_bus;
217
218 /* Vendors can and do run the PCIe bridge at different
219 * clock rates, driven physically by crystals on the PCBs.
220 * The core has to accommodate this. This allows the user
221 * to add new boards with new frequencys. The value is
222 * expressed in Hz.
223 *
224 * The core framework will default this value based on
225 * current designs, but it can vary.
226 */
227 u32 clk_freq;
228 struct cx23885_input input[MAX_CX23885_INPUT];
229 int ci_type; /* for NetUP */
230 };
231
232 struct cx23885_subid {
233 u16 subvendor;
234 u16 subdevice;
235 u32 card;
236 };
237
238 struct cx23885_i2c {
239 struct cx23885_dev *dev;
240
241 int nr;
242
243 /* i2c i/o */
244 struct i2c_adapter i2c_adap;
245 struct i2c_algo_bit_data i2c_algo;
246 struct i2c_client i2c_client;
247 u32 i2c_rc;
248
249 /* 885 registers used for raw addess */
250 u32 i2c_period;
251 u32 reg_ctrl;
252 u32 reg_stat;
253 u32 reg_addr;
254 u32 reg_rdata;
255 u32 reg_wdata;
256 };
257
258 struct cx23885_dmaqueue {
259 struct list_head active;
260 struct list_head queued;
261 struct timer_list timeout;
262 struct btcx_riscmem stopper;
263 u32 count;
264 };
265
266 struct cx23885_tsport {
267 struct cx23885_dev *dev;
268
269 int nr;
270 int sram_chno;
271
272 struct videobuf_dvb_frontends frontends;
273
274 /* dma queues */
275 struct cx23885_dmaqueue mpegq;
276 u32 ts_packet_size;
277 u32 ts_packet_count;
278
279 int width;
280 int height;
281
282 spinlock_t slock;
283
284 /* registers */
285 u32 reg_gpcnt;
286 u32 reg_gpcnt_ctl;
287 u32 reg_dma_ctl;
288 u32 reg_lngth;
289 u32 reg_hw_sop_ctrl;
290 u32 reg_gen_ctrl;
291 u32 reg_bd_pkt_status;
292 u32 reg_sop_status;
293 u32 reg_fifo_ovfl_stat;
294 u32 reg_vld_misc;
295 u32 reg_ts_clk_en;
296 u32 reg_ts_int_msk;
297 u32 reg_ts_int_stat;
298 u32 reg_src_sel;
299
300 /* Default register vals */
301 int pci_irqmask;
302 u32 dma_ctl_val;
303 u32 ts_int_msk_val;
304 u32 gen_ctrl_val;
305 u32 ts_clk_en_val;
306 u32 src_sel_val;
307 u32 vld_misc_val;
308 u32 hw_sop_ctrl_val;
309
310 /* Allow a single tsport to have multiple frontends */
311 u32 num_frontends;
312 void (*gate_ctrl)(struct cx23885_tsport *port, int open);
313 void *port_priv;
314 };
315
316 struct cx23885_kernel_ir {
317 struct cx23885_dev *cx;
318 char *name;
319 char *phys;
320
321 struct rc_dev *rc;
322 };
323
324 struct cx23885_audio_buffer {
325 unsigned int bpl;
326 struct btcx_riscmem risc;
327 struct videobuf_dmabuf dma;
328 };
329
330 struct cx23885_audio_dev {
331 struct cx23885_dev *dev;
332
333 struct pci_dev *pci;
334
335 struct snd_card *card;
336
337 spinlock_t lock;
338
339 atomic_t count;
340
341 unsigned int dma_size;
342 unsigned int period_size;
343 unsigned int num_periods;
344
345 struct videobuf_dmabuf *dma_risc;
346
347 struct cx23885_audio_buffer *buf;
348
349 struct snd_pcm_substream *substream;
350 };
351
352 struct cx23885_dev {
353 atomic_t refcount;
354 struct v4l2_device v4l2_dev;
355
356 /* pci stuff */
357 struct pci_dev *pci;
358 unsigned char pci_rev, pci_lat;
359 int pci_bus, pci_slot;
360 u32 __iomem *lmmio;
361 u8 __iomem *bmmio;
362 int pci_irqmask;
363 spinlock_t pci_irqmask_lock; /* protects mask reg too */
364 int hwrevision;
365
366 /* This valud is board specific and is used to configure the
367 * AV core so we see nice clean and stable video and audio. */
368 u32 clk_freq;
369
370 /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */
371 struct cx23885_i2c i2c_bus[3];
372
373 int nr;
374 struct mutex lock;
375 struct mutex gpio_lock;
376
377 /* board details */
378 unsigned int board;
379 char name[32];
380
381 struct cx23885_tsport ts1, ts2;
382
383 /* sram configuration */
384 struct sram_channel *sram_channels;
385
386 enum {
387 CX23885_BRIDGE_UNDEFINED = 0,
388 CX23885_BRIDGE_885 = 885,
389 CX23885_BRIDGE_887 = 887,
390 CX23885_BRIDGE_888 = 888,
391 } bridge;
392
393 /* Analog video */
394 u32 resources;
395 unsigned int input;
396 unsigned int audinput; /* Selectable audio input */
397 u32 tvaudio;
398 v4l2_std_id tvnorm;
399 unsigned int tuner_type;
400 unsigned char tuner_addr;
401 unsigned int tuner_bus;
402 unsigned int radio_type;
403 unsigned char radio_addr;
404 unsigned int has_radio;
405 struct v4l2_subdev *sd_cx25840;
406 struct work_struct cx25840_work;
407
408 /* Infrared */
409 struct v4l2_subdev *sd_ir;
410 struct work_struct ir_rx_work;
411 unsigned long ir_rx_notifications;
412 struct work_struct ir_tx_work;
413 unsigned long ir_tx_notifications;
414
415 struct cx23885_kernel_ir *kernel_ir;
416 atomic_t ir_input_stopping;
417
418 /* V4l */
419 u32 freq;
420 struct video_device *video_dev;
421 struct video_device *vbi_dev;
422 struct video_device *radio_dev;
423
424 struct cx23885_dmaqueue vidq;
425 struct cx23885_dmaqueue vbiq;
426 spinlock_t slock;
427
428 /* MPEG Encoder ONLY settings */
429 u32 cx23417_mailbox;
430 struct cx2341x_mpeg_params mpeg_params;
431 struct video_device *v4l_device;
432 atomic_t v4l_reader_count;
433 struct cx23885_tvnorm encodernorm;
434
435 /* Analog raw audio */
436 struct cx23885_audio_dev *audio_dev;
437
438 };
439
440 static inline struct cx23885_dev *to_cx23885(struct v4l2_device *v4l2_dev)
441 {
442 return container_of(v4l2_dev, struct cx23885_dev, v4l2_dev);
443 }
444
445 #define call_all(dev, o, f, args...) \
446 v4l2_device_call_all(&dev->v4l2_dev, 0, o, f, ##args)
447
448 #define CX23885_HW_888_IR (1 << 0)
449 #define CX23885_HW_AV_CORE (1 << 1)
450
451 #define call_hw(dev, grpid, o, f, args...) \
452 v4l2_device_call_all(&dev->v4l2_dev, grpid, o, f, ##args)
453
454 extern struct v4l2_subdev *cx23885_find_hw(struct cx23885_dev *dev, u32 hw);
455
456 #define SRAM_CH01 0 /* Video A */
457 #define SRAM_CH02 1 /* VBI A */
458 #define SRAM_CH03 2 /* Video B */
459 #define SRAM_CH04 3 /* Transport via B */
460 #define SRAM_CH05 4 /* VBI B */
461 #define SRAM_CH06 5 /* Video C */
462 #define SRAM_CH07 6 /* Transport via C */
463 #define SRAM_CH08 7 /* Audio Internal A */
464 #define SRAM_CH09 8 /* Audio Internal B */
465 #define SRAM_CH10 9 /* Audio External */
466 #define SRAM_CH11 10 /* COMB_3D_N */
467 #define SRAM_CH12 11 /* Comb 3D N1 */
468 #define SRAM_CH13 12 /* Comb 3D N2 */
469 #define SRAM_CH14 13 /* MOE Vid */
470 #define SRAM_CH15 14 /* MOE RSLT */
471
472 struct sram_channel {
473 char *name;
474 u32 cmds_start;
475 u32 ctrl_start;
476 u32 cdt;
477 u32 fifo_start;
478 u32 fifo_size;
479 u32 ptr1_reg;
480 u32 ptr2_reg;
481 u32 cnt1_reg;
482 u32 cnt2_reg;
483 u32 jumponly;
484 };
485
486 /* ----------------------------------------------------------- */
487
488 #define cx_read(reg) readl(dev->lmmio + ((reg)>>2))
489 #define cx_write(reg, value) writel((value), dev->lmmio + ((reg)>>2))
490
491 #define cx_andor(reg, mask, value) \
492 writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
493 ((value) & (mask)), dev->lmmio+((reg)>>2))
494
495 #define cx_set(reg, bit) cx_andor((reg), (bit), (bit))
496 #define cx_clear(reg, bit) cx_andor((reg), (bit), 0)
497
498 /* ----------------------------------------------------------- */
499 /* cx23885-core.c */
500
501 extern int cx23885_sram_channel_setup(struct cx23885_dev *dev,
502 struct sram_channel *ch,
503 unsigned int bpl, u32 risc);
504
505 extern void cx23885_sram_channel_dump(struct cx23885_dev *dev,
506 struct sram_channel *ch);
507
508 extern int cx23885_risc_stopper(struct pci_dev *pci, struct btcx_riscmem *risc,
509 u32 reg, u32 mask, u32 value);
510
511 extern int cx23885_risc_buffer(struct pci_dev *pci, struct btcx_riscmem *risc,
512 struct scatterlist *sglist,
513 unsigned int top_offset, unsigned int bottom_offset,
514 unsigned int bpl, unsigned int padding, unsigned int lines);
515
516 extern int cx23885_risc_vbibuffer(struct pci_dev *pci,
517 struct btcx_riscmem *risc, struct scatterlist *sglist,
518 unsigned int top_offset, unsigned int bottom_offset,
519 unsigned int bpl, unsigned int padding, unsigned int lines);
520
521 void cx23885_cancel_buffers(struct cx23885_tsport *port);
522
523 extern int cx23885_restart_queue(struct cx23885_tsport *port,
524 struct cx23885_dmaqueue *q);
525
526 extern void cx23885_wakeup(struct cx23885_tsport *port,
527 struct cx23885_dmaqueue *q, u32 count);
528
529 extern void cx23885_gpio_set(struct cx23885_dev *dev, u32 mask);
530 extern void cx23885_gpio_clear(struct cx23885_dev *dev, u32 mask);
531 extern u32 cx23885_gpio_get(struct cx23885_dev *dev, u32 mask);
532 extern void cx23885_gpio_enable(struct cx23885_dev *dev, u32 mask,
533 int asoutput);
534
535 extern void cx23885_irq_add_enable(struct cx23885_dev *dev, u32 mask);
536 extern void cx23885_irq_enable(struct cx23885_dev *dev, u32 mask);
537 extern void cx23885_irq_disable(struct cx23885_dev *dev, u32 mask);
538 extern void cx23885_irq_remove(struct cx23885_dev *dev, u32 mask);
539
540 /* ----------------------------------------------------------- */
541 /* cx23885-cards.c */
542 extern struct cx23885_board cx23885_boards[];
543 extern const unsigned int cx23885_bcount;
544
545 extern struct cx23885_subid cx23885_subids[];
546 extern const unsigned int cx23885_idcount;
547
548 extern int cx23885_tuner_callback(void *priv, int component,
549 int command, int arg);
550 extern void cx23885_card_list(struct cx23885_dev *dev);
551 extern int cx23885_ir_init(struct cx23885_dev *dev);
552 extern void cx23885_ir_pci_int_enable(struct cx23885_dev *dev);
553 extern void cx23885_ir_fini(struct cx23885_dev *dev);
554 extern void cx23885_gpio_setup(struct cx23885_dev *dev);
555 extern void cx23885_card_setup(struct cx23885_dev *dev);
556 extern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev);
557
558 extern int cx23885_dvb_register(struct cx23885_tsport *port);
559 extern int cx23885_dvb_unregister(struct cx23885_tsport *port);
560
561 extern int cx23885_buf_prepare(struct videobuf_queue *q,
562 struct cx23885_tsport *port,
563 struct cx23885_buffer *buf,
564 enum v4l2_field field);
565 extern void cx23885_buf_queue(struct cx23885_tsport *port,
566 struct cx23885_buffer *buf);
567 extern void cx23885_free_buffer(struct videobuf_queue *q,
568 struct cx23885_buffer *buf);
569
570 /* ----------------------------------------------------------- */
571 /* cx23885-video.c */
572 /* Video */
573 extern int cx23885_video_register(struct cx23885_dev *dev);
574 extern void cx23885_video_unregister(struct cx23885_dev *dev);
575 extern int cx23885_video_irq(struct cx23885_dev *dev, u32 status);
576 extern void cx23885_video_wakeup(struct cx23885_dev *dev,
577 struct cx23885_dmaqueue *q, u32 count);
578
579 /* ----------------------------------------------------------- */
580 /* cx23885-vbi.c */
581 extern int cx23885_vbi_fmt(struct file *file, void *priv,
582 struct v4l2_format *f);
583 extern void cx23885_vbi_timeout(unsigned long data);
584 extern struct videobuf_queue_ops cx23885_vbi_qops;
585 extern int cx23885_restart_vbi_queue(struct cx23885_dev *dev,
586 struct cx23885_dmaqueue *q);
587 extern int cx23885_vbi_irq(struct cx23885_dev *dev, u32 status);
588
589 /* cx23885-i2c.c */
590 extern int cx23885_i2c_register(struct cx23885_i2c *bus);
591 extern int cx23885_i2c_unregister(struct cx23885_i2c *bus);
592 extern void cx23885_av_clk(struct cx23885_dev *dev, int enable);
593
594 /* ----------------------------------------------------------- */
595 /* cx23885-417.c */
596 extern int cx23885_417_register(struct cx23885_dev *dev);
597 extern void cx23885_417_unregister(struct cx23885_dev *dev);
598 extern int cx23885_irq_417(struct cx23885_dev *dev, u32 status);
599 extern void cx23885_417_check_encoder(struct cx23885_dev *dev);
600 extern void cx23885_mc417_init(struct cx23885_dev *dev);
601 extern int mc417_memory_read(struct cx23885_dev *dev, u32 address, u32 *value);
602 extern int mc417_memory_write(struct cx23885_dev *dev, u32 address, u32 value);
603 extern int mc417_register_read(struct cx23885_dev *dev,
604 u16 address, u32 *value);
605 extern int mc417_register_write(struct cx23885_dev *dev,
606 u16 address, u32 value);
607 extern void mc417_gpio_set(struct cx23885_dev *dev, u32 mask);
608 extern void mc417_gpio_clear(struct cx23885_dev *dev, u32 mask);
609 extern void mc417_gpio_enable(struct cx23885_dev *dev, u32 mask, int asoutput);
610
611 /* ----------------------------------------------------------- */
612 /* cx23885-alsa.c */
613 extern struct cx23885_audio_dev *cx23885_audio_register(
614 struct cx23885_dev *dev);
615 extern void cx23885_audio_unregister(struct cx23885_dev *dev);
616 extern int cx23885_audio_irq(struct cx23885_dev *dev, u32 status, u32 mask);
617 extern int cx23885_risc_databuffer(struct pci_dev *pci,
618 struct btcx_riscmem *risc,
619 struct scatterlist *sglist,
620 unsigned int bpl,
621 unsigned int lines,
622 unsigned int lpi);
623
624 /* ----------------------------------------------------------- */
625 /* tv norms */
626
627 static inline unsigned int norm_maxw(v4l2_std_id norm)
628 {
629 return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 720 : 768;
630 }
631
632 static inline unsigned int norm_maxh(v4l2_std_id norm)
633 {
634 return (norm & V4L2_STD_625_50) ? 576 : 480;
635 }
636
637 static inline unsigned int norm_swidth(v4l2_std_id norm)
638 {
639 return (norm & (V4L2_STD_MN & ~V4L2_STD_PAL_Nc)) ? 754 : 922;
640 }
This page took 0.044006 seconds and 5 git commands to generate.