Merge branch 'restriper' of git://github.com/idryomov/btrfs-unstable into integration
[deliverable/linux.git] / drivers / media / video / marvell-ccic / mcam-core.c
1 /*
2 * The Marvell camera core. This device appears in a number of settings,
3 * so it needs platform-specific support outside of the core.
4 *
5 * Copyright 2011 Jonathan Corbet corbet@lwn.net
6 */
7 #include <linux/kernel.h>
8 #include <linux/module.h>
9 #include <linux/fs.h>
10 #include <linux/mm.h>
11 #include <linux/i2c.h>
12 #include <linux/interrupt.h>
13 #include <linux/spinlock.h>
14 #include <linux/slab.h>
15 #include <linux/device.h>
16 #include <linux/wait.h>
17 #include <linux/list.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/delay.h>
20 #include <linux/vmalloc.h>
21 #include <linux/io.h>
22 #include <linux/videodev2.h>
23 #include <media/v4l2-device.h>
24 #include <media/v4l2-ioctl.h>
25 #include <media/v4l2-chip-ident.h>
26 #include <media/ov7670.h>
27 #include <media/videobuf2-vmalloc.h>
28 #include <media/videobuf2-dma-contig.h>
29 #include <media/videobuf2-dma-sg.h>
30
31 #include "mcam-core.h"
32
33 /*
34 * Basic frame stats - to be deleted shortly
35 */
36 static int frames;
37 static int singles;
38 static int delivered;
39
40 #ifdef MCAM_MODE_VMALLOC
41 /*
42 * Internal DMA buffer management. Since the controller cannot do S/G I/O,
43 * we must have physically contiguous buffers to bring frames into.
44 * These parameters control how many buffers we use, whether we
45 * allocate them at load time (better chance of success, but nails down
46 * memory) or when somebody tries to use the camera (riskier), and,
47 * for load-time allocation, how big they should be.
48 *
49 * The controller can cycle through three buffers. We could use
50 * more by flipping pointers around, but it probably makes little
51 * sense.
52 */
53
54 static int alloc_bufs_at_read;
55 module_param(alloc_bufs_at_read, bool, 0444);
56 MODULE_PARM_DESC(alloc_bufs_at_read,
57 "Non-zero value causes DMA buffers to be allocated when the "
58 "video capture device is read, rather than at module load "
59 "time. This saves memory, but decreases the chances of "
60 "successfully getting those buffers. This parameter is "
61 "only used in the vmalloc buffer mode");
62
63 static int n_dma_bufs = 3;
64 module_param(n_dma_bufs, uint, 0644);
65 MODULE_PARM_DESC(n_dma_bufs,
66 "The number of DMA buffers to allocate. Can be either two "
67 "(saves memory, makes timing tighter) or three.");
68
69 static int dma_buf_size = VGA_WIDTH * VGA_HEIGHT * 2; /* Worst case */
70 module_param(dma_buf_size, uint, 0444);
71 MODULE_PARM_DESC(dma_buf_size,
72 "The size of the allocated DMA buffers. If actual operating "
73 "parameters require larger buffers, an attempt to reallocate "
74 "will be made.");
75 #else /* MCAM_MODE_VMALLOC */
76 static const int alloc_bufs_at_read = 0;
77 static const int n_dma_bufs = 3; /* Used by S/G_PARM */
78 #endif /* MCAM_MODE_VMALLOC */
79
80 static int flip;
81 module_param(flip, bool, 0444);
82 MODULE_PARM_DESC(flip,
83 "If set, the sensor will be instructed to flip the image "
84 "vertically.");
85
86 static int buffer_mode = -1;
87 module_param(buffer_mode, int, 0444);
88 MODULE_PARM_DESC(buffer_mode,
89 "Set the buffer mode to be used; default is to go with what "
90 "the platform driver asks for. Set to 0 for vmalloc, 1 for "
91 "DMA contiguous.");
92
93 /*
94 * Status flags. Always manipulated with bit operations.
95 */
96 #define CF_BUF0_VALID 0 /* Buffers valid - first three */
97 #define CF_BUF1_VALID 1
98 #define CF_BUF2_VALID 2
99 #define CF_DMA_ACTIVE 3 /* A frame is incoming */
100 #define CF_CONFIG_NEEDED 4 /* Must configure hardware */
101 #define CF_SINGLE_BUFFER 5 /* Running with a single buffer */
102 #define CF_SG_RESTART 6 /* SG restart needed */
103
104 #define sensor_call(cam, o, f, args...) \
105 v4l2_subdev_call(cam->sensor, o, f, ##args)
106
107 static struct mcam_format_struct {
108 __u8 *desc;
109 __u32 pixelformat;
110 int bpp; /* Bytes per pixel */
111 enum v4l2_mbus_pixelcode mbus_code;
112 } mcam_formats[] = {
113 {
114 .desc = "YUYV 4:2:2",
115 .pixelformat = V4L2_PIX_FMT_YUYV,
116 .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8,
117 .bpp = 2,
118 },
119 {
120 .desc = "RGB 444",
121 .pixelformat = V4L2_PIX_FMT_RGB444,
122 .mbus_code = V4L2_MBUS_FMT_RGB444_2X8_PADHI_LE,
123 .bpp = 2,
124 },
125 {
126 .desc = "RGB 565",
127 .pixelformat = V4L2_PIX_FMT_RGB565,
128 .mbus_code = V4L2_MBUS_FMT_RGB565_2X8_LE,
129 .bpp = 2,
130 },
131 {
132 .desc = "Raw RGB Bayer",
133 .pixelformat = V4L2_PIX_FMT_SBGGR8,
134 .mbus_code = V4L2_MBUS_FMT_SBGGR8_1X8,
135 .bpp = 1
136 },
137 };
138 #define N_MCAM_FMTS ARRAY_SIZE(mcam_formats)
139
140 static struct mcam_format_struct *mcam_find_format(u32 pixelformat)
141 {
142 unsigned i;
143
144 for (i = 0; i < N_MCAM_FMTS; i++)
145 if (mcam_formats[i].pixelformat == pixelformat)
146 return mcam_formats + i;
147 /* Not found? Then return the first format. */
148 return mcam_formats;
149 }
150
151 /*
152 * The default format we use until somebody says otherwise.
153 */
154 static const struct v4l2_pix_format mcam_def_pix_format = {
155 .width = VGA_WIDTH,
156 .height = VGA_HEIGHT,
157 .pixelformat = V4L2_PIX_FMT_YUYV,
158 .field = V4L2_FIELD_NONE,
159 .bytesperline = VGA_WIDTH*2,
160 .sizeimage = VGA_WIDTH*VGA_HEIGHT*2,
161 };
162
163 static const enum v4l2_mbus_pixelcode mcam_def_mbus_code =
164 V4L2_MBUS_FMT_YUYV8_2X8;
165
166
167 /*
168 * The two-word DMA descriptor format used by the Armada 610 and like. There
169 * Is a three-word format as well (set C1_DESC_3WORD) where the third
170 * word is a pointer to the next descriptor, but we don't use it. Two-word
171 * descriptors have to be contiguous in memory.
172 */
173 struct mcam_dma_desc {
174 u32 dma_addr;
175 u32 segment_len;
176 };
177
178 /*
179 * Our buffer type for working with videobuf2. Note that the vb2
180 * developers have decreed that struct vb2_buffer must be at the
181 * beginning of this structure.
182 */
183 struct mcam_vb_buffer {
184 struct vb2_buffer vb_buf;
185 struct list_head queue;
186 struct mcam_dma_desc *dma_desc; /* Descriptor virtual address */
187 dma_addr_t dma_desc_pa; /* Descriptor physical address */
188 int dma_desc_nent; /* Number of mapped descriptors */
189 };
190
191 static inline struct mcam_vb_buffer *vb_to_mvb(struct vb2_buffer *vb)
192 {
193 return container_of(vb, struct mcam_vb_buffer, vb_buf);
194 }
195
196 /*
197 * Hand a completed buffer back to user space.
198 */
199 static void mcam_buffer_done(struct mcam_camera *cam, int frame,
200 struct vb2_buffer *vbuf)
201 {
202 vbuf->v4l2_buf.bytesused = cam->pix_format.sizeimage;
203 vbuf->v4l2_buf.sequence = cam->buf_seq[frame];
204 vb2_set_plane_payload(vbuf, 0, cam->pix_format.sizeimage);
205 vb2_buffer_done(vbuf, VB2_BUF_STATE_DONE);
206 }
207
208
209
210 /*
211 * Debugging and related.
212 */
213 #define cam_err(cam, fmt, arg...) \
214 dev_err((cam)->dev, fmt, ##arg);
215 #define cam_warn(cam, fmt, arg...) \
216 dev_warn((cam)->dev, fmt, ##arg);
217 #define cam_dbg(cam, fmt, arg...) \
218 dev_dbg((cam)->dev, fmt, ##arg);
219
220
221 /*
222 * Flag manipulation helpers
223 */
224 static void mcam_reset_buffers(struct mcam_camera *cam)
225 {
226 int i;
227
228 cam->next_buf = -1;
229 for (i = 0; i < cam->nbufs; i++)
230 clear_bit(i, &cam->flags);
231 }
232
233 static inline int mcam_needs_config(struct mcam_camera *cam)
234 {
235 return test_bit(CF_CONFIG_NEEDED, &cam->flags);
236 }
237
238 static void mcam_set_config_needed(struct mcam_camera *cam, int needed)
239 {
240 if (needed)
241 set_bit(CF_CONFIG_NEEDED, &cam->flags);
242 else
243 clear_bit(CF_CONFIG_NEEDED, &cam->flags);
244 }
245
246 /* ------------------------------------------------------------------- */
247 /*
248 * Make the controller start grabbing images. Everything must
249 * be set up before doing this.
250 */
251 static void mcam_ctlr_start(struct mcam_camera *cam)
252 {
253 /* set_bit performs a read, so no other barrier should be
254 needed here */
255 mcam_reg_set_bit(cam, REG_CTRL0, C0_ENABLE);
256 }
257
258 static void mcam_ctlr_stop(struct mcam_camera *cam)
259 {
260 mcam_reg_clear_bit(cam, REG_CTRL0, C0_ENABLE);
261 }
262
263 /* ------------------------------------------------------------------- */
264
265 #ifdef MCAM_MODE_VMALLOC
266 /*
267 * Code specific to the vmalloc buffer mode.
268 */
269
270 /*
271 * Allocate in-kernel DMA buffers for vmalloc mode.
272 */
273 static int mcam_alloc_dma_bufs(struct mcam_camera *cam, int loadtime)
274 {
275 int i;
276
277 mcam_set_config_needed(cam, 1);
278 if (loadtime)
279 cam->dma_buf_size = dma_buf_size;
280 else
281 cam->dma_buf_size = cam->pix_format.sizeimage;
282 if (n_dma_bufs > 3)
283 n_dma_bufs = 3;
284
285 cam->nbufs = 0;
286 for (i = 0; i < n_dma_bufs; i++) {
287 cam->dma_bufs[i] = dma_alloc_coherent(cam->dev,
288 cam->dma_buf_size, cam->dma_handles + i,
289 GFP_KERNEL);
290 if (cam->dma_bufs[i] == NULL) {
291 cam_warn(cam, "Failed to allocate DMA buffer\n");
292 break;
293 }
294 (cam->nbufs)++;
295 }
296
297 switch (cam->nbufs) {
298 case 1:
299 dma_free_coherent(cam->dev, cam->dma_buf_size,
300 cam->dma_bufs[0], cam->dma_handles[0]);
301 cam->nbufs = 0;
302 case 0:
303 cam_err(cam, "Insufficient DMA buffers, cannot operate\n");
304 return -ENOMEM;
305
306 case 2:
307 if (n_dma_bufs > 2)
308 cam_warn(cam, "Will limp along with only 2 buffers\n");
309 break;
310 }
311 return 0;
312 }
313
314 static void mcam_free_dma_bufs(struct mcam_camera *cam)
315 {
316 int i;
317
318 for (i = 0; i < cam->nbufs; i++) {
319 dma_free_coherent(cam->dev, cam->dma_buf_size,
320 cam->dma_bufs[i], cam->dma_handles[i]);
321 cam->dma_bufs[i] = NULL;
322 }
323 cam->nbufs = 0;
324 }
325
326
327 /*
328 * Set up DMA buffers when operating in vmalloc mode
329 */
330 static void mcam_ctlr_dma_vmalloc(struct mcam_camera *cam)
331 {
332 /*
333 * Store the first two Y buffers (we aren't supporting
334 * planar formats for now, so no UV bufs). Then either
335 * set the third if it exists, or tell the controller
336 * to just use two.
337 */
338 mcam_reg_write(cam, REG_Y0BAR, cam->dma_handles[0]);
339 mcam_reg_write(cam, REG_Y1BAR, cam->dma_handles[1]);
340 if (cam->nbufs > 2) {
341 mcam_reg_write(cam, REG_Y2BAR, cam->dma_handles[2]);
342 mcam_reg_clear_bit(cam, REG_CTRL1, C1_TWOBUFS);
343 } else
344 mcam_reg_set_bit(cam, REG_CTRL1, C1_TWOBUFS);
345 if (cam->chip_id == V4L2_IDENT_CAFE)
346 mcam_reg_write(cam, REG_UBAR, 0); /* 32 bits only */
347 }
348
349 /*
350 * Copy data out to user space in the vmalloc case
351 */
352 static void mcam_frame_tasklet(unsigned long data)
353 {
354 struct mcam_camera *cam = (struct mcam_camera *) data;
355 int i;
356 unsigned long flags;
357 struct mcam_vb_buffer *buf;
358
359 spin_lock_irqsave(&cam->dev_lock, flags);
360 for (i = 0; i < cam->nbufs; i++) {
361 int bufno = cam->next_buf;
362
363 if (cam->state != S_STREAMING || bufno < 0)
364 break; /* I/O got stopped */
365 if (++(cam->next_buf) >= cam->nbufs)
366 cam->next_buf = 0;
367 if (!test_bit(bufno, &cam->flags))
368 continue;
369 if (list_empty(&cam->buffers)) {
370 singles++;
371 break; /* Leave it valid, hope for better later */
372 }
373 delivered++;
374 clear_bit(bufno, &cam->flags);
375 buf = list_first_entry(&cam->buffers, struct mcam_vb_buffer,
376 queue);
377 list_del_init(&buf->queue);
378 /*
379 * Drop the lock during the big copy. This *should* be safe...
380 */
381 spin_unlock_irqrestore(&cam->dev_lock, flags);
382 memcpy(vb2_plane_vaddr(&buf->vb_buf, 0), cam->dma_bufs[bufno],
383 cam->pix_format.sizeimage);
384 mcam_buffer_done(cam, bufno, &buf->vb_buf);
385 spin_lock_irqsave(&cam->dev_lock, flags);
386 }
387 spin_unlock_irqrestore(&cam->dev_lock, flags);
388 }
389
390
391 /*
392 * Make sure our allocated buffers are up to the task.
393 */
394 static int mcam_check_dma_buffers(struct mcam_camera *cam)
395 {
396 if (cam->nbufs > 0 && cam->dma_buf_size < cam->pix_format.sizeimage)
397 mcam_free_dma_bufs(cam);
398 if (cam->nbufs == 0)
399 return mcam_alloc_dma_bufs(cam, 0);
400 return 0;
401 }
402
403 static void mcam_vmalloc_done(struct mcam_camera *cam, int frame)
404 {
405 tasklet_schedule(&cam->s_tasklet);
406 }
407
408 #else /* MCAM_MODE_VMALLOC */
409
410 static inline int mcam_alloc_dma_bufs(struct mcam_camera *cam, int loadtime)
411 {
412 return 0;
413 }
414
415 static inline void mcam_free_dma_bufs(struct mcam_camera *cam)
416 {
417 return;
418 }
419
420 static inline int mcam_check_dma_buffers(struct mcam_camera *cam)
421 {
422 return 0;
423 }
424
425
426
427 #endif /* MCAM_MODE_VMALLOC */
428
429
430 #ifdef MCAM_MODE_DMA_CONTIG
431 /* ---------------------------------------------------------------------- */
432 /*
433 * DMA-contiguous code.
434 */
435 /*
436 * Set up a contiguous buffer for the given frame. Here also is where
437 * the underrun strategy is set: if there is no buffer available, reuse
438 * the buffer from the other BAR and set the CF_SINGLE_BUFFER flag to
439 * keep the interrupt handler from giving that buffer back to user
440 * space. In this way, we always have a buffer to DMA to and don't
441 * have to try to play games stopping and restarting the controller.
442 */
443 static void mcam_set_contig_buffer(struct mcam_camera *cam, int frame)
444 {
445 struct mcam_vb_buffer *buf;
446 /*
447 * If there are no available buffers, go into single mode
448 */
449 if (list_empty(&cam->buffers)) {
450 buf = cam->vb_bufs[frame ^ 0x1];
451 cam->vb_bufs[frame] = buf;
452 mcam_reg_write(cam, frame == 0 ? REG_Y0BAR : REG_Y1BAR,
453 vb2_dma_contig_plane_dma_addr(&buf->vb_buf, 0));
454 set_bit(CF_SINGLE_BUFFER, &cam->flags);
455 singles++;
456 return;
457 }
458 /*
459 * OK, we have a buffer we can use.
460 */
461 buf = list_first_entry(&cam->buffers, struct mcam_vb_buffer, queue);
462 list_del_init(&buf->queue);
463 mcam_reg_write(cam, frame == 0 ? REG_Y0BAR : REG_Y1BAR,
464 vb2_dma_contig_plane_dma_addr(&buf->vb_buf, 0));
465 cam->vb_bufs[frame] = buf;
466 clear_bit(CF_SINGLE_BUFFER, &cam->flags);
467 }
468
469 /*
470 * Initial B_DMA_contig setup.
471 */
472 static void mcam_ctlr_dma_contig(struct mcam_camera *cam)
473 {
474 mcam_reg_set_bit(cam, REG_CTRL1, C1_TWOBUFS);
475 cam->nbufs = 2;
476 mcam_set_contig_buffer(cam, 0);
477 mcam_set_contig_buffer(cam, 1);
478 }
479
480 /*
481 * Frame completion handling.
482 */
483 static void mcam_dma_contig_done(struct mcam_camera *cam, int frame)
484 {
485 struct mcam_vb_buffer *buf = cam->vb_bufs[frame];
486
487 if (!test_bit(CF_SINGLE_BUFFER, &cam->flags)) {
488 delivered++;
489 mcam_buffer_done(cam, frame, &buf->vb_buf);
490 }
491 mcam_set_contig_buffer(cam, frame);
492 }
493
494 #endif /* MCAM_MODE_DMA_CONTIG */
495
496 #ifdef MCAM_MODE_DMA_SG
497 /* ---------------------------------------------------------------------- */
498 /*
499 * Scatter/gather-specific code.
500 */
501
502 /*
503 * Set up the next buffer for S/G I/O; caller should be sure that
504 * the controller is stopped and a buffer is available.
505 */
506 static void mcam_sg_next_buffer(struct mcam_camera *cam)
507 {
508 struct mcam_vb_buffer *buf;
509
510 buf = list_first_entry(&cam->buffers, struct mcam_vb_buffer, queue);
511 list_del_init(&buf->queue);
512 mcam_reg_write(cam, REG_DMA_DESC_Y, buf->dma_desc_pa);
513 mcam_reg_write(cam, REG_DESC_LEN_Y,
514 buf->dma_desc_nent*sizeof(struct mcam_dma_desc));
515 mcam_reg_write(cam, REG_DESC_LEN_U, 0);
516 mcam_reg_write(cam, REG_DESC_LEN_V, 0);
517 cam->vb_bufs[0] = buf;
518 }
519
520 /*
521 * Initial B_DMA_sg setup
522 */
523 static void mcam_ctlr_dma_sg(struct mcam_camera *cam)
524 {
525 mcam_reg_clear_bit(cam, REG_CTRL1, C1_DESC_3WORD);
526 mcam_sg_next_buffer(cam);
527 mcam_reg_set_bit(cam, REG_CTRL1, C1_DESC_ENA);
528 cam->nbufs = 3;
529 }
530
531
532 /*
533 * Frame completion with S/G is trickier. We can't muck with
534 * a descriptor chain on the fly, since the controller buffers it
535 * internally. So we have to actually stop and restart; Marvell
536 * says this is the way to do it.
537 *
538 * Of course, stopping is easier said than done; experience shows
539 * that the controller can start a frame *after* C0_ENABLE has been
540 * cleared. So when running in S/G mode, the controller is "stopped"
541 * on receipt of the start-of-frame interrupt. That means we can
542 * safely change the DMA descriptor array here and restart things
543 * (assuming there's another buffer waiting to go).
544 */
545 static void mcam_dma_sg_done(struct mcam_camera *cam, int frame)
546 {
547 struct mcam_vb_buffer *buf = cam->vb_bufs[0];
548
549 /*
550 * Very Bad Not Good Things happen if you don't clear
551 * C1_DESC_ENA before making any descriptor changes.
552 */
553 mcam_reg_clear_bit(cam, REG_CTRL1, C1_DESC_ENA);
554 /*
555 * If we have another buffer available, put it in and
556 * restart the engine.
557 */
558 if (!list_empty(&cam->buffers)) {
559 mcam_sg_next_buffer(cam);
560 mcam_reg_set_bit(cam, REG_CTRL1, C1_DESC_ENA);
561 mcam_ctlr_start(cam);
562 /*
563 * Otherwise set CF_SG_RESTART and the controller will
564 * be restarted once another buffer shows up.
565 */
566 } else {
567 set_bit(CF_SG_RESTART, &cam->flags);
568 singles++;
569 }
570 /*
571 * Now we can give the completed frame back to user space.
572 */
573 delivered++;
574 mcam_buffer_done(cam, frame, &buf->vb_buf);
575 }
576
577
578 /*
579 * Scatter/gather mode requires stopping the controller between
580 * frames so we can put in a new DMA descriptor array. If no new
581 * buffer exists at frame completion, the controller is left stopped;
582 * this function is charged with gettig things going again.
583 */
584 static void mcam_sg_restart(struct mcam_camera *cam)
585 {
586 mcam_ctlr_dma_sg(cam);
587 mcam_ctlr_start(cam);
588 clear_bit(CF_SG_RESTART, &cam->flags);
589 }
590
591 #else /* MCAM_MODE_DMA_SG */
592
593 static inline void mcam_sg_restart(struct mcam_camera *cam)
594 {
595 return;
596 }
597
598 #endif /* MCAM_MODE_DMA_SG */
599
600 /* ---------------------------------------------------------------------- */
601 /*
602 * Buffer-mode-independent controller code.
603 */
604
605 /*
606 * Image format setup
607 */
608 static void mcam_ctlr_image(struct mcam_camera *cam)
609 {
610 int imgsz;
611 struct v4l2_pix_format *fmt = &cam->pix_format;
612
613 imgsz = ((fmt->height << IMGSZ_V_SHIFT) & IMGSZ_V_MASK) |
614 (fmt->bytesperline & IMGSZ_H_MASK);
615 mcam_reg_write(cam, REG_IMGSIZE, imgsz);
616 mcam_reg_write(cam, REG_IMGOFFSET, 0);
617 /* YPITCH just drops the last two bits */
618 mcam_reg_write_mask(cam, REG_IMGPITCH, fmt->bytesperline,
619 IMGP_YP_MASK);
620 /*
621 * Tell the controller about the image format we are using.
622 */
623 switch (cam->pix_format.pixelformat) {
624 case V4L2_PIX_FMT_YUYV:
625 mcam_reg_write_mask(cam, REG_CTRL0,
626 C0_DF_YUV|C0_YUV_PACKED|C0_YUVE_YUYV,
627 C0_DF_MASK);
628 break;
629
630 case V4L2_PIX_FMT_RGB444:
631 mcam_reg_write_mask(cam, REG_CTRL0,
632 C0_DF_RGB|C0_RGBF_444|C0_RGB4_XRGB,
633 C0_DF_MASK);
634 /* Alpha value? */
635 break;
636
637 case V4L2_PIX_FMT_RGB565:
638 mcam_reg_write_mask(cam, REG_CTRL0,
639 C0_DF_RGB|C0_RGBF_565|C0_RGB5_BGGR,
640 C0_DF_MASK);
641 break;
642
643 default:
644 cam_err(cam, "Unknown format %x\n", cam->pix_format.pixelformat);
645 break;
646 }
647 /*
648 * Make sure it knows we want to use hsync/vsync.
649 */
650 mcam_reg_write_mask(cam, REG_CTRL0, C0_SIF_HVSYNC,
651 C0_SIFM_MASK);
652 }
653
654
655 /*
656 * Configure the controller for operation; caller holds the
657 * device mutex.
658 */
659 static int mcam_ctlr_configure(struct mcam_camera *cam)
660 {
661 unsigned long flags;
662
663 spin_lock_irqsave(&cam->dev_lock, flags);
664 cam->dma_setup(cam);
665 mcam_ctlr_image(cam);
666 mcam_set_config_needed(cam, 0);
667 clear_bit(CF_SG_RESTART, &cam->flags);
668 spin_unlock_irqrestore(&cam->dev_lock, flags);
669 return 0;
670 }
671
672 static void mcam_ctlr_irq_enable(struct mcam_camera *cam)
673 {
674 /*
675 * Clear any pending interrupts, since we do not
676 * expect to have I/O active prior to enabling.
677 */
678 mcam_reg_write(cam, REG_IRQSTAT, FRAMEIRQS);
679 mcam_reg_set_bit(cam, REG_IRQMASK, FRAMEIRQS);
680 }
681
682 static void mcam_ctlr_irq_disable(struct mcam_camera *cam)
683 {
684 mcam_reg_clear_bit(cam, REG_IRQMASK, FRAMEIRQS);
685 }
686
687
688
689 static void mcam_ctlr_init(struct mcam_camera *cam)
690 {
691 unsigned long flags;
692
693 spin_lock_irqsave(&cam->dev_lock, flags);
694 /*
695 * Make sure it's not powered down.
696 */
697 mcam_reg_clear_bit(cam, REG_CTRL1, C1_PWRDWN);
698 /*
699 * Turn off the enable bit. It sure should be off anyway,
700 * but it's good to be sure.
701 */
702 mcam_reg_clear_bit(cam, REG_CTRL0, C0_ENABLE);
703 /*
704 * Clock the sensor appropriately. Controller clock should
705 * be 48MHz, sensor "typical" value is half that.
706 */
707 mcam_reg_write_mask(cam, REG_CLKCTRL, 2, CLK_DIV_MASK);
708 spin_unlock_irqrestore(&cam->dev_lock, flags);
709 }
710
711
712 /*
713 * Stop the controller, and don't return until we're really sure that no
714 * further DMA is going on.
715 */
716 static void mcam_ctlr_stop_dma(struct mcam_camera *cam)
717 {
718 unsigned long flags;
719
720 /*
721 * Theory: stop the camera controller (whether it is operating
722 * or not). Delay briefly just in case we race with the SOF
723 * interrupt, then wait until no DMA is active.
724 */
725 spin_lock_irqsave(&cam->dev_lock, flags);
726 clear_bit(CF_SG_RESTART, &cam->flags);
727 mcam_ctlr_stop(cam);
728 cam->state = S_IDLE;
729 spin_unlock_irqrestore(&cam->dev_lock, flags);
730 msleep(40);
731 if (test_bit(CF_DMA_ACTIVE, &cam->flags))
732 cam_err(cam, "Timeout waiting for DMA to end\n");
733 /* This would be bad news - what now? */
734 spin_lock_irqsave(&cam->dev_lock, flags);
735 mcam_ctlr_irq_disable(cam);
736 spin_unlock_irqrestore(&cam->dev_lock, flags);
737 }
738
739 /*
740 * Power up and down.
741 */
742 static void mcam_ctlr_power_up(struct mcam_camera *cam)
743 {
744 unsigned long flags;
745
746 spin_lock_irqsave(&cam->dev_lock, flags);
747 cam->plat_power_up(cam);
748 mcam_reg_clear_bit(cam, REG_CTRL1, C1_PWRDWN);
749 spin_unlock_irqrestore(&cam->dev_lock, flags);
750 msleep(5); /* Just to be sure */
751 }
752
753 static void mcam_ctlr_power_down(struct mcam_camera *cam)
754 {
755 unsigned long flags;
756
757 spin_lock_irqsave(&cam->dev_lock, flags);
758 /*
759 * School of hard knocks department: be sure we do any register
760 * twiddling on the controller *before* calling the platform
761 * power down routine.
762 */
763 mcam_reg_set_bit(cam, REG_CTRL1, C1_PWRDWN);
764 cam->plat_power_down(cam);
765 spin_unlock_irqrestore(&cam->dev_lock, flags);
766 }
767
768 /* -------------------------------------------------------------------- */
769 /*
770 * Communications with the sensor.
771 */
772
773 static int __mcam_cam_reset(struct mcam_camera *cam)
774 {
775 return sensor_call(cam, core, reset, 0);
776 }
777
778 /*
779 * We have found the sensor on the i2c. Let's try to have a
780 * conversation.
781 */
782 static int mcam_cam_init(struct mcam_camera *cam)
783 {
784 struct v4l2_dbg_chip_ident chip;
785 int ret;
786
787 mutex_lock(&cam->s_mutex);
788 if (cam->state != S_NOTREADY)
789 cam_warn(cam, "Cam init with device in funky state %d",
790 cam->state);
791 ret = __mcam_cam_reset(cam);
792 if (ret)
793 goto out;
794 chip.ident = V4L2_IDENT_NONE;
795 chip.match.type = V4L2_CHIP_MATCH_I2C_ADDR;
796 chip.match.addr = cam->sensor_addr;
797 ret = sensor_call(cam, core, g_chip_ident, &chip);
798 if (ret)
799 goto out;
800 cam->sensor_type = chip.ident;
801 if (cam->sensor_type != V4L2_IDENT_OV7670) {
802 cam_err(cam, "Unsupported sensor type 0x%x", cam->sensor_type);
803 ret = -EINVAL;
804 goto out;
805 }
806 /* Get/set parameters? */
807 ret = 0;
808 cam->state = S_IDLE;
809 out:
810 mcam_ctlr_power_down(cam);
811 mutex_unlock(&cam->s_mutex);
812 return ret;
813 }
814
815 /*
816 * Configure the sensor to match the parameters we have. Caller should
817 * hold s_mutex
818 */
819 static int mcam_cam_set_flip(struct mcam_camera *cam)
820 {
821 struct v4l2_control ctrl;
822
823 memset(&ctrl, 0, sizeof(ctrl));
824 ctrl.id = V4L2_CID_VFLIP;
825 ctrl.value = flip;
826 return sensor_call(cam, core, s_ctrl, &ctrl);
827 }
828
829
830 static int mcam_cam_configure(struct mcam_camera *cam)
831 {
832 struct v4l2_mbus_framefmt mbus_fmt;
833 int ret;
834
835 v4l2_fill_mbus_format(&mbus_fmt, &cam->pix_format, cam->mbus_code);
836 ret = sensor_call(cam, core, init, 0);
837 if (ret == 0)
838 ret = sensor_call(cam, video, s_mbus_fmt, &mbus_fmt);
839 /*
840 * OV7670 does weird things if flip is set *before* format...
841 */
842 ret += mcam_cam_set_flip(cam);
843 return ret;
844 }
845
846 /*
847 * Get everything ready, and start grabbing frames.
848 */
849 static int mcam_read_setup(struct mcam_camera *cam)
850 {
851 int ret;
852 unsigned long flags;
853
854 /*
855 * Configuration. If we still don't have DMA buffers,
856 * make one last, desperate attempt.
857 */
858 if (cam->buffer_mode == B_vmalloc && cam->nbufs == 0 &&
859 mcam_alloc_dma_bufs(cam, 0))
860 return -ENOMEM;
861
862 if (mcam_needs_config(cam)) {
863 mcam_cam_configure(cam);
864 ret = mcam_ctlr_configure(cam);
865 if (ret)
866 return ret;
867 }
868
869 /*
870 * Turn it loose.
871 */
872 spin_lock_irqsave(&cam->dev_lock, flags);
873 mcam_reset_buffers(cam);
874 mcam_ctlr_irq_enable(cam);
875 cam->state = S_STREAMING;
876 mcam_ctlr_start(cam);
877 spin_unlock_irqrestore(&cam->dev_lock, flags);
878 return 0;
879 }
880
881 /* ----------------------------------------------------------------------- */
882 /*
883 * Videobuf2 interface code.
884 */
885
886 static int mcam_vb_queue_setup(struct vb2_queue *vq,
887 const struct v4l2_format *fmt, unsigned int *nbufs,
888 unsigned int *num_planes, unsigned int sizes[],
889 void *alloc_ctxs[])
890 {
891 struct mcam_camera *cam = vb2_get_drv_priv(vq);
892 int minbufs = (cam->buffer_mode == B_DMA_contig) ? 3 : 2;
893
894 sizes[0] = cam->pix_format.sizeimage;
895 *num_planes = 1; /* Someday we have to support planar formats... */
896 if (*nbufs < minbufs)
897 *nbufs = minbufs;
898 if (cam->buffer_mode == B_DMA_contig)
899 alloc_ctxs[0] = cam->vb_alloc_ctx;
900 return 0;
901 }
902
903
904 static void mcam_vb_buf_queue(struct vb2_buffer *vb)
905 {
906 struct mcam_vb_buffer *mvb = vb_to_mvb(vb);
907 struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue);
908 unsigned long flags;
909 int start;
910
911 spin_lock_irqsave(&cam->dev_lock, flags);
912 start = (cam->state == S_BUFWAIT) && !list_empty(&cam->buffers);
913 list_add(&mvb->queue, &cam->buffers);
914 if (test_bit(CF_SG_RESTART, &cam->flags))
915 mcam_sg_restart(cam);
916 spin_unlock_irqrestore(&cam->dev_lock, flags);
917 if (start)
918 mcam_read_setup(cam);
919 }
920
921
922 /*
923 * vb2 uses these to release the mutex when waiting in dqbuf. I'm
924 * not actually sure we need to do this (I'm not sure that vb2_dqbuf() needs
925 * to be called with the mutex held), but better safe than sorry.
926 */
927 static void mcam_vb_wait_prepare(struct vb2_queue *vq)
928 {
929 struct mcam_camera *cam = vb2_get_drv_priv(vq);
930
931 mutex_unlock(&cam->s_mutex);
932 }
933
934 static void mcam_vb_wait_finish(struct vb2_queue *vq)
935 {
936 struct mcam_camera *cam = vb2_get_drv_priv(vq);
937
938 mutex_lock(&cam->s_mutex);
939 }
940
941 /*
942 * These need to be called with the mutex held from vb2
943 */
944 static int mcam_vb_start_streaming(struct vb2_queue *vq, unsigned int count)
945 {
946 struct mcam_camera *cam = vb2_get_drv_priv(vq);
947
948 if (cam->state != S_IDLE) {
949 INIT_LIST_HEAD(&cam->buffers);
950 return -EINVAL;
951 }
952 cam->sequence = 0;
953 /*
954 * Videobuf2 sneakily hoards all the buffers and won't
955 * give them to us until *after* streaming starts. But
956 * we can't actually start streaming until we have a
957 * destination. So go into a wait state and hope they
958 * give us buffers soon.
959 */
960 if (cam->buffer_mode != B_vmalloc && list_empty(&cam->buffers)) {
961 cam->state = S_BUFWAIT;
962 return 0;
963 }
964 return mcam_read_setup(cam);
965 }
966
967 static int mcam_vb_stop_streaming(struct vb2_queue *vq)
968 {
969 struct mcam_camera *cam = vb2_get_drv_priv(vq);
970 unsigned long flags;
971
972 if (cam->state == S_BUFWAIT) {
973 /* They never gave us buffers */
974 cam->state = S_IDLE;
975 return 0;
976 }
977 if (cam->state != S_STREAMING)
978 return -EINVAL;
979 mcam_ctlr_stop_dma(cam);
980 /*
981 * VB2 reclaims the buffers, so we need to forget
982 * about them.
983 */
984 spin_lock_irqsave(&cam->dev_lock, flags);
985 INIT_LIST_HEAD(&cam->buffers);
986 spin_unlock_irqrestore(&cam->dev_lock, flags);
987 return 0;
988 }
989
990
991 static const struct vb2_ops mcam_vb2_ops = {
992 .queue_setup = mcam_vb_queue_setup,
993 .buf_queue = mcam_vb_buf_queue,
994 .start_streaming = mcam_vb_start_streaming,
995 .stop_streaming = mcam_vb_stop_streaming,
996 .wait_prepare = mcam_vb_wait_prepare,
997 .wait_finish = mcam_vb_wait_finish,
998 };
999
1000
1001 #ifdef MCAM_MODE_DMA_SG
1002 /*
1003 * Scatter/gather mode uses all of the above functions plus a
1004 * few extras to deal with DMA mapping.
1005 */
1006 static int mcam_vb_sg_buf_init(struct vb2_buffer *vb)
1007 {
1008 struct mcam_vb_buffer *mvb = vb_to_mvb(vb);
1009 struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue);
1010 int ndesc = cam->pix_format.sizeimage/PAGE_SIZE + 1;
1011
1012 mvb->dma_desc = dma_alloc_coherent(cam->dev,
1013 ndesc * sizeof(struct mcam_dma_desc),
1014 &mvb->dma_desc_pa, GFP_KERNEL);
1015 if (mvb->dma_desc == NULL) {
1016 cam_err(cam, "Unable to get DMA descriptor array\n");
1017 return -ENOMEM;
1018 }
1019 return 0;
1020 }
1021
1022 static int mcam_vb_sg_buf_prepare(struct vb2_buffer *vb)
1023 {
1024 struct mcam_vb_buffer *mvb = vb_to_mvb(vb);
1025 struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue);
1026 struct vb2_dma_sg_desc *sgd = vb2_dma_sg_plane_desc(vb, 0);
1027 struct mcam_dma_desc *desc = mvb->dma_desc;
1028 struct scatterlist *sg;
1029 int i;
1030
1031 mvb->dma_desc_nent = dma_map_sg(cam->dev, sgd->sglist, sgd->num_pages,
1032 DMA_FROM_DEVICE);
1033 if (mvb->dma_desc_nent <= 0)
1034 return -EIO; /* Not sure what's right here */
1035 for_each_sg(sgd->sglist, sg, mvb->dma_desc_nent, i) {
1036 desc->dma_addr = sg_dma_address(sg);
1037 desc->segment_len = sg_dma_len(sg);
1038 desc++;
1039 }
1040 return 0;
1041 }
1042
1043 static int mcam_vb_sg_buf_finish(struct vb2_buffer *vb)
1044 {
1045 struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue);
1046 struct vb2_dma_sg_desc *sgd = vb2_dma_sg_plane_desc(vb, 0);
1047
1048 dma_unmap_sg(cam->dev, sgd->sglist, sgd->num_pages, DMA_FROM_DEVICE);
1049 return 0;
1050 }
1051
1052 static void mcam_vb_sg_buf_cleanup(struct vb2_buffer *vb)
1053 {
1054 struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue);
1055 struct mcam_vb_buffer *mvb = vb_to_mvb(vb);
1056 int ndesc = cam->pix_format.sizeimage/PAGE_SIZE + 1;
1057
1058 dma_free_coherent(cam->dev, ndesc * sizeof(struct mcam_dma_desc),
1059 mvb->dma_desc, mvb->dma_desc_pa);
1060 }
1061
1062
1063 static const struct vb2_ops mcam_vb2_sg_ops = {
1064 .queue_setup = mcam_vb_queue_setup,
1065 .buf_init = mcam_vb_sg_buf_init,
1066 .buf_prepare = mcam_vb_sg_buf_prepare,
1067 .buf_queue = mcam_vb_buf_queue,
1068 .buf_finish = mcam_vb_sg_buf_finish,
1069 .buf_cleanup = mcam_vb_sg_buf_cleanup,
1070 .start_streaming = mcam_vb_start_streaming,
1071 .stop_streaming = mcam_vb_stop_streaming,
1072 .wait_prepare = mcam_vb_wait_prepare,
1073 .wait_finish = mcam_vb_wait_finish,
1074 };
1075
1076 #endif /* MCAM_MODE_DMA_SG */
1077
1078 static int mcam_setup_vb2(struct mcam_camera *cam)
1079 {
1080 struct vb2_queue *vq = &cam->vb_queue;
1081
1082 memset(vq, 0, sizeof(*vq));
1083 vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1084 vq->drv_priv = cam;
1085 INIT_LIST_HEAD(&cam->buffers);
1086 switch (cam->buffer_mode) {
1087 case B_DMA_contig:
1088 #ifdef MCAM_MODE_DMA_CONTIG
1089 vq->ops = &mcam_vb2_ops;
1090 vq->mem_ops = &vb2_dma_contig_memops;
1091 cam->vb_alloc_ctx = vb2_dma_contig_init_ctx(cam->dev);
1092 vq->io_modes = VB2_MMAP | VB2_USERPTR;
1093 cam->dma_setup = mcam_ctlr_dma_contig;
1094 cam->frame_complete = mcam_dma_contig_done;
1095 #endif
1096 break;
1097 case B_DMA_sg:
1098 #ifdef MCAM_MODE_DMA_SG
1099 vq->ops = &mcam_vb2_sg_ops;
1100 vq->mem_ops = &vb2_dma_sg_memops;
1101 vq->io_modes = VB2_MMAP | VB2_USERPTR;
1102 cam->dma_setup = mcam_ctlr_dma_sg;
1103 cam->frame_complete = mcam_dma_sg_done;
1104 #endif
1105 break;
1106 case B_vmalloc:
1107 #ifdef MCAM_MODE_VMALLOC
1108 tasklet_init(&cam->s_tasklet, mcam_frame_tasklet,
1109 (unsigned long) cam);
1110 vq->ops = &mcam_vb2_ops;
1111 vq->mem_ops = &vb2_vmalloc_memops;
1112 vq->buf_struct_size = sizeof(struct mcam_vb_buffer);
1113 vq->io_modes = VB2_MMAP;
1114 cam->dma_setup = mcam_ctlr_dma_vmalloc;
1115 cam->frame_complete = mcam_vmalloc_done;
1116 #endif
1117 break;
1118 }
1119 return vb2_queue_init(vq);
1120 }
1121
1122 static void mcam_cleanup_vb2(struct mcam_camera *cam)
1123 {
1124 vb2_queue_release(&cam->vb_queue);
1125 #ifdef MCAM_MODE_DMA_CONTIG
1126 if (cam->buffer_mode == B_DMA_contig)
1127 vb2_dma_contig_cleanup_ctx(cam->vb_alloc_ctx);
1128 #endif
1129 }
1130
1131
1132 /* ---------------------------------------------------------------------- */
1133 /*
1134 * The long list of V4L2 ioctl() operations.
1135 */
1136
1137 static int mcam_vidioc_streamon(struct file *filp, void *priv,
1138 enum v4l2_buf_type type)
1139 {
1140 struct mcam_camera *cam = filp->private_data;
1141 int ret;
1142
1143 mutex_lock(&cam->s_mutex);
1144 ret = vb2_streamon(&cam->vb_queue, type);
1145 mutex_unlock(&cam->s_mutex);
1146 return ret;
1147 }
1148
1149
1150 static int mcam_vidioc_streamoff(struct file *filp, void *priv,
1151 enum v4l2_buf_type type)
1152 {
1153 struct mcam_camera *cam = filp->private_data;
1154 int ret;
1155
1156 mutex_lock(&cam->s_mutex);
1157 ret = vb2_streamoff(&cam->vb_queue, type);
1158 mutex_unlock(&cam->s_mutex);
1159 return ret;
1160 }
1161
1162
1163 static int mcam_vidioc_reqbufs(struct file *filp, void *priv,
1164 struct v4l2_requestbuffers *req)
1165 {
1166 struct mcam_camera *cam = filp->private_data;
1167 int ret;
1168
1169 mutex_lock(&cam->s_mutex);
1170 ret = vb2_reqbufs(&cam->vb_queue, req);
1171 mutex_unlock(&cam->s_mutex);
1172 return ret;
1173 }
1174
1175
1176 static int mcam_vidioc_querybuf(struct file *filp, void *priv,
1177 struct v4l2_buffer *buf)
1178 {
1179 struct mcam_camera *cam = filp->private_data;
1180 int ret;
1181
1182 mutex_lock(&cam->s_mutex);
1183 ret = vb2_querybuf(&cam->vb_queue, buf);
1184 mutex_unlock(&cam->s_mutex);
1185 return ret;
1186 }
1187
1188 static int mcam_vidioc_qbuf(struct file *filp, void *priv,
1189 struct v4l2_buffer *buf)
1190 {
1191 struct mcam_camera *cam = filp->private_data;
1192 int ret;
1193
1194 mutex_lock(&cam->s_mutex);
1195 ret = vb2_qbuf(&cam->vb_queue, buf);
1196 mutex_unlock(&cam->s_mutex);
1197 return ret;
1198 }
1199
1200 static int mcam_vidioc_dqbuf(struct file *filp, void *priv,
1201 struct v4l2_buffer *buf)
1202 {
1203 struct mcam_camera *cam = filp->private_data;
1204 int ret;
1205
1206 mutex_lock(&cam->s_mutex);
1207 ret = vb2_dqbuf(&cam->vb_queue, buf, filp->f_flags & O_NONBLOCK);
1208 mutex_unlock(&cam->s_mutex);
1209 return ret;
1210 }
1211
1212
1213
1214 static int mcam_vidioc_queryctrl(struct file *filp, void *priv,
1215 struct v4l2_queryctrl *qc)
1216 {
1217 struct mcam_camera *cam = priv;
1218 int ret;
1219
1220 mutex_lock(&cam->s_mutex);
1221 ret = sensor_call(cam, core, queryctrl, qc);
1222 mutex_unlock(&cam->s_mutex);
1223 return ret;
1224 }
1225
1226
1227 static int mcam_vidioc_g_ctrl(struct file *filp, void *priv,
1228 struct v4l2_control *ctrl)
1229 {
1230 struct mcam_camera *cam = priv;
1231 int ret;
1232
1233 mutex_lock(&cam->s_mutex);
1234 ret = sensor_call(cam, core, g_ctrl, ctrl);
1235 mutex_unlock(&cam->s_mutex);
1236 return ret;
1237 }
1238
1239
1240 static int mcam_vidioc_s_ctrl(struct file *filp, void *priv,
1241 struct v4l2_control *ctrl)
1242 {
1243 struct mcam_camera *cam = priv;
1244 int ret;
1245
1246 mutex_lock(&cam->s_mutex);
1247 ret = sensor_call(cam, core, s_ctrl, ctrl);
1248 mutex_unlock(&cam->s_mutex);
1249 return ret;
1250 }
1251
1252
1253 static int mcam_vidioc_querycap(struct file *file, void *priv,
1254 struct v4l2_capability *cap)
1255 {
1256 strcpy(cap->driver, "marvell_ccic");
1257 strcpy(cap->card, "marvell_ccic");
1258 cap->version = 1;
1259 cap->capabilities = V4L2_CAP_VIDEO_CAPTURE |
1260 V4L2_CAP_READWRITE | V4L2_CAP_STREAMING;
1261 return 0;
1262 }
1263
1264
1265 static int mcam_vidioc_enum_fmt_vid_cap(struct file *filp,
1266 void *priv, struct v4l2_fmtdesc *fmt)
1267 {
1268 if (fmt->index >= N_MCAM_FMTS)
1269 return -EINVAL;
1270 strlcpy(fmt->description, mcam_formats[fmt->index].desc,
1271 sizeof(fmt->description));
1272 fmt->pixelformat = mcam_formats[fmt->index].pixelformat;
1273 return 0;
1274 }
1275
1276 static int mcam_vidioc_try_fmt_vid_cap(struct file *filp, void *priv,
1277 struct v4l2_format *fmt)
1278 {
1279 struct mcam_camera *cam = priv;
1280 struct mcam_format_struct *f;
1281 struct v4l2_pix_format *pix = &fmt->fmt.pix;
1282 struct v4l2_mbus_framefmt mbus_fmt;
1283 int ret;
1284
1285 f = mcam_find_format(pix->pixelformat);
1286 pix->pixelformat = f->pixelformat;
1287 v4l2_fill_mbus_format(&mbus_fmt, pix, f->mbus_code);
1288 mutex_lock(&cam->s_mutex);
1289 ret = sensor_call(cam, video, try_mbus_fmt, &mbus_fmt);
1290 mutex_unlock(&cam->s_mutex);
1291 v4l2_fill_pix_format(pix, &mbus_fmt);
1292 pix->bytesperline = pix->width * f->bpp;
1293 pix->sizeimage = pix->height * pix->bytesperline;
1294 return ret;
1295 }
1296
1297 static int mcam_vidioc_s_fmt_vid_cap(struct file *filp, void *priv,
1298 struct v4l2_format *fmt)
1299 {
1300 struct mcam_camera *cam = priv;
1301 struct mcam_format_struct *f;
1302 int ret;
1303
1304 /*
1305 * Can't do anything if the device is not idle
1306 * Also can't if there are streaming buffers in place.
1307 */
1308 if (cam->state != S_IDLE || cam->vb_queue.num_buffers > 0)
1309 return -EBUSY;
1310
1311 f = mcam_find_format(fmt->fmt.pix.pixelformat);
1312
1313 /*
1314 * See if the formatting works in principle.
1315 */
1316 ret = mcam_vidioc_try_fmt_vid_cap(filp, priv, fmt);
1317 if (ret)
1318 return ret;
1319 /*
1320 * Now we start to change things for real, so let's do it
1321 * under lock.
1322 */
1323 mutex_lock(&cam->s_mutex);
1324 cam->pix_format = fmt->fmt.pix;
1325 cam->mbus_code = f->mbus_code;
1326
1327 /*
1328 * Make sure we have appropriate DMA buffers.
1329 */
1330 if (cam->buffer_mode == B_vmalloc) {
1331 ret = mcam_check_dma_buffers(cam);
1332 if (ret)
1333 goto out;
1334 }
1335 mcam_set_config_needed(cam, 1);
1336 ret = 0;
1337 out:
1338 mutex_unlock(&cam->s_mutex);
1339 return ret;
1340 }
1341
1342 /*
1343 * Return our stored notion of how the camera is/should be configured.
1344 * The V4l2 spec wants us to be smarter, and actually get this from
1345 * the camera (and not mess with it at open time). Someday.
1346 */
1347 static int mcam_vidioc_g_fmt_vid_cap(struct file *filp, void *priv,
1348 struct v4l2_format *f)
1349 {
1350 struct mcam_camera *cam = priv;
1351
1352 f->fmt.pix = cam->pix_format;
1353 return 0;
1354 }
1355
1356 /*
1357 * We only have one input - the sensor - so minimize the nonsense here.
1358 */
1359 static int mcam_vidioc_enum_input(struct file *filp, void *priv,
1360 struct v4l2_input *input)
1361 {
1362 if (input->index != 0)
1363 return -EINVAL;
1364
1365 input->type = V4L2_INPUT_TYPE_CAMERA;
1366 input->std = V4L2_STD_ALL; /* Not sure what should go here */
1367 strcpy(input->name, "Camera");
1368 return 0;
1369 }
1370
1371 static int mcam_vidioc_g_input(struct file *filp, void *priv, unsigned int *i)
1372 {
1373 *i = 0;
1374 return 0;
1375 }
1376
1377 static int mcam_vidioc_s_input(struct file *filp, void *priv, unsigned int i)
1378 {
1379 if (i != 0)
1380 return -EINVAL;
1381 return 0;
1382 }
1383
1384 /* from vivi.c */
1385 static int mcam_vidioc_s_std(struct file *filp, void *priv, v4l2_std_id *a)
1386 {
1387 return 0;
1388 }
1389
1390 /*
1391 * G/S_PARM. Most of this is done by the sensor, but we are
1392 * the level which controls the number of read buffers.
1393 */
1394 static int mcam_vidioc_g_parm(struct file *filp, void *priv,
1395 struct v4l2_streamparm *parms)
1396 {
1397 struct mcam_camera *cam = priv;
1398 int ret;
1399
1400 mutex_lock(&cam->s_mutex);
1401 ret = sensor_call(cam, video, g_parm, parms);
1402 mutex_unlock(&cam->s_mutex);
1403 parms->parm.capture.readbuffers = n_dma_bufs;
1404 return ret;
1405 }
1406
1407 static int mcam_vidioc_s_parm(struct file *filp, void *priv,
1408 struct v4l2_streamparm *parms)
1409 {
1410 struct mcam_camera *cam = priv;
1411 int ret;
1412
1413 mutex_lock(&cam->s_mutex);
1414 ret = sensor_call(cam, video, s_parm, parms);
1415 mutex_unlock(&cam->s_mutex);
1416 parms->parm.capture.readbuffers = n_dma_bufs;
1417 return ret;
1418 }
1419
1420 static int mcam_vidioc_g_chip_ident(struct file *file, void *priv,
1421 struct v4l2_dbg_chip_ident *chip)
1422 {
1423 struct mcam_camera *cam = priv;
1424
1425 chip->ident = V4L2_IDENT_NONE;
1426 chip->revision = 0;
1427 if (v4l2_chip_match_host(&chip->match)) {
1428 chip->ident = cam->chip_id;
1429 return 0;
1430 }
1431 return sensor_call(cam, core, g_chip_ident, chip);
1432 }
1433
1434 static int mcam_vidioc_enum_framesizes(struct file *filp, void *priv,
1435 struct v4l2_frmsizeenum *sizes)
1436 {
1437 struct mcam_camera *cam = priv;
1438 int ret;
1439
1440 mutex_lock(&cam->s_mutex);
1441 ret = sensor_call(cam, video, enum_framesizes, sizes);
1442 mutex_unlock(&cam->s_mutex);
1443 return ret;
1444 }
1445
1446 static int mcam_vidioc_enum_frameintervals(struct file *filp, void *priv,
1447 struct v4l2_frmivalenum *interval)
1448 {
1449 struct mcam_camera *cam = priv;
1450 int ret;
1451
1452 mutex_lock(&cam->s_mutex);
1453 ret = sensor_call(cam, video, enum_frameintervals, interval);
1454 mutex_unlock(&cam->s_mutex);
1455 return ret;
1456 }
1457
1458 #ifdef CONFIG_VIDEO_ADV_DEBUG
1459 static int mcam_vidioc_g_register(struct file *file, void *priv,
1460 struct v4l2_dbg_register *reg)
1461 {
1462 struct mcam_camera *cam = priv;
1463
1464 if (v4l2_chip_match_host(&reg->match)) {
1465 reg->val = mcam_reg_read(cam, reg->reg);
1466 reg->size = 4;
1467 return 0;
1468 }
1469 return sensor_call(cam, core, g_register, reg);
1470 }
1471
1472 static int mcam_vidioc_s_register(struct file *file, void *priv,
1473 struct v4l2_dbg_register *reg)
1474 {
1475 struct mcam_camera *cam = priv;
1476
1477 if (v4l2_chip_match_host(&reg->match)) {
1478 mcam_reg_write(cam, reg->reg, reg->val);
1479 return 0;
1480 }
1481 return sensor_call(cam, core, s_register, reg);
1482 }
1483 #endif
1484
1485 static const struct v4l2_ioctl_ops mcam_v4l_ioctl_ops = {
1486 .vidioc_querycap = mcam_vidioc_querycap,
1487 .vidioc_enum_fmt_vid_cap = mcam_vidioc_enum_fmt_vid_cap,
1488 .vidioc_try_fmt_vid_cap = mcam_vidioc_try_fmt_vid_cap,
1489 .vidioc_s_fmt_vid_cap = mcam_vidioc_s_fmt_vid_cap,
1490 .vidioc_g_fmt_vid_cap = mcam_vidioc_g_fmt_vid_cap,
1491 .vidioc_enum_input = mcam_vidioc_enum_input,
1492 .vidioc_g_input = mcam_vidioc_g_input,
1493 .vidioc_s_input = mcam_vidioc_s_input,
1494 .vidioc_s_std = mcam_vidioc_s_std,
1495 .vidioc_reqbufs = mcam_vidioc_reqbufs,
1496 .vidioc_querybuf = mcam_vidioc_querybuf,
1497 .vidioc_qbuf = mcam_vidioc_qbuf,
1498 .vidioc_dqbuf = mcam_vidioc_dqbuf,
1499 .vidioc_streamon = mcam_vidioc_streamon,
1500 .vidioc_streamoff = mcam_vidioc_streamoff,
1501 .vidioc_queryctrl = mcam_vidioc_queryctrl,
1502 .vidioc_g_ctrl = mcam_vidioc_g_ctrl,
1503 .vidioc_s_ctrl = mcam_vidioc_s_ctrl,
1504 .vidioc_g_parm = mcam_vidioc_g_parm,
1505 .vidioc_s_parm = mcam_vidioc_s_parm,
1506 .vidioc_enum_framesizes = mcam_vidioc_enum_framesizes,
1507 .vidioc_enum_frameintervals = mcam_vidioc_enum_frameintervals,
1508 .vidioc_g_chip_ident = mcam_vidioc_g_chip_ident,
1509 #ifdef CONFIG_VIDEO_ADV_DEBUG
1510 .vidioc_g_register = mcam_vidioc_g_register,
1511 .vidioc_s_register = mcam_vidioc_s_register,
1512 #endif
1513 };
1514
1515 /* ---------------------------------------------------------------------- */
1516 /*
1517 * Our various file operations.
1518 */
1519 static int mcam_v4l_open(struct file *filp)
1520 {
1521 struct mcam_camera *cam = video_drvdata(filp);
1522 int ret = 0;
1523
1524 filp->private_data = cam;
1525
1526 frames = singles = delivered = 0;
1527 mutex_lock(&cam->s_mutex);
1528 if (cam->users == 0) {
1529 ret = mcam_setup_vb2(cam);
1530 if (ret)
1531 goto out;
1532 mcam_ctlr_power_up(cam);
1533 __mcam_cam_reset(cam);
1534 mcam_set_config_needed(cam, 1);
1535 }
1536 (cam->users)++;
1537 out:
1538 mutex_unlock(&cam->s_mutex);
1539 return ret;
1540 }
1541
1542
1543 static int mcam_v4l_release(struct file *filp)
1544 {
1545 struct mcam_camera *cam = filp->private_data;
1546
1547 cam_err(cam, "Release, %d frames, %d singles, %d delivered\n", frames,
1548 singles, delivered);
1549 mutex_lock(&cam->s_mutex);
1550 (cam->users)--;
1551 if (filp == cam->owner) {
1552 mcam_ctlr_stop_dma(cam);
1553 cam->owner = NULL;
1554 }
1555 if (cam->users == 0) {
1556 mcam_cleanup_vb2(cam);
1557 mcam_ctlr_power_down(cam);
1558 if (cam->buffer_mode == B_vmalloc && alloc_bufs_at_read)
1559 mcam_free_dma_bufs(cam);
1560 }
1561 mutex_unlock(&cam->s_mutex);
1562 return 0;
1563 }
1564
1565 static ssize_t mcam_v4l_read(struct file *filp,
1566 char __user *buffer, size_t len, loff_t *pos)
1567 {
1568 struct mcam_camera *cam = filp->private_data;
1569 int ret;
1570
1571 mutex_lock(&cam->s_mutex);
1572 ret = vb2_read(&cam->vb_queue, buffer, len, pos,
1573 filp->f_flags & O_NONBLOCK);
1574 mutex_unlock(&cam->s_mutex);
1575 return ret;
1576 }
1577
1578
1579
1580 static unsigned int mcam_v4l_poll(struct file *filp,
1581 struct poll_table_struct *pt)
1582 {
1583 struct mcam_camera *cam = filp->private_data;
1584 int ret;
1585
1586 mutex_lock(&cam->s_mutex);
1587 ret = vb2_poll(&cam->vb_queue, filp, pt);
1588 mutex_unlock(&cam->s_mutex);
1589 return ret;
1590 }
1591
1592
1593 static int mcam_v4l_mmap(struct file *filp, struct vm_area_struct *vma)
1594 {
1595 struct mcam_camera *cam = filp->private_data;
1596 int ret;
1597
1598 mutex_lock(&cam->s_mutex);
1599 ret = vb2_mmap(&cam->vb_queue, vma);
1600 mutex_unlock(&cam->s_mutex);
1601 return ret;
1602 }
1603
1604
1605
1606 static const struct v4l2_file_operations mcam_v4l_fops = {
1607 .owner = THIS_MODULE,
1608 .open = mcam_v4l_open,
1609 .release = mcam_v4l_release,
1610 .read = mcam_v4l_read,
1611 .poll = mcam_v4l_poll,
1612 .mmap = mcam_v4l_mmap,
1613 .unlocked_ioctl = video_ioctl2,
1614 };
1615
1616
1617 /*
1618 * This template device holds all of those v4l2 methods; we
1619 * clone it for specific real devices.
1620 */
1621 static struct video_device mcam_v4l_template = {
1622 .name = "mcam",
1623 .tvnorms = V4L2_STD_NTSC_M,
1624 .current_norm = V4L2_STD_NTSC_M, /* make mplayer happy */
1625
1626 .fops = &mcam_v4l_fops,
1627 .ioctl_ops = &mcam_v4l_ioctl_ops,
1628 .release = video_device_release_empty,
1629 };
1630
1631 /* ---------------------------------------------------------------------- */
1632 /*
1633 * Interrupt handler stuff
1634 */
1635 static void mcam_frame_complete(struct mcam_camera *cam, int frame)
1636 {
1637 /*
1638 * Basic frame housekeeping.
1639 */
1640 set_bit(frame, &cam->flags);
1641 clear_bit(CF_DMA_ACTIVE, &cam->flags);
1642 cam->next_buf = frame;
1643 cam->buf_seq[frame] = ++(cam->sequence);
1644 frames++;
1645 /*
1646 * "This should never happen"
1647 */
1648 if (cam->state != S_STREAMING)
1649 return;
1650 /*
1651 * Process the frame and set up the next one.
1652 */
1653 cam->frame_complete(cam, frame);
1654 }
1655
1656
1657 /*
1658 * The interrupt handler; this needs to be called from the
1659 * platform irq handler with the lock held.
1660 */
1661 int mccic_irq(struct mcam_camera *cam, unsigned int irqs)
1662 {
1663 unsigned int frame, handled = 0;
1664
1665 mcam_reg_write(cam, REG_IRQSTAT, FRAMEIRQS); /* Clear'em all */
1666 /*
1667 * Handle any frame completions. There really should
1668 * not be more than one of these, or we have fallen
1669 * far behind.
1670 *
1671 * When running in S/G mode, the frame number lacks any
1672 * real meaning - there's only one descriptor array - but
1673 * the controller still picks a different one to signal
1674 * each time.
1675 */
1676 for (frame = 0; frame < cam->nbufs; frame++)
1677 if (irqs & (IRQ_EOF0 << frame)) {
1678 mcam_frame_complete(cam, frame);
1679 handled = 1;
1680 }
1681 /*
1682 * If a frame starts, note that we have DMA active. This
1683 * code assumes that we won't get multiple frame interrupts
1684 * at once; may want to rethink that.
1685 */
1686 if (irqs & (IRQ_SOF0 | IRQ_SOF1 | IRQ_SOF2)) {
1687 set_bit(CF_DMA_ACTIVE, &cam->flags);
1688 handled = 1;
1689 if (cam->buffer_mode == B_DMA_sg)
1690 mcam_ctlr_stop(cam);
1691 }
1692 return handled;
1693 }
1694
1695 /* ---------------------------------------------------------------------- */
1696 /*
1697 * Registration and such.
1698 */
1699 static struct ov7670_config sensor_cfg = {
1700 /*
1701 * Exclude QCIF mode, because it only captures a tiny portion
1702 * of the sensor FOV
1703 */
1704 .min_width = 320,
1705 .min_height = 240,
1706 };
1707
1708
1709 int mccic_register(struct mcam_camera *cam)
1710 {
1711 struct i2c_board_info ov7670_info = {
1712 .type = "ov7670",
1713 .addr = 0x42 >> 1,
1714 .platform_data = &sensor_cfg,
1715 };
1716 int ret;
1717
1718 /*
1719 * Validate the requested buffer mode.
1720 */
1721 if (buffer_mode >= 0)
1722 cam->buffer_mode = buffer_mode;
1723 if (cam->buffer_mode == B_DMA_sg &&
1724 cam->chip_id == V4L2_IDENT_CAFE) {
1725 printk(KERN_ERR "marvell-cam: Cafe can't do S/G I/O, "
1726 "attempting vmalloc mode instead\n");
1727 cam->buffer_mode = B_vmalloc;
1728 }
1729 if (!mcam_buffer_mode_supported(cam->buffer_mode)) {
1730 printk(KERN_ERR "marvell-cam: buffer mode %d unsupported\n",
1731 cam->buffer_mode);
1732 return -EINVAL;
1733 }
1734 /*
1735 * Register with V4L
1736 */
1737 ret = v4l2_device_register(cam->dev, &cam->v4l2_dev);
1738 if (ret)
1739 return ret;
1740
1741 mutex_init(&cam->s_mutex);
1742 cam->state = S_NOTREADY;
1743 mcam_set_config_needed(cam, 1);
1744 cam->pix_format = mcam_def_pix_format;
1745 cam->mbus_code = mcam_def_mbus_code;
1746 INIT_LIST_HEAD(&cam->buffers);
1747 mcam_ctlr_init(cam);
1748
1749 /*
1750 * Try to find the sensor.
1751 */
1752 sensor_cfg.clock_speed = cam->clock_speed;
1753 sensor_cfg.use_smbus = cam->use_smbus;
1754 cam->sensor_addr = ov7670_info.addr;
1755 cam->sensor = v4l2_i2c_new_subdev_board(&cam->v4l2_dev,
1756 cam->i2c_adapter, &ov7670_info, NULL);
1757 if (cam->sensor == NULL) {
1758 ret = -ENODEV;
1759 goto out_unregister;
1760 }
1761
1762 ret = mcam_cam_init(cam);
1763 if (ret)
1764 goto out_unregister;
1765 /*
1766 * Get the v4l2 setup done.
1767 */
1768 mutex_lock(&cam->s_mutex);
1769 cam->vdev = mcam_v4l_template;
1770 cam->vdev.debug = 0;
1771 cam->vdev.v4l2_dev = &cam->v4l2_dev;
1772 ret = video_register_device(&cam->vdev, VFL_TYPE_GRABBER, -1);
1773 if (ret)
1774 goto out;
1775 video_set_drvdata(&cam->vdev, cam);
1776
1777 /*
1778 * If so requested, try to get our DMA buffers now.
1779 */
1780 if (cam->buffer_mode == B_vmalloc && !alloc_bufs_at_read) {
1781 if (mcam_alloc_dma_bufs(cam, 1))
1782 cam_warn(cam, "Unable to alloc DMA buffers at load"
1783 " will try again later.");
1784 }
1785
1786 out:
1787 mutex_unlock(&cam->s_mutex);
1788 return ret;
1789 out_unregister:
1790 v4l2_device_unregister(&cam->v4l2_dev);
1791 return ret;
1792 }
1793
1794
1795 void mccic_shutdown(struct mcam_camera *cam)
1796 {
1797 /*
1798 * If we have no users (and we really, really should have no
1799 * users) the device will already be powered down. Trying to
1800 * take it down again will wedge the machine, which is frowned
1801 * upon.
1802 */
1803 if (cam->users > 0) {
1804 cam_warn(cam, "Removing a device with users!\n");
1805 mcam_ctlr_power_down(cam);
1806 }
1807 vb2_queue_release(&cam->vb_queue);
1808 if (cam->buffer_mode == B_vmalloc)
1809 mcam_free_dma_bufs(cam);
1810 video_unregister_device(&cam->vdev);
1811 v4l2_device_unregister(&cam->v4l2_dev);
1812 }
1813
1814 /*
1815 * Power management
1816 */
1817 #ifdef CONFIG_PM
1818
1819 void mccic_suspend(struct mcam_camera *cam)
1820 {
1821 enum mcam_state cstate = cam->state;
1822
1823 mcam_ctlr_stop_dma(cam);
1824 mcam_ctlr_power_down(cam);
1825 cam->state = cstate;
1826 }
1827
1828 int mccic_resume(struct mcam_camera *cam)
1829 {
1830 int ret = 0;
1831
1832 mutex_lock(&cam->s_mutex);
1833 if (cam->users > 0) {
1834 mcam_ctlr_power_up(cam);
1835 __mcam_cam_reset(cam);
1836 } else {
1837 mcam_ctlr_power_down(cam);
1838 }
1839 mutex_unlock(&cam->s_mutex);
1840
1841 set_bit(CF_CONFIG_NEEDED, &cam->flags);
1842 if (cam->state == S_STREAMING)
1843 ret = mcam_read_setup(cam);
1844 return ret;
1845 }
1846 #endif /* CONFIG_PM */
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