1 /* stk-sensor.c: Driver for ov96xx sensor (used in some Syntek webcams)
3 * Copyright 2007-2008 Jaime Velasco Juan <jsagarribay@gmail.com>
5 * Some parts derived from ov7670.c:
6 * Copyright 2006 One Laptop Per Child Association, Inc. Written
7 * by Jonathan Corbet with substantial inspiration from Mark
8 * McClelland's ovcamchip code.
10 * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net>
12 * This file may be distributed under the terms of the GNU General
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
28 /* Controlling the sensor via the STK1125 vendor specific control interface:
29 * The camera uses an OmniVision sensor and the stk1125 provides an
30 * SCCB(i2c)-USB bridge which let us program the sensor.
31 * In my case the sensor id is 0x9652, it can be read from sensor's register
32 * 0x0A and 0x0B as follows:
34 * output #R to index 0x0208
35 * output 0x0070 to index 0x0200
36 * input 1 byte from index 0x0201 (some kind of status register)
37 * until its value is 0x01
38 * input 1 byte from index 0x0209. This is the value of #R
39 * - write value V to register #R
40 * output #R to index 0x0204
41 * output V to index 0x0205
42 * output 0x0005 to index 0x0200
43 * input 1 byte from index 0x0201 until its value becomes 0x04
46 /* It seems the i2c bus is controlled with these registers */
48 #include "stk-webcam.h"
50 #define STK_IIC_BASE (0x0200)
51 # define STK_IIC_OP (STK_IIC_BASE)
52 # define STK_IIC_OP_TX (0x05)
53 # define STK_IIC_OP_RX (0x70)
54 # define STK_IIC_STAT (STK_IIC_BASE+1)
55 # define STK_IIC_STAT_TX_OK (0x04)
56 # define STK_IIC_STAT_RX_OK (0x01)
57 /* I don't know what does this register.
58 * when it is 0x00 or 0x01, we cannot talk to the sensor,
59 * other values work */
60 # define STK_IIC_ENABLE (STK_IIC_BASE+2)
61 # define STK_IIC_ENABLE_NO (0x00)
62 /* This is what the driver writes in windows */
63 # define STK_IIC_ENABLE_YES (0x1e)
65 * Address of the slave. Seems like the binary driver look for the
66 * sensor in multiple places, attempting a reset sequence.
67 * We only know about the ov9650
69 # define STK_IIC_ADDR (STK_IIC_BASE+3)
70 # define STK_IIC_TX_INDEX (STK_IIC_BASE+4)
71 # define STK_IIC_TX_VALUE (STK_IIC_BASE+5)
72 # define STK_IIC_RX_INDEX (STK_IIC_BASE+8)
73 # define STK_IIC_RX_VALUE (STK_IIC_BASE+9)
75 #define MAX_RETRIES (50)
77 #define SENSOR_ADDRESS (0x60)
79 /* From ov7670.c (These registers aren't fully accurate) */
82 #define REG_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */
83 #define REG_BLUE 0x01 /* blue gain */
84 #define REG_RED 0x02 /* red gain */
85 #define REG_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */
86 #define REG_COM1 0x04 /* Control 1 */
87 #define COM1_CCIR656 0x40 /* CCIR656 enable */
88 #define COM1_QFMT 0x20 /* QVGA/QCIF format */
89 #define COM1_SKIP_0 0x00 /* Do not skip any row */
90 #define COM1_SKIP_2 0x04 /* Skip 2 rows of 4 */
91 #define COM1_SKIP_3 0x08 /* Skip 3 rows of 4 */
92 #define REG_BAVE 0x05 /* U/B Average level */
93 #define REG_GbAVE 0x06 /* Y/Gb Average level */
94 #define REG_AECHH 0x07 /* AEC MS 5 bits */
95 #define REG_RAVE 0x08 /* V/R Average level */
96 #define REG_COM2 0x09 /* Control 2 */
97 #define COM2_SSLEEP 0x10 /* Soft sleep mode */
98 #define REG_PID 0x0a /* Product ID MSB */
99 #define REG_VER 0x0b /* Product ID LSB */
100 #define REG_COM3 0x0c /* Control 3 */
101 #define COM3_SWAP 0x40 /* Byte swap */
102 #define COM3_SCALEEN 0x08 /* Enable scaling */
103 #define COM3_DCWEN 0x04 /* Enable downsamp/crop/window */
104 #define REG_COM4 0x0d /* Control 4 */
105 #define REG_COM5 0x0e /* All "reserved" */
106 #define REG_COM6 0x0f /* Control 6 */
107 #define REG_AECH 0x10 /* More bits of AEC value */
108 #define REG_CLKRC 0x11 /* Clock control */
109 #define CLK_PLL 0x80 /* Enable internal PLL */
110 #define CLK_EXT 0x40 /* Use external clock directly */
111 #define CLK_SCALE 0x3f /* Mask for internal clock scale */
112 #define REG_COM7 0x12 /* Control 7 */
113 #define COM7_RESET 0x80 /* Register reset */
114 #define COM7_FMT_MASK 0x38
115 #define COM7_FMT_SXGA 0x00
116 #define COM7_FMT_VGA 0x40
117 #define COM7_FMT_CIF 0x20 /* CIF format */
118 #define COM7_FMT_QVGA 0x10 /* QVGA format */
119 #define COM7_FMT_QCIF 0x08 /* QCIF format */
120 #define COM7_RGB 0x04 /* bits 0 and 2 - RGB format */
121 #define COM7_YUV 0x00 /* YUV */
122 #define COM7_BAYER 0x01 /* Bayer format */
123 #define COM7_PBAYER 0x05 /* "Processed bayer" */
124 #define REG_COM8 0x13 /* Control 8 */
125 #define COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */
126 #define COM8_AECSTEP 0x40 /* Unlimited AEC step size */
127 #define COM8_BFILT 0x20 /* Band filter enable */
128 #define COM8_AGC 0x04 /* Auto gain enable */
129 #define COM8_AWB 0x02 /* White balance enable */
130 #define COM8_AEC 0x01 /* Auto exposure enable */
131 #define REG_COM9 0x14 /* Control 9 - gain ceiling */
132 #define REG_COM10 0x15 /* Control 10 */
133 #define COM10_HSYNC 0x40 /* HSYNC instead of HREF */
134 #define COM10_PCLK_HB 0x20 /* Suppress PCLK on horiz blank */
135 #define COM10_HREF_REV 0x08 /* Reverse HREF */
136 #define COM10_VS_LEAD 0x04 /* VSYNC on clock leading edge */
137 #define COM10_VS_NEG 0x02 /* VSYNC negative */
138 #define COM10_HS_NEG 0x01 /* HSYNC negative */
139 #define REG_HSTART 0x17 /* Horiz start high bits */
140 #define REG_HSTOP 0x18 /* Horiz stop high bits */
141 #define REG_VSTART 0x19 /* Vert start high bits */
142 #define REG_VSTOP 0x1a /* Vert stop high bits */
143 #define REG_PSHFT 0x1b /* Pixel delay after HREF */
144 #define REG_MIDH 0x1c /* Manuf. ID high */
145 #define REG_MIDL 0x1d /* Manuf. ID low */
146 #define REG_MVFP 0x1e /* Mirror / vflip */
147 #define MVFP_MIRROR 0x20 /* Mirror image */
148 #define MVFP_FLIP 0x10 /* Vertical flip */
150 #define REG_AEW 0x24 /* AGC upper limit */
151 #define REG_AEB 0x25 /* AGC lower limit */
152 #define REG_VPT 0x26 /* AGC/AEC fast mode op region */
153 #define REG_ADVFL 0x2d /* Insert dummy lines (LSB) */
154 #define REG_ADVFH 0x2e /* Insert dummy lines (MSB) */
155 #define REG_HSYST 0x30 /* HSYNC rising edge delay */
156 #define REG_HSYEN 0x31 /* HSYNC falling edge delay */
157 #define REG_HREF 0x32 /* HREF pieces */
158 #define REG_TSLB 0x3a /* lots of stuff */
159 #define TSLB_YLAST 0x04 /* UYVY or VYUY - see com13 */
160 #define TSLB_BYTEORD 0x08 /* swap bytes in 16bit mode? */
161 #define REG_COM11 0x3b /* Control 11 */
162 #define COM11_NIGHT 0x80 /* NIght mode enable */
163 #define COM11_NMFR 0x60 /* Two bit NM frame rate */
164 #define COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */
165 #define COM11_50HZ 0x08 /* Manual 50Hz select */
166 #define COM11_EXP 0x02
167 #define REG_COM12 0x3c /* Control 12 */
168 #define COM12_HREF 0x80 /* HREF always */
169 #define REG_COM13 0x3d /* Control 13 */
170 #define COM13_GAMMA 0x80 /* Gamma enable */
171 #define COM13_UVSAT 0x40 /* UV saturation auto adjustment */
172 #define COM13_CMATRIX 0x10 /* Enable color matrix for RGB or YUV */
173 #define COM13_UVSWAP 0x01 /* V before U - w/TSLB */
174 #define REG_COM14 0x3e /* Control 14 */
175 #define COM14_DCWEN 0x10 /* DCW/PCLK-scale enable */
176 #define REG_EDGE 0x3f /* Edge enhancement factor */
177 #define REG_COM15 0x40 /* Control 15 */
178 #define COM15_R10F0 0x00 /* Data range 10 to F0 */
179 #define COM15_R01FE 0x80 /* 01 to FE */
180 #define COM15_R00FF 0xc0 /* 00 to FF */
181 #define COM15_RGB565 0x10 /* RGB565 output */
182 #define COM15_RGBFIXME 0x20 /* FIXME */
183 #define COM15_RGB555 0x30 /* RGB555 output */
184 #define REG_COM16 0x41 /* Control 16 */
185 #define COM16_AWBGAIN 0x08 /* AWB gain enable */
186 #define REG_COM17 0x42 /* Control 17 */
187 #define COM17_AECWIN 0xc0 /* AEC window - must match COM4 */
188 #define COM17_CBAR 0x08 /* DSP Color bar */
191 * This matrix defines how the colors are generated, must be
192 * tweaked to adjust hue and saturation.
194 * Order: v-red, v-green, v-blue, u-red, u-green, u-blue
196 * They are nine-bit signed quantities, with the sign bit
197 * stored in 0x58. Sign for v-red is bit 0, and up from there.
199 #define REG_CMATRIX_BASE 0x4f
200 #define CMATRIX_LEN 6
201 #define REG_CMATRIX_SIGN 0x58
204 #define REG_BRIGHT 0x55 /* Brightness */
205 #define REG_CONTRAS 0x56 /* Contrast control */
207 #define REG_GFIX 0x69 /* Fix gain control */
209 #define REG_RGB444 0x8c /* RGB 444 control */
210 #define R444_ENABLE 0x02 /* Turn on RGB444, overrides 5x5 */
211 #define R444_RGBX 0x01 /* Empty nibble at end */
213 #define REG_HAECC1 0x9f /* Hist AEC/AGC control 1 */
214 #define REG_HAECC2 0xa0 /* Hist AEC/AGC control 2 */
216 #define REG_BD50MAX 0xa5 /* 50hz banding step limit */
217 #define REG_HAECC3 0xa6 /* Hist AEC/AGC control 3 */
218 #define REG_HAECC4 0xa7 /* Hist AEC/AGC control 4 */
219 #define REG_HAECC5 0xa8 /* Hist AEC/AGC control 5 */
220 #define REG_HAECC6 0xa9 /* Hist AEC/AGC control 6 */
221 #define REG_HAECC7 0xaa /* Hist AEC/AGC control 7 */
222 #define REG_BD60MAX 0xab /* 60hz banding step limit */
227 /* Returns 0 if OK */
228 static int stk_sensor_outb(struct stk_camera
*dev
, u8 reg
, u8 val
)
233 if (stk_camera_write_reg(dev
, STK_IIC_TX_INDEX
, reg
))
235 if (stk_camera_write_reg(dev
, STK_IIC_TX_VALUE
, val
))
237 if (stk_camera_write_reg(dev
, STK_IIC_OP
, STK_IIC_OP_TX
))
240 if (stk_camera_read_reg(dev
, STK_IIC_STAT
, &tmpval
))
243 } while (tmpval
== 0 && i
< MAX_RETRIES
);
244 if (tmpval
!= STK_IIC_STAT_TX_OK
) {
246 STK_ERROR("stk_sensor_outb failed, status=0x%02x\n",
253 static int stk_sensor_inb(struct stk_camera
*dev
, u8 reg
, u8
*val
)
258 if (stk_camera_write_reg(dev
, STK_IIC_RX_INDEX
, reg
))
260 if (stk_camera_write_reg(dev
, STK_IIC_OP
, STK_IIC_OP_RX
))
263 if (stk_camera_read_reg(dev
, STK_IIC_STAT
, &tmpval
))
266 } while (tmpval
== 0 && i
< MAX_RETRIES
);
267 if (tmpval
!= STK_IIC_STAT_RX_OK
) {
269 STK_ERROR("stk_sensor_inb failed, status=0x%02x\n",
274 if (stk_camera_read_reg(dev
, STK_IIC_RX_VALUE
, &tmpval
))
281 static int stk_sensor_write_regvals(struct stk_camera
*dev
,
287 while (rv
->reg
!= 0xff || rv
->val
!= 0xff) {
288 ret
= stk_sensor_outb(dev
, rv
->reg
, rv
->val
);
296 int stk_sensor_sleep(struct stk_camera
*dev
)
299 return stk_sensor_inb(dev
, REG_COM2
, &tmp
)
300 || stk_sensor_outb(dev
, REG_COM2
, tmp
|COM2_SSLEEP
);
303 int stk_sensor_wakeup(struct stk_camera
*dev
)
306 return stk_sensor_inb(dev
, REG_COM2
, &tmp
)
307 || stk_sensor_outb(dev
, REG_COM2
, tmp
&~COM2_SSLEEP
);
310 static struct regval ov_initvals
[] = {
311 {REG_CLKRC
, CLK_PLL
},
318 /* Do not enable fast AEC for now */
319 /*{REG_COM8, COM8_FASTAEC|COM8_AECSTEP|COM8_BFILT|COM8_AGC|COM8_AEC},*/
320 {REG_COM8
, COM8_AECSTEP
|COM8_BFILT
|COM8_AGC
|COM8_AEC
},
321 {0x39, 0x50}, {0x38, 0x93},
322 {0x37, 0x00}, {0x35, 0x81},
329 {0x33, 0xe2}, {0x34, 0xbf},
332 /* Gamma curve values */
333 /* { 0x7a, 0x20 }, { 0x7b, 0x10 },
334 { 0x7c, 0x1e }, { 0x7d, 0x35 },
335 { 0x7e, 0x5a }, { 0x7f, 0x69 },
336 { 0x80, 0x76 }, { 0x81, 0x80 },
337 { 0x82, 0x88 }, { 0x83, 0x8f },
338 { 0x84, 0x96 }, { 0x85, 0xa3 },
339 { 0x86, 0xaf }, { 0x87, 0xc4 },
340 { 0x88, 0xd7 }, { 0x89, 0xe8 },
345 {0x8f, 0xdf}, {0x8b, 0x06},
347 {0x94, 0x88}, {0x95, 0x88},
348 /* {REG_COM15, 0xc1}, TODO */
352 {REG_HAECC6
, 0xb8}, {REG_HAECC7
, 0x92},
354 {0x90, 0x00}, {0x91, 0x00},
355 {REG_HAECC1
, 0x00}, {REG_HAECC2
, 0x00},
356 {REG_AEW
, 0x68}, {REG_AEB
, 0x5c},
359 {0x2a, 0x00}, {0x2b, 0x00},
361 {0xff, 0xff}, /* END MARKER */
364 /* Probe the I2C bus and initialise the sensor chip */
365 int stk_sensor_init(struct stk_camera
*dev
)
370 if (stk_camera_write_reg(dev
, STK_IIC_ENABLE
, STK_IIC_ENABLE_YES
)
371 || stk_camera_write_reg(dev
, STK_IIC_ADDR
, SENSOR_ADDRESS
)
372 || stk_sensor_outb(dev
, REG_COM7
, COM7_RESET
)) {
373 STK_ERROR("Sensor resetting failed\n");
377 /* Read the manufacturer ID: ov = 0x7FA2 */
378 if (stk_sensor_inb(dev
, REG_MIDH
, &idh
)
379 || stk_sensor_inb(dev
, REG_MIDL
, &idl
)) {
380 STK_ERROR("Strange error reading sensor ID\n");
383 if (idh
!= 0x7f || idl
!= 0xa2) {
384 STK_ERROR("Huh? you don't have a sensor from ovt\n");
387 if (stk_sensor_inb(dev
, REG_PID
, &idh
)
388 || stk_sensor_inb(dev
, REG_VER
, &idl
)) {
389 STK_ERROR("Could not read sensor model\n");
392 stk_sensor_write_regvals(dev
, ov_initvals
);
394 STK_INFO("OmniVision sensor detected, id %02X%02X"
395 " at address %x\n", idh
, idl
, SENSOR_ADDRESS
);
399 /* V4L2_PIX_FMT_UYVY */
400 static struct regval ov_fmt_uyvy
[] = {
401 {REG_TSLB
, TSLB_YLAST
|0x08 },
402 { 0x4f, 0x80 }, /* "matrix coefficient 1" */
403 { 0x50, 0x80 }, /* "matrix coefficient 2" */
404 { 0x51, 0 }, /* vb */
405 { 0x52, 0x22 }, /* "matrix coefficient 4" */
406 { 0x53, 0x5e }, /* "matrix coefficient 5" */
407 { 0x54, 0x80 }, /* "matrix coefficient 6" */
408 {REG_COM13
, COM13_UVSAT
|COM13_CMATRIX
},
409 {REG_COM15
, COM15_R00FF
},
410 {0xff, 0xff}, /* END MARKER */
412 /* V4L2_PIX_FMT_YUYV */
413 static struct regval ov_fmt_yuyv
[] = {
415 { 0x4f, 0x80 }, /* "matrix coefficient 1" */
416 { 0x50, 0x80 }, /* "matrix coefficient 2" */
417 { 0x51, 0 }, /* vb */
418 { 0x52, 0x22 }, /* "matrix coefficient 4" */
419 { 0x53, 0x5e }, /* "matrix coefficient 5" */
420 { 0x54, 0x80 }, /* "matrix coefficient 6" */
421 {REG_COM13
, COM13_UVSAT
|COM13_CMATRIX
},
422 {REG_COM15
, COM15_R00FF
},
423 {0xff, 0xff}, /* END MARKER */
426 /* V4L2_PIX_FMT_RGB565X rrrrrggg gggbbbbb */
427 static struct regval ov_fmt_rgbr
[] = {
428 { REG_RGB444
, 0 }, /* No RGB444 please */
431 { REG_COM9
, 0x38 }, /* 16x gain ceiling; 0x8 is reserved bit */
432 { 0x4f, 0xb3 }, /* "matrix coefficient 1" */
433 { 0x50, 0xb3 }, /* "matrix coefficient 2" */
434 { 0x51, 0 }, /* vb */
435 { 0x52, 0x3d }, /* "matrix coefficient 4" */
436 { 0x53, 0xa7 }, /* "matrix coefficient 5" */
437 { 0x54, 0xe4 }, /* "matrix coefficient 6" */
438 { REG_COM13
, COM13_GAMMA
},
439 { REG_COM15
, COM15_RGB565
|COM15_R00FF
},
443 /* V4L2_PIX_FMT_RGB565 gggbbbbb rrrrrggg */
444 static struct regval ov_fmt_rgbp
[] = {
445 { REG_RGB444
, 0 }, /* No RGB444 please */
446 {REG_TSLB
, TSLB_BYTEORD
},
448 { REG_COM9
, 0x38 }, /* 16x gain ceiling; 0x8 is reserved bit */
449 { 0x4f, 0xb3 }, /* "matrix coefficient 1" */
450 { 0x50, 0xb3 }, /* "matrix coefficient 2" */
451 { 0x51, 0 }, /* vb */
452 { 0x52, 0x3d }, /* "matrix coefficient 4" */
453 { 0x53, 0xa7 }, /* "matrix coefficient 5" */
454 { 0x54, 0xe4 }, /* "matrix coefficient 6" */
455 { REG_COM13
, COM13_GAMMA
},
456 { REG_COM15
, COM15_RGB565
|COM15_R00FF
},
460 /* V4L2_PIX_FMT_SRGGB8 */
461 static struct regval ov_fmt_bayer
[] = {
462 /* This changes color order */
463 {REG_TSLB
, 0x40}, /* BGGR */
464 /* {REG_TSLB, 0x08}, */ /* BGGR with vertical image flipping */
465 {REG_COM15
, COM15_R00FF
},
466 {0xff, 0xff}, /* END MARKER */
469 * Store a set of start/stop values into the camera.
471 static int stk_sensor_set_hw(struct stk_camera
*dev
,
472 int hstart
, int hstop
, int vstart
, int vstop
)
477 * Horizontal: 11 bits, top 8 live in hstart and hstop. Bottom 3 of
478 * hstart are in href[2:0], bottom 3 of hstop in href[5:3]. There is
479 * a mystery "edge offset" value in the top two bits of href.
481 ret
= stk_sensor_outb(dev
, REG_HSTART
, (hstart
>> 3) & 0xff);
482 ret
+= stk_sensor_outb(dev
, REG_HSTOP
, (hstop
>> 3) & 0xff);
483 ret
+= stk_sensor_inb(dev
, REG_HREF
, &v
);
484 v
= (v
& 0xc0) | ((hstop
& 0x7) << 3) | (hstart
& 0x7);
486 ret
+= stk_sensor_outb(dev
, REG_HREF
, v
);
488 * Vertical: similar arrangement (note: this is different from ov7670.c)
490 ret
+= stk_sensor_outb(dev
, REG_VSTART
, (vstart
>> 3) & 0xff);
491 ret
+= stk_sensor_outb(dev
, REG_VSTOP
, (vstop
>> 3) & 0xff);
492 ret
+= stk_sensor_inb(dev
, REG_VREF
, &v
);
493 v
= (v
& 0xc0) | ((vstop
& 0x7) << 3) | (vstart
& 0x7);
495 ret
+= stk_sensor_outb(dev
, REG_VREF
, v
);
500 int stk_sensor_configure(struct stk_camera
*dev
)
504 * We setup the sensor to output dummy lines in low-res modes,
505 * so we don't get absurdly hight framerates.
511 switch (dev
->vsettings
.mode
) {
512 case MODE_QCIF
: com7
= COM7_FMT_QCIF
;
515 case MODE_QVGA
: com7
= COM7_FMT_QVGA
;
518 case MODE_CIF
: com7
= COM7_FMT_CIF
;
521 case MODE_VGA
: com7
= COM7_FMT_VGA
;
524 case MODE_SXGA
: com7
= COM7_FMT_SXGA
;
527 default: STK_ERROR("Unsupported mode %d\n", dev
->vsettings
.mode
);
530 switch (dev
->vsettings
.palette
) {
531 case V4L2_PIX_FMT_UYVY
:
535 case V4L2_PIX_FMT_YUYV
:
539 case V4L2_PIX_FMT_RGB565
:
543 case V4L2_PIX_FMT_RGB565X
:
547 case V4L2_PIX_FMT_SBGGR8
:
551 default: STK_ERROR("Unsupported colorspace\n");
554 /*FIXME sometimes the sensor go to a bad state
555 stk_sensor_write_regvals(dev, ov_initvals); */
556 stk_sensor_outb(dev
, REG_COM7
, com7
);
558 stk_sensor_write_regvals(dev
, rv
);
559 flip
= (dev
->vsettings
.vflip
?MVFP_FLIP
:0)
560 | (dev
->vsettings
.hflip
?MVFP_MIRROR
:0);
561 stk_sensor_outb(dev
, REG_MVFP
, flip
);
562 if (dev
->vsettings
.palette
== V4L2_PIX_FMT_SBGGR8
563 && !dev
->vsettings
.vflip
)
564 stk_sensor_outb(dev
, REG_TSLB
, 0x08);
565 stk_sensor_outb(dev
, REG_ADVFH
, dummylines
>> 8);
566 stk_sensor_outb(dev
, REG_ADVFL
, dummylines
& 0xff);
568 switch (dev
->vsettings
.mode
) {
570 if (stk_sensor_set_hw(dev
, 302, 1582, 6, 486))
571 STK_ERROR("stk_sensor_set_hw failed (VGA)\n");
577 /*FIXME These settings seem ignored by the sensor
578 if (stk_sensor_set_hw(dev, 220, 1500, 10, 1034))
579 STK_ERROR("stk_sensor_set_hw failed (SXGA)\n");
587 int stk_sensor_set_brightness(struct stk_camera
*dev
, int br
)
589 if (br
< 0 || br
> 0xff)
591 stk_sensor_outb(dev
, REG_AEB
, max(0x00, br
- 6));
592 stk_sensor_outb(dev
, REG_AEW
, min(0xff, br
+ 6));
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