mfd: arizona: Remove unneded ret variable
[deliverable/linux.git] / drivers / mfd / arizona-core.c
1 /*
2 * Arizona core driver
3 *
4 * Copyright 2012 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <linux/delay.h>
14 #include <linux/err.h>
15 #include <linux/gpio.h>
16 #include <linux/interrupt.h>
17 #include <linux/mfd/core.h>
18 #include <linux/module.h>
19 #include <linux/of.h>
20 #include <linux/of_device.h>
21 #include <linux/of_gpio.h>
22 #include <linux/pm_runtime.h>
23 #include <linux/regmap.h>
24 #include <linux/regulator/consumer.h>
25 #include <linux/regulator/machine.h>
26 #include <linux/slab.h>
27
28 #include <linux/mfd/arizona/core.h>
29 #include <linux/mfd/arizona/registers.h>
30
31 #include "arizona.h"
32
33 static const char * const wm5102_core_supplies[] = {
34 "AVDD",
35 "DBVDD1",
36 };
37
38 int arizona_clk32k_enable(struct arizona *arizona)
39 {
40 int ret = 0;
41
42 mutex_lock(&arizona->clk_lock);
43
44 arizona->clk32k_ref++;
45
46 if (arizona->clk32k_ref == 1) {
47 switch (arizona->pdata.clk32k_src) {
48 case ARIZONA_32KZ_MCLK1:
49 ret = pm_runtime_get_sync(arizona->dev);
50 if (ret != 0)
51 goto out;
52 break;
53 }
54
55 ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
56 ARIZONA_CLK_32K_ENA,
57 ARIZONA_CLK_32K_ENA);
58 }
59
60 out:
61 if (ret != 0)
62 arizona->clk32k_ref--;
63
64 mutex_unlock(&arizona->clk_lock);
65
66 return ret;
67 }
68 EXPORT_SYMBOL_GPL(arizona_clk32k_enable);
69
70 int arizona_clk32k_disable(struct arizona *arizona)
71 {
72 mutex_lock(&arizona->clk_lock);
73
74 BUG_ON(arizona->clk32k_ref <= 0);
75
76 arizona->clk32k_ref--;
77
78 if (arizona->clk32k_ref == 0) {
79 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
80 ARIZONA_CLK_32K_ENA, 0);
81
82 switch (arizona->pdata.clk32k_src) {
83 case ARIZONA_32KZ_MCLK1:
84 pm_runtime_put_sync(arizona->dev);
85 break;
86 }
87 }
88
89 mutex_unlock(&arizona->clk_lock);
90
91 return 0;
92 }
93 EXPORT_SYMBOL_GPL(arizona_clk32k_disable);
94
95 static irqreturn_t arizona_clkgen_err(int irq, void *data)
96 {
97 struct arizona *arizona = data;
98
99 dev_err(arizona->dev, "CLKGEN error\n");
100
101 return IRQ_HANDLED;
102 }
103
104 static irqreturn_t arizona_underclocked(int irq, void *data)
105 {
106 struct arizona *arizona = data;
107 unsigned int val;
108 int ret;
109
110 ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8,
111 &val);
112 if (ret != 0) {
113 dev_err(arizona->dev, "Failed to read underclock status: %d\n",
114 ret);
115 return IRQ_NONE;
116 }
117
118 if (val & ARIZONA_AIF3_UNDERCLOCKED_STS)
119 dev_err(arizona->dev, "AIF3 underclocked\n");
120 if (val & ARIZONA_AIF2_UNDERCLOCKED_STS)
121 dev_err(arizona->dev, "AIF2 underclocked\n");
122 if (val & ARIZONA_AIF1_UNDERCLOCKED_STS)
123 dev_err(arizona->dev, "AIF1 underclocked\n");
124 if (val & ARIZONA_ISRC3_UNDERCLOCKED_STS)
125 dev_err(arizona->dev, "ISRC3 underclocked\n");
126 if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS)
127 dev_err(arizona->dev, "ISRC2 underclocked\n");
128 if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS)
129 dev_err(arizona->dev, "ISRC1 underclocked\n");
130 if (val & ARIZONA_FX_UNDERCLOCKED_STS)
131 dev_err(arizona->dev, "FX underclocked\n");
132 if (val & ARIZONA_ASRC_UNDERCLOCKED_STS)
133 dev_err(arizona->dev, "ASRC underclocked\n");
134 if (val & ARIZONA_DAC_UNDERCLOCKED_STS)
135 dev_err(arizona->dev, "DAC underclocked\n");
136 if (val & ARIZONA_ADC_UNDERCLOCKED_STS)
137 dev_err(arizona->dev, "ADC underclocked\n");
138 if (val & ARIZONA_MIXER_UNDERCLOCKED_STS)
139 dev_err(arizona->dev, "Mixer dropped sample\n");
140
141 return IRQ_HANDLED;
142 }
143
144 static irqreturn_t arizona_overclocked(int irq, void *data)
145 {
146 struct arizona *arizona = data;
147 unsigned int val[3];
148 int ret;
149
150 ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6,
151 &val[0], 3);
152 if (ret != 0) {
153 dev_err(arizona->dev, "Failed to read overclock status: %d\n",
154 ret);
155 return IRQ_NONE;
156 }
157
158 switch (arizona->type) {
159 case WM8998:
160 case WM1814:
161 /* Some bits are shifted on WM8998,
162 * rearrange to match the standard bit layout
163 */
164 val[0] = ((val[0] & 0x60e0) >> 1) |
165 ((val[0] & 0x1e00) >> 2) |
166 (val[0] & 0x000f);
167 break;
168 default:
169 break;
170 }
171
172 if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS)
173 dev_err(arizona->dev, "PWM overclocked\n");
174 if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS)
175 dev_err(arizona->dev, "FX core overclocked\n");
176 if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS)
177 dev_err(arizona->dev, "DAC SYS overclocked\n");
178 if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS)
179 dev_err(arizona->dev, "DAC WARP overclocked\n");
180 if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS)
181 dev_err(arizona->dev, "ADC overclocked\n");
182 if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS)
183 dev_err(arizona->dev, "Mixer overclocked\n");
184 if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS)
185 dev_err(arizona->dev, "AIF3 overclocked\n");
186 if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS)
187 dev_err(arizona->dev, "AIF2 overclocked\n");
188 if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS)
189 dev_err(arizona->dev, "AIF1 overclocked\n");
190 if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS)
191 dev_err(arizona->dev, "Pad control overclocked\n");
192
193 if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS)
194 dev_err(arizona->dev, "Slimbus subsystem overclocked\n");
195 if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS)
196 dev_err(arizona->dev, "Slimbus async overclocked\n");
197 if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS)
198 dev_err(arizona->dev, "Slimbus sync overclocked\n");
199 if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS)
200 dev_err(arizona->dev, "ASRC async system overclocked\n");
201 if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS)
202 dev_err(arizona->dev, "ASRC async WARP overclocked\n");
203 if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS)
204 dev_err(arizona->dev, "ASRC sync system overclocked\n");
205 if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS)
206 dev_err(arizona->dev, "ASRC sync WARP overclocked\n");
207 if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS)
208 dev_err(arizona->dev, "DSP1 overclocked\n");
209 if (val[1] & ARIZONA_ISRC3_OVERCLOCKED_STS)
210 dev_err(arizona->dev, "ISRC3 overclocked\n");
211 if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS)
212 dev_err(arizona->dev, "ISRC2 overclocked\n");
213 if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS)
214 dev_err(arizona->dev, "ISRC1 overclocked\n");
215
216 if (val[2] & ARIZONA_SPDIF_OVERCLOCKED_STS)
217 dev_err(arizona->dev, "SPDIF overclocked\n");
218
219 return IRQ_HANDLED;
220 }
221
222 static int arizona_poll_reg(struct arizona *arizona,
223 int timeout, unsigned int reg,
224 unsigned int mask, unsigned int target)
225 {
226 unsigned int val = 0;
227 int ret, i;
228
229 for (i = 0; i < timeout; i++) {
230 ret = regmap_read(arizona->regmap, reg, &val);
231 if (ret != 0) {
232 dev_err(arizona->dev, "Failed to read reg %u: %d\n",
233 reg, ret);
234 continue;
235 }
236
237 if ((val & mask) == target)
238 return 0;
239
240 msleep(1);
241 }
242
243 dev_err(arizona->dev, "Polling reg %u timed out: %x\n", reg, val);
244 return -ETIMEDOUT;
245 }
246
247 static int arizona_wait_for_boot(struct arizona *arizona)
248 {
249 int ret;
250
251 /*
252 * We can't use an interrupt as we need to runtime resume to do so,
253 * we won't race with the interrupt handler as it'll be blocked on
254 * runtime resume.
255 */
256 ret = arizona_poll_reg(arizona, 5, ARIZONA_INTERRUPT_RAW_STATUS_5,
257 ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS);
258
259 if (!ret)
260 regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5,
261 ARIZONA_BOOT_DONE_STS);
262
263 pm_runtime_mark_last_busy(arizona->dev);
264
265 return ret;
266 }
267
268 static inline void arizona_enable_reset(struct arizona *arizona)
269 {
270 if (arizona->pdata.reset)
271 gpio_set_value_cansleep(arizona->pdata.reset, 0);
272 }
273
274 static void arizona_disable_reset(struct arizona *arizona)
275 {
276 if (arizona->pdata.reset) {
277 switch (arizona->type) {
278 case WM5110:
279 case WM8280:
280 /* Meet requirements for minimum reset duration */
281 msleep(5);
282 break;
283 default:
284 break;
285 }
286
287 gpio_set_value_cansleep(arizona->pdata.reset, 1);
288 msleep(1);
289 }
290 }
291
292 struct arizona_sysclk_state {
293 unsigned int fll;
294 unsigned int sysclk;
295 };
296
297 static int arizona_enable_freerun_sysclk(struct arizona *arizona,
298 struct arizona_sysclk_state *state)
299 {
300 int ret, err;
301
302 /* Cache existing FLL and SYSCLK settings */
303 ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &state->fll);
304 if (ret) {
305 dev_err(arizona->dev, "Failed to cache FLL settings: %d\n",
306 ret);
307 return ret;
308 }
309 ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1,
310 &state->sysclk);
311 if (ret) {
312 dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n",
313 ret);
314 return ret;
315 }
316
317 /* Start up SYSCLK using the FLL in free running mode */
318 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1,
319 ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN);
320 if (ret) {
321 dev_err(arizona->dev,
322 "Failed to start FLL in freerunning mode: %d\n",
323 ret);
324 return ret;
325 }
326 ret = arizona_poll_reg(arizona, 25, ARIZONA_INTERRUPT_RAW_STATUS_5,
327 ARIZONA_FLL1_CLOCK_OK_STS,
328 ARIZONA_FLL1_CLOCK_OK_STS);
329 if (ret) {
330 ret = -ETIMEDOUT;
331 goto err_fll;
332 }
333
334 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144);
335 if (ret) {
336 dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret);
337 goto err_fll;
338 }
339
340 return 0;
341
342 err_fll:
343 err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll);
344 if (err)
345 dev_err(arizona->dev,
346 "Failed to re-apply old FLL settings: %d\n", err);
347
348 return ret;
349 }
350
351 static int arizona_disable_freerun_sysclk(struct arizona *arizona,
352 struct arizona_sysclk_state *state)
353 {
354 int ret;
355
356 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1,
357 state->sysclk);
358 if (ret) {
359 dev_err(arizona->dev,
360 "Failed to re-apply old SYSCLK settings: %d\n", ret);
361 return ret;
362 }
363
364 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll);
365 if (ret) {
366 dev_err(arizona->dev,
367 "Failed to re-apply old FLL settings: %d\n", ret);
368 return ret;
369 }
370
371 return 0;
372 }
373
374 static int wm5102_apply_hardware_patch(struct arizona *arizona)
375 {
376 struct arizona_sysclk_state state;
377 int err, ret;
378
379 ret = arizona_enable_freerun_sysclk(arizona, &state);
380 if (ret)
381 return ret;
382
383 /* Start the write sequencer and wait for it to finish */
384 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
385 ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160);
386 if (ret) {
387 dev_err(arizona->dev, "Failed to start write sequencer: %d\n",
388 ret);
389 goto err;
390 }
391
392 ret = arizona_poll_reg(arizona, 5, ARIZONA_WRITE_SEQUENCER_CTRL_1,
393 ARIZONA_WSEQ_BUSY, 0);
394 if (ret) {
395 regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
396 ARIZONA_WSEQ_ABORT);
397 ret = -ETIMEDOUT;
398 }
399
400 err:
401 err = arizona_disable_freerun_sysclk(arizona, &state);
402
403 return ret ?: err;
404 }
405
406 /*
407 * Register patch to some of the CODECs internal write sequences
408 * to ensure a clean exit from the low power sleep state.
409 */
410 static const struct reg_sequence wm5110_sleep_patch[] = {
411 { 0x337A, 0xC100 },
412 { 0x337B, 0x0041 },
413 { 0x3300, 0xA210 },
414 { 0x3301, 0x050C },
415 };
416
417 static int wm5110_apply_sleep_patch(struct arizona *arizona)
418 {
419 struct arizona_sysclk_state state;
420 int err, ret;
421
422 ret = arizona_enable_freerun_sysclk(arizona, &state);
423 if (ret)
424 return ret;
425
426 ret = regmap_multi_reg_write_bypassed(arizona->regmap,
427 wm5110_sleep_patch,
428 ARRAY_SIZE(wm5110_sleep_patch));
429
430 err = arizona_disable_freerun_sysclk(arizona, &state);
431
432 return ret ?: err;
433 }
434
435 static int wm5102_clear_write_sequencer(struct arizona *arizona)
436 {
437 int ret;
438
439 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_3,
440 0x0);
441 if (ret) {
442 dev_err(arizona->dev,
443 "Failed to clear write sequencer state: %d\n", ret);
444 return ret;
445 }
446
447 arizona_enable_reset(arizona);
448 regulator_disable(arizona->dcvdd);
449
450 msleep(20);
451
452 ret = regulator_enable(arizona->dcvdd);
453 if (ret) {
454 dev_err(arizona->dev, "Failed to re-enable DCVDD: %d\n", ret);
455 return ret;
456 }
457 arizona_disable_reset(arizona);
458
459 return 0;
460 }
461
462 #ifdef CONFIG_PM
463 static int arizona_runtime_resume(struct device *dev)
464 {
465 struct arizona *arizona = dev_get_drvdata(dev);
466 int ret;
467
468 dev_dbg(arizona->dev, "Leaving AoD mode\n");
469
470 if (arizona->has_fully_powered_off) {
471 dev_dbg(arizona->dev, "Re-enabling core supplies\n");
472
473 ret = regulator_bulk_enable(arizona->num_core_supplies,
474 arizona->core_supplies);
475 if (ret) {
476 dev_err(dev, "Failed to enable core supplies: %d\n",
477 ret);
478 return ret;
479 }
480 }
481
482 ret = regulator_enable(arizona->dcvdd);
483 if (ret != 0) {
484 dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret);
485 if (arizona->has_fully_powered_off)
486 regulator_bulk_disable(arizona->num_core_supplies,
487 arizona->core_supplies);
488 return ret;
489 }
490
491 if (arizona->has_fully_powered_off) {
492 arizona_disable_reset(arizona);
493 enable_irq(arizona->irq);
494 arizona->has_fully_powered_off = false;
495 }
496
497 regcache_cache_only(arizona->regmap, false);
498
499 switch (arizona->type) {
500 case WM5102:
501 if (arizona->external_dcvdd) {
502 ret = regmap_update_bits(arizona->regmap,
503 ARIZONA_ISOLATION_CONTROL,
504 ARIZONA_ISOLATE_DCVDD1, 0);
505 if (ret != 0) {
506 dev_err(arizona->dev,
507 "Failed to connect DCVDD: %d\n", ret);
508 goto err;
509 }
510 }
511
512 ret = wm5102_patch(arizona);
513 if (ret != 0) {
514 dev_err(arizona->dev, "Failed to apply patch: %d\n",
515 ret);
516 goto err;
517 }
518
519 ret = wm5102_apply_hardware_patch(arizona);
520 if (ret) {
521 dev_err(arizona->dev,
522 "Failed to apply hardware patch: %d\n",
523 ret);
524 goto err;
525 }
526 break;
527 case WM5110:
528 case WM8280:
529 ret = arizona_wait_for_boot(arizona);
530 if (ret)
531 goto err;
532
533 if (arizona->external_dcvdd) {
534 ret = regmap_update_bits(arizona->regmap,
535 ARIZONA_ISOLATION_CONTROL,
536 ARIZONA_ISOLATE_DCVDD1, 0);
537 if (ret) {
538 dev_err(arizona->dev,
539 "Failed to connect DCVDD: %d\n", ret);
540 goto err;
541 }
542 } else {
543 /*
544 * As this is only called for the internal regulator
545 * (where we know voltage ranges available) it is ok
546 * to request an exact range.
547 */
548 ret = regulator_set_voltage(arizona->dcvdd,
549 1200000, 1200000);
550 if (ret < 0) {
551 dev_err(arizona->dev,
552 "Failed to set resume voltage: %d\n",
553 ret);
554 goto err;
555 }
556 }
557
558 ret = wm5110_apply_sleep_patch(arizona);
559 if (ret) {
560 dev_err(arizona->dev,
561 "Failed to re-apply sleep patch: %d\n",
562 ret);
563 goto err;
564 }
565 break;
566 default:
567 ret = arizona_wait_for_boot(arizona);
568 if (ret != 0)
569 goto err;
570
571 if (arizona->external_dcvdd) {
572 ret = regmap_update_bits(arizona->regmap,
573 ARIZONA_ISOLATION_CONTROL,
574 ARIZONA_ISOLATE_DCVDD1, 0);
575 if (ret != 0) {
576 dev_err(arizona->dev,
577 "Failed to connect DCVDD: %d\n", ret);
578 goto err;
579 }
580 }
581 break;
582 }
583
584 ret = regcache_sync(arizona->regmap);
585 if (ret != 0) {
586 dev_err(arizona->dev, "Failed to restore register cache\n");
587 goto err;
588 }
589
590 return 0;
591
592 err:
593 regcache_cache_only(arizona->regmap, true);
594 regulator_disable(arizona->dcvdd);
595 return ret;
596 }
597
598 static int arizona_runtime_suspend(struct device *dev)
599 {
600 struct arizona *arizona = dev_get_drvdata(dev);
601 unsigned int val;
602 int ret;
603
604 dev_dbg(arizona->dev, "Entering AoD mode\n");
605
606 ret = regmap_read(arizona->regmap, ARIZONA_JACK_DETECT_ANALOGUE, &val);
607 if (ret) {
608 dev_err(dev, "Failed to check jack det status: %d\n", ret);
609 return ret;
610 }
611
612 if (arizona->external_dcvdd) {
613 ret = regmap_update_bits(arizona->regmap,
614 ARIZONA_ISOLATION_CONTROL,
615 ARIZONA_ISOLATE_DCVDD1,
616 ARIZONA_ISOLATE_DCVDD1);
617 if (ret != 0) {
618 dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n",
619 ret);
620 return ret;
621 }
622 }
623
624 switch (arizona->type) {
625 case WM5110:
626 case WM8280:
627 if (arizona->external_dcvdd)
628 break;
629
630 /*
631 * As this is only called for the internal regulator
632 * (where we know voltage ranges available) it is ok
633 * to request an exact range.
634 */
635 ret = regulator_set_voltage(arizona->dcvdd, 1175000, 1175000);
636 if (ret < 0) {
637 dev_err(arizona->dev,
638 "Failed to set suspend voltage: %d\n", ret);
639 return ret;
640 }
641 break;
642 case WM5102:
643 if (!(val & ARIZONA_JD1_ENA)) {
644 ret = regmap_write(arizona->regmap,
645 ARIZONA_WRITE_SEQUENCER_CTRL_3, 0x0);
646 if (ret) {
647 dev_err(arizona->dev,
648 "Failed to clear write sequencer: %d\n",
649 ret);
650 return ret;
651 }
652 }
653 break;
654 default:
655 break;
656 }
657
658 regcache_cache_only(arizona->regmap, true);
659 regcache_mark_dirty(arizona->regmap);
660 regulator_disable(arizona->dcvdd);
661
662 /* Allow us to completely power down if no jack detection */
663 if (!(val & ARIZONA_JD1_ENA)) {
664 dev_dbg(arizona->dev, "Fully powering off\n");
665
666 arizona->has_fully_powered_off = true;
667
668 disable_irq_nosync(arizona->irq);
669 arizona_enable_reset(arizona);
670 regulator_bulk_disable(arizona->num_core_supplies,
671 arizona->core_supplies);
672 }
673
674 return 0;
675 }
676 #endif
677
678 #ifdef CONFIG_PM_SLEEP
679 static int arizona_suspend(struct device *dev)
680 {
681 struct arizona *arizona = dev_get_drvdata(dev);
682
683 dev_dbg(arizona->dev, "Suspend, disabling IRQ\n");
684 disable_irq(arizona->irq);
685
686 return 0;
687 }
688
689 static int arizona_suspend_late(struct device *dev)
690 {
691 struct arizona *arizona = dev_get_drvdata(dev);
692
693 dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n");
694 enable_irq(arizona->irq);
695
696 return 0;
697 }
698
699 static int arizona_resume_noirq(struct device *dev)
700 {
701 struct arizona *arizona = dev_get_drvdata(dev);
702
703 dev_dbg(arizona->dev, "Early resume, disabling IRQ\n");
704 disable_irq(arizona->irq);
705
706 return 0;
707 }
708
709 static int arizona_resume(struct device *dev)
710 {
711 struct arizona *arizona = dev_get_drvdata(dev);
712
713 dev_dbg(arizona->dev, "Late resume, reenabling IRQ\n");
714 enable_irq(arizona->irq);
715
716 return 0;
717 }
718 #endif
719
720 const struct dev_pm_ops arizona_pm_ops = {
721 SET_RUNTIME_PM_OPS(arizona_runtime_suspend,
722 arizona_runtime_resume,
723 NULL)
724 SET_SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume)
725 #ifdef CONFIG_PM_SLEEP
726 .suspend_late = arizona_suspend_late,
727 .resume_noirq = arizona_resume_noirq,
728 #endif
729 };
730 EXPORT_SYMBOL_GPL(arizona_pm_ops);
731
732 #ifdef CONFIG_OF
733 unsigned long arizona_of_get_type(struct device *dev)
734 {
735 const struct of_device_id *id = of_match_device(arizona_of_match, dev);
736
737 if (id)
738 return (unsigned long)id->data;
739 else
740 return 0;
741 }
742 EXPORT_SYMBOL_GPL(arizona_of_get_type);
743
744 int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop,
745 bool mandatory)
746 {
747 int gpio;
748
749 gpio = of_get_named_gpio(arizona->dev->of_node, prop, 0);
750 if (gpio < 0) {
751 if (mandatory)
752 dev_err(arizona->dev,
753 "Mandatory DT gpio %s missing/malformed: %d\n",
754 prop, gpio);
755
756 gpio = 0;
757 }
758
759 return gpio;
760 }
761 EXPORT_SYMBOL_GPL(arizona_of_get_named_gpio);
762
763 static int arizona_of_get_core_pdata(struct arizona *arizona)
764 {
765 struct arizona_pdata *pdata = &arizona->pdata;
766 struct property *prop;
767 const __be32 *cur;
768 u32 val;
769 int ret, i;
770 int count = 0;
771
772 pdata->reset = arizona_of_get_named_gpio(arizona, "wlf,reset", true);
773
774 ret = of_property_read_u32_array(arizona->dev->of_node,
775 "wlf,gpio-defaults",
776 pdata->gpio_defaults,
777 ARRAY_SIZE(pdata->gpio_defaults));
778 if (ret >= 0) {
779 /*
780 * All values are literal except out of range values
781 * which are chip default, translate into platform
782 * data which uses 0 as chip default and out of range
783 * as zero.
784 */
785 for (i = 0; i < ARRAY_SIZE(pdata->gpio_defaults); i++) {
786 if (pdata->gpio_defaults[i] > 0xffff)
787 pdata->gpio_defaults[i] = 0;
788 else if (pdata->gpio_defaults[i] == 0)
789 pdata->gpio_defaults[i] = 0x10000;
790 }
791 } else {
792 dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n",
793 ret);
794 }
795
796 of_property_for_each_u32(arizona->dev->of_node, "wlf,inmode", prop,
797 cur, val) {
798 if (count == ARRAY_SIZE(pdata->inmode))
799 break;
800
801 pdata->inmode[count] = val;
802 count++;
803 }
804
805 count = 0;
806 of_property_for_each_u32(arizona->dev->of_node, "wlf,dmic-ref", prop,
807 cur, val) {
808 if (count == ARRAY_SIZE(pdata->dmic_ref))
809 break;
810
811 pdata->dmic_ref[count] = val;
812 count++;
813 }
814
815 return 0;
816 }
817
818 const struct of_device_id arizona_of_match[] = {
819 { .compatible = "wlf,wm5102", .data = (void *)WM5102 },
820 { .compatible = "wlf,wm5110", .data = (void *)WM5110 },
821 { .compatible = "wlf,wm8280", .data = (void *)WM8280 },
822 { .compatible = "wlf,wm8997", .data = (void *)WM8997 },
823 { .compatible = "wlf,wm8998", .data = (void *)WM8998 },
824 { .compatible = "wlf,wm1814", .data = (void *)WM1814 },
825 {},
826 };
827 EXPORT_SYMBOL_GPL(arizona_of_match);
828 #else
829 static inline int arizona_of_get_core_pdata(struct arizona *arizona)
830 {
831 return 0;
832 }
833 #endif
834
835 static const struct mfd_cell early_devs[] = {
836 { .name = "arizona-ldo1" },
837 };
838
839 static const char * const wm5102_supplies[] = {
840 "MICVDD",
841 "DBVDD2",
842 "DBVDD3",
843 "CPVDD",
844 "SPKVDDL",
845 "SPKVDDR",
846 };
847
848 static const struct mfd_cell wm5102_devs[] = {
849 { .name = "arizona-micsupp" },
850 {
851 .name = "arizona-extcon",
852 .parent_supplies = wm5102_supplies,
853 .num_parent_supplies = 1, /* We only need MICVDD */
854 },
855 { .name = "arizona-gpio" },
856 { .name = "arizona-haptics" },
857 { .name = "arizona-pwm" },
858 {
859 .name = "wm5102-codec",
860 .parent_supplies = wm5102_supplies,
861 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
862 },
863 };
864
865 static const struct mfd_cell wm5110_devs[] = {
866 { .name = "arizona-micsupp" },
867 {
868 .name = "arizona-extcon",
869 .parent_supplies = wm5102_supplies,
870 .num_parent_supplies = 1, /* We only need MICVDD */
871 },
872 { .name = "arizona-gpio" },
873 { .name = "arizona-haptics" },
874 { .name = "arizona-pwm" },
875 {
876 .name = "wm5110-codec",
877 .parent_supplies = wm5102_supplies,
878 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
879 },
880 };
881
882 static const char * const wm8997_supplies[] = {
883 "MICVDD",
884 "DBVDD2",
885 "CPVDD",
886 "SPKVDD",
887 };
888
889 static const struct mfd_cell wm8997_devs[] = {
890 { .name = "arizona-micsupp" },
891 {
892 .name = "arizona-extcon",
893 .parent_supplies = wm8997_supplies,
894 .num_parent_supplies = 1, /* We only need MICVDD */
895 },
896 { .name = "arizona-gpio" },
897 { .name = "arizona-haptics" },
898 { .name = "arizona-pwm" },
899 {
900 .name = "wm8997-codec",
901 .parent_supplies = wm8997_supplies,
902 .num_parent_supplies = ARRAY_SIZE(wm8997_supplies),
903 },
904 };
905
906 static const struct mfd_cell wm8998_devs[] = {
907 {
908 .name = "arizona-extcon",
909 .parent_supplies = wm5102_supplies,
910 .num_parent_supplies = 1, /* We only need MICVDD */
911 },
912 { .name = "arizona-gpio" },
913 { .name = "arizona-haptics" },
914 { .name = "arizona-pwm" },
915 {
916 .name = "wm8998-codec",
917 .parent_supplies = wm5102_supplies,
918 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
919 },
920 { .name = "arizona-micsupp" },
921 };
922
923 int arizona_dev_init(struct arizona *arizona)
924 {
925 struct device *dev = arizona->dev;
926 const char *type_name;
927 unsigned int reg, val, mask;
928 int (*apply_patch)(struct arizona *) = NULL;
929 int ret, i;
930
931 dev_set_drvdata(arizona->dev, arizona);
932 mutex_init(&arizona->clk_lock);
933
934 if (dev_get_platdata(arizona->dev))
935 memcpy(&arizona->pdata, dev_get_platdata(arizona->dev),
936 sizeof(arizona->pdata));
937 else
938 arizona_of_get_core_pdata(arizona);
939
940 regcache_cache_only(arizona->regmap, true);
941
942 switch (arizona->type) {
943 case WM5102:
944 case WM5110:
945 case WM8280:
946 case WM8997:
947 case WM8998:
948 case WM1814:
949 for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++)
950 arizona->core_supplies[i].supply
951 = wm5102_core_supplies[i];
952 arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies);
953 break;
954 default:
955 dev_err(arizona->dev, "Unknown device type %d\n",
956 arizona->type);
957 return -EINVAL;
958 }
959
960 /* Mark DCVDD as external, LDO1 driver will clear if internal */
961 arizona->external_dcvdd = true;
962
963 ret = mfd_add_devices(arizona->dev, -1, early_devs,
964 ARRAY_SIZE(early_devs), NULL, 0, NULL);
965 if (ret != 0) {
966 dev_err(dev, "Failed to add early children: %d\n", ret);
967 return ret;
968 }
969
970 ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies,
971 arizona->core_supplies);
972 if (ret != 0) {
973 dev_err(dev, "Failed to request core supplies: %d\n",
974 ret);
975 goto err_early;
976 }
977
978 /**
979 * Don't use devres here because the only device we have to get
980 * against is the MFD device and DCVDD will likely be supplied by
981 * one of its children. Meaning that the regulator will be
982 * destroyed by the time devres calls regulator put.
983 */
984 arizona->dcvdd = regulator_get(arizona->dev, "DCVDD");
985 if (IS_ERR(arizona->dcvdd)) {
986 ret = PTR_ERR(arizona->dcvdd);
987 dev_err(dev, "Failed to request DCVDD: %d\n", ret);
988 goto err_early;
989 }
990
991 if (arizona->pdata.reset) {
992 /* Start out with /RESET low to put the chip into reset */
993 ret = devm_gpio_request_one(arizona->dev, arizona->pdata.reset,
994 GPIOF_DIR_OUT | GPIOF_INIT_LOW,
995 "arizona /RESET");
996 if (ret != 0) {
997 dev_err(dev, "Failed to request /RESET: %d\n", ret);
998 goto err_dcvdd;
999 }
1000 }
1001
1002 ret = regulator_bulk_enable(arizona->num_core_supplies,
1003 arizona->core_supplies);
1004 if (ret != 0) {
1005 dev_err(dev, "Failed to enable core supplies: %d\n",
1006 ret);
1007 goto err_dcvdd;
1008 }
1009
1010 ret = regulator_enable(arizona->dcvdd);
1011 if (ret != 0) {
1012 dev_err(dev, "Failed to enable DCVDD: %d\n", ret);
1013 goto err_enable;
1014 }
1015
1016 arizona_disable_reset(arizona);
1017
1018 regcache_cache_only(arizona->regmap, false);
1019
1020 /* Verify that this is a chip we know about */
1021 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
1022 if (ret != 0) {
1023 dev_err(dev, "Failed to read ID register: %d\n", ret);
1024 goto err_reset;
1025 }
1026
1027 switch (reg) {
1028 case 0x5102:
1029 case 0x5110:
1030 case 0x6349:
1031 case 0x8997:
1032 break;
1033 default:
1034 dev_err(arizona->dev, "Unknown device ID: %x\n", reg);
1035 goto err_reset;
1036 }
1037
1038 /* If we have a /RESET GPIO we'll already be reset */
1039 if (!arizona->pdata.reset) {
1040 ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0);
1041 if (ret != 0) {
1042 dev_err(dev, "Failed to reset device: %d\n", ret);
1043 goto err_reset;
1044 }
1045
1046 msleep(1);
1047 }
1048
1049 /* Ensure device startup is complete */
1050 switch (arizona->type) {
1051 case WM5102:
1052 ret = regmap_read(arizona->regmap,
1053 ARIZONA_WRITE_SEQUENCER_CTRL_3, &val);
1054 if (ret) {
1055 dev_err(dev,
1056 "Failed to check write sequencer state: %d\n",
1057 ret);
1058 } else if (val & 0x01) {
1059 ret = wm5102_clear_write_sequencer(arizona);
1060 if (ret)
1061 return ret;
1062 }
1063 break;
1064 default:
1065 break;
1066 }
1067
1068 ret = arizona_wait_for_boot(arizona);
1069 if (ret) {
1070 dev_err(arizona->dev, "Device failed initial boot: %d\n", ret);
1071 goto err_reset;
1072 }
1073
1074 /* Read the device ID information & do device specific stuff */
1075 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
1076 if (ret != 0) {
1077 dev_err(dev, "Failed to read ID register: %d\n", ret);
1078 goto err_reset;
1079 }
1080
1081 ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION,
1082 &arizona->rev);
1083 if (ret != 0) {
1084 dev_err(dev, "Failed to read revision register: %d\n", ret);
1085 goto err_reset;
1086 }
1087 arizona->rev &= ARIZONA_DEVICE_REVISION_MASK;
1088
1089 switch (reg) {
1090 #ifdef CONFIG_MFD_WM5102
1091 case 0x5102:
1092 type_name = "WM5102";
1093 if (arizona->type != WM5102) {
1094 dev_err(arizona->dev, "WM5102 registered as %d\n",
1095 arizona->type);
1096 arizona->type = WM5102;
1097 }
1098 apply_patch = wm5102_patch;
1099 arizona->rev &= 0x7;
1100 break;
1101 #endif
1102 #ifdef CONFIG_MFD_WM5110
1103 case 0x5110:
1104 switch (arizona->type) {
1105 case WM5110:
1106 type_name = "WM5110";
1107 break;
1108 case WM8280:
1109 type_name = "WM8280";
1110 break;
1111 default:
1112 type_name = "WM5110";
1113 dev_err(arizona->dev, "WM5110 registered as %d\n",
1114 arizona->type);
1115 arizona->type = WM5110;
1116 break;
1117 }
1118 apply_patch = wm5110_patch;
1119 break;
1120 #endif
1121 #ifdef CONFIG_MFD_WM8997
1122 case 0x8997:
1123 type_name = "WM8997";
1124 if (arizona->type != WM8997) {
1125 dev_err(arizona->dev, "WM8997 registered as %d\n",
1126 arizona->type);
1127 arizona->type = WM8997;
1128 }
1129 apply_patch = wm8997_patch;
1130 break;
1131 #endif
1132 #ifdef CONFIG_MFD_WM8998
1133 case 0x6349:
1134 switch (arizona->type) {
1135 case WM8998:
1136 type_name = "WM8998";
1137 break;
1138
1139 case WM1814:
1140 type_name = "WM1814";
1141 break;
1142
1143 default:
1144 type_name = "WM8998";
1145 dev_err(arizona->dev, "WM8998 registered as %d\n",
1146 arizona->type);
1147 arizona->type = WM8998;
1148 }
1149
1150 apply_patch = wm8998_patch;
1151 break;
1152 #endif
1153 default:
1154 dev_err(arizona->dev, "Unknown device ID %x\n", reg);
1155 goto err_reset;
1156 }
1157
1158 dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A');
1159
1160 if (apply_patch) {
1161 ret = apply_patch(arizona);
1162 if (ret != 0) {
1163 dev_err(arizona->dev, "Failed to apply patch: %d\n",
1164 ret);
1165 goto err_reset;
1166 }
1167
1168 switch (arizona->type) {
1169 case WM5102:
1170 ret = wm5102_apply_hardware_patch(arizona);
1171 if (ret) {
1172 dev_err(arizona->dev,
1173 "Failed to apply hardware patch: %d\n",
1174 ret);
1175 goto err_reset;
1176 }
1177 break;
1178 case WM5110:
1179 case WM8280:
1180 ret = wm5110_apply_sleep_patch(arizona);
1181 if (ret) {
1182 dev_err(arizona->dev,
1183 "Failed to apply sleep patch: %d\n",
1184 ret);
1185 goto err_reset;
1186 }
1187 break;
1188 default:
1189 break;
1190 }
1191 }
1192
1193 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
1194 if (!arizona->pdata.gpio_defaults[i])
1195 continue;
1196
1197 regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i,
1198 arizona->pdata.gpio_defaults[i]);
1199 }
1200
1201 /* Chip default */
1202 if (!arizona->pdata.clk32k_src)
1203 arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2;
1204
1205 switch (arizona->pdata.clk32k_src) {
1206 case ARIZONA_32KZ_MCLK1:
1207 case ARIZONA_32KZ_MCLK2:
1208 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
1209 ARIZONA_CLK_32K_SRC_MASK,
1210 arizona->pdata.clk32k_src - 1);
1211 arizona_clk32k_enable(arizona);
1212 break;
1213 case ARIZONA_32KZ_NONE:
1214 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
1215 ARIZONA_CLK_32K_SRC_MASK, 2);
1216 break;
1217 default:
1218 dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n",
1219 arizona->pdata.clk32k_src);
1220 ret = -EINVAL;
1221 goto err_reset;
1222 }
1223
1224 for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) {
1225 if (!arizona->pdata.micbias[i].mV &&
1226 !arizona->pdata.micbias[i].bypass)
1227 continue;
1228
1229 /* Apply default for bypass mode */
1230 if (!arizona->pdata.micbias[i].mV)
1231 arizona->pdata.micbias[i].mV = 2800;
1232
1233 val = (arizona->pdata.micbias[i].mV - 1500) / 100;
1234
1235 val <<= ARIZONA_MICB1_LVL_SHIFT;
1236
1237 if (arizona->pdata.micbias[i].ext_cap)
1238 val |= ARIZONA_MICB1_EXT_CAP;
1239
1240 if (arizona->pdata.micbias[i].discharge)
1241 val |= ARIZONA_MICB1_DISCH;
1242
1243 if (arizona->pdata.micbias[i].soft_start)
1244 val |= ARIZONA_MICB1_RATE;
1245
1246 if (arizona->pdata.micbias[i].bypass)
1247 val |= ARIZONA_MICB1_BYPASS;
1248
1249 regmap_update_bits(arizona->regmap,
1250 ARIZONA_MIC_BIAS_CTRL_1 + i,
1251 ARIZONA_MICB1_LVL_MASK |
1252 ARIZONA_MICB1_EXT_CAP |
1253 ARIZONA_MICB1_DISCH |
1254 ARIZONA_MICB1_BYPASS |
1255 ARIZONA_MICB1_RATE, val);
1256 }
1257
1258 for (i = 0; i < ARIZONA_MAX_INPUT; i++) {
1259 /* Default for both is 0 so noop with defaults */
1260 val = arizona->pdata.dmic_ref[i]
1261 << ARIZONA_IN1_DMIC_SUP_SHIFT;
1262 if (arizona->pdata.inmode[i] & ARIZONA_INMODE_DMIC)
1263 val |= 1 << ARIZONA_IN1_MODE_SHIFT;
1264
1265 switch (arizona->type) {
1266 case WM8998:
1267 case WM1814:
1268 regmap_update_bits(arizona->regmap,
1269 ARIZONA_ADC_DIGITAL_VOLUME_1L + (i * 8),
1270 ARIZONA_IN1L_SRC_SE_MASK,
1271 (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE)
1272 << ARIZONA_IN1L_SRC_SE_SHIFT);
1273
1274 regmap_update_bits(arizona->regmap,
1275 ARIZONA_ADC_DIGITAL_VOLUME_1R + (i * 8),
1276 ARIZONA_IN1R_SRC_SE_MASK,
1277 (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE)
1278 << ARIZONA_IN1R_SRC_SE_SHIFT);
1279
1280 mask = ARIZONA_IN1_DMIC_SUP_MASK |
1281 ARIZONA_IN1_MODE_MASK;
1282 break;
1283 default:
1284 if (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE)
1285 val |= 1 << ARIZONA_IN1_SINGLE_ENDED_SHIFT;
1286
1287 mask = ARIZONA_IN1_DMIC_SUP_MASK |
1288 ARIZONA_IN1_MODE_MASK |
1289 ARIZONA_IN1_SINGLE_ENDED_MASK;
1290 break;
1291 }
1292
1293 regmap_update_bits(arizona->regmap,
1294 ARIZONA_IN1L_CONTROL + (i * 8),
1295 mask, val);
1296 }
1297
1298 for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) {
1299 /* Default is 0 so noop with defaults */
1300 if (arizona->pdata.out_mono[i])
1301 val = ARIZONA_OUT1_MONO;
1302 else
1303 val = 0;
1304
1305 regmap_update_bits(arizona->regmap,
1306 ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8),
1307 ARIZONA_OUT1_MONO, val);
1308 }
1309
1310 for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) {
1311 if (arizona->pdata.spk_mute[i])
1312 regmap_update_bits(arizona->regmap,
1313 ARIZONA_PDM_SPK1_CTRL_1 + (i * 2),
1314 ARIZONA_SPK1_MUTE_ENDIAN_MASK |
1315 ARIZONA_SPK1_MUTE_SEQ1_MASK,
1316 arizona->pdata.spk_mute[i]);
1317
1318 if (arizona->pdata.spk_fmt[i])
1319 regmap_update_bits(arizona->regmap,
1320 ARIZONA_PDM_SPK1_CTRL_2 + (i * 2),
1321 ARIZONA_SPK1_FMT_MASK,
1322 arizona->pdata.spk_fmt[i]);
1323 }
1324
1325 pm_runtime_set_active(arizona->dev);
1326 pm_runtime_enable(arizona->dev);
1327
1328 /* Set up for interrupts */
1329 ret = arizona_irq_init(arizona);
1330 if (ret != 0)
1331 goto err_reset;
1332
1333 pm_runtime_set_autosuspend_delay(arizona->dev, 100);
1334 pm_runtime_use_autosuspend(arizona->dev);
1335
1336 arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error",
1337 arizona_clkgen_err, arizona);
1338 arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked",
1339 arizona_overclocked, arizona);
1340 arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked",
1341 arizona_underclocked, arizona);
1342
1343 switch (arizona->type) {
1344 case WM5102:
1345 ret = mfd_add_devices(arizona->dev, -1, wm5102_devs,
1346 ARRAY_SIZE(wm5102_devs), NULL, 0, NULL);
1347 break;
1348 case WM5110:
1349 case WM8280:
1350 ret = mfd_add_devices(arizona->dev, -1, wm5110_devs,
1351 ARRAY_SIZE(wm5110_devs), NULL, 0, NULL);
1352 break;
1353 case WM8997:
1354 ret = mfd_add_devices(arizona->dev, -1, wm8997_devs,
1355 ARRAY_SIZE(wm8997_devs), NULL, 0, NULL);
1356 break;
1357 case WM8998:
1358 case WM1814:
1359 ret = mfd_add_devices(arizona->dev, -1, wm8998_devs,
1360 ARRAY_SIZE(wm8998_devs), NULL, 0, NULL);
1361 break;
1362 }
1363
1364 if (ret != 0) {
1365 dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret);
1366 goto err_irq;
1367 }
1368
1369 return 0;
1370
1371 err_irq:
1372 arizona_irq_exit(arizona);
1373 err_reset:
1374 arizona_enable_reset(arizona);
1375 regulator_disable(arizona->dcvdd);
1376 err_enable:
1377 regulator_bulk_disable(arizona->num_core_supplies,
1378 arizona->core_supplies);
1379 err_dcvdd:
1380 regulator_put(arizona->dcvdd);
1381 err_early:
1382 mfd_remove_devices(dev);
1383 return ret;
1384 }
1385 EXPORT_SYMBOL_GPL(arizona_dev_init);
1386
1387 int arizona_dev_exit(struct arizona *arizona)
1388 {
1389 pm_runtime_disable(arizona->dev);
1390
1391 regulator_disable(arizona->dcvdd);
1392 regulator_put(arizona->dcvdd);
1393
1394 mfd_remove_devices(arizona->dev);
1395 arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona);
1396 arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona);
1397 arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona);
1398 arizona_irq_exit(arizona);
1399 arizona_enable_reset(arizona);
1400
1401 regulator_bulk_disable(arizona->num_core_supplies,
1402 arizona->core_supplies);
1403 return 0;
1404 }
1405 EXPORT_SYMBOL_GPL(arizona_dev_exit);
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