mfd: arizona: Factor out DCVDD isolation control
[deliverable/linux.git] / drivers / mfd / arizona-core.c
1 /*
2 * Arizona core driver
3 *
4 * Copyright 2012 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <linux/delay.h>
14 #include <linux/err.h>
15 #include <linux/gpio.h>
16 #include <linux/interrupt.h>
17 #include <linux/mfd/core.h>
18 #include <linux/module.h>
19 #include <linux/of.h>
20 #include <linux/of_device.h>
21 #include <linux/of_gpio.h>
22 #include <linux/pm_runtime.h>
23 #include <linux/regmap.h>
24 #include <linux/regulator/consumer.h>
25 #include <linux/regulator/machine.h>
26 #include <linux/slab.h>
27
28 #include <linux/mfd/arizona/core.h>
29 #include <linux/mfd/arizona/registers.h>
30
31 #include "arizona.h"
32
33 static const char * const wm5102_core_supplies[] = {
34 "AVDD",
35 "DBVDD1",
36 };
37
38 int arizona_clk32k_enable(struct arizona *arizona)
39 {
40 int ret = 0;
41
42 mutex_lock(&arizona->clk_lock);
43
44 arizona->clk32k_ref++;
45
46 if (arizona->clk32k_ref == 1) {
47 switch (arizona->pdata.clk32k_src) {
48 case ARIZONA_32KZ_MCLK1:
49 ret = pm_runtime_get_sync(arizona->dev);
50 if (ret != 0)
51 goto out;
52 break;
53 }
54
55 ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
56 ARIZONA_CLK_32K_ENA,
57 ARIZONA_CLK_32K_ENA);
58 }
59
60 out:
61 if (ret != 0)
62 arizona->clk32k_ref--;
63
64 mutex_unlock(&arizona->clk_lock);
65
66 return ret;
67 }
68 EXPORT_SYMBOL_GPL(arizona_clk32k_enable);
69
70 int arizona_clk32k_disable(struct arizona *arizona)
71 {
72 mutex_lock(&arizona->clk_lock);
73
74 BUG_ON(arizona->clk32k_ref <= 0);
75
76 arizona->clk32k_ref--;
77
78 if (arizona->clk32k_ref == 0) {
79 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
80 ARIZONA_CLK_32K_ENA, 0);
81
82 switch (arizona->pdata.clk32k_src) {
83 case ARIZONA_32KZ_MCLK1:
84 pm_runtime_put_sync(arizona->dev);
85 break;
86 }
87 }
88
89 mutex_unlock(&arizona->clk_lock);
90
91 return 0;
92 }
93 EXPORT_SYMBOL_GPL(arizona_clk32k_disable);
94
95 static irqreturn_t arizona_clkgen_err(int irq, void *data)
96 {
97 struct arizona *arizona = data;
98
99 dev_err(arizona->dev, "CLKGEN error\n");
100
101 return IRQ_HANDLED;
102 }
103
104 static irqreturn_t arizona_underclocked(int irq, void *data)
105 {
106 struct arizona *arizona = data;
107 unsigned int val;
108 int ret;
109
110 ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8,
111 &val);
112 if (ret != 0) {
113 dev_err(arizona->dev, "Failed to read underclock status: %d\n",
114 ret);
115 return IRQ_NONE;
116 }
117
118 if (val & ARIZONA_AIF3_UNDERCLOCKED_STS)
119 dev_err(arizona->dev, "AIF3 underclocked\n");
120 if (val & ARIZONA_AIF2_UNDERCLOCKED_STS)
121 dev_err(arizona->dev, "AIF2 underclocked\n");
122 if (val & ARIZONA_AIF1_UNDERCLOCKED_STS)
123 dev_err(arizona->dev, "AIF1 underclocked\n");
124 if (val & ARIZONA_ISRC3_UNDERCLOCKED_STS)
125 dev_err(arizona->dev, "ISRC3 underclocked\n");
126 if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS)
127 dev_err(arizona->dev, "ISRC2 underclocked\n");
128 if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS)
129 dev_err(arizona->dev, "ISRC1 underclocked\n");
130 if (val & ARIZONA_FX_UNDERCLOCKED_STS)
131 dev_err(arizona->dev, "FX underclocked\n");
132 if (val & ARIZONA_ASRC_UNDERCLOCKED_STS)
133 dev_err(arizona->dev, "ASRC underclocked\n");
134 if (val & ARIZONA_DAC_UNDERCLOCKED_STS)
135 dev_err(arizona->dev, "DAC underclocked\n");
136 if (val & ARIZONA_ADC_UNDERCLOCKED_STS)
137 dev_err(arizona->dev, "ADC underclocked\n");
138 if (val & ARIZONA_MIXER_UNDERCLOCKED_STS)
139 dev_err(arizona->dev, "Mixer dropped sample\n");
140
141 return IRQ_HANDLED;
142 }
143
144 static irqreturn_t arizona_overclocked(int irq, void *data)
145 {
146 struct arizona *arizona = data;
147 unsigned int val[3];
148 int ret;
149
150 ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6,
151 &val[0], 3);
152 if (ret != 0) {
153 dev_err(arizona->dev, "Failed to read overclock status: %d\n",
154 ret);
155 return IRQ_NONE;
156 }
157
158 switch (arizona->type) {
159 case WM8998:
160 case WM1814:
161 /* Some bits are shifted on WM8998,
162 * rearrange to match the standard bit layout
163 */
164 val[0] = ((val[0] & 0x60e0) >> 1) |
165 ((val[0] & 0x1e00) >> 2) |
166 (val[0] & 0x000f);
167 break;
168 default:
169 break;
170 }
171
172 if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS)
173 dev_err(arizona->dev, "PWM overclocked\n");
174 if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS)
175 dev_err(arizona->dev, "FX core overclocked\n");
176 if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS)
177 dev_err(arizona->dev, "DAC SYS overclocked\n");
178 if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS)
179 dev_err(arizona->dev, "DAC WARP overclocked\n");
180 if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS)
181 dev_err(arizona->dev, "ADC overclocked\n");
182 if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS)
183 dev_err(arizona->dev, "Mixer overclocked\n");
184 if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS)
185 dev_err(arizona->dev, "AIF3 overclocked\n");
186 if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS)
187 dev_err(arizona->dev, "AIF2 overclocked\n");
188 if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS)
189 dev_err(arizona->dev, "AIF1 overclocked\n");
190 if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS)
191 dev_err(arizona->dev, "Pad control overclocked\n");
192
193 if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS)
194 dev_err(arizona->dev, "Slimbus subsystem overclocked\n");
195 if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS)
196 dev_err(arizona->dev, "Slimbus async overclocked\n");
197 if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS)
198 dev_err(arizona->dev, "Slimbus sync overclocked\n");
199 if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS)
200 dev_err(arizona->dev, "ASRC async system overclocked\n");
201 if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS)
202 dev_err(arizona->dev, "ASRC async WARP overclocked\n");
203 if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS)
204 dev_err(arizona->dev, "ASRC sync system overclocked\n");
205 if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS)
206 dev_err(arizona->dev, "ASRC sync WARP overclocked\n");
207 if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS)
208 dev_err(arizona->dev, "DSP1 overclocked\n");
209 if (val[1] & ARIZONA_ISRC3_OVERCLOCKED_STS)
210 dev_err(arizona->dev, "ISRC3 overclocked\n");
211 if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS)
212 dev_err(arizona->dev, "ISRC2 overclocked\n");
213 if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS)
214 dev_err(arizona->dev, "ISRC1 overclocked\n");
215
216 if (val[2] & ARIZONA_SPDIF_OVERCLOCKED_STS)
217 dev_err(arizona->dev, "SPDIF overclocked\n");
218
219 return IRQ_HANDLED;
220 }
221
222 static int arizona_poll_reg(struct arizona *arizona,
223 int timeout, unsigned int reg,
224 unsigned int mask, unsigned int target)
225 {
226 unsigned int val = 0;
227 int ret, i;
228
229 for (i = 0; i < timeout; i++) {
230 ret = regmap_read(arizona->regmap, reg, &val);
231 if (ret != 0) {
232 dev_err(arizona->dev, "Failed to read reg %u: %d\n",
233 reg, ret);
234 continue;
235 }
236
237 if ((val & mask) == target)
238 return 0;
239
240 msleep(1);
241 }
242
243 dev_err(arizona->dev, "Polling reg %u timed out: %x\n", reg, val);
244 return -ETIMEDOUT;
245 }
246
247 static int arizona_wait_for_boot(struct arizona *arizona)
248 {
249 int ret;
250
251 /*
252 * We can't use an interrupt as we need to runtime resume to do so,
253 * we won't race with the interrupt handler as it'll be blocked on
254 * runtime resume.
255 */
256 ret = arizona_poll_reg(arizona, 5, ARIZONA_INTERRUPT_RAW_STATUS_5,
257 ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS);
258
259 if (!ret)
260 regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5,
261 ARIZONA_BOOT_DONE_STS);
262
263 pm_runtime_mark_last_busy(arizona->dev);
264
265 return ret;
266 }
267
268 static inline void arizona_enable_reset(struct arizona *arizona)
269 {
270 if (arizona->pdata.reset)
271 gpio_set_value_cansleep(arizona->pdata.reset, 0);
272 }
273
274 static void arizona_disable_reset(struct arizona *arizona)
275 {
276 if (arizona->pdata.reset) {
277 switch (arizona->type) {
278 case WM5110:
279 case WM8280:
280 /* Meet requirements for minimum reset duration */
281 msleep(5);
282 break;
283 default:
284 break;
285 }
286
287 gpio_set_value_cansleep(arizona->pdata.reset, 1);
288 msleep(1);
289 }
290 }
291
292 struct arizona_sysclk_state {
293 unsigned int fll;
294 unsigned int sysclk;
295 };
296
297 static int arizona_enable_freerun_sysclk(struct arizona *arizona,
298 struct arizona_sysclk_state *state)
299 {
300 int ret, err;
301
302 /* Cache existing FLL and SYSCLK settings */
303 ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &state->fll);
304 if (ret) {
305 dev_err(arizona->dev, "Failed to cache FLL settings: %d\n",
306 ret);
307 return ret;
308 }
309 ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1,
310 &state->sysclk);
311 if (ret) {
312 dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n",
313 ret);
314 return ret;
315 }
316
317 /* Start up SYSCLK using the FLL in free running mode */
318 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1,
319 ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN);
320 if (ret) {
321 dev_err(arizona->dev,
322 "Failed to start FLL in freerunning mode: %d\n",
323 ret);
324 return ret;
325 }
326 ret = arizona_poll_reg(arizona, 25, ARIZONA_INTERRUPT_RAW_STATUS_5,
327 ARIZONA_FLL1_CLOCK_OK_STS,
328 ARIZONA_FLL1_CLOCK_OK_STS);
329 if (ret) {
330 ret = -ETIMEDOUT;
331 goto err_fll;
332 }
333
334 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144);
335 if (ret) {
336 dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret);
337 goto err_fll;
338 }
339
340 return 0;
341
342 err_fll:
343 err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll);
344 if (err)
345 dev_err(arizona->dev,
346 "Failed to re-apply old FLL settings: %d\n", err);
347
348 return ret;
349 }
350
351 static int arizona_disable_freerun_sysclk(struct arizona *arizona,
352 struct arizona_sysclk_state *state)
353 {
354 int ret;
355
356 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1,
357 state->sysclk);
358 if (ret) {
359 dev_err(arizona->dev,
360 "Failed to re-apply old SYSCLK settings: %d\n", ret);
361 return ret;
362 }
363
364 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, state->fll);
365 if (ret) {
366 dev_err(arizona->dev,
367 "Failed to re-apply old FLL settings: %d\n", ret);
368 return ret;
369 }
370
371 return 0;
372 }
373
374 static int wm5102_apply_hardware_patch(struct arizona *arizona)
375 {
376 struct arizona_sysclk_state state;
377 int err, ret;
378
379 ret = arizona_enable_freerun_sysclk(arizona, &state);
380 if (ret)
381 return ret;
382
383 /* Start the write sequencer and wait for it to finish */
384 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
385 ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160);
386 if (ret) {
387 dev_err(arizona->dev, "Failed to start write sequencer: %d\n",
388 ret);
389 goto err;
390 }
391
392 ret = arizona_poll_reg(arizona, 5, ARIZONA_WRITE_SEQUENCER_CTRL_1,
393 ARIZONA_WSEQ_BUSY, 0);
394 if (ret) {
395 regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
396 ARIZONA_WSEQ_ABORT);
397 ret = -ETIMEDOUT;
398 }
399
400 err:
401 err = arizona_disable_freerun_sysclk(arizona, &state);
402
403 return ret ?: err;
404 }
405
406 /*
407 * Register patch to some of the CODECs internal write sequences
408 * to ensure a clean exit from the low power sleep state.
409 */
410 static const struct reg_sequence wm5110_sleep_patch[] = {
411 { 0x337A, 0xC100 },
412 { 0x337B, 0x0041 },
413 { 0x3300, 0xA210 },
414 { 0x3301, 0x050C },
415 };
416
417 static int wm5110_apply_sleep_patch(struct arizona *arizona)
418 {
419 struct arizona_sysclk_state state;
420 int err, ret;
421
422 ret = arizona_enable_freerun_sysclk(arizona, &state);
423 if (ret)
424 return ret;
425
426 ret = regmap_multi_reg_write_bypassed(arizona->regmap,
427 wm5110_sleep_patch,
428 ARRAY_SIZE(wm5110_sleep_patch));
429
430 err = arizona_disable_freerun_sysclk(arizona, &state);
431
432 return ret ?: err;
433 }
434
435 static int wm5102_clear_write_sequencer(struct arizona *arizona)
436 {
437 int ret;
438
439 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_3,
440 0x0);
441 if (ret) {
442 dev_err(arizona->dev,
443 "Failed to clear write sequencer state: %d\n", ret);
444 return ret;
445 }
446
447 arizona_enable_reset(arizona);
448 regulator_disable(arizona->dcvdd);
449
450 msleep(20);
451
452 ret = regulator_enable(arizona->dcvdd);
453 if (ret) {
454 dev_err(arizona->dev, "Failed to re-enable DCVDD: %d\n", ret);
455 return ret;
456 }
457 arizona_disable_reset(arizona);
458
459 return 0;
460 }
461
462 #ifdef CONFIG_PM
463 static int arizona_isolate_dcvdd(struct arizona *arizona)
464 {
465 int ret;
466
467 ret = regmap_update_bits(arizona->regmap,
468 ARIZONA_ISOLATION_CONTROL,
469 ARIZONA_ISOLATE_DCVDD1,
470 ARIZONA_ISOLATE_DCVDD1);
471 if (ret != 0)
472 dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n", ret);
473
474 return ret;
475 }
476
477 static int arizona_connect_dcvdd(struct arizona *arizona)
478 {
479 int ret;
480
481 ret = regmap_update_bits(arizona->regmap,
482 ARIZONA_ISOLATION_CONTROL,
483 ARIZONA_ISOLATE_DCVDD1, 0);
484 if (ret != 0)
485 dev_err(arizona->dev, "Failed to connect DCVDD: %d\n", ret);
486
487 return ret;
488 }
489
490 static int arizona_runtime_resume(struct device *dev)
491 {
492 struct arizona *arizona = dev_get_drvdata(dev);
493 int ret;
494
495 dev_dbg(arizona->dev, "Leaving AoD mode\n");
496
497 if (arizona->has_fully_powered_off) {
498 dev_dbg(arizona->dev, "Re-enabling core supplies\n");
499
500 ret = regulator_bulk_enable(arizona->num_core_supplies,
501 arizona->core_supplies);
502 if (ret) {
503 dev_err(dev, "Failed to enable core supplies: %d\n",
504 ret);
505 return ret;
506 }
507 }
508
509 ret = regulator_enable(arizona->dcvdd);
510 if (ret != 0) {
511 dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret);
512 if (arizona->has_fully_powered_off)
513 regulator_bulk_disable(arizona->num_core_supplies,
514 arizona->core_supplies);
515 return ret;
516 }
517
518 if (arizona->has_fully_powered_off) {
519 arizona_disable_reset(arizona);
520 enable_irq(arizona->irq);
521 arizona->has_fully_powered_off = false;
522 }
523
524 regcache_cache_only(arizona->regmap, false);
525
526 switch (arizona->type) {
527 case WM5102:
528 if (arizona->external_dcvdd) {
529 ret = arizona_connect_dcvdd(arizona);
530 if (ret != 0)
531 goto err;
532 }
533
534 ret = wm5102_patch(arizona);
535 if (ret != 0) {
536 dev_err(arizona->dev, "Failed to apply patch: %d\n",
537 ret);
538 goto err;
539 }
540
541 ret = wm5102_apply_hardware_patch(arizona);
542 if (ret) {
543 dev_err(arizona->dev,
544 "Failed to apply hardware patch: %d\n",
545 ret);
546 goto err;
547 }
548 break;
549 case WM5110:
550 case WM8280:
551 ret = arizona_wait_for_boot(arizona);
552 if (ret)
553 goto err;
554
555 if (arizona->external_dcvdd) {
556 ret = arizona_connect_dcvdd(arizona);
557 if (ret != 0)
558 goto err;
559 } else {
560 /*
561 * As this is only called for the internal regulator
562 * (where we know voltage ranges available) it is ok
563 * to request an exact range.
564 */
565 ret = regulator_set_voltage(arizona->dcvdd,
566 1200000, 1200000);
567 if (ret < 0) {
568 dev_err(arizona->dev,
569 "Failed to set resume voltage: %d\n",
570 ret);
571 goto err;
572 }
573 }
574
575 ret = wm5110_apply_sleep_patch(arizona);
576 if (ret) {
577 dev_err(arizona->dev,
578 "Failed to re-apply sleep patch: %d\n",
579 ret);
580 goto err;
581 }
582 break;
583 default:
584 ret = arizona_wait_for_boot(arizona);
585 if (ret != 0)
586 goto err;
587
588 if (arizona->external_dcvdd) {
589 ret = arizona_connect_dcvdd(arizona);
590 if (ret != 0)
591 goto err;
592 }
593 break;
594 }
595
596 ret = regcache_sync(arizona->regmap);
597 if (ret != 0) {
598 dev_err(arizona->dev, "Failed to restore register cache\n");
599 goto err;
600 }
601
602 return 0;
603
604 err:
605 regcache_cache_only(arizona->regmap, true);
606 regulator_disable(arizona->dcvdd);
607 return ret;
608 }
609
610 static int arizona_runtime_suspend(struct device *dev)
611 {
612 struct arizona *arizona = dev_get_drvdata(dev);
613 unsigned int val;
614 int ret;
615
616 dev_dbg(arizona->dev, "Entering AoD mode\n");
617
618 ret = regmap_read(arizona->regmap, ARIZONA_JACK_DETECT_ANALOGUE, &val);
619 if (ret) {
620 dev_err(dev, "Failed to check jack det status: %d\n", ret);
621 return ret;
622 }
623
624 switch (arizona->type) {
625 case WM5110:
626 case WM8280:
627 if (arizona->external_dcvdd) {
628 ret = arizona_isolate_dcvdd(arizona);
629 if (ret != 0)
630 return ret;
631 } else {
632 /*
633 * As this is only called for the internal regulator
634 * (where we know voltage ranges available) it is ok
635 * to request an exact range.
636 */
637 ret = regulator_set_voltage(arizona->dcvdd,
638 1175000, 1175000);
639 if (ret < 0) {
640 dev_err(arizona->dev,
641 "Failed to set suspend voltage: %d\n",
642 ret);
643 return ret;
644 }
645 }
646 break;
647 case WM5102:
648 if (arizona->external_dcvdd) {
649 ret = arizona_isolate_dcvdd(arizona);
650 if (ret != 0)
651 return ret;
652 }
653
654 if (!(val & ARIZONA_JD1_ENA)) {
655 ret = regmap_write(arizona->regmap,
656 ARIZONA_WRITE_SEQUENCER_CTRL_3, 0x0);
657 if (ret) {
658 dev_err(arizona->dev,
659 "Failed to clear write sequencer: %d\n",
660 ret);
661 return ret;
662 }
663 }
664 break;
665 default:
666 if (arizona->external_dcvdd) {
667 ret = arizona_isolate_dcvdd(arizona);
668 if (ret != 0)
669 return ret;
670 }
671 break;
672 }
673
674 regcache_cache_only(arizona->regmap, true);
675 regcache_mark_dirty(arizona->regmap);
676 regulator_disable(arizona->dcvdd);
677
678 /* Allow us to completely power down if no jack detection */
679 if (!(val & ARIZONA_JD1_ENA)) {
680 dev_dbg(arizona->dev, "Fully powering off\n");
681
682 arizona->has_fully_powered_off = true;
683
684 disable_irq_nosync(arizona->irq);
685 arizona_enable_reset(arizona);
686 regulator_bulk_disable(arizona->num_core_supplies,
687 arizona->core_supplies);
688 }
689
690 return 0;
691 }
692 #endif
693
694 #ifdef CONFIG_PM_SLEEP
695 static int arizona_suspend(struct device *dev)
696 {
697 struct arizona *arizona = dev_get_drvdata(dev);
698
699 dev_dbg(arizona->dev, "Suspend, disabling IRQ\n");
700 disable_irq(arizona->irq);
701
702 return 0;
703 }
704
705 static int arizona_suspend_late(struct device *dev)
706 {
707 struct arizona *arizona = dev_get_drvdata(dev);
708
709 dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n");
710 enable_irq(arizona->irq);
711
712 return 0;
713 }
714
715 static int arizona_resume_noirq(struct device *dev)
716 {
717 struct arizona *arizona = dev_get_drvdata(dev);
718
719 dev_dbg(arizona->dev, "Early resume, disabling IRQ\n");
720 disable_irq(arizona->irq);
721
722 return 0;
723 }
724
725 static int arizona_resume(struct device *dev)
726 {
727 struct arizona *arizona = dev_get_drvdata(dev);
728
729 dev_dbg(arizona->dev, "Late resume, reenabling IRQ\n");
730 enable_irq(arizona->irq);
731
732 return 0;
733 }
734 #endif
735
736 const struct dev_pm_ops arizona_pm_ops = {
737 SET_RUNTIME_PM_OPS(arizona_runtime_suspend,
738 arizona_runtime_resume,
739 NULL)
740 SET_SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume)
741 #ifdef CONFIG_PM_SLEEP
742 .suspend_late = arizona_suspend_late,
743 .resume_noirq = arizona_resume_noirq,
744 #endif
745 };
746 EXPORT_SYMBOL_GPL(arizona_pm_ops);
747
748 #ifdef CONFIG_OF
749 unsigned long arizona_of_get_type(struct device *dev)
750 {
751 const struct of_device_id *id = of_match_device(arizona_of_match, dev);
752
753 if (id)
754 return (unsigned long)id->data;
755 else
756 return 0;
757 }
758 EXPORT_SYMBOL_GPL(arizona_of_get_type);
759
760 int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop,
761 bool mandatory)
762 {
763 int gpio;
764
765 gpio = of_get_named_gpio(arizona->dev->of_node, prop, 0);
766 if (gpio < 0) {
767 if (mandatory)
768 dev_err(arizona->dev,
769 "Mandatory DT gpio %s missing/malformed: %d\n",
770 prop, gpio);
771
772 gpio = 0;
773 }
774
775 return gpio;
776 }
777 EXPORT_SYMBOL_GPL(arizona_of_get_named_gpio);
778
779 static int arizona_of_get_core_pdata(struct arizona *arizona)
780 {
781 struct arizona_pdata *pdata = &arizona->pdata;
782 struct property *prop;
783 const __be32 *cur;
784 u32 val;
785 int ret, i;
786 int count = 0;
787
788 pdata->reset = arizona_of_get_named_gpio(arizona, "wlf,reset", true);
789
790 ret = of_property_read_u32_array(arizona->dev->of_node,
791 "wlf,gpio-defaults",
792 pdata->gpio_defaults,
793 ARRAY_SIZE(pdata->gpio_defaults));
794 if (ret >= 0) {
795 /*
796 * All values are literal except out of range values
797 * which are chip default, translate into platform
798 * data which uses 0 as chip default and out of range
799 * as zero.
800 */
801 for (i = 0; i < ARRAY_SIZE(pdata->gpio_defaults); i++) {
802 if (pdata->gpio_defaults[i] > 0xffff)
803 pdata->gpio_defaults[i] = 0;
804 else if (pdata->gpio_defaults[i] == 0)
805 pdata->gpio_defaults[i] = 0x10000;
806 }
807 } else {
808 dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n",
809 ret);
810 }
811
812 of_property_for_each_u32(arizona->dev->of_node, "wlf,inmode", prop,
813 cur, val) {
814 if (count == ARRAY_SIZE(pdata->inmode))
815 break;
816
817 pdata->inmode[count] = val;
818 count++;
819 }
820
821 count = 0;
822 of_property_for_each_u32(arizona->dev->of_node, "wlf,dmic-ref", prop,
823 cur, val) {
824 if (count == ARRAY_SIZE(pdata->dmic_ref))
825 break;
826
827 pdata->dmic_ref[count] = val;
828 count++;
829 }
830
831 return 0;
832 }
833
834 const struct of_device_id arizona_of_match[] = {
835 { .compatible = "wlf,wm5102", .data = (void *)WM5102 },
836 { .compatible = "wlf,wm5110", .data = (void *)WM5110 },
837 { .compatible = "wlf,wm8280", .data = (void *)WM8280 },
838 { .compatible = "wlf,wm8997", .data = (void *)WM8997 },
839 { .compatible = "wlf,wm8998", .data = (void *)WM8998 },
840 { .compatible = "wlf,wm1814", .data = (void *)WM1814 },
841 {},
842 };
843 EXPORT_SYMBOL_GPL(arizona_of_match);
844 #else
845 static inline int arizona_of_get_core_pdata(struct arizona *arizona)
846 {
847 return 0;
848 }
849 #endif
850
851 static const struct mfd_cell early_devs[] = {
852 { .name = "arizona-ldo1" },
853 };
854
855 static const char * const wm5102_supplies[] = {
856 "MICVDD",
857 "DBVDD2",
858 "DBVDD3",
859 "CPVDD",
860 "SPKVDDL",
861 "SPKVDDR",
862 };
863
864 static const struct mfd_cell wm5102_devs[] = {
865 { .name = "arizona-micsupp" },
866 {
867 .name = "arizona-extcon",
868 .parent_supplies = wm5102_supplies,
869 .num_parent_supplies = 1, /* We only need MICVDD */
870 },
871 { .name = "arizona-gpio" },
872 { .name = "arizona-haptics" },
873 { .name = "arizona-pwm" },
874 {
875 .name = "wm5102-codec",
876 .parent_supplies = wm5102_supplies,
877 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
878 },
879 };
880
881 static const struct mfd_cell wm5110_devs[] = {
882 { .name = "arizona-micsupp" },
883 {
884 .name = "arizona-extcon",
885 .parent_supplies = wm5102_supplies,
886 .num_parent_supplies = 1, /* We only need MICVDD */
887 },
888 { .name = "arizona-gpio" },
889 { .name = "arizona-haptics" },
890 { .name = "arizona-pwm" },
891 {
892 .name = "wm5110-codec",
893 .parent_supplies = wm5102_supplies,
894 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
895 },
896 };
897
898 static const char * const wm8997_supplies[] = {
899 "MICVDD",
900 "DBVDD2",
901 "CPVDD",
902 "SPKVDD",
903 };
904
905 static const struct mfd_cell wm8997_devs[] = {
906 { .name = "arizona-micsupp" },
907 {
908 .name = "arizona-extcon",
909 .parent_supplies = wm8997_supplies,
910 .num_parent_supplies = 1, /* We only need MICVDD */
911 },
912 { .name = "arizona-gpio" },
913 { .name = "arizona-haptics" },
914 { .name = "arizona-pwm" },
915 {
916 .name = "wm8997-codec",
917 .parent_supplies = wm8997_supplies,
918 .num_parent_supplies = ARRAY_SIZE(wm8997_supplies),
919 },
920 };
921
922 static const struct mfd_cell wm8998_devs[] = {
923 {
924 .name = "arizona-extcon",
925 .parent_supplies = wm5102_supplies,
926 .num_parent_supplies = 1, /* We only need MICVDD */
927 },
928 { .name = "arizona-gpio" },
929 { .name = "arizona-haptics" },
930 { .name = "arizona-pwm" },
931 {
932 .name = "wm8998-codec",
933 .parent_supplies = wm5102_supplies,
934 .num_parent_supplies = ARRAY_SIZE(wm5102_supplies),
935 },
936 { .name = "arizona-micsupp" },
937 };
938
939 int arizona_dev_init(struct arizona *arizona)
940 {
941 struct device *dev = arizona->dev;
942 const char *type_name;
943 unsigned int reg, val, mask;
944 int (*apply_patch)(struct arizona *) = NULL;
945 int ret, i;
946
947 dev_set_drvdata(arizona->dev, arizona);
948 mutex_init(&arizona->clk_lock);
949
950 if (dev_get_platdata(arizona->dev))
951 memcpy(&arizona->pdata, dev_get_platdata(arizona->dev),
952 sizeof(arizona->pdata));
953 else
954 arizona_of_get_core_pdata(arizona);
955
956 regcache_cache_only(arizona->regmap, true);
957
958 switch (arizona->type) {
959 case WM5102:
960 case WM5110:
961 case WM8280:
962 case WM8997:
963 case WM8998:
964 case WM1814:
965 for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++)
966 arizona->core_supplies[i].supply
967 = wm5102_core_supplies[i];
968 arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies);
969 break;
970 default:
971 dev_err(arizona->dev, "Unknown device type %d\n",
972 arizona->type);
973 return -EINVAL;
974 }
975
976 /* Mark DCVDD as external, LDO1 driver will clear if internal */
977 arizona->external_dcvdd = true;
978
979 ret = mfd_add_devices(arizona->dev, -1, early_devs,
980 ARRAY_SIZE(early_devs), NULL, 0, NULL);
981 if (ret != 0) {
982 dev_err(dev, "Failed to add early children: %d\n", ret);
983 return ret;
984 }
985
986 ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies,
987 arizona->core_supplies);
988 if (ret != 0) {
989 dev_err(dev, "Failed to request core supplies: %d\n",
990 ret);
991 goto err_early;
992 }
993
994 /**
995 * Don't use devres here because the only device we have to get
996 * against is the MFD device and DCVDD will likely be supplied by
997 * one of its children. Meaning that the regulator will be
998 * destroyed by the time devres calls regulator put.
999 */
1000 arizona->dcvdd = regulator_get(arizona->dev, "DCVDD");
1001 if (IS_ERR(arizona->dcvdd)) {
1002 ret = PTR_ERR(arizona->dcvdd);
1003 dev_err(dev, "Failed to request DCVDD: %d\n", ret);
1004 goto err_early;
1005 }
1006
1007 if (arizona->pdata.reset) {
1008 /* Start out with /RESET low to put the chip into reset */
1009 ret = devm_gpio_request_one(arizona->dev, arizona->pdata.reset,
1010 GPIOF_DIR_OUT | GPIOF_INIT_LOW,
1011 "arizona /RESET");
1012 if (ret != 0) {
1013 dev_err(dev, "Failed to request /RESET: %d\n", ret);
1014 goto err_dcvdd;
1015 }
1016 }
1017
1018 ret = regulator_bulk_enable(arizona->num_core_supplies,
1019 arizona->core_supplies);
1020 if (ret != 0) {
1021 dev_err(dev, "Failed to enable core supplies: %d\n",
1022 ret);
1023 goto err_dcvdd;
1024 }
1025
1026 ret = regulator_enable(arizona->dcvdd);
1027 if (ret != 0) {
1028 dev_err(dev, "Failed to enable DCVDD: %d\n", ret);
1029 goto err_enable;
1030 }
1031
1032 arizona_disable_reset(arizona);
1033
1034 regcache_cache_only(arizona->regmap, false);
1035
1036 /* Verify that this is a chip we know about */
1037 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
1038 if (ret != 0) {
1039 dev_err(dev, "Failed to read ID register: %d\n", ret);
1040 goto err_reset;
1041 }
1042
1043 switch (reg) {
1044 case 0x5102:
1045 case 0x5110:
1046 case 0x6349:
1047 case 0x8997:
1048 break;
1049 default:
1050 dev_err(arizona->dev, "Unknown device ID: %x\n", reg);
1051 goto err_reset;
1052 }
1053
1054 /* If we have a /RESET GPIO we'll already be reset */
1055 if (!arizona->pdata.reset) {
1056 ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0);
1057 if (ret != 0) {
1058 dev_err(dev, "Failed to reset device: %d\n", ret);
1059 goto err_reset;
1060 }
1061
1062 msleep(1);
1063 }
1064
1065 /* Ensure device startup is complete */
1066 switch (arizona->type) {
1067 case WM5102:
1068 ret = regmap_read(arizona->regmap,
1069 ARIZONA_WRITE_SEQUENCER_CTRL_3, &val);
1070 if (ret) {
1071 dev_err(dev,
1072 "Failed to check write sequencer state: %d\n",
1073 ret);
1074 } else if (val & 0x01) {
1075 ret = wm5102_clear_write_sequencer(arizona);
1076 if (ret)
1077 return ret;
1078 }
1079 break;
1080 default:
1081 break;
1082 }
1083
1084 ret = arizona_wait_for_boot(arizona);
1085 if (ret) {
1086 dev_err(arizona->dev, "Device failed initial boot: %d\n", ret);
1087 goto err_reset;
1088 }
1089
1090 /* Read the device ID information & do device specific stuff */
1091 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, &reg);
1092 if (ret != 0) {
1093 dev_err(dev, "Failed to read ID register: %d\n", ret);
1094 goto err_reset;
1095 }
1096
1097 ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION,
1098 &arizona->rev);
1099 if (ret != 0) {
1100 dev_err(dev, "Failed to read revision register: %d\n", ret);
1101 goto err_reset;
1102 }
1103 arizona->rev &= ARIZONA_DEVICE_REVISION_MASK;
1104
1105 switch (reg) {
1106 #ifdef CONFIG_MFD_WM5102
1107 case 0x5102:
1108 type_name = "WM5102";
1109 if (arizona->type != WM5102) {
1110 dev_err(arizona->dev, "WM5102 registered as %d\n",
1111 arizona->type);
1112 arizona->type = WM5102;
1113 }
1114 apply_patch = wm5102_patch;
1115 arizona->rev &= 0x7;
1116 break;
1117 #endif
1118 #ifdef CONFIG_MFD_WM5110
1119 case 0x5110:
1120 switch (arizona->type) {
1121 case WM5110:
1122 type_name = "WM5110";
1123 break;
1124 case WM8280:
1125 type_name = "WM8280";
1126 break;
1127 default:
1128 type_name = "WM5110";
1129 dev_err(arizona->dev, "WM5110 registered as %d\n",
1130 arizona->type);
1131 arizona->type = WM5110;
1132 break;
1133 }
1134 apply_patch = wm5110_patch;
1135 break;
1136 #endif
1137 #ifdef CONFIG_MFD_WM8997
1138 case 0x8997:
1139 type_name = "WM8997";
1140 if (arizona->type != WM8997) {
1141 dev_err(arizona->dev, "WM8997 registered as %d\n",
1142 arizona->type);
1143 arizona->type = WM8997;
1144 }
1145 apply_patch = wm8997_patch;
1146 break;
1147 #endif
1148 #ifdef CONFIG_MFD_WM8998
1149 case 0x6349:
1150 switch (arizona->type) {
1151 case WM8998:
1152 type_name = "WM8998";
1153 break;
1154
1155 case WM1814:
1156 type_name = "WM1814";
1157 break;
1158
1159 default:
1160 type_name = "WM8998";
1161 dev_err(arizona->dev, "WM8998 registered as %d\n",
1162 arizona->type);
1163 arizona->type = WM8998;
1164 }
1165
1166 apply_patch = wm8998_patch;
1167 break;
1168 #endif
1169 default:
1170 dev_err(arizona->dev, "Unknown device ID %x\n", reg);
1171 goto err_reset;
1172 }
1173
1174 dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A');
1175
1176 if (apply_patch) {
1177 ret = apply_patch(arizona);
1178 if (ret != 0) {
1179 dev_err(arizona->dev, "Failed to apply patch: %d\n",
1180 ret);
1181 goto err_reset;
1182 }
1183
1184 switch (arizona->type) {
1185 case WM5102:
1186 ret = wm5102_apply_hardware_patch(arizona);
1187 if (ret) {
1188 dev_err(arizona->dev,
1189 "Failed to apply hardware patch: %d\n",
1190 ret);
1191 goto err_reset;
1192 }
1193 break;
1194 case WM5110:
1195 case WM8280:
1196 ret = wm5110_apply_sleep_patch(arizona);
1197 if (ret) {
1198 dev_err(arizona->dev,
1199 "Failed to apply sleep patch: %d\n",
1200 ret);
1201 goto err_reset;
1202 }
1203 break;
1204 default:
1205 break;
1206 }
1207 }
1208
1209 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
1210 if (!arizona->pdata.gpio_defaults[i])
1211 continue;
1212
1213 regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i,
1214 arizona->pdata.gpio_defaults[i]);
1215 }
1216
1217 /* Chip default */
1218 if (!arizona->pdata.clk32k_src)
1219 arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2;
1220
1221 switch (arizona->pdata.clk32k_src) {
1222 case ARIZONA_32KZ_MCLK1:
1223 case ARIZONA_32KZ_MCLK2:
1224 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
1225 ARIZONA_CLK_32K_SRC_MASK,
1226 arizona->pdata.clk32k_src - 1);
1227 arizona_clk32k_enable(arizona);
1228 break;
1229 case ARIZONA_32KZ_NONE:
1230 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
1231 ARIZONA_CLK_32K_SRC_MASK, 2);
1232 break;
1233 default:
1234 dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n",
1235 arizona->pdata.clk32k_src);
1236 ret = -EINVAL;
1237 goto err_reset;
1238 }
1239
1240 for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) {
1241 if (!arizona->pdata.micbias[i].mV &&
1242 !arizona->pdata.micbias[i].bypass)
1243 continue;
1244
1245 /* Apply default for bypass mode */
1246 if (!arizona->pdata.micbias[i].mV)
1247 arizona->pdata.micbias[i].mV = 2800;
1248
1249 val = (arizona->pdata.micbias[i].mV - 1500) / 100;
1250
1251 val <<= ARIZONA_MICB1_LVL_SHIFT;
1252
1253 if (arizona->pdata.micbias[i].ext_cap)
1254 val |= ARIZONA_MICB1_EXT_CAP;
1255
1256 if (arizona->pdata.micbias[i].discharge)
1257 val |= ARIZONA_MICB1_DISCH;
1258
1259 if (arizona->pdata.micbias[i].soft_start)
1260 val |= ARIZONA_MICB1_RATE;
1261
1262 if (arizona->pdata.micbias[i].bypass)
1263 val |= ARIZONA_MICB1_BYPASS;
1264
1265 regmap_update_bits(arizona->regmap,
1266 ARIZONA_MIC_BIAS_CTRL_1 + i,
1267 ARIZONA_MICB1_LVL_MASK |
1268 ARIZONA_MICB1_EXT_CAP |
1269 ARIZONA_MICB1_DISCH |
1270 ARIZONA_MICB1_BYPASS |
1271 ARIZONA_MICB1_RATE, val);
1272 }
1273
1274 for (i = 0; i < ARIZONA_MAX_INPUT; i++) {
1275 /* Default for both is 0 so noop with defaults */
1276 val = arizona->pdata.dmic_ref[i]
1277 << ARIZONA_IN1_DMIC_SUP_SHIFT;
1278 if (arizona->pdata.inmode[i] & ARIZONA_INMODE_DMIC)
1279 val |= 1 << ARIZONA_IN1_MODE_SHIFT;
1280
1281 switch (arizona->type) {
1282 case WM8998:
1283 case WM1814:
1284 regmap_update_bits(arizona->regmap,
1285 ARIZONA_ADC_DIGITAL_VOLUME_1L + (i * 8),
1286 ARIZONA_IN1L_SRC_SE_MASK,
1287 (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE)
1288 << ARIZONA_IN1L_SRC_SE_SHIFT);
1289
1290 regmap_update_bits(arizona->regmap,
1291 ARIZONA_ADC_DIGITAL_VOLUME_1R + (i * 8),
1292 ARIZONA_IN1R_SRC_SE_MASK,
1293 (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE)
1294 << ARIZONA_IN1R_SRC_SE_SHIFT);
1295
1296 mask = ARIZONA_IN1_DMIC_SUP_MASK |
1297 ARIZONA_IN1_MODE_MASK;
1298 break;
1299 default:
1300 if (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE)
1301 val |= 1 << ARIZONA_IN1_SINGLE_ENDED_SHIFT;
1302
1303 mask = ARIZONA_IN1_DMIC_SUP_MASK |
1304 ARIZONA_IN1_MODE_MASK |
1305 ARIZONA_IN1_SINGLE_ENDED_MASK;
1306 break;
1307 }
1308
1309 regmap_update_bits(arizona->regmap,
1310 ARIZONA_IN1L_CONTROL + (i * 8),
1311 mask, val);
1312 }
1313
1314 for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) {
1315 /* Default is 0 so noop with defaults */
1316 if (arizona->pdata.out_mono[i])
1317 val = ARIZONA_OUT1_MONO;
1318 else
1319 val = 0;
1320
1321 regmap_update_bits(arizona->regmap,
1322 ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8),
1323 ARIZONA_OUT1_MONO, val);
1324 }
1325
1326 for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) {
1327 if (arizona->pdata.spk_mute[i])
1328 regmap_update_bits(arizona->regmap,
1329 ARIZONA_PDM_SPK1_CTRL_1 + (i * 2),
1330 ARIZONA_SPK1_MUTE_ENDIAN_MASK |
1331 ARIZONA_SPK1_MUTE_SEQ1_MASK,
1332 arizona->pdata.spk_mute[i]);
1333
1334 if (arizona->pdata.spk_fmt[i])
1335 regmap_update_bits(arizona->regmap,
1336 ARIZONA_PDM_SPK1_CTRL_2 + (i * 2),
1337 ARIZONA_SPK1_FMT_MASK,
1338 arizona->pdata.spk_fmt[i]);
1339 }
1340
1341 pm_runtime_set_active(arizona->dev);
1342 pm_runtime_enable(arizona->dev);
1343
1344 /* Set up for interrupts */
1345 ret = arizona_irq_init(arizona);
1346 if (ret != 0)
1347 goto err_reset;
1348
1349 pm_runtime_set_autosuspend_delay(arizona->dev, 100);
1350 pm_runtime_use_autosuspend(arizona->dev);
1351
1352 arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error",
1353 arizona_clkgen_err, arizona);
1354 arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked",
1355 arizona_overclocked, arizona);
1356 arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked",
1357 arizona_underclocked, arizona);
1358
1359 switch (arizona->type) {
1360 case WM5102:
1361 ret = mfd_add_devices(arizona->dev, -1, wm5102_devs,
1362 ARRAY_SIZE(wm5102_devs), NULL, 0, NULL);
1363 break;
1364 case WM5110:
1365 case WM8280:
1366 ret = mfd_add_devices(arizona->dev, -1, wm5110_devs,
1367 ARRAY_SIZE(wm5110_devs), NULL, 0, NULL);
1368 break;
1369 case WM8997:
1370 ret = mfd_add_devices(arizona->dev, -1, wm8997_devs,
1371 ARRAY_SIZE(wm8997_devs), NULL, 0, NULL);
1372 break;
1373 case WM8998:
1374 case WM1814:
1375 ret = mfd_add_devices(arizona->dev, -1, wm8998_devs,
1376 ARRAY_SIZE(wm8998_devs), NULL, 0, NULL);
1377 break;
1378 }
1379
1380 if (ret != 0) {
1381 dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret);
1382 goto err_irq;
1383 }
1384
1385 return 0;
1386
1387 err_irq:
1388 arizona_irq_exit(arizona);
1389 err_reset:
1390 arizona_enable_reset(arizona);
1391 regulator_disable(arizona->dcvdd);
1392 err_enable:
1393 regulator_bulk_disable(arizona->num_core_supplies,
1394 arizona->core_supplies);
1395 err_dcvdd:
1396 regulator_put(arizona->dcvdd);
1397 err_early:
1398 mfd_remove_devices(dev);
1399 return ret;
1400 }
1401 EXPORT_SYMBOL_GPL(arizona_dev_init);
1402
1403 int arizona_dev_exit(struct arizona *arizona)
1404 {
1405 pm_runtime_disable(arizona->dev);
1406
1407 regulator_disable(arizona->dcvdd);
1408 regulator_put(arizona->dcvdd);
1409
1410 mfd_remove_devices(arizona->dev);
1411 arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona);
1412 arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona);
1413 arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona);
1414 arizona_irq_exit(arizona);
1415 arizona_enable_reset(arizona);
1416
1417 regulator_bulk_disable(arizona->num_core_supplies,
1418 arizona->core_supplies);
1419 return 0;
1420 }
1421 EXPORT_SYMBOL_GPL(arizona_dev_exit);
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