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mfd: Add regmap cache support for wm8350
[deliverable/linux.git] / drivers / mfd / wm8350-core.c
1 /*
2 * wm8350-core.c -- Device access for Wolfson WM8350
3 *
4 * Copyright 2007, 2008 Wolfson Microelectronics PLC.
5 *
6 * Author: Liam Girdwood, Mark Brown
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/init.h>
18 #include <linux/slab.h>
19 #include <linux/bug.h>
20 #include <linux/device.h>
21 #include <linux/delay.h>
22 #include <linux/interrupt.h>
23 #include <linux/regmap.h>
24 #include <linux/workqueue.h>
25
26 #include <linux/mfd/wm8350/core.h>
27 #include <linux/mfd/wm8350/audio.h>
28 #include <linux/mfd/wm8350/comparator.h>
29 #include <linux/mfd/wm8350/gpio.h>
30 #include <linux/mfd/wm8350/pmic.h>
31 #include <linux/mfd/wm8350/rtc.h>
32 #include <linux/mfd/wm8350/supply.h>
33 #include <linux/mfd/wm8350/wdt.h>
34
35 #define WM8350_CLOCK_CONTROL_1 0x28
36 #define WM8350_AIF_TEST 0x74
37
38 /* debug */
39 #define WM8350_BUS_DEBUG 0
40 #if WM8350_BUS_DEBUG
41 #define dump(regs, src) do { \
42 int i_; \
43 u16 *src_ = src; \
44 printk(KERN_DEBUG); \
45 for (i_ = 0; i_ < regs; i_++) \
46 printk(" 0x%4.4x", *src_++); \
47 printk("\n"); \
48 } while (0);
49 #else
50 #define dump(bytes, src)
51 #endif
52
53 #define WM8350_LOCK_DEBUG 0
54 #if WM8350_LOCK_DEBUG
55 #define ldbg(format, arg...) printk(format, ## arg)
56 #else
57 #define ldbg(format, arg...)
58 #endif
59
60 /*
61 * WM8350 Device IO
62 */
63 static DEFINE_MUTEX(io_mutex);
64 static DEFINE_MUTEX(reg_lock_mutex);
65
66 /* Perform a physical read from the device.
67 */
68 static int wm8350_phys_read(struct wm8350 *wm8350, u8 reg, int num_regs,
69 u16 *dest)
70 {
71 int i, ret;
72 int bytes = num_regs * 2;
73
74 dev_dbg(wm8350->dev, "volatile read\n");
75 ret = regmap_raw_read(wm8350->regmap, reg, dest, bytes);
76
77 for (i = reg; i < reg + num_regs; i++) {
78 /* Cache is CPU endian */
79 dest[i - reg] = be16_to_cpu(dest[i - reg]);
80
81 /* Mask out non-readable bits */
82 dest[i - reg] &= wm8350_reg_io_map[i].readable;
83 }
84
85 dump(num_regs, dest);
86
87 return ret;
88 }
89
90 static int wm8350_read(struct wm8350 *wm8350, u8 reg, int num_regs, u16 *dest)
91 {
92 int i;
93 int end = reg + num_regs;
94 int ret = 0;
95 int bytes = num_regs * 2;
96
97 if ((reg + num_regs - 1) > WM8350_MAX_REGISTER) {
98 dev_err(wm8350->dev, "invalid reg %x\n",
99 reg + num_regs - 1);
100 return -EINVAL;
101 }
102
103 dev_dbg(wm8350->dev,
104 "%s R%d(0x%2.2x) %d regs\n", __func__, reg, reg, num_regs);
105
106 #if WM8350_BUS_DEBUG
107 /* we can _safely_ read any register, but warn if read not supported */
108 for (i = reg; i < end; i++) {
109 if (!wm8350_reg_io_map[i].readable)
110 dev_warn(wm8350->dev,
111 "reg R%d is not readable\n", i);
112 }
113 #endif
114
115 /* if any volatile registers are required, then read back all */
116 for (i = reg; i < end; i++)
117 if (wm8350_reg_io_map[i].vol)
118 return wm8350_phys_read(wm8350, reg, num_regs, dest);
119
120 /* no volatiles, then cache is good */
121 dev_dbg(wm8350->dev, "cache read\n");
122 memcpy(dest, &wm8350->reg_cache[reg], bytes);
123 dump(num_regs, dest);
124 return ret;
125 }
126
127 static inline int is_reg_locked(struct wm8350 *wm8350, u8 reg)
128 {
129 if (reg == WM8350_SECURITY ||
130 wm8350->reg_cache[WM8350_SECURITY] == WM8350_UNLOCK_KEY)
131 return 0;
132
133 if ((reg >= WM8350_GPIO_FUNCTION_SELECT_1 &&
134 reg <= WM8350_GPIO_FUNCTION_SELECT_4) ||
135 (reg >= WM8350_BATTERY_CHARGER_CONTROL_1 &&
136 reg <= WM8350_BATTERY_CHARGER_CONTROL_3))
137 return 1;
138 return 0;
139 }
140
141 static int wm8350_write(struct wm8350 *wm8350, u8 reg, int num_regs, u16 *src)
142 {
143 int i;
144 int end = reg + num_regs;
145 int bytes = num_regs * 2;
146
147 if ((reg + num_regs - 1) > WM8350_MAX_REGISTER) {
148 dev_err(wm8350->dev, "invalid reg %x\n",
149 reg + num_regs - 1);
150 return -EINVAL;
151 }
152
153 /* it's generally not a good idea to write to RO or locked registers */
154 for (i = reg; i < end; i++) {
155 if (!wm8350_reg_io_map[i].writable) {
156 dev_err(wm8350->dev,
157 "attempted write to read only reg R%d\n", i);
158 return -EINVAL;
159 }
160
161 if (is_reg_locked(wm8350, i)) {
162 dev_err(wm8350->dev,
163 "attempted write to locked reg R%d\n", i);
164 return -EINVAL;
165 }
166
167 src[i - reg] &= wm8350_reg_io_map[i].writable;
168
169 wm8350->reg_cache[i] =
170 (wm8350->reg_cache[i] & ~wm8350_reg_io_map[i].writable)
171 | src[i - reg];
172
173 src[i - reg] = cpu_to_be16(src[i - reg]);
174 }
175
176 /* Actually write it out */
177 return regmap_raw_write(wm8350->regmap, reg, src, bytes);
178 }
179
180 /*
181 * Safe read, modify, write methods
182 */
183 int wm8350_clear_bits(struct wm8350 *wm8350, u16 reg, u16 mask)
184 {
185 u16 data;
186 int err;
187
188 mutex_lock(&io_mutex);
189 err = wm8350_read(wm8350, reg, 1, &data);
190 if (err) {
191 dev_err(wm8350->dev, "read from reg R%d failed\n", reg);
192 goto out;
193 }
194
195 data &= ~mask;
196 err = wm8350_write(wm8350, reg, 1, &data);
197 if (err)
198 dev_err(wm8350->dev, "write to reg R%d failed\n", reg);
199 out:
200 mutex_unlock(&io_mutex);
201 return err;
202 }
203 EXPORT_SYMBOL_GPL(wm8350_clear_bits);
204
205 int wm8350_set_bits(struct wm8350 *wm8350, u16 reg, u16 mask)
206 {
207 u16 data;
208 int err;
209
210 mutex_lock(&io_mutex);
211 err = wm8350_read(wm8350, reg, 1, &data);
212 if (err) {
213 dev_err(wm8350->dev, "read from reg R%d failed\n", reg);
214 goto out;
215 }
216
217 data |= mask;
218 err = wm8350_write(wm8350, reg, 1, &data);
219 if (err)
220 dev_err(wm8350->dev, "write to reg R%d failed\n", reg);
221 out:
222 mutex_unlock(&io_mutex);
223 return err;
224 }
225 EXPORT_SYMBOL_GPL(wm8350_set_bits);
226
227 u16 wm8350_reg_read(struct wm8350 *wm8350, int reg)
228 {
229 u16 data;
230 int err;
231
232 mutex_lock(&io_mutex);
233 err = wm8350_read(wm8350, reg, 1, &data);
234 if (err)
235 dev_err(wm8350->dev, "read from reg R%d failed\n", reg);
236
237 mutex_unlock(&io_mutex);
238 return data;
239 }
240 EXPORT_SYMBOL_GPL(wm8350_reg_read);
241
242 int wm8350_reg_write(struct wm8350 *wm8350, int reg, u16 val)
243 {
244 int ret;
245 u16 data = val;
246
247 mutex_lock(&io_mutex);
248 ret = wm8350_write(wm8350, reg, 1, &data);
249 if (ret)
250 dev_err(wm8350->dev, "write to reg R%d failed\n", reg);
251 mutex_unlock(&io_mutex);
252 return ret;
253 }
254 EXPORT_SYMBOL_GPL(wm8350_reg_write);
255
256 int wm8350_block_read(struct wm8350 *wm8350, int start_reg, int regs,
257 u16 *dest)
258 {
259 int err = 0;
260
261 mutex_lock(&io_mutex);
262 err = wm8350_read(wm8350, start_reg, regs, dest);
263 if (err)
264 dev_err(wm8350->dev, "block read starting from R%d failed\n",
265 start_reg);
266 mutex_unlock(&io_mutex);
267 return err;
268 }
269 EXPORT_SYMBOL_GPL(wm8350_block_read);
270
271 int wm8350_block_write(struct wm8350 *wm8350, int start_reg, int regs,
272 u16 *src)
273 {
274 int ret = 0;
275
276 mutex_lock(&io_mutex);
277 ret = wm8350_write(wm8350, start_reg, regs, src);
278 if (ret)
279 dev_err(wm8350->dev, "block write starting at R%d failed\n",
280 start_reg);
281 mutex_unlock(&io_mutex);
282 return ret;
283 }
284 EXPORT_SYMBOL_GPL(wm8350_block_write);
285
286 /**
287 * wm8350_reg_lock()
288 *
289 * The WM8350 has a hardware lock which can be used to prevent writes to
290 * some registers (generally those which can cause particularly serious
291 * problems if misused). This function enables that lock.
292 */
293 int wm8350_reg_lock(struct wm8350 *wm8350)
294 {
295 int ret;
296
297 mutex_lock(&reg_lock_mutex);
298
299 ldbg(__func__);
300
301 ret = wm8350_reg_write(wm8350, WM8350_SECURITY, WM8350_LOCK_KEY);
302 if (ret)
303 dev_err(wm8350->dev, "lock failed\n");
304
305 wm8350->unlocked = false;
306
307 mutex_unlock(&reg_lock_mutex);
308
309 return ret;
310 }
311 EXPORT_SYMBOL_GPL(wm8350_reg_lock);
312
313 /**
314 * wm8350_reg_unlock()
315 *
316 * The WM8350 has a hardware lock which can be used to prevent writes to
317 * some registers (generally those which can cause particularly serious
318 * problems if misused). This function disables that lock so updates
319 * can be performed. For maximum safety this should be done only when
320 * required.
321 */
322 int wm8350_reg_unlock(struct wm8350 *wm8350)
323 {
324 int ret;
325
326 mutex_lock(&reg_lock_mutex);
327
328 ldbg(__func__);
329
330 ret = wm8350_reg_write(wm8350, WM8350_SECURITY, WM8350_UNLOCK_KEY);
331 if (ret)
332 dev_err(wm8350->dev, "unlock failed\n");
333
334 wm8350->unlocked = true;
335
336 mutex_unlock(&reg_lock_mutex);
337
338 return ret;
339 }
340 EXPORT_SYMBOL_GPL(wm8350_reg_unlock);
341
342 int wm8350_read_auxadc(struct wm8350 *wm8350, int channel, int scale, int vref)
343 {
344 u16 reg, result = 0;
345
346 if (channel < WM8350_AUXADC_AUX1 || channel > WM8350_AUXADC_TEMP)
347 return -EINVAL;
348 if (channel >= WM8350_AUXADC_USB && channel <= WM8350_AUXADC_TEMP
349 && (scale != 0 || vref != 0))
350 return -EINVAL;
351
352 mutex_lock(&wm8350->auxadc_mutex);
353
354 /* Turn on the ADC */
355 reg = wm8350_reg_read(wm8350, WM8350_POWER_MGMT_5);
356 wm8350_reg_write(wm8350, WM8350_POWER_MGMT_5, reg | WM8350_AUXADC_ENA);
357
358 if (scale || vref) {
359 reg = scale << 13;
360 reg |= vref << 12;
361 wm8350_reg_write(wm8350, WM8350_AUX1_READBACK + channel, reg);
362 }
363
364 reg = wm8350_reg_read(wm8350, WM8350_DIGITISER_CONTROL_1);
365 reg |= 1 << channel | WM8350_AUXADC_POLL;
366 wm8350_reg_write(wm8350, WM8350_DIGITISER_CONTROL_1, reg);
367
368 /* If a late IRQ left the completion signalled then consume
369 * the completion. */
370 try_wait_for_completion(&wm8350->auxadc_done);
371
372 /* We ignore the result of the completion and just check for a
373 * conversion result, allowing us to soldier on if the IRQ
374 * infrastructure is not set up for the chip. */
375 wait_for_completion_timeout(&wm8350->auxadc_done, msecs_to_jiffies(5));
376
377 reg = wm8350_reg_read(wm8350, WM8350_DIGITISER_CONTROL_1);
378 if (reg & WM8350_AUXADC_POLL)
379 dev_err(wm8350->dev, "adc chn %d read timeout\n", channel);
380 else
381 result = wm8350_reg_read(wm8350,
382 WM8350_AUX1_READBACK + channel);
383
384 /* Turn off the ADC */
385 reg = wm8350_reg_read(wm8350, WM8350_POWER_MGMT_5);
386 wm8350_reg_write(wm8350, WM8350_POWER_MGMT_5,
387 reg & ~WM8350_AUXADC_ENA);
388
389 mutex_unlock(&wm8350->auxadc_mutex);
390
391 return result & WM8350_AUXADC_DATA1_MASK;
392 }
393 EXPORT_SYMBOL_GPL(wm8350_read_auxadc);
394
395 static irqreturn_t wm8350_auxadc_irq(int irq, void *irq_data)
396 {
397 struct wm8350 *wm8350 = irq_data;
398
399 complete(&wm8350->auxadc_done);
400
401 return IRQ_HANDLED;
402 }
403
404 /*
405 * Cache is always host endian.
406 */
407 static int wm8350_create_cache(struct wm8350 *wm8350, int type, int mode)
408 {
409 int i, ret = 0;
410 u16 value;
411 const u16 *reg_map;
412
413 switch (type) {
414 case 0:
415 switch (mode) {
416 #ifdef CONFIG_MFD_WM8350_CONFIG_MODE_0
417 case 0:
418 reg_map = wm8350_mode0_defaults;
419 break;
420 #endif
421 #ifdef CONFIG_MFD_WM8350_CONFIG_MODE_1
422 case 1:
423 reg_map = wm8350_mode1_defaults;
424 break;
425 #endif
426 #ifdef CONFIG_MFD_WM8350_CONFIG_MODE_2
427 case 2:
428 reg_map = wm8350_mode2_defaults;
429 break;
430 #endif
431 #ifdef CONFIG_MFD_WM8350_CONFIG_MODE_3
432 case 3:
433 reg_map = wm8350_mode3_defaults;
434 break;
435 #endif
436 default:
437 dev_err(wm8350->dev,
438 "WM8350 configuration mode %d not supported\n",
439 mode);
440 return -EINVAL;
441 }
442 break;
443
444 case 1:
445 switch (mode) {
446 #ifdef CONFIG_MFD_WM8351_CONFIG_MODE_0
447 case 0:
448 reg_map = wm8351_mode0_defaults;
449 break;
450 #endif
451 #ifdef CONFIG_MFD_WM8351_CONFIG_MODE_1
452 case 1:
453 reg_map = wm8351_mode1_defaults;
454 break;
455 #endif
456 #ifdef CONFIG_MFD_WM8351_CONFIG_MODE_2
457 case 2:
458 reg_map = wm8351_mode2_defaults;
459 break;
460 #endif
461 #ifdef CONFIG_MFD_WM8351_CONFIG_MODE_3
462 case 3:
463 reg_map = wm8351_mode3_defaults;
464 break;
465 #endif
466 default:
467 dev_err(wm8350->dev,
468 "WM8351 configuration mode %d not supported\n",
469 mode);
470 return -EINVAL;
471 }
472 break;
473
474 case 2:
475 switch (mode) {
476 #ifdef CONFIG_MFD_WM8352_CONFIG_MODE_0
477 case 0:
478 reg_map = wm8352_mode0_defaults;
479 break;
480 #endif
481 #ifdef CONFIG_MFD_WM8352_CONFIG_MODE_1
482 case 1:
483 reg_map = wm8352_mode1_defaults;
484 break;
485 #endif
486 #ifdef CONFIG_MFD_WM8352_CONFIG_MODE_2
487 case 2:
488 reg_map = wm8352_mode2_defaults;
489 break;
490 #endif
491 #ifdef CONFIG_MFD_WM8352_CONFIG_MODE_3
492 case 3:
493 reg_map = wm8352_mode3_defaults;
494 break;
495 #endif
496 default:
497 dev_err(wm8350->dev,
498 "WM8352 configuration mode %d not supported\n",
499 mode);
500 return -EINVAL;
501 }
502 break;
503
504 default:
505 dev_err(wm8350->dev,
506 "WM835x configuration mode %d not supported\n",
507 mode);
508 return -EINVAL;
509 }
510
511 wm8350->reg_cache =
512 kmalloc(sizeof(u16) * (WM8350_MAX_REGISTER + 1), GFP_KERNEL);
513 if (wm8350->reg_cache == NULL)
514 return -ENOMEM;
515
516 /* Read the initial cache state back from the device - this is
517 * a PMIC so the device many not be in a virgin state and we
518 * can't rely on the silicon values.
519 */
520 ret = regmap_raw_read(wm8350->regmap, 0, wm8350->reg_cache,
521 sizeof(u16) * (WM8350_MAX_REGISTER + 1));
522 if (ret < 0) {
523 dev_err(wm8350->dev,
524 "failed to read initial cache values\n");
525 goto out;
526 }
527
528 /* Mask out uncacheable/unreadable bits and the audio. */
529 for (i = 0; i < WM8350_MAX_REGISTER; i++) {
530 if (wm8350_reg_io_map[i].readable &&
531 (i < WM8350_CLOCK_CONTROL_1 || i > WM8350_AIF_TEST)) {
532 value = be16_to_cpu(wm8350->reg_cache[i]);
533 value &= wm8350_reg_io_map[i].readable;
534 wm8350->reg_cache[i] = value;
535 } else
536 wm8350->reg_cache[i] = reg_map[i];
537 }
538
539 out:
540 kfree(wm8350->reg_cache);
541 return ret;
542 }
543
544 /*
545 * Register a client device. This is non-fatal since there is no need to
546 * fail the entire device init due to a single platform device failing.
547 */
548 static void wm8350_client_dev_register(struct wm8350 *wm8350,
549 const char *name,
550 struct platform_device **pdev)
551 {
552 int ret;
553
554 *pdev = platform_device_alloc(name, -1);
555 if (*pdev == NULL) {
556 dev_err(wm8350->dev, "Failed to allocate %s\n", name);
557 return;
558 }
559
560 (*pdev)->dev.parent = wm8350->dev;
561 platform_set_drvdata(*pdev, wm8350);
562 ret = platform_device_add(*pdev);
563 if (ret != 0) {
564 dev_err(wm8350->dev, "Failed to register %s: %d\n", name, ret);
565 platform_device_put(*pdev);
566 *pdev = NULL;
567 }
568 }
569
570 int wm8350_device_init(struct wm8350 *wm8350, int irq,
571 struct wm8350_platform_data *pdata)
572 {
573 int ret;
574 unsigned int id1, id2, mask_rev;
575 unsigned int cust_id, mode, chip_rev;
576
577 dev_set_drvdata(wm8350->dev, wm8350);
578
579 /* get WM8350 revision and config mode */
580 ret = regmap_read(wm8350->regmap, WM8350_RESET_ID, &id1);
581 if (ret != 0) {
582 dev_err(wm8350->dev, "Failed to read ID: %d\n", ret);
583 goto err;
584 }
585
586 ret = regmap_read(wm8350->regmap, WM8350_ID, &id2);
587 if (ret != 0) {
588 dev_err(wm8350->dev, "Failed to read ID: %d\n", ret);
589 goto err;
590 }
591
592 ret = regmap_read(wm8350->regmap, WM8350_REVISION, &mask_rev);
593 if (ret != 0) {
594 dev_err(wm8350->dev, "Failed to read revision: %d\n", ret);
595 goto err;
596 }
597
598 if (id1 != 0x6143) {
599 dev_err(wm8350->dev,
600 "Device with ID %x is not a WM8350\n", id1);
601 ret = -ENODEV;
602 goto err;
603 }
604
605 mode = id2 & WM8350_CONF_STS_MASK >> 10;
606 cust_id = id2 & WM8350_CUST_ID_MASK;
607 chip_rev = (id2 & WM8350_CHIP_REV_MASK) >> 12;
608 dev_info(wm8350->dev,
609 "CONF_STS %d, CUST_ID %d, MASK_REV %d, CHIP_REV %d\n",
610 mode, cust_id, mask_rev, chip_rev);
611
612 if (cust_id != 0) {
613 dev_err(wm8350->dev, "Unsupported CUST_ID\n");
614 ret = -ENODEV;
615 goto err;
616 }
617
618 switch (mask_rev) {
619 case 0:
620 wm8350->pmic.max_dcdc = WM8350_DCDC_6;
621 wm8350->pmic.max_isink = WM8350_ISINK_B;
622
623 switch (chip_rev) {
624 case WM8350_REV_E:
625 dev_info(wm8350->dev, "WM8350 Rev E\n");
626 break;
627 case WM8350_REV_F:
628 dev_info(wm8350->dev, "WM8350 Rev F\n");
629 break;
630 case WM8350_REV_G:
631 dev_info(wm8350->dev, "WM8350 Rev G\n");
632 wm8350->power.rev_g_coeff = 1;
633 break;
634 case WM8350_REV_H:
635 dev_info(wm8350->dev, "WM8350 Rev H\n");
636 wm8350->power.rev_g_coeff = 1;
637 break;
638 default:
639 /* For safety we refuse to run on unknown hardware */
640 dev_err(wm8350->dev, "Unknown WM8350 CHIP_REV\n");
641 ret = -ENODEV;
642 goto err;
643 }
644 break;
645
646 case 1:
647 wm8350->pmic.max_dcdc = WM8350_DCDC_4;
648 wm8350->pmic.max_isink = WM8350_ISINK_A;
649
650 switch (chip_rev) {
651 case 0:
652 dev_info(wm8350->dev, "WM8351 Rev A\n");
653 wm8350->power.rev_g_coeff = 1;
654 break;
655
656 case 1:
657 dev_info(wm8350->dev, "WM8351 Rev B\n");
658 wm8350->power.rev_g_coeff = 1;
659 break;
660
661 default:
662 dev_err(wm8350->dev, "Unknown WM8351 CHIP_REV\n");
663 ret = -ENODEV;
664 goto err;
665 }
666 break;
667
668 case 2:
669 wm8350->pmic.max_dcdc = WM8350_DCDC_6;
670 wm8350->pmic.max_isink = WM8350_ISINK_B;
671
672 switch (chip_rev) {
673 case 0:
674 dev_info(wm8350->dev, "WM8352 Rev A\n");
675 wm8350->power.rev_g_coeff = 1;
676 break;
677
678 default:
679 dev_err(wm8350->dev, "Unknown WM8352 CHIP_REV\n");
680 ret = -ENODEV;
681 goto err;
682 }
683 break;
684
685 default:
686 dev_err(wm8350->dev, "Unknown MASK_REV\n");
687 ret = -ENODEV;
688 goto err;
689 }
690
691 ret = wm8350_create_cache(wm8350, mask_rev, mode);
692 if (ret < 0) {
693 dev_err(wm8350->dev, "Failed to create register cache\n");
694 return ret;
695 }
696
697 mutex_init(&wm8350->auxadc_mutex);
698 init_completion(&wm8350->auxadc_done);
699
700 ret = wm8350_irq_init(wm8350, irq, pdata);
701 if (ret < 0)
702 goto err_free;
703
704 if (wm8350->irq_base) {
705 ret = request_threaded_irq(wm8350->irq_base +
706 WM8350_IRQ_AUXADC_DATARDY,
707 NULL, wm8350_auxadc_irq, 0,
708 "auxadc", wm8350);
709 if (ret < 0)
710 dev_warn(wm8350->dev,
711 "Failed to request AUXADC IRQ: %d\n", ret);
712 }
713
714 if (pdata && pdata->init) {
715 ret = pdata->init(wm8350);
716 if (ret != 0) {
717 dev_err(wm8350->dev, "Platform init() failed: %d\n",
718 ret);
719 goto err_irq;
720 }
721 }
722
723 wm8350_reg_write(wm8350, WM8350_SYSTEM_INTERRUPTS_MASK, 0x0);
724
725 wm8350_client_dev_register(wm8350, "wm8350-codec",
726 &(wm8350->codec.pdev));
727 wm8350_client_dev_register(wm8350, "wm8350-gpio",
728 &(wm8350->gpio.pdev));
729 wm8350_client_dev_register(wm8350, "wm8350-hwmon",
730 &(wm8350->hwmon.pdev));
731 wm8350_client_dev_register(wm8350, "wm8350-power",
732 &(wm8350->power.pdev));
733 wm8350_client_dev_register(wm8350, "wm8350-rtc", &(wm8350->rtc.pdev));
734 wm8350_client_dev_register(wm8350, "wm8350-wdt", &(wm8350->wdt.pdev));
735
736 return 0;
737
738 err_irq:
739 wm8350_irq_exit(wm8350);
740 err_free:
741 kfree(wm8350->reg_cache);
742 err:
743 return ret;
744 }
745 EXPORT_SYMBOL_GPL(wm8350_device_init);
746
747 void wm8350_device_exit(struct wm8350 *wm8350)
748 {
749 int i;
750
751 for (i = 0; i < ARRAY_SIZE(wm8350->pmic.led); i++)
752 platform_device_unregister(wm8350->pmic.led[i].pdev);
753
754 for (i = 0; i < ARRAY_SIZE(wm8350->pmic.pdev); i++)
755 platform_device_unregister(wm8350->pmic.pdev[i]);
756
757 platform_device_unregister(wm8350->wdt.pdev);
758 platform_device_unregister(wm8350->rtc.pdev);
759 platform_device_unregister(wm8350->power.pdev);
760 platform_device_unregister(wm8350->hwmon.pdev);
761 platform_device_unregister(wm8350->gpio.pdev);
762 platform_device_unregister(wm8350->codec.pdev);
763
764 if (wm8350->irq_base)
765 free_irq(wm8350->irq_base + WM8350_IRQ_AUXADC_DATARDY, wm8350);
766
767 wm8350_irq_exit(wm8350);
768
769 kfree(wm8350->reg_cache);
770 }
771 EXPORT_SYMBOL_GPL(wm8350_device_exit);
772
773 MODULE_DESCRIPTION("WM8350 AudioPlus PMIC core driver");
774 MODULE_LICENSE("GPL");
Linux kernel - Deliverables
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