2 * wm8350-core.c -- Device access for Wolfson WM8350
4 * Copyright 2007, 2008 Wolfson Microelectronics PLC.
6 * Author: Liam Girdwood, Mark Brown
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/init.h>
18 #include <linux/slab.h>
19 #include <linux/bug.h>
20 #include <linux/device.h>
21 #include <linux/delay.h>
22 #include <linux/interrupt.h>
23 #include <linux/regmap.h>
24 #include <linux/workqueue.h>
26 #include <linux/mfd/wm8350/core.h>
27 #include <linux/mfd/wm8350/audio.h>
28 #include <linux/mfd/wm8350/comparator.h>
29 #include <linux/mfd/wm8350/gpio.h>
30 #include <linux/mfd/wm8350/pmic.h>
31 #include <linux/mfd/wm8350/rtc.h>
32 #include <linux/mfd/wm8350/supply.h>
33 #include <linux/mfd/wm8350/wdt.h>
35 #define WM8350_UNLOCK_KEY 0x0013
36 #define WM8350_LOCK_KEY 0x0000
38 #define WM8350_CLOCK_CONTROL_1 0x28
39 #define WM8350_AIF_TEST 0x74
42 #define WM8350_BUS_DEBUG 0
44 #define dump(regs, src) do { \
48 for (i_ = 0; i_ < regs; i_++) \
49 printk(" 0x%4.4x", *src_++); \
53 #define dump(bytes, src)
56 #define WM8350_LOCK_DEBUG 0
58 #define ldbg(format, arg...) printk(format, ## arg)
60 #define ldbg(format, arg...)
66 static DEFINE_MUTEX(io_mutex
);
67 static DEFINE_MUTEX(reg_lock_mutex
);
69 /* Perform a physical read from the device.
71 static int wm8350_phys_read(struct wm8350
*wm8350
, u8 reg
, int num_regs
,
75 int bytes
= num_regs
* 2;
77 dev_dbg(wm8350
->dev
, "volatile read\n");
78 ret
= regmap_raw_read(wm8350
->regmap
, reg
, dest
, bytes
);
80 for (i
= reg
; i
< reg
+ num_regs
; i
++) {
81 /* Cache is CPU endian */
82 dest
[i
- reg
] = be16_to_cpu(dest
[i
- reg
]);
84 /* Mask out non-readable bits */
85 dest
[i
- reg
] &= wm8350_reg_io_map
[i
].readable
;
93 static int wm8350_read(struct wm8350
*wm8350
, u8 reg
, int num_regs
, u16
*dest
)
96 int end
= reg
+ num_regs
;
98 int bytes
= num_regs
* 2;
100 if ((reg
+ num_regs
- 1) > WM8350_MAX_REGISTER
) {
101 dev_err(wm8350
->dev
, "invalid reg %x\n",
107 "%s R%d(0x%2.2x) %d regs\n", __func__
, reg
, reg
, num_regs
);
110 /* we can _safely_ read any register, but warn if read not supported */
111 for (i
= reg
; i
< end
; i
++) {
112 if (!wm8350_reg_io_map
[i
].readable
)
113 dev_warn(wm8350
->dev
,
114 "reg R%d is not readable\n", i
);
118 /* if any volatile registers are required, then read back all */
119 for (i
= reg
; i
< end
; i
++)
120 if (wm8350_reg_io_map
[i
].vol
)
121 return wm8350_phys_read(wm8350
, reg
, num_regs
, dest
);
123 /* no volatiles, then cache is good */
124 dev_dbg(wm8350
->dev
, "cache read\n");
125 memcpy(dest
, &wm8350
->reg_cache
[reg
], bytes
);
126 dump(num_regs
, dest
);
130 static inline int is_reg_locked(struct wm8350
*wm8350
, u8 reg
)
132 if (reg
== WM8350_SECURITY
||
133 wm8350
->reg_cache
[WM8350_SECURITY
] == WM8350_UNLOCK_KEY
)
136 if ((reg
>= WM8350_GPIO_FUNCTION_SELECT_1
&&
137 reg
<= WM8350_GPIO_FUNCTION_SELECT_4
) ||
138 (reg
>= WM8350_BATTERY_CHARGER_CONTROL_1
&&
139 reg
<= WM8350_BATTERY_CHARGER_CONTROL_3
))
144 static int wm8350_write(struct wm8350
*wm8350
, u8 reg
, int num_regs
, u16
*src
)
147 int end
= reg
+ num_regs
;
148 int bytes
= num_regs
* 2;
150 if ((reg
+ num_regs
- 1) > WM8350_MAX_REGISTER
) {
151 dev_err(wm8350
->dev
, "invalid reg %x\n",
156 /* it's generally not a good idea to write to RO or locked registers */
157 for (i
= reg
; i
< end
; i
++) {
158 if (!wm8350_reg_io_map
[i
].writable
) {
160 "attempted write to read only reg R%d\n", i
);
164 if (is_reg_locked(wm8350
, i
)) {
166 "attempted write to locked reg R%d\n", i
);
170 src
[i
- reg
] &= wm8350_reg_io_map
[i
].writable
;
172 wm8350
->reg_cache
[i
] =
173 (wm8350
->reg_cache
[i
] & ~wm8350_reg_io_map
[i
].writable
)
176 src
[i
- reg
] = cpu_to_be16(src
[i
- reg
]);
179 /* Actually write it out */
180 return regmap_raw_write(wm8350
->regmap
, reg
, src
, bytes
);
184 * Safe read, modify, write methods
186 int wm8350_clear_bits(struct wm8350
*wm8350
, u16 reg
, u16 mask
)
191 mutex_lock(&io_mutex
);
192 err
= wm8350_read(wm8350
, reg
, 1, &data
);
194 dev_err(wm8350
->dev
, "read from reg R%d failed\n", reg
);
199 err
= wm8350_write(wm8350
, reg
, 1, &data
);
201 dev_err(wm8350
->dev
, "write to reg R%d failed\n", reg
);
203 mutex_unlock(&io_mutex
);
206 EXPORT_SYMBOL_GPL(wm8350_clear_bits
);
208 int wm8350_set_bits(struct wm8350
*wm8350
, u16 reg
, u16 mask
)
213 mutex_lock(&io_mutex
);
214 err
= wm8350_read(wm8350
, reg
, 1, &data
);
216 dev_err(wm8350
->dev
, "read from reg R%d failed\n", reg
);
221 err
= wm8350_write(wm8350
, reg
, 1, &data
);
223 dev_err(wm8350
->dev
, "write to reg R%d failed\n", reg
);
225 mutex_unlock(&io_mutex
);
228 EXPORT_SYMBOL_GPL(wm8350_set_bits
);
230 u16
wm8350_reg_read(struct wm8350
*wm8350
, int reg
)
235 mutex_lock(&io_mutex
);
236 err
= wm8350_read(wm8350
, reg
, 1, &data
);
238 dev_err(wm8350
->dev
, "read from reg R%d failed\n", reg
);
240 mutex_unlock(&io_mutex
);
243 EXPORT_SYMBOL_GPL(wm8350_reg_read
);
245 int wm8350_reg_write(struct wm8350
*wm8350
, int reg
, u16 val
)
250 mutex_lock(&io_mutex
);
251 ret
= wm8350_write(wm8350
, reg
, 1, &data
);
253 dev_err(wm8350
->dev
, "write to reg R%d failed\n", reg
);
254 mutex_unlock(&io_mutex
);
257 EXPORT_SYMBOL_GPL(wm8350_reg_write
);
259 int wm8350_block_read(struct wm8350
*wm8350
, int start_reg
, int regs
,
264 mutex_lock(&io_mutex
);
265 err
= wm8350_read(wm8350
, start_reg
, regs
, dest
);
267 dev_err(wm8350
->dev
, "block read starting from R%d failed\n",
269 mutex_unlock(&io_mutex
);
272 EXPORT_SYMBOL_GPL(wm8350_block_read
);
274 int wm8350_block_write(struct wm8350
*wm8350
, int start_reg
, int regs
,
279 mutex_lock(&io_mutex
);
280 ret
= wm8350_write(wm8350
, start_reg
, regs
, src
);
282 dev_err(wm8350
->dev
, "block write starting at R%d failed\n",
284 mutex_unlock(&io_mutex
);
287 EXPORT_SYMBOL_GPL(wm8350_block_write
);
292 * The WM8350 has a hardware lock which can be used to prevent writes to
293 * some registers (generally those which can cause particularly serious
294 * problems if misused). This function enables that lock.
296 int wm8350_reg_lock(struct wm8350
*wm8350
)
298 u16 key
= WM8350_LOCK_KEY
;
302 mutex_lock(&io_mutex
);
303 ret
= wm8350_write(wm8350
, WM8350_SECURITY
, 1, &key
);
305 dev_err(wm8350
->dev
, "lock failed\n");
306 mutex_unlock(&io_mutex
);
309 EXPORT_SYMBOL_GPL(wm8350_reg_lock
);
312 * wm8350_reg_unlock()
314 * The WM8350 has a hardware lock which can be used to prevent writes to
315 * some registers (generally those which can cause particularly serious
316 * problems if misused). This function disables that lock so updates
317 * can be performed. For maximum safety this should be done only when
320 int wm8350_reg_unlock(struct wm8350
*wm8350
)
322 u16 key
= WM8350_UNLOCK_KEY
;
326 mutex_lock(&io_mutex
);
327 ret
= wm8350_write(wm8350
, WM8350_SECURITY
, 1, &key
);
329 dev_err(wm8350
->dev
, "unlock failed\n");
330 mutex_unlock(&io_mutex
);
333 EXPORT_SYMBOL_GPL(wm8350_reg_unlock
);
335 int wm8350_read_auxadc(struct wm8350
*wm8350
, int channel
, int scale
, int vref
)
339 if (channel
< WM8350_AUXADC_AUX1
|| channel
> WM8350_AUXADC_TEMP
)
341 if (channel
>= WM8350_AUXADC_USB
&& channel
<= WM8350_AUXADC_TEMP
342 && (scale
!= 0 || vref
!= 0))
345 mutex_lock(&wm8350
->auxadc_mutex
);
347 /* Turn on the ADC */
348 reg
= wm8350_reg_read(wm8350
, WM8350_POWER_MGMT_5
);
349 wm8350_reg_write(wm8350
, WM8350_POWER_MGMT_5
, reg
| WM8350_AUXADC_ENA
);
354 wm8350_reg_write(wm8350
, WM8350_AUX1_READBACK
+ channel
, reg
);
357 reg
= wm8350_reg_read(wm8350
, WM8350_DIGITISER_CONTROL_1
);
358 reg
|= 1 << channel
| WM8350_AUXADC_POLL
;
359 wm8350_reg_write(wm8350
, WM8350_DIGITISER_CONTROL_1
, reg
);
361 /* If a late IRQ left the completion signalled then consume
363 try_wait_for_completion(&wm8350
->auxadc_done
);
365 /* We ignore the result of the completion and just check for a
366 * conversion result, allowing us to soldier on if the IRQ
367 * infrastructure is not set up for the chip. */
368 wait_for_completion_timeout(&wm8350
->auxadc_done
, msecs_to_jiffies(5));
370 reg
= wm8350_reg_read(wm8350
, WM8350_DIGITISER_CONTROL_1
);
371 if (reg
& WM8350_AUXADC_POLL
)
372 dev_err(wm8350
->dev
, "adc chn %d read timeout\n", channel
);
374 result
= wm8350_reg_read(wm8350
,
375 WM8350_AUX1_READBACK
+ channel
);
377 /* Turn off the ADC */
378 reg
= wm8350_reg_read(wm8350
, WM8350_POWER_MGMT_5
);
379 wm8350_reg_write(wm8350
, WM8350_POWER_MGMT_5
,
380 reg
& ~WM8350_AUXADC_ENA
);
382 mutex_unlock(&wm8350
->auxadc_mutex
);
384 return result
& WM8350_AUXADC_DATA1_MASK
;
386 EXPORT_SYMBOL_GPL(wm8350_read_auxadc
);
388 static irqreturn_t
wm8350_auxadc_irq(int irq
, void *irq_data
)
390 struct wm8350
*wm8350
= irq_data
;
392 complete(&wm8350
->auxadc_done
);
398 * Cache is always host endian.
400 static int wm8350_create_cache(struct wm8350
*wm8350
, int type
, int mode
)
409 #ifdef CONFIG_MFD_WM8350_CONFIG_MODE_0
411 reg_map
= wm8350_mode0_defaults
;
414 #ifdef CONFIG_MFD_WM8350_CONFIG_MODE_1
416 reg_map
= wm8350_mode1_defaults
;
419 #ifdef CONFIG_MFD_WM8350_CONFIG_MODE_2
421 reg_map
= wm8350_mode2_defaults
;
424 #ifdef CONFIG_MFD_WM8350_CONFIG_MODE_3
426 reg_map
= wm8350_mode3_defaults
;
431 "WM8350 configuration mode %d not supported\n",
439 #ifdef CONFIG_MFD_WM8351_CONFIG_MODE_0
441 reg_map
= wm8351_mode0_defaults
;
444 #ifdef CONFIG_MFD_WM8351_CONFIG_MODE_1
446 reg_map
= wm8351_mode1_defaults
;
449 #ifdef CONFIG_MFD_WM8351_CONFIG_MODE_2
451 reg_map
= wm8351_mode2_defaults
;
454 #ifdef CONFIG_MFD_WM8351_CONFIG_MODE_3
456 reg_map
= wm8351_mode3_defaults
;
461 "WM8351 configuration mode %d not supported\n",
469 #ifdef CONFIG_MFD_WM8352_CONFIG_MODE_0
471 reg_map
= wm8352_mode0_defaults
;
474 #ifdef CONFIG_MFD_WM8352_CONFIG_MODE_1
476 reg_map
= wm8352_mode1_defaults
;
479 #ifdef CONFIG_MFD_WM8352_CONFIG_MODE_2
481 reg_map
= wm8352_mode2_defaults
;
484 #ifdef CONFIG_MFD_WM8352_CONFIG_MODE_3
486 reg_map
= wm8352_mode3_defaults
;
491 "WM8352 configuration mode %d not supported\n",
499 "WM835x configuration mode %d not supported\n",
505 kmalloc(sizeof(u16
) * (WM8350_MAX_REGISTER
+ 1), GFP_KERNEL
);
506 if (wm8350
->reg_cache
== NULL
)
509 /* Read the initial cache state back from the device - this is
510 * a PMIC so the device many not be in a virgin state and we
511 * can't rely on the silicon values.
513 ret
= regmap_raw_read(wm8350
->regmap
, 0, wm8350
->reg_cache
,
514 sizeof(u16
) * (WM8350_MAX_REGISTER
+ 1));
517 "failed to read initial cache values\n");
521 /* Mask out uncacheable/unreadable bits and the audio. */
522 for (i
= 0; i
< WM8350_MAX_REGISTER
; i
++) {
523 if (wm8350_reg_io_map
[i
].readable
&&
524 (i
< WM8350_CLOCK_CONTROL_1
|| i
> WM8350_AIF_TEST
)) {
525 value
= be16_to_cpu(wm8350
->reg_cache
[i
]);
526 value
&= wm8350_reg_io_map
[i
].readable
;
527 wm8350
->reg_cache
[i
] = value
;
529 wm8350
->reg_cache
[i
] = reg_map
[i
];
533 kfree(wm8350
->reg_cache
);
538 * Register a client device. This is non-fatal since there is no need to
539 * fail the entire device init due to a single platform device failing.
541 static void wm8350_client_dev_register(struct wm8350
*wm8350
,
543 struct platform_device
**pdev
)
547 *pdev
= platform_device_alloc(name
, -1);
549 dev_err(wm8350
->dev
, "Failed to allocate %s\n", name
);
553 (*pdev
)->dev
.parent
= wm8350
->dev
;
554 platform_set_drvdata(*pdev
, wm8350
);
555 ret
= platform_device_add(*pdev
);
557 dev_err(wm8350
->dev
, "Failed to register %s: %d\n", name
, ret
);
558 platform_device_put(*pdev
);
563 int wm8350_device_init(struct wm8350
*wm8350
, int irq
,
564 struct wm8350_platform_data
*pdata
)
567 unsigned int id1
, id2
, mask_rev
;
568 unsigned int cust_id
, mode
, chip_rev
;
570 dev_set_drvdata(wm8350
->dev
, wm8350
);
572 /* get WM8350 revision and config mode */
573 ret
= regmap_read(wm8350
->regmap
, WM8350_RESET_ID
, &id1
);
575 dev_err(wm8350
->dev
, "Failed to read ID: %d\n", ret
);
579 ret
= regmap_read(wm8350
->regmap
, WM8350_ID
, &id2
);
581 dev_err(wm8350
->dev
, "Failed to read ID: %d\n", ret
);
585 ret
= regmap_read(wm8350
->regmap
, WM8350_REVISION
, &mask_rev
);
587 dev_err(wm8350
->dev
, "Failed to read revision: %d\n", ret
);
593 "Device with ID %x is not a WM8350\n", id1
);
598 mode
= id2
& WM8350_CONF_STS_MASK
>> 10;
599 cust_id
= id2
& WM8350_CUST_ID_MASK
;
600 chip_rev
= (id2
& WM8350_CHIP_REV_MASK
) >> 12;
601 dev_info(wm8350
->dev
,
602 "CONF_STS %d, CUST_ID %d, MASK_REV %d, CHIP_REV %d\n",
603 mode
, cust_id
, mask_rev
, chip_rev
);
606 dev_err(wm8350
->dev
, "Unsupported CUST_ID\n");
613 wm8350
->pmic
.max_dcdc
= WM8350_DCDC_6
;
614 wm8350
->pmic
.max_isink
= WM8350_ISINK_B
;
618 dev_info(wm8350
->dev
, "WM8350 Rev E\n");
621 dev_info(wm8350
->dev
, "WM8350 Rev F\n");
624 dev_info(wm8350
->dev
, "WM8350 Rev G\n");
625 wm8350
->power
.rev_g_coeff
= 1;
628 dev_info(wm8350
->dev
, "WM8350 Rev H\n");
629 wm8350
->power
.rev_g_coeff
= 1;
632 /* For safety we refuse to run on unknown hardware */
633 dev_err(wm8350
->dev
, "Unknown WM8350 CHIP_REV\n");
640 wm8350
->pmic
.max_dcdc
= WM8350_DCDC_4
;
641 wm8350
->pmic
.max_isink
= WM8350_ISINK_A
;
645 dev_info(wm8350
->dev
, "WM8351 Rev A\n");
646 wm8350
->power
.rev_g_coeff
= 1;
650 dev_info(wm8350
->dev
, "WM8351 Rev B\n");
651 wm8350
->power
.rev_g_coeff
= 1;
655 dev_err(wm8350
->dev
, "Unknown WM8351 CHIP_REV\n");
662 wm8350
->pmic
.max_dcdc
= WM8350_DCDC_6
;
663 wm8350
->pmic
.max_isink
= WM8350_ISINK_B
;
667 dev_info(wm8350
->dev
, "WM8352 Rev A\n");
668 wm8350
->power
.rev_g_coeff
= 1;
672 dev_err(wm8350
->dev
, "Unknown WM8352 CHIP_REV\n");
679 dev_err(wm8350
->dev
, "Unknown MASK_REV\n");
684 ret
= wm8350_create_cache(wm8350
, mask_rev
, mode
);
686 dev_err(wm8350
->dev
, "Failed to create register cache\n");
690 mutex_init(&wm8350
->auxadc_mutex
);
691 init_completion(&wm8350
->auxadc_done
);
693 ret
= wm8350_irq_init(wm8350
, irq
, pdata
);
697 if (wm8350
->irq_base
) {
698 ret
= request_threaded_irq(wm8350
->irq_base
+
699 WM8350_IRQ_AUXADC_DATARDY
,
700 NULL
, wm8350_auxadc_irq
, 0,
703 dev_warn(wm8350
->dev
,
704 "Failed to request AUXADC IRQ: %d\n", ret
);
707 if (pdata
&& pdata
->init
) {
708 ret
= pdata
->init(wm8350
);
710 dev_err(wm8350
->dev
, "Platform init() failed: %d\n",
716 wm8350_reg_write(wm8350
, WM8350_SYSTEM_INTERRUPTS_MASK
, 0x0);
718 wm8350_client_dev_register(wm8350
, "wm8350-codec",
719 &(wm8350
->codec
.pdev
));
720 wm8350_client_dev_register(wm8350
, "wm8350-gpio",
721 &(wm8350
->gpio
.pdev
));
722 wm8350_client_dev_register(wm8350
, "wm8350-hwmon",
723 &(wm8350
->hwmon
.pdev
));
724 wm8350_client_dev_register(wm8350
, "wm8350-power",
725 &(wm8350
->power
.pdev
));
726 wm8350_client_dev_register(wm8350
, "wm8350-rtc", &(wm8350
->rtc
.pdev
));
727 wm8350_client_dev_register(wm8350
, "wm8350-wdt", &(wm8350
->wdt
.pdev
));
732 wm8350_irq_exit(wm8350
);
734 kfree(wm8350
->reg_cache
);
738 EXPORT_SYMBOL_GPL(wm8350_device_init
);
740 void wm8350_device_exit(struct wm8350
*wm8350
)
744 for (i
= 0; i
< ARRAY_SIZE(wm8350
->pmic
.led
); i
++)
745 platform_device_unregister(wm8350
->pmic
.led
[i
].pdev
);
747 for (i
= 0; i
< ARRAY_SIZE(wm8350
->pmic
.pdev
); i
++)
748 platform_device_unregister(wm8350
->pmic
.pdev
[i
]);
750 platform_device_unregister(wm8350
->wdt
.pdev
);
751 platform_device_unregister(wm8350
->rtc
.pdev
);
752 platform_device_unregister(wm8350
->power
.pdev
);
753 platform_device_unregister(wm8350
->hwmon
.pdev
);
754 platform_device_unregister(wm8350
->gpio
.pdev
);
755 platform_device_unregister(wm8350
->codec
.pdev
);
757 if (wm8350
->irq_base
)
758 free_irq(wm8350
->irq_base
+ WM8350_IRQ_AUXADC_DATARDY
, wm8350
);
760 wm8350_irq_exit(wm8350
);
762 kfree(wm8350
->reg_cache
);
764 EXPORT_SYMBOL_GPL(wm8350_device_exit
);
766 MODULE_DESCRIPTION("WM8350 AudioPlus PMIC core driver");
767 MODULE_LICENSE("GPL");