projects / deliverable / linux.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
Merge remote-tracking branch 'regmap/fix/cache' into regmap-linus
[deliverable/linux.git] / drivers / mmc / host / mxcmmc.c
1 /*
2 * linux/drivers/mmc/host/mxcmmc.c - Freescale i.MX MMCI driver
3 *
4 * This is a driver for the SDHC controller found in Freescale MX2/MX3
5 * SoCs. It is basically the same hardware as found on MX1 (imxmmc.c).
6 * Unlike the hardware found on MX1, this hardware just works and does
7 * not need all the quirks found in imxmmc.c, hence the separate driver.
8 *
9 * Copyright (C) 2008 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
10 * Copyright (C) 2006 Pavel Pisa, PiKRON <ppisa@pikron.com>
11 *
12 * derived from pxamci.c by Russell King
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17 *
18 */
19
20 #include <linux/module.h>
21 #include <linux/init.h>
22 #include <linux/ioport.h>
23 #include <linux/platform_device.h>
24 #include <linux/interrupt.h>
25 #include <linux/irq.h>
26 #include <linux/blkdev.h>
27 #include <linux/dma-mapping.h>
28 #include <linux/mmc/host.h>
29 #include <linux/mmc/card.h>
30 #include <linux/delay.h>
31 #include <linux/clk.h>
32 #include <linux/io.h>
33 #include <linux/gpio.h>
34 #include <linux/regulator/consumer.h>
35 #include <linux/dmaengine.h>
36 #include <linux/types.h>
37 #include <linux/of.h>
38 #include <linux/of_device.h>
39 #include <linux/of_dma.h>
40 #include <linux/of_gpio.h>
41 #include <linux/mmc/slot-gpio.h>
42
43 #include <asm/dma.h>
44 #include <asm/irq.h>
45 #include <linux/platform_data/mmc-mxcmmc.h>
46
47 #include <linux/platform_data/dma-imx.h>
48
49 #define DRIVER_NAME "mxc-mmc"
50 #define MXCMCI_TIMEOUT_MS 10000
51
52 #define MMC_REG_STR_STP_CLK 0x00
53 #define MMC_REG_STATUS 0x04
54 #define MMC_REG_CLK_RATE 0x08
55 #define MMC_REG_CMD_DAT_CONT 0x0C
56 #define MMC_REG_RES_TO 0x10
57 #define MMC_REG_READ_TO 0x14
58 #define MMC_REG_BLK_LEN 0x18
59 #define MMC_REG_NOB 0x1C
60 #define MMC_REG_REV_NO 0x20
61 #define MMC_REG_INT_CNTR 0x24
62 #define MMC_REG_CMD 0x28
63 #define MMC_REG_ARG 0x2C
64 #define MMC_REG_RES_FIFO 0x34
65 #define MMC_REG_BUFFER_ACCESS 0x38
66
67 #define STR_STP_CLK_RESET (1 << 3)
68 #define STR_STP_CLK_START_CLK (1 << 1)
69 #define STR_STP_CLK_STOP_CLK (1 << 0)
70
71 #define STATUS_CARD_INSERTION (1 << 31)
72 #define STATUS_CARD_REMOVAL (1 << 30)
73 #define STATUS_YBUF_EMPTY (1 << 29)
74 #define STATUS_XBUF_EMPTY (1 << 28)
75 #define STATUS_YBUF_FULL (1 << 27)
76 #define STATUS_XBUF_FULL (1 << 26)
77 #define STATUS_BUF_UND_RUN (1 << 25)
78 #define STATUS_BUF_OVFL (1 << 24)
79 #define STATUS_SDIO_INT_ACTIVE (1 << 14)
80 #define STATUS_END_CMD_RESP (1 << 13)
81 #define STATUS_WRITE_OP_DONE (1 << 12)
82 #define STATUS_DATA_TRANS_DONE (1 << 11)
83 #define STATUS_READ_OP_DONE (1 << 11)
84 #define STATUS_WR_CRC_ERROR_CODE_MASK (3 << 10)
85 #define STATUS_CARD_BUS_CLK_RUN (1 << 8)
86 #define STATUS_BUF_READ_RDY (1 << 7)
87 #define STATUS_BUF_WRITE_RDY (1 << 6)
88 #define STATUS_RESP_CRC_ERR (1 << 5)
89 #define STATUS_CRC_READ_ERR (1 << 3)
90 #define STATUS_CRC_WRITE_ERR (1 << 2)
91 #define STATUS_TIME_OUT_RESP (1 << 1)
92 #define STATUS_TIME_OUT_READ (1 << 0)
93 #define STATUS_ERR_MASK 0x2f
94
95 #define CMD_DAT_CONT_CMD_RESP_LONG_OFF (1 << 12)
96 #define CMD_DAT_CONT_STOP_READWAIT (1 << 11)
97 #define CMD_DAT_CONT_START_READWAIT (1 << 10)
98 #define CMD_DAT_CONT_BUS_WIDTH_4 (2 << 8)
99 #define CMD_DAT_CONT_INIT (1 << 7)
100 #define CMD_DAT_CONT_WRITE (1 << 4)
101 #define CMD_DAT_CONT_DATA_ENABLE (1 << 3)
102 #define CMD_DAT_CONT_RESPONSE_48BIT_CRC (1 << 0)
103 #define CMD_DAT_CONT_RESPONSE_136BIT (2 << 0)
104 #define CMD_DAT_CONT_RESPONSE_48BIT (3 << 0)
105
106 #define INT_SDIO_INT_WKP_EN (1 << 18)
107 #define INT_CARD_INSERTION_WKP_EN (1 << 17)
108 #define INT_CARD_REMOVAL_WKP_EN (1 << 16)
109 #define INT_CARD_INSERTION_EN (1 << 15)
110 #define INT_CARD_REMOVAL_EN (1 << 14)
111 #define INT_SDIO_IRQ_EN (1 << 13)
112 #define INT_DAT0_EN (1 << 12)
113 #define INT_BUF_READ_EN (1 << 4)
114 #define INT_BUF_WRITE_EN (1 << 3)
115 #define INT_END_CMD_RES_EN (1 << 2)
116 #define INT_WRITE_OP_DONE_EN (1 << 1)
117 #define INT_READ_OP_EN (1 << 0)
118
119 enum mxcmci_type {
120 IMX21_MMC,
121 IMX31_MMC,
122 MPC512X_MMC,
123 };
124
125 struct mxcmci_host {
126 struct mmc_host *mmc;
127 void __iomem *base;
128 dma_addr_t phys_base;
129 int detect_irq;
130 struct dma_chan *dma;
131 struct dma_async_tx_descriptor *desc;
132 int do_dma;
133 int default_irq_mask;
134 int use_sdio;
135 unsigned int power_mode;
136 struct imxmmc_platform_data *pdata;
137
138 struct mmc_request *req;
139 struct mmc_command *cmd;
140 struct mmc_data *data;
141
142 unsigned int datasize;
143 unsigned int dma_dir;
144
145 u16 rev_no;
146 unsigned int cmdat;
147
148 struct clk *clk_ipg;
149 struct clk *clk_per;
150
151 int clock;
152
153 struct work_struct datawork;
154 spinlock_t lock;
155
156 int burstlen;
157 int dmareq;
158 struct dma_slave_config dma_slave_config;
159 struct imx_dma_data dma_data;
160
161 struct timer_list watchdog;
162 enum mxcmci_type devtype;
163 };
164
165 static const struct platform_device_id mxcmci_devtype[] = {
166 {
167 .name = "imx21-mmc",
168 .driver_data = IMX21_MMC,
169 }, {
170 .name = "imx31-mmc",
171 .driver_data = IMX31_MMC,
172 }, {
173 .name = "mpc512x-sdhc",
174 .driver_data = MPC512X_MMC,
175 }, {
176 /* sentinel */
177 }
178 };
179 MODULE_DEVICE_TABLE(platform, mxcmci_devtype);
180
181 static const struct of_device_id mxcmci_of_match[] = {
182 {
183 .compatible = "fsl,imx21-mmc",
184 .data = &mxcmci_devtype[IMX21_MMC],
185 }, {
186 .compatible = "fsl,imx31-mmc",
187 .data = &mxcmci_devtype[IMX31_MMC],
188 }, {
189 .compatible = "fsl,mpc5121-sdhc",
190 .data = &mxcmci_devtype[MPC512X_MMC],
191 }, {
192 /* sentinel */
193 }
194 };
195 MODULE_DEVICE_TABLE(of, mxcmci_of_match);
196
197 static inline int is_imx31_mmc(struct mxcmci_host *host)
198 {
199 return host->devtype == IMX31_MMC;
200 }
201
202 static inline int is_mpc512x_mmc(struct mxcmci_host *host)
203 {
204 return host->devtype == MPC512X_MMC;
205 }
206
207 static inline u32 mxcmci_readl(struct mxcmci_host *host, int reg)
208 {
209 if (IS_ENABLED(CONFIG_PPC_MPC512x))
210 return ioread32be(host->base + reg);
211 else
212 return readl(host->base + reg);
213 }
214
215 static inline void mxcmci_writel(struct mxcmci_host *host, u32 val, int reg)
216 {
217 if (IS_ENABLED(CONFIG_PPC_MPC512x))
218 iowrite32be(val, host->base + reg);
219 else
220 writel(val, host->base + reg);
221 }
222
223 static inline u16 mxcmci_readw(struct mxcmci_host *host, int reg)
224 {
225 if (IS_ENABLED(CONFIG_PPC_MPC512x))
226 return ioread32be(host->base + reg);
227 else
228 return readw(host->base + reg);
229 }
230
231 static inline void mxcmci_writew(struct mxcmci_host *host, u16 val, int reg)
232 {
233 if (IS_ENABLED(CONFIG_PPC_MPC512x))
234 iowrite32be(val, host->base + reg);
235 else
236 writew(val, host->base + reg);
237 }
238
239 static void mxcmci_set_clk_rate(struct mxcmci_host *host, unsigned int clk_ios);
240
241 static void mxcmci_set_power(struct mxcmci_host *host, unsigned int vdd)
242 {
243 if (!IS_ERR(host->mmc->supply.vmmc)) {
244 if (host->power_mode == MMC_POWER_UP)
245 mmc_regulator_set_ocr(host->mmc,
246 host->mmc->supply.vmmc, vdd);
247 else if (host->power_mode == MMC_POWER_OFF)
248 mmc_regulator_set_ocr(host->mmc,
249 host->mmc->supply.vmmc, 0);
250 }
251
252 if (host->pdata && host->pdata->setpower)
253 host->pdata->setpower(mmc_dev(host->mmc), vdd);
254 }
255
256 static inline int mxcmci_use_dma(struct mxcmci_host *host)
257 {
258 return host->do_dma;
259 }
260
261 static void mxcmci_softreset(struct mxcmci_host *host)
262 {
263 int i;
264
265 dev_dbg(mmc_dev(host->mmc), "mxcmci_softreset\n");
266
267 /* reset sequence */
268 mxcmci_writew(host, STR_STP_CLK_RESET, MMC_REG_STR_STP_CLK);
269 mxcmci_writew(host, STR_STP_CLK_RESET | STR_STP_CLK_START_CLK,
270 MMC_REG_STR_STP_CLK);
271
272 for (i = 0; i < 8; i++)
273 mxcmci_writew(host, STR_STP_CLK_START_CLK, MMC_REG_STR_STP_CLK);
274
275 mxcmci_writew(host, 0xff, MMC_REG_RES_TO);
276 }
277
278 #if IS_ENABLED(CONFIG_PPC_MPC512x)
279 static inline void buffer_swap32(u32 *buf, int len)
280 {
281 int i;
282
283 for (i = 0; i < ((len + 3) / 4); i++) {
284 st_le32(buf, *buf);
285 buf++;
286 }
287 }
288
289 static void mxcmci_swap_buffers(struct mmc_data *data)
290 {
291 struct scatterlist *sg;
292 int i;
293
294 for_each_sg(data->sg, sg, data->sg_len, i)
295 buffer_swap32(sg_virt(sg), sg->length);
296 }
297 #else
298 static inline void mxcmci_swap_buffers(struct mmc_data *data) {}
299 #endif
300
301 static int mxcmci_setup_data(struct mxcmci_host *host, struct mmc_data *data)
302 {
303 unsigned int nob = data->blocks;
304 unsigned int blksz = data->blksz;
305 unsigned int datasize = nob * blksz;
306 struct scatterlist *sg;
307 enum dma_transfer_direction slave_dirn;
308 int i, nents;
309
310 if (data->flags & MMC_DATA_STREAM)
311 nob = 0xffff;
312
313 host->data = data;
314 data->bytes_xfered = 0;
315
316 mxcmci_writew(host, nob, MMC_REG_NOB);
317 mxcmci_writew(host, blksz, MMC_REG_BLK_LEN);
318 host->datasize = datasize;
319
320 if (!mxcmci_use_dma(host))
321 return 0;
322
323 for_each_sg(data->sg, sg, data->sg_len, i) {
324 if (sg->offset & 3 || sg->length & 3 || sg->length < 512) {
325 host->do_dma = 0;
326 return 0;
327 }
328 }
329
330 if (data->flags & MMC_DATA_READ) {
331 host->dma_dir = DMA_FROM_DEVICE;
332 slave_dirn = DMA_DEV_TO_MEM;
333 } else {
334 host->dma_dir = DMA_TO_DEVICE;
335 slave_dirn = DMA_MEM_TO_DEV;
336
337 mxcmci_swap_buffers(data);
338 }
339
340 nents = dma_map_sg(host->dma->device->dev, data->sg,
341 data->sg_len, host->dma_dir);
342 if (nents != data->sg_len)
343 return -EINVAL;
344
345 host->desc = dmaengine_prep_slave_sg(host->dma,
346 data->sg, data->sg_len, slave_dirn,
347 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
348
349 if (!host->desc) {
350 dma_unmap_sg(host->dma->device->dev, data->sg, data->sg_len,
351 host->dma_dir);
352 host->do_dma = 0;
353 return 0; /* Fall back to PIO */
354 }
355 wmb();
356
357 dmaengine_submit(host->desc);
358 dma_async_issue_pending(host->dma);
359
360 mod_timer(&host->watchdog, jiffies + msecs_to_jiffies(MXCMCI_TIMEOUT_MS));
361
362 return 0;
363 }
364
365 static void mxcmci_cmd_done(struct mxcmci_host *host, unsigned int stat);
366 static void mxcmci_data_done(struct mxcmci_host *host, unsigned int stat);
367
368 static void mxcmci_dma_callback(void *data)
369 {
370 struct mxcmci_host *host = data;
371 u32 stat;
372
373 del_timer(&host->watchdog);
374
375 stat = mxcmci_readl(host, MMC_REG_STATUS);
376 mxcmci_writel(host, stat & ~STATUS_DATA_TRANS_DONE, MMC_REG_STATUS);
377
378 dev_dbg(mmc_dev(host->mmc), "%s: 0x%08x\n", __func__, stat);
379
380 if (stat & STATUS_READ_OP_DONE)
381 mxcmci_writel(host, STATUS_READ_OP_DONE, MMC_REG_STATUS);
382
383 mxcmci_data_done(host, stat);
384 }
385
386 static int mxcmci_start_cmd(struct mxcmci_host *host, struct mmc_command *cmd,
387 unsigned int cmdat)
388 {
389 u32 int_cntr = host->default_irq_mask;
390 unsigned long flags;
391
392 WARN_ON(host->cmd != NULL);
393 host->cmd = cmd;
394
395 switch (mmc_resp_type(cmd)) {
396 case MMC_RSP_R1: /* short CRC, OPCODE */
397 case MMC_RSP_R1B:/* short CRC, OPCODE, BUSY */
398 cmdat |= CMD_DAT_CONT_RESPONSE_48BIT_CRC;
399 break;
400 case MMC_RSP_R2: /* long 136 bit + CRC */
401 cmdat |= CMD_DAT_CONT_RESPONSE_136BIT;
402 break;
403 case MMC_RSP_R3: /* short */
404 cmdat |= CMD_DAT_CONT_RESPONSE_48BIT;
405 break;
406 case MMC_RSP_NONE:
407 break;
408 default:
409 dev_err(mmc_dev(host->mmc), "unhandled response type 0x%x\n",
410 mmc_resp_type(cmd));
411 cmd->error = -EINVAL;
412 return -EINVAL;
413 }
414
415 int_cntr = INT_END_CMD_RES_EN;
416
417 if (mxcmci_use_dma(host)) {
418 if (host->dma_dir == DMA_FROM_DEVICE) {
419 host->desc->callback = mxcmci_dma_callback;
420 host->desc->callback_param = host;
421 } else {
422 int_cntr |= INT_WRITE_OP_DONE_EN;
423 }
424 }
425
426 spin_lock_irqsave(&host->lock, flags);
427 if (host->use_sdio)
428 int_cntr |= INT_SDIO_IRQ_EN;
429 mxcmci_writel(host, int_cntr, MMC_REG_INT_CNTR);
430 spin_unlock_irqrestore(&host->lock, flags);
431
432 mxcmci_writew(host, cmd->opcode, MMC_REG_CMD);
433 mxcmci_writel(host, cmd->arg, MMC_REG_ARG);
434 mxcmci_writew(host, cmdat, MMC_REG_CMD_DAT_CONT);
435
436 return 0;
437 }
438
439 static void mxcmci_finish_request(struct mxcmci_host *host,
440 struct mmc_request *req)
441 {
442 u32 int_cntr = host->default_irq_mask;
443 unsigned long flags;
444
445 spin_lock_irqsave(&host->lock, flags);
446 if (host->use_sdio)
447 int_cntr |= INT_SDIO_IRQ_EN;
448 mxcmci_writel(host, int_cntr, MMC_REG_INT_CNTR);
449 spin_unlock_irqrestore(&host->lock, flags);
450
451 host->req = NULL;
452 host->cmd = NULL;
453 host->data = NULL;
454
455 mmc_request_done(host->mmc, req);
456 }
457
458 static int mxcmci_finish_data(struct mxcmci_host *host, unsigned int stat)
459 {
460 struct mmc_data *data = host->data;
461 int data_error;
462
463 if (mxcmci_use_dma(host)) {
464 dma_unmap_sg(host->dma->device->dev, data->sg, data->sg_len,
465 host->dma_dir);
466 mxcmci_swap_buffers(data);
467 }
468
469 if (stat & STATUS_ERR_MASK) {
470 dev_dbg(mmc_dev(host->mmc), "request failed. status: 0x%08x\n",
471 stat);
472 if (stat & STATUS_CRC_READ_ERR) {
473 dev_err(mmc_dev(host->mmc), "%s: -EILSEQ\n", __func__);
474 data->error = -EILSEQ;
475 } else if (stat & STATUS_CRC_WRITE_ERR) {
476 u32 err_code = (stat >> 9) & 0x3;
477 if (err_code == 2) { /* No CRC response */
478 dev_err(mmc_dev(host->mmc),
479 "%s: No CRC -ETIMEDOUT\n", __func__);
480 data->error = -ETIMEDOUT;
481 } else {
482 dev_err(mmc_dev(host->mmc),
483 "%s: -EILSEQ\n", __func__);
484 data->error = -EILSEQ;
485 }
486 } else if (stat & STATUS_TIME_OUT_READ) {
487 dev_err(mmc_dev(host->mmc),
488 "%s: read -ETIMEDOUT\n", __func__);
489 data->error = -ETIMEDOUT;
490 } else {
491 dev_err(mmc_dev(host->mmc), "%s: -EIO\n", __func__);
492 data->error = -EIO;
493 }
494 } else {
495 data->bytes_xfered = host->datasize;
496 }
497
498 data_error = data->error;
499
500 host->data = NULL;
501
502 return data_error;
503 }
504
505 static void mxcmci_read_response(struct mxcmci_host *host, unsigned int stat)
506 {
507 struct mmc_command *cmd = host->cmd;
508 int i;
509 u32 a, b, c;
510
511 if (!cmd)
512 return;
513
514 if (stat & STATUS_TIME_OUT_RESP) {
515 dev_dbg(mmc_dev(host->mmc), "CMD TIMEOUT\n");
516 cmd->error = -ETIMEDOUT;
517 } else if (stat & STATUS_RESP_CRC_ERR && cmd->flags & MMC_RSP_CRC) {
518 dev_dbg(mmc_dev(host->mmc), "cmd crc error\n");
519 cmd->error = -EILSEQ;
520 }
521
522 if (cmd->flags & MMC_RSP_PRESENT) {
523 if (cmd->flags & MMC_RSP_136) {
524 for (i = 0; i < 4; i++) {
525 a = mxcmci_readw(host, MMC_REG_RES_FIFO);
526 b = mxcmci_readw(host, MMC_REG_RES_FIFO);
527 cmd->resp[i] = a << 16 | b;
528 }
529 } else {
530 a = mxcmci_readw(host, MMC_REG_RES_FIFO);
531 b = mxcmci_readw(host, MMC_REG_RES_FIFO);
532 c = mxcmci_readw(host, MMC_REG_RES_FIFO);
533 cmd->resp[0] = a << 24 | b << 8 | c >> 8;
534 }
535 }
536 }
537
538 static int mxcmci_poll_status(struct mxcmci_host *host, u32 mask)
539 {
540 u32 stat;
541 unsigned long timeout = jiffies + HZ;
542
543 do {
544 stat = mxcmci_readl(host, MMC_REG_STATUS);
545 if (stat & STATUS_ERR_MASK)
546 return stat;
547 if (time_after(jiffies, timeout)) {
548 mxcmci_softreset(host);
549 mxcmci_set_clk_rate(host, host->clock);
550 return STATUS_TIME_OUT_READ;
551 }
552 if (stat & mask)
553 return 0;
554 cpu_relax();
555 } while (1);
556 }
557
558 static int mxcmci_pull(struct mxcmci_host *host, void *_buf, int bytes)
559 {
560 unsigned int stat;
561 u32 *buf = _buf;
562
563 while (bytes > 3) {
564 stat = mxcmci_poll_status(host,
565 STATUS_BUF_READ_RDY | STATUS_READ_OP_DONE);
566 if (stat)
567 return stat;
568 *buf++ = cpu_to_le32(mxcmci_readl(host, MMC_REG_BUFFER_ACCESS));
569 bytes -= 4;
570 }
571
572 if (bytes) {
573 u8 *b = (u8 *)buf;
574 u32 tmp;
575
576 stat = mxcmci_poll_status(host,
577 STATUS_BUF_READ_RDY | STATUS_READ_OP_DONE);
578 if (stat)
579 return stat;
580 tmp = cpu_to_le32(mxcmci_readl(host, MMC_REG_BUFFER_ACCESS));
581 memcpy(b, &tmp, bytes);
582 }
583
584 return 0;
585 }
586
587 static int mxcmci_push(struct mxcmci_host *host, void *_buf, int bytes)
588 {
589 unsigned int stat;
590 u32 *buf = _buf;
591
592 while (bytes > 3) {
593 stat = mxcmci_poll_status(host, STATUS_BUF_WRITE_RDY);
594 if (stat)
595 return stat;
596 mxcmci_writel(host, cpu_to_le32(*buf++), MMC_REG_BUFFER_ACCESS);
597 bytes -= 4;
598 }
599
600 if (bytes) {
601 u8 *b = (u8 *)buf;
602 u32 tmp;
603
604 stat = mxcmci_poll_status(host, STATUS_BUF_WRITE_RDY);
605 if (stat)
606 return stat;
607
608 memcpy(&tmp, b, bytes);
609 mxcmci_writel(host, cpu_to_le32(tmp), MMC_REG_BUFFER_ACCESS);
610 }
611
612 stat = mxcmci_poll_status(host, STATUS_BUF_WRITE_RDY);
613 if (stat)
614 return stat;
615
616 return 0;
617 }
618
619 static int mxcmci_transfer_data(struct mxcmci_host *host)
620 {
621 struct mmc_data *data = host->req->data;
622 struct scatterlist *sg;
623 int stat, i;
624
625 host->data = data;
626 host->datasize = 0;
627
628 if (data->flags & MMC_DATA_READ) {
629 for_each_sg(data->sg, sg, data->sg_len, i) {
630 stat = mxcmci_pull(host, sg_virt(sg), sg->length);
631 if (stat)
632 return stat;
633 host->datasize += sg->length;
634 }
635 } else {
636 for_each_sg(data->sg, sg, data->sg_len, i) {
637 stat = mxcmci_push(host, sg_virt(sg), sg->length);
638 if (stat)
639 return stat;
640 host->datasize += sg->length;
641 }
642 stat = mxcmci_poll_status(host, STATUS_WRITE_OP_DONE);
643 if (stat)
644 return stat;
645 }
646 return 0;
647 }
648
649 static void mxcmci_datawork(struct work_struct *work)
650 {
651 struct mxcmci_host *host = container_of(work, struct mxcmci_host,
652 datawork);
653 int datastat = mxcmci_transfer_data(host);
654
655 mxcmci_writel(host, STATUS_READ_OP_DONE | STATUS_WRITE_OP_DONE,
656 MMC_REG_STATUS);
657 mxcmci_finish_data(host, datastat);
658
659 if (host->req->stop) {
660 if (mxcmci_start_cmd(host, host->req->stop, 0)) {
661 mxcmci_finish_request(host, host->req);
662 return;
663 }
664 } else {
665 mxcmci_finish_request(host, host->req);
666 }
667 }
668
669 static void mxcmci_data_done(struct mxcmci_host *host, unsigned int stat)
670 {
671 struct mmc_request *req;
672 int data_error;
673 unsigned long flags;
674
675 spin_lock_irqsave(&host->lock, flags);
676
677 if (!host->data) {
678 spin_unlock_irqrestore(&host->lock, flags);
679 return;
680 }
681
682 if (!host->req) {
683 spin_unlock_irqrestore(&host->lock, flags);
684 return;
685 }
686
687 req = host->req;
688 if (!req->stop)
689 host->req = NULL; /* we will handle finish req below */
690
691 data_error = mxcmci_finish_data(host, stat);
692
693 spin_unlock_irqrestore(&host->lock, flags);
694
695 mxcmci_read_response(host, stat);
696 host->cmd = NULL;
697
698 if (req->stop) {
699 if (mxcmci_start_cmd(host, req->stop, 0)) {
700 mxcmci_finish_request(host, req);
701 return;
702 }
703 } else {
704 mxcmci_finish_request(host, req);
705 }
706 }
707
708 static void mxcmci_cmd_done(struct mxcmci_host *host, unsigned int stat)
709 {
710 mxcmci_read_response(host, stat);
711 host->cmd = NULL;
712
713 if (!host->data && host->req) {
714 mxcmci_finish_request(host, host->req);
715 return;
716 }
717
718 /* For the DMA case the DMA engine handles the data transfer
719 * automatically. For non DMA we have to do it ourselves.
720 * Don't do it in interrupt context though.
721 */
722 if (!mxcmci_use_dma(host) && host->data)
723 schedule_work(&host->datawork);
724
725 }
726
727 static irqreturn_t mxcmci_irq(int irq, void *devid)
728 {
729 struct mxcmci_host *host = devid;
730 unsigned long flags;
731 bool sdio_irq;
732 u32 stat;
733
734 stat = mxcmci_readl(host, MMC_REG_STATUS);
735 mxcmci_writel(host,
736 stat & ~(STATUS_SDIO_INT_ACTIVE | STATUS_DATA_TRANS_DONE |
737 STATUS_WRITE_OP_DONE),
738 MMC_REG_STATUS);
739
740 dev_dbg(mmc_dev(host->mmc), "%s: 0x%08x\n", __func__, stat);
741
742 spin_lock_irqsave(&host->lock, flags);
743 sdio_irq = (stat & STATUS_SDIO_INT_ACTIVE) && host->use_sdio;
744 spin_unlock_irqrestore(&host->lock, flags);
745
746 if (mxcmci_use_dma(host) &&
747 (stat & (STATUS_READ_OP_DONE | STATUS_WRITE_OP_DONE)))
748 mxcmci_writel(host, STATUS_READ_OP_DONE | STATUS_WRITE_OP_DONE,
749 MMC_REG_STATUS);
750
751 if (sdio_irq) {
752 mxcmci_writel(host, STATUS_SDIO_INT_ACTIVE, MMC_REG_STATUS);
753 mmc_signal_sdio_irq(host->mmc);
754 }
755
756 if (stat & STATUS_END_CMD_RESP)
757 mxcmci_cmd_done(host, stat);
758
759 if (mxcmci_use_dma(host) &&
760 (stat & (STATUS_DATA_TRANS_DONE | STATUS_WRITE_OP_DONE))) {
761 del_timer(&host->watchdog);
762 mxcmci_data_done(host, stat);
763 }
764
765 if (host->default_irq_mask &&
766 (stat & (STATUS_CARD_INSERTION | STATUS_CARD_REMOVAL)))
767 mmc_detect_change(host->mmc, msecs_to_jiffies(200));
768
769 return IRQ_HANDLED;
770 }
771
772 static void mxcmci_request(struct mmc_host *mmc, struct mmc_request *req)
773 {
774 struct mxcmci_host *host = mmc_priv(mmc);
775 unsigned int cmdat = host->cmdat;
776 int error;
777
778 WARN_ON(host->req != NULL);
779
780 host->req = req;
781 host->cmdat &= ~CMD_DAT_CONT_INIT;
782
783 if (host->dma)
784 host->do_dma = 1;
785
786 if (req->data) {
787 error = mxcmci_setup_data(host, req->data);
788 if (error) {
789 req->cmd->error = error;
790 goto out;
791 }
792
793
794 cmdat |= CMD_DAT_CONT_DATA_ENABLE;
795
796 if (req->data->flags & MMC_DATA_WRITE)
797 cmdat |= CMD_DAT_CONT_WRITE;
798 }
799
800 error = mxcmci_start_cmd(host, req->cmd, cmdat);
801
802 out:
803 if (error)
804 mxcmci_finish_request(host, req);
805 }
806
807 static void mxcmci_set_clk_rate(struct mxcmci_host *host, unsigned int clk_ios)
808 {
809 unsigned int divider;
810 int prescaler = 0;
811 unsigned int clk_in = clk_get_rate(host->clk_per);
812
813 while (prescaler <= 0x800) {
814 for (divider = 1; divider <= 0xF; divider++) {
815 int x;
816
817 x = (clk_in / (divider + 1));
818
819 if (prescaler)
820 x /= (prescaler * 2);
821
822 if (x <= clk_ios)
823 break;
824 }
825 if (divider < 0x10)
826 break;
827
828 if (prescaler == 0)
829 prescaler = 1;
830 else
831 prescaler <<= 1;
832 }
833
834 mxcmci_writew(host, (prescaler << 4) | divider, MMC_REG_CLK_RATE);
835
836 dev_dbg(mmc_dev(host->mmc), "scaler: %d divider: %d in: %d out: %d\n",
837 prescaler, divider, clk_in, clk_ios);
838 }
839
840 static int mxcmci_setup_dma(struct mmc_host *mmc)
841 {
842 struct mxcmci_host *host = mmc_priv(mmc);
843 struct dma_slave_config *config = &host->dma_slave_config;
844
845 config->dst_addr = host->phys_base + MMC_REG_BUFFER_ACCESS;
846 config->src_addr = host->phys_base + MMC_REG_BUFFER_ACCESS;
847 config->dst_addr_width = 4;
848 config->src_addr_width = 4;
849 config->dst_maxburst = host->burstlen;
850 config->src_maxburst = host->burstlen;
851 config->device_fc = false;
852
853 return dmaengine_slave_config(host->dma, config);
854 }
855
856 static void mxcmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
857 {
858 struct mxcmci_host *host = mmc_priv(mmc);
859 int burstlen, ret;
860
861 /*
862 * use burstlen of 64 (16 words) in 4 bit mode (--> reg value 0)
863 * use burstlen of 16 (4 words) in 1 bit mode (--> reg value 16)
864 */
865 if (ios->bus_width == MMC_BUS_WIDTH_4)
866 burstlen = 16;
867 else
868 burstlen = 4;
869
870 if (mxcmci_use_dma(host) && burstlen != host->burstlen) {
871 host->burstlen = burstlen;
872 ret = mxcmci_setup_dma(mmc);
873 if (ret) {
874 dev_err(mmc_dev(host->mmc),
875 "failed to config DMA channel. Falling back to PIO\n");
876 dma_release_channel(host->dma);
877 host->do_dma = 0;
878 host->dma = NULL;
879 }
880 }
881
882 if (ios->bus_width == MMC_BUS_WIDTH_4)
883 host->cmdat |= CMD_DAT_CONT_BUS_WIDTH_4;
884 else
885 host->cmdat &= ~CMD_DAT_CONT_BUS_WIDTH_4;
886
887 if (host->power_mode != ios->power_mode) {
888 host->power_mode = ios->power_mode;
889 mxcmci_set_power(host, ios->vdd);
890
891 if (ios->power_mode == MMC_POWER_ON)
892 host->cmdat |= CMD_DAT_CONT_INIT;
893 }
894
895 if (ios->clock) {
896 mxcmci_set_clk_rate(host, ios->clock);
897 mxcmci_writew(host, STR_STP_CLK_START_CLK, MMC_REG_STR_STP_CLK);
898 } else {
899 mxcmci_writew(host, STR_STP_CLK_STOP_CLK, MMC_REG_STR_STP_CLK);
900 }
901
902 host->clock = ios->clock;
903 }
904
905 static irqreturn_t mxcmci_detect_irq(int irq, void *data)
906 {
907 struct mmc_host *mmc = data;
908
909 dev_dbg(mmc_dev(mmc), "%s\n", __func__);
910
911 mmc_detect_change(mmc, msecs_to_jiffies(250));
912 return IRQ_HANDLED;
913 }
914
915 static int mxcmci_get_ro(struct mmc_host *mmc)
916 {
917 struct mxcmci_host *host = mmc_priv(mmc);
918
919 if (host->pdata && host->pdata->get_ro)
920 return !!host->pdata->get_ro(mmc_dev(mmc));
921 /*
922 * If board doesn't support read only detection (no mmc_gpio
923 * context or gpio is invalid), then let the mmc core decide
924 * what to do.
925 */
926 return mmc_gpio_get_ro(mmc);
927 }
928
929 static void mxcmci_enable_sdio_irq(struct mmc_host *mmc, int enable)
930 {
931 struct mxcmci_host *host = mmc_priv(mmc);
932 unsigned long flags;
933 u32 int_cntr;
934
935 spin_lock_irqsave(&host->lock, flags);
936 host->use_sdio = enable;
937 int_cntr = mxcmci_readl(host, MMC_REG_INT_CNTR);
938
939 if (enable)
940 int_cntr |= INT_SDIO_IRQ_EN;
941 else
942 int_cntr &= ~INT_SDIO_IRQ_EN;
943
944 mxcmci_writel(host, int_cntr, MMC_REG_INT_CNTR);
945 spin_unlock_irqrestore(&host->lock, flags);
946 }
947
948 static void mxcmci_init_card(struct mmc_host *host, struct mmc_card *card)
949 {
950 struct mxcmci_host *mxcmci = mmc_priv(host);
951
952 /*
953 * MX3 SoCs have a silicon bug which corrupts CRC calculation of
954 * multi-block transfers when connected SDIO peripheral doesn't
955 * drive the BUSY line as required by the specs.
956 * One way to prevent this is to only allow 1-bit transfers.
957 */
958
959 if (is_imx31_mmc(mxcmci) && card->type == MMC_TYPE_SDIO)
960 host->caps &= ~MMC_CAP_4_BIT_DATA;
961 else
962 host->caps |= MMC_CAP_4_BIT_DATA;
963 }
964
965 static bool filter(struct dma_chan *chan, void *param)
966 {
967 struct mxcmci_host *host = param;
968
969 if (!imx_dma_is_general_purpose(chan))
970 return false;
971
972 chan->private = &host->dma_data;
973
974 return true;
975 }
976
977 static void mxcmci_watchdog(unsigned long data)
978 {
979 struct mmc_host *mmc = (struct mmc_host *)data;
980 struct mxcmci_host *host = mmc_priv(mmc);
981 struct mmc_request *req = host->req;
982 unsigned int stat = mxcmci_readl(host, MMC_REG_STATUS);
983
984 if (host->dma_dir == DMA_FROM_DEVICE) {
985 dmaengine_terminate_all(host->dma);
986 dev_err(mmc_dev(host->mmc),
987 "%s: read time out (status = 0x%08x)\n",
988 __func__, stat);
989 } else {
990 dev_err(mmc_dev(host->mmc),
991 "%s: write time out (status = 0x%08x)\n",
992 __func__, stat);
993 mxcmci_softreset(host);
994 }
995
996 /* Mark transfer as erroneus and inform the upper layers */
997
998 if (host->data)
999 host->data->error = -ETIMEDOUT;
1000 host->req = NULL;
1001 host->cmd = NULL;
1002 host->data = NULL;
1003 mmc_request_done(host->mmc, req);
1004 }
1005
1006 static const struct mmc_host_ops mxcmci_ops = {
1007 .request = mxcmci_request,
1008 .set_ios = mxcmci_set_ios,
1009 .get_ro = mxcmci_get_ro,
1010 .enable_sdio_irq = mxcmci_enable_sdio_irq,
1011 .init_card = mxcmci_init_card,
1012 };
1013
1014 static int mxcmci_probe(struct platform_device *pdev)
1015 {
1016 struct mmc_host *mmc;
1017 struct mxcmci_host *host;
1018 struct resource *res;
1019 int ret = 0, irq;
1020 bool dat3_card_detect = false;
1021 dma_cap_mask_t mask;
1022 const struct of_device_id *of_id;
1023 struct imxmmc_platform_data *pdata = pdev->dev.platform_data;
1024
1025 pr_info("i.MX/MPC512x SDHC driver\n");
1026
1027 of_id = of_match_device(mxcmci_of_match, &pdev->dev);
1028
1029 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1030 irq = platform_get_irq(pdev, 0);
1031 if (irq < 0)
1032 return -EINVAL;
1033
1034 mmc = mmc_alloc_host(sizeof(*host), &pdev->dev);
1035 if (!mmc)
1036 return -ENOMEM;
1037
1038 host = mmc_priv(mmc);
1039
1040 host->base = devm_ioremap_resource(&pdev->dev, res);
1041 if (IS_ERR(host->base)) {
1042 ret = PTR_ERR(host->base);
1043 goto out_free;
1044 }
1045
1046 host->phys_base = res->start;
1047
1048 ret = mmc_of_parse(mmc);
1049 if (ret)
1050 goto out_free;
1051 mmc->ops = &mxcmci_ops;
1052
1053 /* For devicetree parsing, the bus width is read from devicetree */
1054 if (pdata)
1055 mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ;
1056 else
1057 mmc->caps |= MMC_CAP_SDIO_IRQ;
1058
1059 /* MMC core transfer sizes tunable parameters */
1060 mmc->max_blk_size = 2048;
1061 mmc->max_blk_count = 65535;
1062 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
1063 mmc->max_seg_size = mmc->max_req_size;
1064
1065 if (of_id) {
1066 const struct platform_device_id *id_entry = of_id->data;
1067 host->devtype = id_entry->driver_data;
1068 } else {
1069 host->devtype = pdev->id_entry->driver_data;
1070 }
1071
1072 /* adjust max_segs after devtype detection */
1073 if (!is_mpc512x_mmc(host))
1074 mmc->max_segs = 64;
1075
1076 host->mmc = mmc;
1077 host->pdata = pdata;
1078 spin_lock_init(&host->lock);
1079
1080 if (pdata)
1081 dat3_card_detect = pdata->dat3_card_detect;
1082 else if (!(mmc->caps & MMC_CAP_NONREMOVABLE)
1083 && !of_property_read_bool(pdev->dev.of_node, "cd-gpios"))
1084 dat3_card_detect = true;
1085
1086 ret = mmc_regulator_get_supply(mmc);
1087 if (ret) {
1088 if (pdata && ret != -EPROBE_DEFER)
1089 mmc->ocr_avail = pdata->ocr_avail ? :
1090 MMC_VDD_32_33 | MMC_VDD_33_34;
1091 else
1092 goto out_free;
1093 }
1094
1095 if (dat3_card_detect)
1096 host->default_irq_mask =
1097 INT_CARD_INSERTION_EN | INT_CARD_REMOVAL_EN;
1098 else
1099 host->default_irq_mask = 0;
1100
1101 host->clk_ipg = devm_clk_get(&pdev->dev, "ipg");
1102 if (IS_ERR(host->clk_ipg)) {
1103 ret = PTR_ERR(host->clk_ipg);
1104 goto out_free;
1105 }
1106
1107 host->clk_per = devm_clk_get(&pdev->dev, "per");
1108 if (IS_ERR(host->clk_per)) {
1109 ret = PTR_ERR(host->clk_per);
1110 goto out_free;
1111 }
1112
1113 clk_prepare_enable(host->clk_per);
1114 clk_prepare_enable(host->clk_ipg);
1115
1116 mxcmci_softreset(host);
1117
1118 host->rev_no = mxcmci_readw(host, MMC_REG_REV_NO);
1119 if (host->rev_no != 0x400) {
1120 ret = -ENODEV;
1121 dev_err(mmc_dev(host->mmc), "wrong rev.no. 0x%08x. aborting.\n",
1122 host->rev_no);
1123 goto out_clk_put;
1124 }
1125
1126 mmc->f_min = clk_get_rate(host->clk_per) >> 16;
1127 mmc->f_max = clk_get_rate(host->clk_per) >> 1;
1128
1129 /* recommended in data sheet */
1130 mxcmci_writew(host, 0x2db4, MMC_REG_READ_TO);
1131
1132 mxcmci_writel(host, host->default_irq_mask, MMC_REG_INT_CNTR);
1133
1134 if (!host->pdata) {
1135 host->dma = dma_request_slave_channel(&pdev->dev, "rx-tx");
1136 } else {
1137 res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
1138 if (res) {
1139 host->dmareq = res->start;
1140 host->dma_data.peripheral_type = IMX_DMATYPE_SDHC;
1141 host->dma_data.priority = DMA_PRIO_LOW;
1142 host->dma_data.dma_request = host->dmareq;
1143 dma_cap_zero(mask);
1144 dma_cap_set(DMA_SLAVE, mask);
1145 host->dma = dma_request_channel(mask, filter, host);
1146 }
1147 }
1148 if (host->dma)
1149 mmc->max_seg_size = dma_get_max_seg_size(
1150 host->dma->device->dev);
1151 else
1152 dev_info(mmc_dev(host->mmc), "dma not available. Using PIO\n");
1153
1154 INIT_WORK(&host->datawork, mxcmci_datawork);
1155
1156 ret = devm_request_irq(&pdev->dev, irq, mxcmci_irq, 0,
1157 dev_name(&pdev->dev), host);
1158 if (ret)
1159 goto out_free_dma;
1160
1161 platform_set_drvdata(pdev, mmc);
1162
1163 if (host->pdata && host->pdata->init) {
1164 ret = host->pdata->init(&pdev->dev, mxcmci_detect_irq,
1165 host->mmc);
1166 if (ret)
1167 goto out_free_dma;
1168 }
1169
1170 init_timer(&host->watchdog);
1171 host->watchdog.function = &mxcmci_watchdog;
1172 host->watchdog.data = (unsigned long)mmc;
1173
1174 mmc_add_host(mmc);
1175
1176 return 0;
1177
1178 out_free_dma:
1179 if (host->dma)
1180 dma_release_channel(host->dma);
1181
1182 out_clk_put:
1183 clk_disable_unprepare(host->clk_per);
1184 clk_disable_unprepare(host->clk_ipg);
1185
1186 out_free:
1187 mmc_free_host(mmc);
1188
1189 return ret;
1190 }
1191
1192 static int mxcmci_remove(struct platform_device *pdev)
1193 {
1194 struct mmc_host *mmc = platform_get_drvdata(pdev);
1195 struct mxcmci_host *host = mmc_priv(mmc);
1196
1197 mmc_remove_host(mmc);
1198
1199 if (host->pdata && host->pdata->exit)
1200 host->pdata->exit(&pdev->dev, mmc);
1201
1202 if (host->dma)
1203 dma_release_channel(host->dma);
1204
1205 clk_disable_unprepare(host->clk_per);
1206 clk_disable_unprepare(host->clk_ipg);
1207
1208 mmc_free_host(mmc);
1209
1210 return 0;
1211 }
1212
1213 static int __maybe_unused mxcmci_suspend(struct device *dev)
1214 {
1215 struct mmc_host *mmc = dev_get_drvdata(dev);
1216 struct mxcmci_host *host = mmc_priv(mmc);
1217
1218 clk_disable_unprepare(host->clk_per);
1219 clk_disable_unprepare(host->clk_ipg);
1220 return 0;
1221 }
1222
1223 static int __maybe_unused mxcmci_resume(struct device *dev)
1224 {
1225 struct mmc_host *mmc = dev_get_drvdata(dev);
1226 struct mxcmci_host *host = mmc_priv(mmc);
1227
1228 clk_prepare_enable(host->clk_per);
1229 clk_prepare_enable(host->clk_ipg);
1230 return 0;
1231 }
1232
1233 static SIMPLE_DEV_PM_OPS(mxcmci_pm_ops, mxcmci_suspend, mxcmci_resume);
1234
1235 static struct platform_driver mxcmci_driver = {
1236 .probe = mxcmci_probe,
1237 .remove = mxcmci_remove,
1238 .id_table = mxcmci_devtype,
1239 .driver = {
1240 .name = DRIVER_NAME,
1241 .pm = &mxcmci_pm_ops,
1242 .of_match_table = mxcmci_of_match,
1243 }
1244 };
1245
1246 module_platform_driver(mxcmci_driver);
1247
1248 MODULE_DESCRIPTION("i.MX Multimedia Card Interface Driver");
1249 MODULE_AUTHOR("Sascha Hauer, Pengutronix");
1250 MODULE_LICENSE("GPL");
1251 MODULE_ALIAS("platform:mxc-mmc");
Linux kernel - Deliverables
This page took 0.07371 seconds and 6 git commands to generate.