2 * Arasan Secure Digital Host Controller Interface.
3 * Copyright (C) 2011 - 2012 Michal Simek <monstr@monstr.eu>
4 * Copyright (c) 2012 Wind River Systems, Inc.
5 * Copyright (C) 2013 Pengutronix e.K.
6 * Copyright (C) 2013 Xilinx Inc.
8 * Based on sdhci-of-esdhc.c
10 * Copyright (c) 2007 Freescale Semiconductor, Inc.
11 * Copyright (c) 2009 MontaVista Software, Inc.
13 * Authors: Xiaobo Xie <X.Xie@freescale.com>
14 * Anton Vorontsov <avorontsov@ru.mvista.com>
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or (at
19 * your option) any later version.
22 #include <linux/module.h>
23 #include <linux/of_device.h>
24 #include <linux/phy/phy.h>
25 #include "sdhci-pltfm.h"
27 #define SDHCI_ARASAN_CLK_CTRL_OFFSET 0x2c
29 #define CLK_CTRL_TIMEOUT_SHIFT 16
30 #define CLK_CTRL_TIMEOUT_MASK (0xf << CLK_CTRL_TIMEOUT_SHIFT)
31 #define CLK_CTRL_TIMEOUT_MIN_EXP 13
34 * struct sdhci_arasan_data
35 * @clk_ahb: Pointer to the AHB clock
36 * @phy: Pointer to the generic phy
38 struct sdhci_arasan_data
{
43 static unsigned int sdhci_arasan_get_timeout_clock(struct sdhci_host
*host
)
47 struct sdhci_pltfm_host
*pltfm_host
= sdhci_priv(host
);
49 div
= readl(host
->ioaddr
+ SDHCI_ARASAN_CLK_CTRL_OFFSET
);
50 div
= (div
& CLK_CTRL_TIMEOUT_MASK
) >> CLK_CTRL_TIMEOUT_SHIFT
;
52 freq
= clk_get_rate(pltfm_host
->clk
);
53 freq
/= 1 << (CLK_CTRL_TIMEOUT_MIN_EXP
+ div
);
58 static void sdhci_arasan_set_clock(struct sdhci_host
*host
, unsigned int clock
)
60 struct sdhci_pltfm_host
*pltfm_host
= sdhci_priv(host
);
61 struct sdhci_arasan_data
*sdhci_arasan
= sdhci_pltfm_priv(pltfm_host
);
62 bool ctrl_phy
= false;
64 if (clock
> MMC_HIGH_52_MAX_DTR
&& (!IS_ERR(sdhci_arasan
->phy
)))
68 spin_unlock_irq(&host
->lock
);
69 phy_power_off(sdhci_arasan
->phy
);
70 spin_lock_irq(&host
->lock
);
73 sdhci_set_clock(host
, clock
);
76 spin_unlock_irq(&host
->lock
);
77 phy_power_on(sdhci_arasan
->phy
);
78 spin_lock_irq(&host
->lock
);
82 static struct sdhci_ops sdhci_arasan_ops
= {
83 .set_clock
= sdhci_arasan_set_clock
,
84 .get_max_clock
= sdhci_pltfm_clk_get_max_clock
,
85 .get_timeout_clock
= sdhci_arasan_get_timeout_clock
,
86 .set_bus_width
= sdhci_set_bus_width
,
88 .set_uhs_signaling
= sdhci_set_uhs_signaling
,
91 static struct sdhci_pltfm_data sdhci_arasan_pdata
= {
92 .ops
= &sdhci_arasan_ops
,
93 .quirks
= SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN
,
94 .quirks2
= SDHCI_QUIRK2_PRESET_VALUE_BROKEN
|
95 SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN
,
98 #ifdef CONFIG_PM_SLEEP
100 * sdhci_arasan_suspend - Suspend method for the driver
101 * @dev: Address of the device structure
102 * Returns 0 on success and error value on error
104 * Put the device in a low power state.
106 static int sdhci_arasan_suspend(struct device
*dev
)
108 struct platform_device
*pdev
= to_platform_device(dev
);
109 struct sdhci_host
*host
= platform_get_drvdata(pdev
);
110 struct sdhci_pltfm_host
*pltfm_host
= sdhci_priv(host
);
111 struct sdhci_arasan_data
*sdhci_arasan
= sdhci_pltfm_priv(pltfm_host
);
114 ret
= sdhci_suspend_host(host
);
118 if (!IS_ERR(sdhci_arasan
->phy
)) {
119 ret
= phy_power_off(sdhci_arasan
->phy
);
121 dev_err(dev
, "Cannot power off phy.\n");
122 sdhci_resume_host(host
);
127 clk_disable(pltfm_host
->clk
);
128 clk_disable(sdhci_arasan
->clk_ahb
);
134 * sdhci_arasan_resume - Resume method for the driver
135 * @dev: Address of the device structure
136 * Returns 0 on success and error value on error
138 * Resume operation after suspend
140 static int sdhci_arasan_resume(struct device
*dev
)
142 struct platform_device
*pdev
= to_platform_device(dev
);
143 struct sdhci_host
*host
= platform_get_drvdata(pdev
);
144 struct sdhci_pltfm_host
*pltfm_host
= sdhci_priv(host
);
145 struct sdhci_arasan_data
*sdhci_arasan
= sdhci_pltfm_priv(pltfm_host
);
148 ret
= clk_enable(sdhci_arasan
->clk_ahb
);
150 dev_err(dev
, "Cannot enable AHB clock.\n");
154 ret
= clk_enable(pltfm_host
->clk
);
156 dev_err(dev
, "Cannot enable SD clock.\n");
160 if (!IS_ERR(sdhci_arasan
->phy
)) {
161 ret
= phy_power_on(sdhci_arasan
->phy
);
163 dev_err(dev
, "Cannot power on phy.\n");
168 return sdhci_resume_host(host
);
170 #endif /* ! CONFIG_PM_SLEEP */
172 static SIMPLE_DEV_PM_OPS(sdhci_arasan_dev_pm_ops
, sdhci_arasan_suspend
,
173 sdhci_arasan_resume
);
175 static int sdhci_arasan_probe(struct platform_device
*pdev
)
179 struct sdhci_host
*host
;
180 struct sdhci_pltfm_host
*pltfm_host
;
181 struct sdhci_arasan_data
*sdhci_arasan
;
183 host
= sdhci_pltfm_init(pdev
, &sdhci_arasan_pdata
,
184 sizeof(*sdhci_arasan
));
186 return PTR_ERR(host
);
188 pltfm_host
= sdhci_priv(host
);
189 sdhci_arasan
= sdhci_pltfm_priv(pltfm_host
);
191 sdhci_arasan
->clk_ahb
= devm_clk_get(&pdev
->dev
, "clk_ahb");
192 if (IS_ERR(sdhci_arasan
->clk_ahb
)) {
193 dev_err(&pdev
->dev
, "clk_ahb clock not found.\n");
194 ret
= PTR_ERR(sdhci_arasan
->clk_ahb
);
198 clk_xin
= devm_clk_get(&pdev
->dev
, "clk_xin");
199 if (IS_ERR(clk_xin
)) {
200 dev_err(&pdev
->dev
, "clk_xin clock not found.\n");
201 ret
= PTR_ERR(clk_xin
);
205 ret
= clk_prepare_enable(sdhci_arasan
->clk_ahb
);
207 dev_err(&pdev
->dev
, "Unable to enable AHB clock.\n");
211 ret
= clk_prepare_enable(clk_xin
);
213 dev_err(&pdev
->dev
, "Unable to enable SD clock.\n");
217 sdhci_get_of_property(pdev
);
218 pltfm_host
->clk
= clk_xin
;
220 ret
= mmc_of_parse(host
->mmc
);
222 dev_err(&pdev
->dev
, "parsing dt failed (%u)\n", ret
);
223 goto clk_disable_all
;
226 sdhci_arasan
->phy
= ERR_PTR(-ENODEV
);
227 if (of_device_is_compatible(pdev
->dev
.of_node
,
228 "arasan,sdhci-5.1")) {
229 sdhci_arasan
->phy
= devm_phy_get(&pdev
->dev
,
231 if (IS_ERR(sdhci_arasan
->phy
)) {
232 ret
= PTR_ERR(sdhci_arasan
->phy
);
233 dev_err(&pdev
->dev
, "No phy for arasan,sdhci-5.1.\n");
234 goto clk_disable_all
;
237 ret
= phy_init(sdhci_arasan
->phy
);
239 dev_err(&pdev
->dev
, "phy_init err.\n");
240 goto clk_disable_all
;
243 ret
= phy_power_on(sdhci_arasan
->phy
);
245 dev_err(&pdev
->dev
, "phy_power_on err.\n");
250 ret
= sdhci_add_host(host
);
257 if (!IS_ERR(sdhci_arasan
->phy
))
258 phy_power_off(sdhci_arasan
->phy
);
260 if (!IS_ERR(sdhci_arasan
->phy
))
261 phy_exit(sdhci_arasan
->phy
);
263 clk_disable_unprepare(clk_xin
);
265 clk_disable_unprepare(sdhci_arasan
->clk_ahb
);
267 sdhci_pltfm_free(pdev
);
271 static int sdhci_arasan_remove(struct platform_device
*pdev
)
274 struct sdhci_host
*host
= platform_get_drvdata(pdev
);
275 struct sdhci_pltfm_host
*pltfm_host
= sdhci_priv(host
);
276 struct sdhci_arasan_data
*sdhci_arasan
= sdhci_pltfm_priv(pltfm_host
);
277 struct clk
*clk_ahb
= sdhci_arasan
->clk_ahb
;
279 if (!IS_ERR(sdhci_arasan
->phy
)) {
280 phy_power_off(sdhci_arasan
->phy
);
281 phy_exit(sdhci_arasan
->phy
);
284 ret
= sdhci_pltfm_unregister(pdev
);
286 clk_disable_unprepare(clk_ahb
);
291 static const struct of_device_id sdhci_arasan_of_match
[] = {
292 { .compatible
= "arasan,sdhci-8.9a" },
293 { .compatible
= "arasan,sdhci-5.1" },
294 { .compatible
= "arasan,sdhci-4.9a" },
297 MODULE_DEVICE_TABLE(of
, sdhci_arasan_of_match
);
299 static struct platform_driver sdhci_arasan_driver
= {
301 .name
= "sdhci-arasan",
302 .of_match_table
= sdhci_arasan_of_match
,
303 .pm
= &sdhci_arasan_dev_pm_ops
,
305 .probe
= sdhci_arasan_probe
,
306 .remove
= sdhci_arasan_remove
,
309 module_platform_driver(sdhci_arasan_driver
);
311 MODULE_DESCRIPTION("Driver for the Arasan SDHCI Controller");
312 MODULE_AUTHOR("Soeren Brinkmann <soren.brinkmann@xilinx.com>");
313 MODULE_LICENSE("GPL");