1 /* linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
3 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or (at
8 * your option) any later version.
10 * Thanks to the following companies for their support:
12 * - JMicron (hardware and technical support)
15 #include <linux/delay.h>
16 #include <linux/highmem.h>
17 #include <linux/module.h>
18 #include <linux/pci.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/slab.h>
21 #include <linux/device.h>
22 #include <linux/mmc/host.h>
23 #include <linux/scatterlist.h>
25 #include <linux/gpio.h>
26 #include <linux/pm_runtime.h>
27 #include <linux/mmc/sdhci-pci-data.h>
34 #define PCI_DEVICE_ID_INTEL_PCH_SDIO0 0x8809
35 #define PCI_DEVICE_ID_INTEL_PCH_SDIO1 0x880a
36 #define PCI_DEVICE_ID_INTEL_BYT_EMMC 0x0f14
37 #define PCI_DEVICE_ID_INTEL_BYT_SDIO 0x0f15
38 #define PCI_DEVICE_ID_INTEL_BYT_SD 0x0f16
39 #define PCI_DEVICE_ID_INTEL_BYT_EMMC2 0x0f50
40 #define PCI_DEVICE_ID_INTEL_MRFL_MMC 0x1190
41 #define PCI_DEVICE_ID_INTEL_CLV_SDIO0 0x08f9
42 #define PCI_DEVICE_ID_INTEL_CLV_SDIO1 0x08fa
43 #define PCI_DEVICE_ID_INTEL_CLV_SDIO2 0x08fb
44 #define PCI_DEVICE_ID_INTEL_CLV_EMMC0 0x08e5
45 #define PCI_DEVICE_ID_INTEL_CLV_EMMC1 0x08e6
51 #define PCI_SDHCI_IFPIO 0x00
52 #define PCI_SDHCI_IFDMA 0x01
53 #define PCI_SDHCI_IFVENDOR 0x02
55 #define PCI_SLOT_INFO 0x40 /* 8 bits */
56 #define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7)
57 #define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07
61 struct sdhci_pci_chip
;
62 struct sdhci_pci_slot
;
64 struct sdhci_pci_fixes
{
67 bool allow_runtime_pm
;
69 int (*probe
) (struct sdhci_pci_chip
*);
71 int (*probe_slot
) (struct sdhci_pci_slot
*);
72 void (*remove_slot
) (struct sdhci_pci_slot
*, int);
74 int (*suspend
) (struct sdhci_pci_chip
*);
75 int (*resume
) (struct sdhci_pci_chip
*);
78 struct sdhci_pci_slot
{
79 struct sdhci_pci_chip
*chip
;
80 struct sdhci_host
*host
;
81 struct sdhci_pci_data
*data
;
88 void (*hw_reset
)(struct sdhci_host
*host
);
91 struct sdhci_pci_chip
{
96 bool allow_runtime_pm
;
97 const struct sdhci_pci_fixes
*fixes
;
99 int num_slots
; /* Slots on controller */
100 struct sdhci_pci_slot
*slots
[MAX_SLOTS
]; /* Pointers to host slots */
104 /*****************************************************************************\
106 * Hardware specific quirk handling *
108 \*****************************************************************************/
110 static int ricoh_probe(struct sdhci_pci_chip
*chip
)
112 if (chip
->pdev
->subsystem_vendor
== PCI_VENDOR_ID_SAMSUNG
||
113 chip
->pdev
->subsystem_vendor
== PCI_VENDOR_ID_SONY
)
114 chip
->quirks
|= SDHCI_QUIRK_NO_CARD_NO_RESET
;
118 static int ricoh_mmc_probe_slot(struct sdhci_pci_slot
*slot
)
121 ((0x21 << SDHCI_TIMEOUT_CLK_SHIFT
)
122 & SDHCI_TIMEOUT_CLK_MASK
) |
124 ((0x21 << SDHCI_CLOCK_BASE_SHIFT
)
125 & SDHCI_CLOCK_BASE_MASK
) |
127 SDHCI_TIMEOUT_CLK_UNIT
|
134 static int ricoh_mmc_resume(struct sdhci_pci_chip
*chip
)
136 /* Apply a delay to allow controller to settle */
137 /* Otherwise it becomes confused if card state changed
143 static const struct sdhci_pci_fixes sdhci_ricoh
= {
144 .probe
= ricoh_probe
,
145 .quirks
= SDHCI_QUIRK_32BIT_DMA_ADDR
|
146 SDHCI_QUIRK_FORCE_DMA
|
147 SDHCI_QUIRK_CLOCK_BEFORE_RESET
,
150 static const struct sdhci_pci_fixes sdhci_ricoh_mmc
= {
151 .probe_slot
= ricoh_mmc_probe_slot
,
152 .resume
= ricoh_mmc_resume
,
153 .quirks
= SDHCI_QUIRK_32BIT_DMA_ADDR
|
154 SDHCI_QUIRK_CLOCK_BEFORE_RESET
|
155 SDHCI_QUIRK_NO_CARD_NO_RESET
|
156 SDHCI_QUIRK_MISSING_CAPS
159 static const struct sdhci_pci_fixes sdhci_ene_712
= {
160 .quirks
= SDHCI_QUIRK_SINGLE_POWER_WRITE
|
161 SDHCI_QUIRK_BROKEN_DMA
,
164 static const struct sdhci_pci_fixes sdhci_ene_714
= {
165 .quirks
= SDHCI_QUIRK_SINGLE_POWER_WRITE
|
166 SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS
|
167 SDHCI_QUIRK_BROKEN_DMA
,
170 static const struct sdhci_pci_fixes sdhci_cafe
= {
171 .quirks
= SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER
|
172 SDHCI_QUIRK_NO_BUSY_IRQ
|
173 SDHCI_QUIRK_BROKEN_CARD_DETECTION
|
174 SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
,
177 static int mrst_hc_probe_slot(struct sdhci_pci_slot
*slot
)
179 slot
->host
->mmc
->caps
|= MMC_CAP_8_BIT_DATA
;
184 * ADMA operation is disabled for Moorestown platform due to
187 static int mrst_hc_probe(struct sdhci_pci_chip
*chip
)
190 * slots number is fixed here for MRST as SDIO3/5 are never used and
191 * have hardware bugs.
197 static int pch_hc_probe_slot(struct sdhci_pci_slot
*slot
)
199 slot
->host
->mmc
->caps
|= MMC_CAP_8_BIT_DATA
;
203 #ifdef CONFIG_PM_RUNTIME
205 static irqreturn_t
sdhci_pci_sd_cd(int irq
, void *dev_id
)
207 struct sdhci_pci_slot
*slot
= dev_id
;
208 struct sdhci_host
*host
= slot
->host
;
210 mmc_detect_change(host
->mmc
, msecs_to_jiffies(200));
214 static void sdhci_pci_add_own_cd(struct sdhci_pci_slot
*slot
)
216 int err
, irq
, gpio
= slot
->cd_gpio
;
218 slot
->cd_gpio
= -EINVAL
;
219 slot
->cd_irq
= -EINVAL
;
221 if (!gpio_is_valid(gpio
))
224 err
= gpio_request(gpio
, "sd_cd");
228 err
= gpio_direction_input(gpio
);
232 irq
= gpio_to_irq(gpio
);
236 err
= request_irq(irq
, sdhci_pci_sd_cd
, IRQF_TRIGGER_RISING
|
237 IRQF_TRIGGER_FALLING
, "sd_cd", slot
);
241 slot
->cd_gpio
= gpio
;
249 dev_warn(&slot
->chip
->pdev
->dev
, "failed to setup card detect wake up\n");
252 static void sdhci_pci_remove_own_cd(struct sdhci_pci_slot
*slot
)
254 if (slot
->cd_irq
>= 0)
255 free_irq(slot
->cd_irq
, slot
);
256 if (gpio_is_valid(slot
->cd_gpio
))
257 gpio_free(slot
->cd_gpio
);
262 static inline void sdhci_pci_add_own_cd(struct sdhci_pci_slot
*slot
)
266 static inline void sdhci_pci_remove_own_cd(struct sdhci_pci_slot
*slot
)
272 static int mfd_emmc_probe_slot(struct sdhci_pci_slot
*slot
)
274 slot
->host
->mmc
->caps
|= MMC_CAP_8_BIT_DATA
| MMC_CAP_NONREMOVABLE
;
275 slot
->host
->mmc
->caps2
|= MMC_CAP2_BOOTPART_NOACC
|
276 MMC_CAP2_HC_ERASE_SZ
;
280 static int mfd_sdio_probe_slot(struct sdhci_pci_slot
*slot
)
282 slot
->host
->mmc
->caps
|= MMC_CAP_POWER_OFF_CARD
| MMC_CAP_NONREMOVABLE
;
286 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc0
= {
287 .quirks
= SDHCI_QUIRK_BROKEN_ADMA
| SDHCI_QUIRK_NO_HISPD_BIT
,
288 .probe_slot
= mrst_hc_probe_slot
,
291 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc1_hc2
= {
292 .quirks
= SDHCI_QUIRK_BROKEN_ADMA
| SDHCI_QUIRK_NO_HISPD_BIT
,
293 .probe
= mrst_hc_probe
,
296 static const struct sdhci_pci_fixes sdhci_intel_mfd_sd
= {
297 .quirks
= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC
,
298 .allow_runtime_pm
= true,
301 static const struct sdhci_pci_fixes sdhci_intel_mfd_sdio
= {
302 .quirks
= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC
,
303 .quirks2
= SDHCI_QUIRK2_HOST_OFF_CARD_ON
,
304 .allow_runtime_pm
= true,
305 .probe_slot
= mfd_sdio_probe_slot
,
308 static const struct sdhci_pci_fixes sdhci_intel_mfd_emmc
= {
309 .quirks
= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC
,
310 .allow_runtime_pm
= true,
311 .probe_slot
= mfd_emmc_probe_slot
,
314 static const struct sdhci_pci_fixes sdhci_intel_pch_sdio
= {
315 .quirks
= SDHCI_QUIRK_BROKEN_ADMA
,
316 .probe_slot
= pch_hc_probe_slot
,
319 static void sdhci_pci_int_hw_reset(struct sdhci_host
*host
)
323 reg
= sdhci_readb(host
, SDHCI_POWER_CONTROL
);
325 sdhci_writeb(host
, reg
, SDHCI_POWER_CONTROL
);
326 /* For eMMC, minimum is 1us but give it 9us for good measure */
329 sdhci_writeb(host
, reg
, SDHCI_POWER_CONTROL
);
330 /* For eMMC, minimum is 200us but give it 300us for good measure */
331 usleep_range(300, 1000);
334 static int byt_emmc_probe_slot(struct sdhci_pci_slot
*slot
)
336 slot
->host
->mmc
->caps
|= MMC_CAP_8_BIT_DATA
| MMC_CAP_NONREMOVABLE
|
338 slot
->host
->mmc
->caps2
|= MMC_CAP2_HC_ERASE_SZ
;
339 slot
->hw_reset
= sdhci_pci_int_hw_reset
;
343 static int byt_sdio_probe_slot(struct sdhci_pci_slot
*slot
)
345 slot
->host
->mmc
->caps
|= MMC_CAP_POWER_OFF_CARD
| MMC_CAP_NONREMOVABLE
;
349 static const struct sdhci_pci_fixes sdhci_intel_byt_emmc
= {
350 .allow_runtime_pm
= true,
351 .probe_slot
= byt_emmc_probe_slot
,
354 static const struct sdhci_pci_fixes sdhci_intel_byt_sdio
= {
355 .quirks2
= SDHCI_QUIRK2_HOST_OFF_CARD_ON
,
356 .allow_runtime_pm
= true,
357 .probe_slot
= byt_sdio_probe_slot
,
360 static const struct sdhci_pci_fixes sdhci_intel_byt_sd
= {
361 .quirks2
= SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON
,
362 .allow_runtime_pm
= true,
365 /* Define Host controllers for Intel Merrifield platform */
366 #define INTEL_MRFL_EMMC_0 0
367 #define INTEL_MRFL_EMMC_1 1
369 static int intel_mrfl_mmc_probe_slot(struct sdhci_pci_slot
*slot
)
371 if ((PCI_FUNC(slot
->chip
->pdev
->devfn
) != INTEL_MRFL_EMMC_0
) &&
372 (PCI_FUNC(slot
->chip
->pdev
->devfn
) != INTEL_MRFL_EMMC_1
))
373 /* SD support is not ready yet */
376 slot
->host
->mmc
->caps
|= MMC_CAP_8_BIT_DATA
| MMC_CAP_NONREMOVABLE
|
382 static const struct sdhci_pci_fixes sdhci_intel_mrfl_mmc
= {
383 .quirks
= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC
,
384 .probe_slot
= intel_mrfl_mmc_probe_slot
,
387 /* O2Micro extra registers */
388 #define O2_SD_LOCK_WP 0xD3
389 #define O2_SD_MULTI_VCC3V 0xEE
390 #define O2_SD_CLKREQ 0xEC
391 #define O2_SD_CAPS 0xE0
392 #define O2_SD_ADMA1 0xE2
393 #define O2_SD_ADMA2 0xE7
394 #define O2_SD_INF_MOD 0xF1
396 static int o2_probe(struct sdhci_pci_chip
*chip
)
401 switch (chip
->pdev
->device
) {
402 case PCI_DEVICE_ID_O2_8220
:
403 case PCI_DEVICE_ID_O2_8221
:
404 case PCI_DEVICE_ID_O2_8320
:
405 case PCI_DEVICE_ID_O2_8321
:
406 /* This extra setup is required due to broken ADMA. */
407 ret
= pci_read_config_byte(chip
->pdev
, O2_SD_LOCK_WP
, &scratch
);
411 pci_write_config_byte(chip
->pdev
, O2_SD_LOCK_WP
, scratch
);
413 /* Set Multi 3 to VCC3V# */
414 pci_write_config_byte(chip
->pdev
, O2_SD_MULTI_VCC3V
, 0x08);
416 /* Disable CLK_REQ# support after media DET */
417 ret
= pci_read_config_byte(chip
->pdev
, O2_SD_CLKREQ
, &scratch
);
421 pci_write_config_byte(chip
->pdev
, O2_SD_CLKREQ
, scratch
);
423 /* Choose capabilities, enable SDMA. We have to write 0x01
424 * to the capabilities register first to unlock it.
426 ret
= pci_read_config_byte(chip
->pdev
, O2_SD_CAPS
, &scratch
);
430 pci_write_config_byte(chip
->pdev
, O2_SD_CAPS
, scratch
);
431 pci_write_config_byte(chip
->pdev
, O2_SD_CAPS
, 0x73);
433 /* Disable ADMA1/2 */
434 pci_write_config_byte(chip
->pdev
, O2_SD_ADMA1
, 0x39);
435 pci_write_config_byte(chip
->pdev
, O2_SD_ADMA2
, 0x08);
437 /* Disable the infinite transfer mode */
438 ret
= pci_read_config_byte(chip
->pdev
, O2_SD_INF_MOD
, &scratch
);
442 pci_write_config_byte(chip
->pdev
, O2_SD_INF_MOD
, scratch
);
445 ret
= pci_read_config_byte(chip
->pdev
, O2_SD_LOCK_WP
, &scratch
);
449 pci_write_config_byte(chip
->pdev
, O2_SD_LOCK_WP
, scratch
);
455 static int jmicron_pmos(struct sdhci_pci_chip
*chip
, int on
)
460 ret
= pci_read_config_byte(chip
->pdev
, 0xAE, &scratch
);
465 * Turn PMOS on [bit 0], set over current detection to 2.4 V
466 * [bit 1:2] and enable over current debouncing [bit 6].
473 ret
= pci_write_config_byte(chip
->pdev
, 0xAE, scratch
);
480 static int jmicron_probe(struct sdhci_pci_chip
*chip
)
485 if (chip
->pdev
->revision
== 0) {
486 chip
->quirks
|= SDHCI_QUIRK_32BIT_DMA_ADDR
|
487 SDHCI_QUIRK_32BIT_DMA_SIZE
|
488 SDHCI_QUIRK_32BIT_ADMA_SIZE
|
489 SDHCI_QUIRK_RESET_AFTER_REQUEST
|
490 SDHCI_QUIRK_BROKEN_SMALL_PIO
;
494 * JMicron chips can have two interfaces to the same hardware
495 * in order to work around limitations in Microsoft's driver.
496 * We need to make sure we only bind to one of them.
498 * This code assumes two things:
500 * 1. The PCI code adds subfunctions in order.
502 * 2. The MMC interface has a lower subfunction number
503 * than the SD interface.
505 if (chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB38X_SD
)
506 mmcdev
= PCI_DEVICE_ID_JMICRON_JMB38X_MMC
;
507 else if (chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB388_SD
)
508 mmcdev
= PCI_DEVICE_ID_JMICRON_JMB388_ESD
;
511 struct pci_dev
*sd_dev
;
514 while ((sd_dev
= pci_get_device(PCI_VENDOR_ID_JMICRON
,
515 mmcdev
, sd_dev
)) != NULL
) {
516 if ((PCI_SLOT(chip
->pdev
->devfn
) ==
517 PCI_SLOT(sd_dev
->devfn
)) &&
518 (chip
->pdev
->bus
== sd_dev
->bus
))
524 dev_info(&chip
->pdev
->dev
, "Refusing to bind to "
525 "secondary interface.\n");
531 * JMicron chips need a bit of a nudge to enable the power
534 ret
= jmicron_pmos(chip
, 1);
536 dev_err(&chip
->pdev
->dev
, "Failure enabling card power\n");
540 /* quirk for unsable RO-detection on JM388 chips */
541 if (chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB388_SD
||
542 chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB388_ESD
)
543 chip
->quirks
|= SDHCI_QUIRK_UNSTABLE_RO_DETECT
;
548 static void jmicron_enable_mmc(struct sdhci_host
*host
, int on
)
552 scratch
= readb(host
->ioaddr
+ 0xC0);
559 writeb(scratch
, host
->ioaddr
+ 0xC0);
562 static int jmicron_probe_slot(struct sdhci_pci_slot
*slot
)
564 if (slot
->chip
->pdev
->revision
== 0) {
567 version
= readl(slot
->host
->ioaddr
+ SDHCI_HOST_VERSION
);
568 version
= (version
& SDHCI_VENDOR_VER_MASK
) >>
569 SDHCI_VENDOR_VER_SHIFT
;
572 * Older versions of the chip have lots of nasty glitches
573 * in the ADMA engine. It's best just to avoid it
577 slot
->host
->quirks
|= SDHCI_QUIRK_BROKEN_ADMA
;
580 /* JM388 MMC doesn't support 1.8V while SD supports it */
581 if (slot
->chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB388_ESD
) {
582 slot
->host
->ocr_avail_sd
= MMC_VDD_32_33
| MMC_VDD_33_34
|
583 MMC_VDD_29_30
| MMC_VDD_30_31
|
584 MMC_VDD_165_195
; /* allow 1.8V */
585 slot
->host
->ocr_avail_mmc
= MMC_VDD_32_33
| MMC_VDD_33_34
|
586 MMC_VDD_29_30
| MMC_VDD_30_31
; /* no 1.8V for MMC */
590 * The secondary interface requires a bit set to get the
593 if (slot
->chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB38X_MMC
||
594 slot
->chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB388_ESD
)
595 jmicron_enable_mmc(slot
->host
, 1);
597 slot
->host
->mmc
->caps
|= MMC_CAP_BUS_WIDTH_TEST
;
602 static void jmicron_remove_slot(struct sdhci_pci_slot
*slot
, int dead
)
607 if (slot
->chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB38X_MMC
||
608 slot
->chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB388_ESD
)
609 jmicron_enable_mmc(slot
->host
, 0);
612 static int jmicron_suspend(struct sdhci_pci_chip
*chip
)
616 if (chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB38X_MMC
||
617 chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB388_ESD
) {
618 for (i
= 0; i
< chip
->num_slots
; i
++)
619 jmicron_enable_mmc(chip
->slots
[i
]->host
, 0);
625 static int jmicron_resume(struct sdhci_pci_chip
*chip
)
629 if (chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB38X_MMC
||
630 chip
->pdev
->device
== PCI_DEVICE_ID_JMICRON_JMB388_ESD
) {
631 for (i
= 0; i
< chip
->num_slots
; i
++)
632 jmicron_enable_mmc(chip
->slots
[i
]->host
, 1);
635 ret
= jmicron_pmos(chip
, 1);
637 dev_err(&chip
->pdev
->dev
, "Failure enabling card power\n");
644 static const struct sdhci_pci_fixes sdhci_o2
= {
648 static const struct sdhci_pci_fixes sdhci_jmicron
= {
649 .probe
= jmicron_probe
,
651 .probe_slot
= jmicron_probe_slot
,
652 .remove_slot
= jmicron_remove_slot
,
654 .suspend
= jmicron_suspend
,
655 .resume
= jmicron_resume
,
658 /* SysKonnect CardBus2SDIO extra registers */
659 #define SYSKT_CTRL 0x200
660 #define SYSKT_RDFIFO_STAT 0x204
661 #define SYSKT_WRFIFO_STAT 0x208
662 #define SYSKT_POWER_DATA 0x20c
663 #define SYSKT_POWER_330 0xef
664 #define SYSKT_POWER_300 0xf8
665 #define SYSKT_POWER_184 0xcc
666 #define SYSKT_POWER_CMD 0x20d
667 #define SYSKT_POWER_START (1 << 7)
668 #define SYSKT_POWER_STATUS 0x20e
669 #define SYSKT_POWER_STATUS_OK (1 << 0)
670 #define SYSKT_BOARD_REV 0x210
671 #define SYSKT_CHIP_REV 0x211
672 #define SYSKT_CONF_DATA 0x212
673 #define SYSKT_CONF_DATA_1V8 (1 << 2)
674 #define SYSKT_CONF_DATA_2V5 (1 << 1)
675 #define SYSKT_CONF_DATA_3V3 (1 << 0)
677 static int syskt_probe(struct sdhci_pci_chip
*chip
)
679 if ((chip
->pdev
->class & 0x0000FF) == PCI_SDHCI_IFVENDOR
) {
680 chip
->pdev
->class &= ~0x0000FF;
681 chip
->pdev
->class |= PCI_SDHCI_IFDMA
;
686 static int syskt_probe_slot(struct sdhci_pci_slot
*slot
)
690 u8 board_rev
= readb(slot
->host
->ioaddr
+ SYSKT_BOARD_REV
);
691 u8 chip_rev
= readb(slot
->host
->ioaddr
+ SYSKT_CHIP_REV
);
692 dev_info(&slot
->chip
->pdev
->dev
, "SysKonnect CardBus2SDIO, "
693 "board rev %d.%d, chip rev %d.%d\n",
694 board_rev
>> 4, board_rev
& 0xf,
695 chip_rev
>> 4, chip_rev
& 0xf);
696 if (chip_rev
>= 0x20)
697 slot
->host
->quirks
|= SDHCI_QUIRK_FORCE_DMA
;
699 writeb(SYSKT_POWER_330
, slot
->host
->ioaddr
+ SYSKT_POWER_DATA
);
700 writeb(SYSKT_POWER_START
, slot
->host
->ioaddr
+ SYSKT_POWER_CMD
);
702 tm
= 10; /* Wait max 1 ms */
704 ps
= readw(slot
->host
->ioaddr
+ SYSKT_POWER_STATUS
);
705 if (ps
& SYSKT_POWER_STATUS_OK
)
710 dev_err(&slot
->chip
->pdev
->dev
,
711 "power regulator never stabilized");
712 writeb(0, slot
->host
->ioaddr
+ SYSKT_POWER_CMD
);
719 static const struct sdhci_pci_fixes sdhci_syskt
= {
720 .quirks
= SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER
,
721 .probe
= syskt_probe
,
722 .probe_slot
= syskt_probe_slot
,
725 static int via_probe(struct sdhci_pci_chip
*chip
)
727 if (chip
->pdev
->revision
== 0x10)
728 chip
->quirks
|= SDHCI_QUIRK_DELAY_AFTER_POWER
;
733 static const struct sdhci_pci_fixes sdhci_via
= {
737 static const struct pci_device_id pci_ids
[] = {
739 .vendor
= PCI_VENDOR_ID_RICOH
,
740 .device
= PCI_DEVICE_ID_RICOH_R5C822
,
741 .subvendor
= PCI_ANY_ID
,
742 .subdevice
= PCI_ANY_ID
,
743 .driver_data
= (kernel_ulong_t
)&sdhci_ricoh
,
747 .vendor
= PCI_VENDOR_ID_RICOH
,
749 .subvendor
= PCI_ANY_ID
,
750 .subdevice
= PCI_ANY_ID
,
751 .driver_data
= (kernel_ulong_t
)&sdhci_ricoh_mmc
,
755 .vendor
= PCI_VENDOR_ID_RICOH
,
757 .subvendor
= PCI_ANY_ID
,
758 .subdevice
= PCI_ANY_ID
,
759 .driver_data
= (kernel_ulong_t
)&sdhci_ricoh_mmc
,
763 .vendor
= PCI_VENDOR_ID_RICOH
,
765 .subvendor
= PCI_ANY_ID
,
766 .subdevice
= PCI_ANY_ID
,
767 .driver_data
= (kernel_ulong_t
)&sdhci_ricoh_mmc
,
771 .vendor
= PCI_VENDOR_ID_ENE
,
772 .device
= PCI_DEVICE_ID_ENE_CB712_SD
,
773 .subvendor
= PCI_ANY_ID
,
774 .subdevice
= PCI_ANY_ID
,
775 .driver_data
= (kernel_ulong_t
)&sdhci_ene_712
,
779 .vendor
= PCI_VENDOR_ID_ENE
,
780 .device
= PCI_DEVICE_ID_ENE_CB712_SD_2
,
781 .subvendor
= PCI_ANY_ID
,
782 .subdevice
= PCI_ANY_ID
,
783 .driver_data
= (kernel_ulong_t
)&sdhci_ene_712
,
787 .vendor
= PCI_VENDOR_ID_ENE
,
788 .device
= PCI_DEVICE_ID_ENE_CB714_SD
,
789 .subvendor
= PCI_ANY_ID
,
790 .subdevice
= PCI_ANY_ID
,
791 .driver_data
= (kernel_ulong_t
)&sdhci_ene_714
,
795 .vendor
= PCI_VENDOR_ID_ENE
,
796 .device
= PCI_DEVICE_ID_ENE_CB714_SD_2
,
797 .subvendor
= PCI_ANY_ID
,
798 .subdevice
= PCI_ANY_ID
,
799 .driver_data
= (kernel_ulong_t
)&sdhci_ene_714
,
803 .vendor
= PCI_VENDOR_ID_MARVELL
,
804 .device
= PCI_DEVICE_ID_MARVELL_88ALP01_SD
,
805 .subvendor
= PCI_ANY_ID
,
806 .subdevice
= PCI_ANY_ID
,
807 .driver_data
= (kernel_ulong_t
)&sdhci_cafe
,
811 .vendor
= PCI_VENDOR_ID_JMICRON
,
812 .device
= PCI_DEVICE_ID_JMICRON_JMB38X_SD
,
813 .subvendor
= PCI_ANY_ID
,
814 .subdevice
= PCI_ANY_ID
,
815 .driver_data
= (kernel_ulong_t
)&sdhci_jmicron
,
819 .vendor
= PCI_VENDOR_ID_JMICRON
,
820 .device
= PCI_DEVICE_ID_JMICRON_JMB38X_MMC
,
821 .subvendor
= PCI_ANY_ID
,
822 .subdevice
= PCI_ANY_ID
,
823 .driver_data
= (kernel_ulong_t
)&sdhci_jmicron
,
827 .vendor
= PCI_VENDOR_ID_JMICRON
,
828 .device
= PCI_DEVICE_ID_JMICRON_JMB388_SD
,
829 .subvendor
= PCI_ANY_ID
,
830 .subdevice
= PCI_ANY_ID
,
831 .driver_data
= (kernel_ulong_t
)&sdhci_jmicron
,
835 .vendor
= PCI_VENDOR_ID_JMICRON
,
836 .device
= PCI_DEVICE_ID_JMICRON_JMB388_ESD
,
837 .subvendor
= PCI_ANY_ID
,
838 .subdevice
= PCI_ANY_ID
,
839 .driver_data
= (kernel_ulong_t
)&sdhci_jmicron
,
843 .vendor
= PCI_VENDOR_ID_SYSKONNECT
,
845 .subvendor
= PCI_ANY_ID
,
846 .subdevice
= PCI_ANY_ID
,
847 .driver_data
= (kernel_ulong_t
)&sdhci_syskt
,
851 .vendor
= PCI_VENDOR_ID_VIA
,
853 .subvendor
= PCI_ANY_ID
,
854 .subdevice
= PCI_ANY_ID
,
855 .driver_data
= (kernel_ulong_t
)&sdhci_via
,
859 .vendor
= PCI_VENDOR_ID_INTEL
,
860 .device
= PCI_DEVICE_ID_INTEL_MRST_SD0
,
861 .subvendor
= PCI_ANY_ID
,
862 .subdevice
= PCI_ANY_ID
,
863 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mrst_hc0
,
867 .vendor
= PCI_VENDOR_ID_INTEL
,
868 .device
= PCI_DEVICE_ID_INTEL_MRST_SD1
,
869 .subvendor
= PCI_ANY_ID
,
870 .subdevice
= PCI_ANY_ID
,
871 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mrst_hc1_hc2
,
875 .vendor
= PCI_VENDOR_ID_INTEL
,
876 .device
= PCI_DEVICE_ID_INTEL_MRST_SD2
,
877 .subvendor
= PCI_ANY_ID
,
878 .subdevice
= PCI_ANY_ID
,
879 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mrst_hc1_hc2
,
883 .vendor
= PCI_VENDOR_ID_INTEL
,
884 .device
= PCI_DEVICE_ID_INTEL_MFD_SD
,
885 .subvendor
= PCI_ANY_ID
,
886 .subdevice
= PCI_ANY_ID
,
887 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mfd_sd
,
891 .vendor
= PCI_VENDOR_ID_INTEL
,
892 .device
= PCI_DEVICE_ID_INTEL_MFD_SDIO1
,
893 .subvendor
= PCI_ANY_ID
,
894 .subdevice
= PCI_ANY_ID
,
895 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mfd_sdio
,
899 .vendor
= PCI_VENDOR_ID_INTEL
,
900 .device
= PCI_DEVICE_ID_INTEL_MFD_SDIO2
,
901 .subvendor
= PCI_ANY_ID
,
902 .subdevice
= PCI_ANY_ID
,
903 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mfd_sdio
,
907 .vendor
= PCI_VENDOR_ID_INTEL
,
908 .device
= PCI_DEVICE_ID_INTEL_MFD_EMMC0
,
909 .subvendor
= PCI_ANY_ID
,
910 .subdevice
= PCI_ANY_ID
,
911 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mfd_emmc
,
915 .vendor
= PCI_VENDOR_ID_INTEL
,
916 .device
= PCI_DEVICE_ID_INTEL_MFD_EMMC1
,
917 .subvendor
= PCI_ANY_ID
,
918 .subdevice
= PCI_ANY_ID
,
919 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mfd_emmc
,
923 .vendor
= PCI_VENDOR_ID_INTEL
,
924 .device
= PCI_DEVICE_ID_INTEL_PCH_SDIO0
,
925 .subvendor
= PCI_ANY_ID
,
926 .subdevice
= PCI_ANY_ID
,
927 .driver_data
= (kernel_ulong_t
)&sdhci_intel_pch_sdio
,
931 .vendor
= PCI_VENDOR_ID_INTEL
,
932 .device
= PCI_DEVICE_ID_INTEL_PCH_SDIO1
,
933 .subvendor
= PCI_ANY_ID
,
934 .subdevice
= PCI_ANY_ID
,
935 .driver_data
= (kernel_ulong_t
)&sdhci_intel_pch_sdio
,
939 .vendor
= PCI_VENDOR_ID_INTEL
,
940 .device
= PCI_DEVICE_ID_INTEL_BYT_EMMC
,
941 .subvendor
= PCI_ANY_ID
,
942 .subdevice
= PCI_ANY_ID
,
943 .driver_data
= (kernel_ulong_t
)&sdhci_intel_byt_emmc
,
947 .vendor
= PCI_VENDOR_ID_INTEL
,
948 .device
= PCI_DEVICE_ID_INTEL_BYT_SDIO
,
949 .subvendor
= PCI_ANY_ID
,
950 .subdevice
= PCI_ANY_ID
,
951 .driver_data
= (kernel_ulong_t
)&sdhci_intel_byt_sdio
,
955 .vendor
= PCI_VENDOR_ID_INTEL
,
956 .device
= PCI_DEVICE_ID_INTEL_BYT_SD
,
957 .subvendor
= PCI_ANY_ID
,
958 .subdevice
= PCI_ANY_ID
,
959 .driver_data
= (kernel_ulong_t
)&sdhci_intel_byt_sd
,
963 .vendor
= PCI_VENDOR_ID_INTEL
,
964 .device
= PCI_DEVICE_ID_INTEL_BYT_EMMC2
,
965 .subvendor
= PCI_ANY_ID
,
966 .subdevice
= PCI_ANY_ID
,
967 .driver_data
= (kernel_ulong_t
)&sdhci_intel_byt_emmc
,
972 .vendor
= PCI_VENDOR_ID_INTEL
,
973 .device
= PCI_DEVICE_ID_INTEL_CLV_SDIO0
,
974 .subvendor
= PCI_ANY_ID
,
975 .subdevice
= PCI_ANY_ID
,
976 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mfd_sd
,
980 .vendor
= PCI_VENDOR_ID_INTEL
,
981 .device
= PCI_DEVICE_ID_INTEL_CLV_SDIO1
,
982 .subvendor
= PCI_ANY_ID
,
983 .subdevice
= PCI_ANY_ID
,
984 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mfd_sdio
,
988 .vendor
= PCI_VENDOR_ID_INTEL
,
989 .device
= PCI_DEVICE_ID_INTEL_CLV_SDIO2
,
990 .subvendor
= PCI_ANY_ID
,
991 .subdevice
= PCI_ANY_ID
,
992 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mfd_sdio
,
996 .vendor
= PCI_VENDOR_ID_INTEL
,
997 .device
= PCI_DEVICE_ID_INTEL_CLV_EMMC0
,
998 .subvendor
= PCI_ANY_ID
,
999 .subdevice
= PCI_ANY_ID
,
1000 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mfd_emmc
,
1004 .vendor
= PCI_VENDOR_ID_INTEL
,
1005 .device
= PCI_DEVICE_ID_INTEL_CLV_EMMC1
,
1006 .subvendor
= PCI_ANY_ID
,
1007 .subdevice
= PCI_ANY_ID
,
1008 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mfd_emmc
,
1012 .vendor
= PCI_VENDOR_ID_INTEL
,
1013 .device
= PCI_DEVICE_ID_INTEL_MRFL_MMC
,
1014 .subvendor
= PCI_ANY_ID
,
1015 .subdevice
= PCI_ANY_ID
,
1016 .driver_data
= (kernel_ulong_t
)&sdhci_intel_mrfl_mmc
,
1019 .vendor
= PCI_VENDOR_ID_O2
,
1020 .device
= PCI_DEVICE_ID_O2_8120
,
1021 .subvendor
= PCI_ANY_ID
,
1022 .subdevice
= PCI_ANY_ID
,
1023 .driver_data
= (kernel_ulong_t
)&sdhci_o2
,
1027 .vendor
= PCI_VENDOR_ID_O2
,
1028 .device
= PCI_DEVICE_ID_O2_8220
,
1029 .subvendor
= PCI_ANY_ID
,
1030 .subdevice
= PCI_ANY_ID
,
1031 .driver_data
= (kernel_ulong_t
)&sdhci_o2
,
1035 .vendor
= PCI_VENDOR_ID_O2
,
1036 .device
= PCI_DEVICE_ID_O2_8221
,
1037 .subvendor
= PCI_ANY_ID
,
1038 .subdevice
= PCI_ANY_ID
,
1039 .driver_data
= (kernel_ulong_t
)&sdhci_o2
,
1043 .vendor
= PCI_VENDOR_ID_O2
,
1044 .device
= PCI_DEVICE_ID_O2_8320
,
1045 .subvendor
= PCI_ANY_ID
,
1046 .subdevice
= PCI_ANY_ID
,
1047 .driver_data
= (kernel_ulong_t
)&sdhci_o2
,
1051 .vendor
= PCI_VENDOR_ID_O2
,
1052 .device
= PCI_DEVICE_ID_O2_8321
,
1053 .subvendor
= PCI_ANY_ID
,
1054 .subdevice
= PCI_ANY_ID
,
1055 .driver_data
= (kernel_ulong_t
)&sdhci_o2
,
1058 { /* Generic SD host controller */
1059 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI
<< 8), 0xFFFF00)
1062 { /* end: all zeroes */ },
1065 MODULE_DEVICE_TABLE(pci
, pci_ids
);
1067 /*****************************************************************************\
1069 * SDHCI core callbacks *
1071 \*****************************************************************************/
1073 static int sdhci_pci_enable_dma(struct sdhci_host
*host
)
1075 struct sdhci_pci_slot
*slot
;
1076 struct pci_dev
*pdev
;
1079 slot
= sdhci_priv(host
);
1080 pdev
= slot
->chip
->pdev
;
1082 if (((pdev
->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI
<< 8)) &&
1083 ((pdev
->class & 0x0000FF) != PCI_SDHCI_IFDMA
) &&
1084 (host
->flags
& SDHCI_USE_SDMA
)) {
1085 dev_warn(&pdev
->dev
, "Will use DMA mode even though HW "
1086 "doesn't fully claim to support it.\n");
1089 ret
= pci_set_dma_mask(pdev
, DMA_BIT_MASK(32));
1093 pci_set_master(pdev
);
1098 static int sdhci_pci_bus_width(struct sdhci_host
*host
, int width
)
1102 ctrl
= sdhci_readb(host
, SDHCI_HOST_CONTROL
);
1105 case MMC_BUS_WIDTH_8
:
1106 ctrl
|= SDHCI_CTRL_8BITBUS
;
1107 ctrl
&= ~SDHCI_CTRL_4BITBUS
;
1109 case MMC_BUS_WIDTH_4
:
1110 ctrl
|= SDHCI_CTRL_4BITBUS
;
1111 ctrl
&= ~SDHCI_CTRL_8BITBUS
;
1114 ctrl
&= ~(SDHCI_CTRL_8BITBUS
| SDHCI_CTRL_4BITBUS
);
1118 sdhci_writeb(host
, ctrl
, SDHCI_HOST_CONTROL
);
1123 static void sdhci_pci_gpio_hw_reset(struct sdhci_host
*host
)
1125 struct sdhci_pci_slot
*slot
= sdhci_priv(host
);
1126 int rst_n_gpio
= slot
->rst_n_gpio
;
1128 if (!gpio_is_valid(rst_n_gpio
))
1130 gpio_set_value_cansleep(rst_n_gpio
, 0);
1131 /* For eMMC, minimum is 1us but give it 10us for good measure */
1133 gpio_set_value_cansleep(rst_n_gpio
, 1);
1134 /* For eMMC, minimum is 200us but give it 300us for good measure */
1135 usleep_range(300, 1000);
1138 static void sdhci_pci_hw_reset(struct sdhci_host
*host
)
1140 struct sdhci_pci_slot
*slot
= sdhci_priv(host
);
1143 slot
->hw_reset(host
);
1146 static const struct sdhci_ops sdhci_pci_ops
= {
1147 .enable_dma
= sdhci_pci_enable_dma
,
1148 .platform_bus_width
= sdhci_pci_bus_width
,
1149 .hw_reset
= sdhci_pci_hw_reset
,
1152 /*****************************************************************************\
1156 \*****************************************************************************/
1160 static int sdhci_pci_suspend(struct device
*dev
)
1162 struct pci_dev
*pdev
= to_pci_dev(dev
);
1163 struct sdhci_pci_chip
*chip
;
1164 struct sdhci_pci_slot
*slot
;
1165 mmc_pm_flag_t slot_pm_flags
;
1166 mmc_pm_flag_t pm_flags
= 0;
1169 chip
= pci_get_drvdata(pdev
);
1173 for (i
= 0; i
< chip
->num_slots
; i
++) {
1174 slot
= chip
->slots
[i
];
1178 ret
= sdhci_suspend_host(slot
->host
);
1181 goto err_pci_suspend
;
1183 slot_pm_flags
= slot
->host
->mmc
->pm_flags
;
1184 if (slot_pm_flags
& MMC_PM_WAKE_SDIO_IRQ
)
1185 sdhci_enable_irq_wakeups(slot
->host
);
1187 pm_flags
|= slot_pm_flags
;
1190 if (chip
->fixes
&& chip
->fixes
->suspend
) {
1191 ret
= chip
->fixes
->suspend(chip
);
1193 goto err_pci_suspend
;
1196 pci_save_state(pdev
);
1197 if (pm_flags
& MMC_PM_KEEP_POWER
) {
1198 if (pm_flags
& MMC_PM_WAKE_SDIO_IRQ
) {
1199 pci_pme_active(pdev
, true);
1200 pci_enable_wake(pdev
, PCI_D3hot
, 1);
1202 pci_set_power_state(pdev
, PCI_D3hot
);
1204 pci_enable_wake(pdev
, PCI_D3hot
, 0);
1205 pci_disable_device(pdev
);
1206 pci_set_power_state(pdev
, PCI_D3hot
);
1213 sdhci_resume_host(chip
->slots
[i
]->host
);
1217 static int sdhci_pci_resume(struct device
*dev
)
1219 struct pci_dev
*pdev
= to_pci_dev(dev
);
1220 struct sdhci_pci_chip
*chip
;
1221 struct sdhci_pci_slot
*slot
;
1224 chip
= pci_get_drvdata(pdev
);
1228 pci_set_power_state(pdev
, PCI_D0
);
1229 pci_restore_state(pdev
);
1230 ret
= pci_enable_device(pdev
);
1234 if (chip
->fixes
&& chip
->fixes
->resume
) {
1235 ret
= chip
->fixes
->resume(chip
);
1240 for (i
= 0; i
< chip
->num_slots
; i
++) {
1241 slot
= chip
->slots
[i
];
1245 ret
= sdhci_resume_host(slot
->host
);
1253 #else /* CONFIG_PM */
1255 #define sdhci_pci_suspend NULL
1256 #define sdhci_pci_resume NULL
1258 #endif /* CONFIG_PM */
1260 #ifdef CONFIG_PM_RUNTIME
1262 static int sdhci_pci_runtime_suspend(struct device
*dev
)
1264 struct pci_dev
*pdev
= container_of(dev
, struct pci_dev
, dev
);
1265 struct sdhci_pci_chip
*chip
;
1266 struct sdhci_pci_slot
*slot
;
1269 chip
= pci_get_drvdata(pdev
);
1273 for (i
= 0; i
< chip
->num_slots
; i
++) {
1274 slot
= chip
->slots
[i
];
1278 ret
= sdhci_runtime_suspend_host(slot
->host
);
1281 goto err_pci_runtime_suspend
;
1284 if (chip
->fixes
&& chip
->fixes
->suspend
) {
1285 ret
= chip
->fixes
->suspend(chip
);
1287 goto err_pci_runtime_suspend
;
1292 err_pci_runtime_suspend
:
1294 sdhci_runtime_resume_host(chip
->slots
[i
]->host
);
1298 static int sdhci_pci_runtime_resume(struct device
*dev
)
1300 struct pci_dev
*pdev
= container_of(dev
, struct pci_dev
, dev
);
1301 struct sdhci_pci_chip
*chip
;
1302 struct sdhci_pci_slot
*slot
;
1305 chip
= pci_get_drvdata(pdev
);
1309 if (chip
->fixes
&& chip
->fixes
->resume
) {
1310 ret
= chip
->fixes
->resume(chip
);
1315 for (i
= 0; i
< chip
->num_slots
; i
++) {
1316 slot
= chip
->slots
[i
];
1320 ret
= sdhci_runtime_resume_host(slot
->host
);
1328 static int sdhci_pci_runtime_idle(struct device
*dev
)
1335 #define sdhci_pci_runtime_suspend NULL
1336 #define sdhci_pci_runtime_resume NULL
1337 #define sdhci_pci_runtime_idle NULL
1341 static const struct dev_pm_ops sdhci_pci_pm_ops
= {
1342 .suspend
= sdhci_pci_suspend
,
1343 .resume
= sdhci_pci_resume
,
1344 .runtime_suspend
= sdhci_pci_runtime_suspend
,
1345 .runtime_resume
= sdhci_pci_runtime_resume
,
1346 .runtime_idle
= sdhci_pci_runtime_idle
,
1349 /*****************************************************************************\
1351 * Device probing/removal *
1353 \*****************************************************************************/
1355 static struct sdhci_pci_slot
*sdhci_pci_probe_slot(
1356 struct pci_dev
*pdev
, struct sdhci_pci_chip
*chip
, int first_bar
,
1359 struct sdhci_pci_slot
*slot
;
1360 struct sdhci_host
*host
;
1361 int ret
, bar
= first_bar
+ slotno
;
1363 if (!(pci_resource_flags(pdev
, bar
) & IORESOURCE_MEM
)) {
1364 dev_err(&pdev
->dev
, "BAR %d is not iomem. Aborting.\n", bar
);
1365 return ERR_PTR(-ENODEV
);
1368 if (pci_resource_len(pdev
, bar
) < 0x100) {
1369 dev_err(&pdev
->dev
, "Invalid iomem size. You may "
1370 "experience problems.\n");
1373 if ((pdev
->class & 0x0000FF) == PCI_SDHCI_IFVENDOR
) {
1374 dev_err(&pdev
->dev
, "Vendor specific interface. Aborting.\n");
1375 return ERR_PTR(-ENODEV
);
1378 if ((pdev
->class & 0x0000FF) > PCI_SDHCI_IFVENDOR
) {
1379 dev_err(&pdev
->dev
, "Unknown interface. Aborting.\n");
1380 return ERR_PTR(-ENODEV
);
1383 host
= sdhci_alloc_host(&pdev
->dev
, sizeof(struct sdhci_pci_slot
));
1385 dev_err(&pdev
->dev
, "cannot allocate host\n");
1386 return ERR_CAST(host
);
1389 slot
= sdhci_priv(host
);
1393 slot
->pci_bar
= bar
;
1394 slot
->rst_n_gpio
= -EINVAL
;
1395 slot
->cd_gpio
= -EINVAL
;
1397 /* Retrieve platform data if there is any */
1398 if (*sdhci_pci_get_data
)
1399 slot
->data
= sdhci_pci_get_data(pdev
, slotno
);
1402 if (slot
->data
->setup
) {
1403 ret
= slot
->data
->setup(slot
->data
);
1405 dev_err(&pdev
->dev
, "platform setup failed\n");
1409 slot
->rst_n_gpio
= slot
->data
->rst_n_gpio
;
1410 slot
->cd_gpio
= slot
->data
->cd_gpio
;
1413 host
->hw_name
= "PCI";
1414 host
->ops
= &sdhci_pci_ops
;
1415 host
->quirks
= chip
->quirks
;
1416 host
->quirks2
= chip
->quirks2
;
1418 host
->irq
= pdev
->irq
;
1420 ret
= pci_request_region(pdev
, bar
, mmc_hostname(host
->mmc
));
1422 dev_err(&pdev
->dev
, "cannot request region\n");
1426 host
->ioaddr
= pci_ioremap_bar(pdev
, bar
);
1427 if (!host
->ioaddr
) {
1428 dev_err(&pdev
->dev
, "failed to remap registers\n");
1433 if (chip
->fixes
&& chip
->fixes
->probe_slot
) {
1434 ret
= chip
->fixes
->probe_slot(slot
);
1439 if (gpio_is_valid(slot
->rst_n_gpio
)) {
1440 if (!gpio_request(slot
->rst_n_gpio
, "eMMC_reset")) {
1441 gpio_direction_output(slot
->rst_n_gpio
, 1);
1442 slot
->host
->mmc
->caps
|= MMC_CAP_HW_RESET
;
1443 slot
->hw_reset
= sdhci_pci_gpio_hw_reset
;
1445 dev_warn(&pdev
->dev
, "failed to request rst_n_gpio\n");
1446 slot
->rst_n_gpio
= -EINVAL
;
1450 host
->mmc
->pm_caps
= MMC_PM_KEEP_POWER
| MMC_PM_WAKE_SDIO_IRQ
;
1451 host
->mmc
->slotno
= slotno
;
1452 host
->mmc
->caps2
|= MMC_CAP2_NO_PRESCAN_POWERUP
;
1454 ret
= sdhci_add_host(host
);
1458 sdhci_pci_add_own_cd(slot
);
1463 if (gpio_is_valid(slot
->rst_n_gpio
))
1464 gpio_free(slot
->rst_n_gpio
);
1466 if (chip
->fixes
&& chip
->fixes
->remove_slot
)
1467 chip
->fixes
->remove_slot(slot
, 0);
1470 iounmap(host
->ioaddr
);
1473 pci_release_region(pdev
, bar
);
1476 if (slot
->data
&& slot
->data
->cleanup
)
1477 slot
->data
->cleanup(slot
->data
);
1480 sdhci_free_host(host
);
1482 return ERR_PTR(ret
);
1485 static void sdhci_pci_remove_slot(struct sdhci_pci_slot
*slot
)
1490 sdhci_pci_remove_own_cd(slot
);
1493 scratch
= readl(slot
->host
->ioaddr
+ SDHCI_INT_STATUS
);
1494 if (scratch
== (u32
)-1)
1497 sdhci_remove_host(slot
->host
, dead
);
1499 if (gpio_is_valid(slot
->rst_n_gpio
))
1500 gpio_free(slot
->rst_n_gpio
);
1502 if (slot
->chip
->fixes
&& slot
->chip
->fixes
->remove_slot
)
1503 slot
->chip
->fixes
->remove_slot(slot
, dead
);
1505 if (slot
->data
&& slot
->data
->cleanup
)
1506 slot
->data
->cleanup(slot
->data
);
1508 pci_release_region(slot
->chip
->pdev
, slot
->pci_bar
);
1510 sdhci_free_host(slot
->host
);
1513 static void sdhci_pci_runtime_pm_allow(struct device
*dev
)
1515 pm_runtime_put_noidle(dev
);
1516 pm_runtime_allow(dev
);
1517 pm_runtime_set_autosuspend_delay(dev
, 50);
1518 pm_runtime_use_autosuspend(dev
);
1519 pm_suspend_ignore_children(dev
, 1);
1522 static void sdhci_pci_runtime_pm_forbid(struct device
*dev
)
1524 pm_runtime_forbid(dev
);
1525 pm_runtime_get_noresume(dev
);
1528 static int sdhci_pci_probe(struct pci_dev
*pdev
,
1529 const struct pci_device_id
*ent
)
1531 struct sdhci_pci_chip
*chip
;
1532 struct sdhci_pci_slot
*slot
;
1534 u8 slots
, first_bar
;
1537 BUG_ON(pdev
== NULL
);
1538 BUG_ON(ent
== NULL
);
1540 dev_info(&pdev
->dev
, "SDHCI controller found [%04x:%04x] (rev %x)\n",
1541 (int)pdev
->vendor
, (int)pdev
->device
, (int)pdev
->revision
);
1543 ret
= pci_read_config_byte(pdev
, PCI_SLOT_INFO
, &slots
);
1547 slots
= PCI_SLOT_INFO_SLOTS(slots
) + 1;
1548 dev_dbg(&pdev
->dev
, "found %d slot(s)\n", slots
);
1552 BUG_ON(slots
> MAX_SLOTS
);
1554 ret
= pci_read_config_byte(pdev
, PCI_SLOT_INFO
, &first_bar
);
1558 first_bar
&= PCI_SLOT_INFO_FIRST_BAR_MASK
;
1560 if (first_bar
> 5) {
1561 dev_err(&pdev
->dev
, "Invalid first BAR. Aborting.\n");
1565 ret
= pci_enable_device(pdev
);
1569 chip
= kzalloc(sizeof(struct sdhci_pci_chip
), GFP_KERNEL
);
1576 chip
->fixes
= (const struct sdhci_pci_fixes
*)ent
->driver_data
;
1578 chip
->quirks
= chip
->fixes
->quirks
;
1579 chip
->quirks2
= chip
->fixes
->quirks2
;
1580 chip
->allow_runtime_pm
= chip
->fixes
->allow_runtime_pm
;
1582 chip
->num_slots
= slots
;
1584 pci_set_drvdata(pdev
, chip
);
1586 if (chip
->fixes
&& chip
->fixes
->probe
) {
1587 ret
= chip
->fixes
->probe(chip
);
1592 slots
= chip
->num_slots
; /* Quirk may have changed this */
1594 for (i
= 0; i
< slots
; i
++) {
1595 slot
= sdhci_pci_probe_slot(pdev
, chip
, first_bar
, i
);
1597 for (i
--; i
>= 0; i
--)
1598 sdhci_pci_remove_slot(chip
->slots
[i
]);
1599 ret
= PTR_ERR(slot
);
1603 chip
->slots
[i
] = slot
;
1606 if (chip
->allow_runtime_pm
)
1607 sdhci_pci_runtime_pm_allow(&pdev
->dev
);
1612 pci_set_drvdata(pdev
, NULL
);
1616 pci_disable_device(pdev
);
1620 static void sdhci_pci_remove(struct pci_dev
*pdev
)
1623 struct sdhci_pci_chip
*chip
;
1625 chip
= pci_get_drvdata(pdev
);
1628 if (chip
->allow_runtime_pm
)
1629 sdhci_pci_runtime_pm_forbid(&pdev
->dev
);
1631 for (i
= 0; i
< chip
->num_slots
; i
++)
1632 sdhci_pci_remove_slot(chip
->slots
[i
]);
1634 pci_set_drvdata(pdev
, NULL
);
1638 pci_disable_device(pdev
);
1641 static struct pci_driver sdhci_driver
= {
1642 .name
= "sdhci-pci",
1643 .id_table
= pci_ids
,
1644 .probe
= sdhci_pci_probe
,
1645 .remove
= sdhci_pci_remove
,
1647 .pm
= &sdhci_pci_pm_ops
1651 module_pci_driver(sdhci_driver
);
1653 MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
1654 MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver");
1655 MODULE_LICENSE("GPL");